A manufacturing method of a chip heat dissipation structure
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-18
- Publication Date
- 2026-08-11
AI Technical Summary
[0003]但是现有芯片散热结构制造技术普遍存在多方面短板,传统配方中导热填料多为简单物理混合,界面结合力弱易形成热阻瓶颈,且铜基填料在高温环境下易氧化老化,长期使用后导热性能衰减明显
[0028] In this invention, the titanate-modified diamond particles and phosphorus-doped copper nanowires inside the composite thermally conductive coating form a tight chemical bond interface during the preparation process, avoiding the thermal resistance loss caused by simple mixing of traditional fillers. Combined with a three-dimensional thermally conductive network built from carbon nanotubes, the heat generated by the chip can be rapidly conducted to the outside along a predetermined path. Simultaneously, the anti-oxidation components of molybdate and the protective synergy of the copper nanowires effectively suppress oxidation aging under high-temperature conditions, allowing the heat dissipation structure to maintain stable thermal conductivity even during prolonged high-load operation, making it suitable for demanding working environments such as servers and industrial control chips.
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Figure CN122555458A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of chip manufacturing technology, specifically a method for manufacturing a chip heat dissipation structure. Background Technology
[0002] Chip heat dissipation structures refer to physical systems designed to enhance heat exchange and thermal management, addressing the significant Joule heat generated by highly integrated, high-power microprocessors during operation and preventing performance degradation or physical damage due to localized overheating. With the evolution of Moore's Law and the surge in chip computing power, traditional methods like natural convection or simple metal block heat conduction are no longer sufficient to meet the demands of extremely high heat flux densities. Modern chip heat dissipation structures typically employ multi-level composite architectures: within the bottom layer of the package, high-thermal-conductivity copper microbumps, thermal interface materials (TIMs), and vapor chambers (VCs) or microchannel cold plates are widely integrated, achieving rapid planar heat diffusion through phase-change fluid circulation; in external system-level heat dissipation, high-density heat sinks combined with high-speed axial or centrifugal fans provide forced convection, or extremely efficient solutions such as liquid cooling radiators, immersion liquid cooling, or even thermoelectric cooling (TEC) are used. In recent years, with the development of advanced packaging technologies, microfluidic heat dissipation structures within three-dimensional stacked chips have become a cutting-edge research hotspot. As a "life support system" that ensures the reliability of semiconductor devices, extends their service life, and unleashes their ultimate performance, the innovation of chip heat dissipation structure directly determines the stable operation and miniaturization process of modern electronic information equipment.
[0003] However, existing chip heat dissipation structure manufacturing technologies generally have many shortcomings. In traditional formulations, thermally conductive fillers are mostly simple physical mixtures with weak interfacial bonding, which easily leads to thermal resistance bottlenecks. Furthermore, copper-based fillers are prone to oxidation and aging under high-temperature environments, resulting in significant degradation of thermal conductivity after long-term use. Summary of the Invention
[0004] The purpose of this invention is to provide a method for manufacturing a chip heat dissipation structure in order to solve the problems mentioned above.
[0005] The technical solution adopted in this invention is as follows: a method for manufacturing a chip heat dissipation structure, the method comprising the following steps:
[0006] S1: Plasma etching is performed on the silicon-based chip substrate to create nanoscale rough textures on the substrate surface, clean surface impurities to improve interface thermal conductivity, and provide an ideal adhesion interface for subsequent magnetron sputtering deposition of coatings.
[0007] S2: A composite thermally conductive coating is deposited on the surface of the treated substrate using magnetron sputtering. The coating is composed of interwoven diamond particles and copper nanowires, with a thickness controlled between 50 and 80 micrometers. The interwoven copper nanowires in the coating provide a migratable thermally conductive medium for subsequent laser-induced self-assembly of microchannels.
[0008] S3: By scanning the composite thermally conductive coating with a femtosecond laser, the copper nanowires in the coating are oriented to migrate and self-assemble to form a three-dimensional network microchannel using the laser thermal effect. The channel diameter is controlled between 10 and 20 micrometers, and the orientation is consistent with the heat flow direction of the core heating area of the chip. Diamond particles in the coating are retained as a thermally conductive enhancement phase for the channel wall. The formed microchannels reserve space for subsequent injection of liquid metal phase change materials.
[0009] S4: Liquid metal phase change material is injected into the microchannel. The high wettability between the diamond particles on the microchannel wall and the liquid metal is used to achieve uniform filling. When the chip is working, the phase change material absorbs heat and undergoes a phase change. It is quickly transferred to the entire coating through the microchannel, which enhances the heat exchange with the thermally conductive substrate formed in the previous step.
[0010] S5: The substrate with heat dissipation structure is bonded and packaged with the chip wafer to ensure that the core heat-generating area of the chip is precisely aligned with the microchannel array. The pressure during the packaging process is used to make the phase change material fully contact the chip surface, enhance the interface heat conduction, and at the same time ensure that the coating structure formed in the previous steps is not damaged.
[0011] S6: Perform thermal cycling tests and thermal resistance analysis on the packaged chip to verify the synergistic heat dissipation effect of microchannels and phase change materials. The test data is fed back to the previous steps to adjust the coating thickness and microchannel density and optimize the overall heat dissipation performance.
[0012] In a preferred embodiment, in step S1, during the pre-assembly of the thermally conductive filler, a 3% (w / w) solution of silane coupling agent KH560 in anhydrous ethanol is first prepared. Titanate-modified diamond particles and carbon nanotubes are then added to this solution according to a preset ratio. The mixture is then placed in a 300W ultrasonic cleaner with an ultrasonic frequency of 40kHz and continuously dispersed for 40 minutes. During dispersion, a 2-minute pause is taken every 10 minutes to prevent localized overheating and agglomeration of the carbon nanotubes. Simultaneously, a magnetic stirrer is used to synchronously stir the mixture at 200 r / min to ensure uniform distribution of the titanate-modified diamond particles and carbon nanotubes in the solution.
[0013] In a preferred embodiment, in step S1, after dispersion, the mixture is transferred to a rotary evaporator, set at 60°C and a vacuum of 0.09 MPa, to evaporate and remove the anhydrous ethanol solvent, obtaining a dry pre-assembled thermally conductive filler unit. This operation, through the bridging effect of the silane coupling agent, promotes the formation of a stable bond between the carbon nanotubes and the surface of the titanate-modified diamond particles, laying the structural foundation for the subsequent construction of a three-dimensional thermally conductive network.
[0014] In a preferred embodiment, in step S2, the composite thermally conductive coating formulation includes 28 parts by weight of titanate-modified diamond particles, 22 parts by weight of phosphorus-doped copper nanowires, 20 parts by weight of polyimide-silica hybrid resin, 4 parts by weight of silane coupling agent KH560, 8 parts by weight of carbon nanotubes, 3 parts by weight of molybdate antioxidant, and 5 parts by weight of sodium borohydride trigger.
[0015] In a preferred embodiment, in step S2, the components of the composite thermally conductive coating construct a coating structure with both high thermal conductivity and processability through a linkage mechanism such as coordination bonding between titanate and copper, interfacial diffusion of phosphorus elements, and three-dimensional interpenetration of carbon nanotubes, providing an ideal substrate for subsequent laser-induced microchannel molding and liquid metal filling.
[0016] In a preferred embodiment, step S2, the method for preparing the composite thermally conductive coating includes:
[0017] a. Pre-assembly of thermally conductive fillers: Titanate-modified diamond particles and carbon nanotubes are added to an anhydrous ethanol solution of silane coupling agent KH560 and ultrasonically dispersed at 300W for 40 minutes, so that the carbon nanotubes are tightly bonded to the diamond surface through π-π bonds to form a "diamond-carbon nanotube" pre-assembly unit, which lays the basic framework for subsequent three-dimensional linkage with copper nanowires.
[0018] b. Functional modification of copper nanowires: Phosphorus-doped copper nanowires were immersed in an aqueous solution of molybdate antioxidant and stirred in a water bath at 60°C for 20 minutes to form a surface passivation film; then sodium borohydride trigger was added and ultrasonically mixed for 15 minutes to allow the trigger to adsorb onto the active sites of the copper nanowires, providing triggering conditions for the interfacial phosphating reaction.
[0019] c. Preparation of composite slurry: The polyimide-silica hybrid resin is heated to 70°C, and pre-assembled thermally conductive filler units and functionalized copper nanowires are added in sequence. The mixture is stirred at high speed of 1200 rpm for 90 minutes, and then circulated and ground three times by a three-roll mill to make the titanate groups coordinate with the copper nanowires to prepare a uniform and stable composite thermally conductive slurry.
[0020] d. Substrate coating deposition: A composite process of magnetron sputtering and spin coating is used. First, a 5-micron titanium transition layer is magnetron sputtered on the silicon-based chip substrate to enhance the adhesion. Then, the composite slurry is spin-coated at 2500 rpm for 40 seconds to form an initial coating of about 70 microns thick.
[0021] e. Curing and interface strengthening: The substrate is placed in a vacuum oven and kept at 100°C for 40 minutes to remove the solvent. Then, the temperature is raised to 280°C and kept at 280°C for 3 hours to complete the resin curing. During the curing process, sodium borohydride decomposes to generate active hydrogen, which induces phosphorus in the copper nanowires to diffuse to the diamond surface, forming a copper phosphide interface transition layer, upgrading the physical bonding of each thermally conductive phase to chemical bonding.
[0022] f. Post-processing and performance optimization: Plasma etching is used to remove surface impurities from the cured coating and control the surface roughness; then, femtosecond laser scanning is used to induce the directional migration of copper nanowires to construct a heat-conducting channel precursor that is consistent with the heat flow direction of the chip, thus completing the preparation of the composite heat-conducting coating.
[0023] In a preferred embodiment, in step S3, the polyimide-silica hybrid resin is first placed in a three-necked flask with a heating mantle. The resin temperature is raised to 70°C using the heating mantle, and a mechanical stirrer is used to continuously stir the resin at a speed of 500 r / min to ensure that the resin is in a uniform flow state. Then, according to a preset weight ratio, a pre-assembled thermally conductive filler unit is added, and the stirring speed is kept constant for 30 minutes to ensure that the filler unit is uniformly dispersed in the resin matrix. Next, functionalized phosphorus-doped copper nanowires are added, and the stirring speed is increased to 1200 r / min, and stirring is continued for 60 minutes to allow the copper nanowires to be fully mixed with the resin and filler unit. After stirring, the mixed slurry is transferred to a three-roll mill with the roller spacing set to 20 μm, 10 μm, and 5 μm respectively, and three cycles of grinding are performed. During each grinding, the slurry feed rate is controlled at 5 ml / min to ensure that there is no obvious particle agglomeration in the slurry, and finally a uniform and stable composite thermally conductive slurry is obtained. This process combines high-speed stirring with multi-roll milling to achieve uniform dispersion of each thermally conductive component in the resin matrix, while also promoting coordination bonding between titanate groups and copper nanowires, thus strengthening the interfacial bonding between the thermally conductive phases.
[0024] In a preferred embodiment, in step S4, a silicon-based chip substrate is first selected as the deposition substrate. The substrate is placed in an ultrasonic cleaner and sequentially cleaned with acetone, anhydrous ethanol, and deionized water for 15 minutes each to remove surface oil and impurities. Then, the surface moisture is dried with a nitrogen gun, and the substrate is transferred to the vacuum chamber of a magnetron sputtering device. Magnetron sputtering parameters are set, a pure titanium target is selected, the background vacuum in the vacuum chamber is evacuated to 5 × 10⁻⁴ Pa, argon gas is introduced to maintain the working pressure at 0.3 Pa, the sputtering power is set to 150 W, and the sputtering time is controlled to 12 minutes. A titanium transition layer with a thickness of approximately 5 micrometers is deposited on the surface of the silicon-based chip substrate to enhance the adhesion between the subsequent coating and the substrate. After magnetron sputtering, the substrate is transferred to a spin coater. An appropriate amount of composite thermally conductive slurry is dropped onto the center of the substrate. The spin coater speed is set to 2500 r / min, and the spin coater time is 40 seconds. During the spin coater process, it is ensured that the slurry evenly covers the substrate surface, ultimately forming an initial coating with a thickness of approximately 70 micrometers on the substrate. This operation combines magnetron sputtering and spin coating processes to achieve a strong bond between the coating and the substrate, while ensuring the uniformity of the initial coating thickness.
[0025] In a preferred embodiment, in step S5, the silicon-based chip substrate with the initial coating is placed in a vacuum oven. The oven temperature is initially set to 100°C and held for 40 minutes to remove residual organic solvents from the coating and prevent air bubbles from affecting the coating's density during curing. Subsequently, the oven temperature is increased to 280°C at a rate of 5°C per minute and held for 3 hours to complete the curing reaction of the polyimide-silica hybrid resin. During curing, the vacuum level inside the oven is maintained at 0.08 MPa to prevent external oxygen from entering and affecting the oxidation resistance of the copper nanowires. During the high-temperature curing stage, the sodium borohydride trigger in the coating gradually decomposes to generate active hydrogen atoms. These active hydrogen atoms promote the diffusion of phosphorus from the phosphorus-doped copper nanowires to the surface of the titanate-modified diamond particles, forming a copper phosphide transition layer at the interface. This transforms the original physical bond into a chemical bond, significantly reducing interfacial thermal resistance and enhancing the thermal conductivity between the thermally conductive phases.
[0026] In a preferred embodiment, in step S6, the cured coated substrate is first transferred to a plasma etching apparatus using argon as the working gas. The gas flow rate is set to 20 sccm, the RF power to 150 W, and the etching time to 5 minutes. This removes residual resin impurities and weakly bonded particles from the coating surface, while simultaneously adjusting the coating surface roughness to approximately Ra 0.8 μm to provide a good surface condition for subsequent processes. After etching, the substrate is fixed on a femtosecond laser processing platform. The laser wavelength is set to 1064 nm, the pulse width to 200 fs, the repetition frequency to 100 kHz, the scanning speed to 500 mm per second, and the laser power to 8 W. The coating is scanned according to a preset heat conduction channel path. The thermal effect of the femtosecond laser induces the directional migration of copper nanowires in the coating, constructing a heat conduction channel precursor within the coating that aligns with the heat flow direction of the chip. This further optimizes the heat conduction path of the coating and improves the overall thermal conductivity.
[0027] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:
[0028] In this invention, the titanate-modified diamond particles and phosphorus-doped copper nanowires inside the composite thermally conductive coating form a tight chemical bond interface during the preparation process, avoiding the thermal resistance loss caused by simple mixing of traditional fillers. Combined with a three-dimensional thermally conductive network built from carbon nanotubes, the heat generated by the chip can be rapidly conducted to the outside along a predetermined path. Simultaneously, the anti-oxidation components of molybdate and the protective synergy of the copper nanowires effectively suppress oxidation aging under high-temperature conditions, allowing the heat dissipation structure to maintain stable thermal conductivity even during prolonged high-load operation, making it suitable for demanding working environments such as servers and industrial control chips. Attached Figure Description
[0029] Figure 1 This is a schematic diagram illustrating the process principle of the present invention;
[0030] Figure 2 This is a schematic diagram showing a comprehensive comparison of thermal conductivity performance in this invention.
[0031] Figure 3 This is a schematic diagram comparing the long-term stability and reliability of the present invention across multiple scenarios. Detailed Implementation
[0032] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0033] Reference Figure 1-3 A method for manufacturing a chip heat dissipation structure, the method comprising the following steps:
[0034] S1: Plasma etching is performed on the silicon-based chip substrate to create nanoscale rough textures on the substrate surface, clean surface impurities to improve interface thermal conductivity, and provide an ideal adhesion interface for subsequent magnetron sputtering deposition of coatings.
[0035] S2: A composite thermally conductive coating is deposited on the surface of the treated substrate using magnetron sputtering. The coating is composed of interwoven diamond particles and copper nanowires, with a thickness controlled between 50 and 80 micrometers. The interwoven copper nanowires in the coating provide a migratable thermally conductive medium for subsequent laser-induced self-assembly of microchannels.
[0036] S3: By scanning the composite thermally conductive coating with a femtosecond laser, the copper nanowires in the coating are oriented to migrate and self-assemble to form a three-dimensional network microchannel using the laser thermal effect. The channel diameter is controlled between 10 and 20 micrometers, and the orientation is consistent with the heat flow direction of the core heating area of the chip. Diamond particles in the coating are retained as a thermally conductive enhancement phase for the channel wall. The formed microchannels reserve space for subsequent injection of liquid metal phase change materials.
[0037] S4: Liquid metal phase change material is injected into the microchannel. The high wettability between the diamond particles on the microchannel wall and the liquid metal is used to achieve uniform filling. When the chip is working, the phase change material absorbs heat and undergoes a phase change. It is quickly transferred to the entire coating through the microchannel, which enhances the heat exchange with the thermally conductive substrate formed in the previous step.
[0038] S5: The substrate with heat dissipation structure is bonded and packaged with the chip wafer to ensure that the core heat-generating area of the chip is precisely aligned with the microchannel array. The pressure during the packaging process is used to make the phase change material fully contact the chip surface, enhance the interface heat conduction, and at the same time ensure that the coating structure formed in the previous steps is not damaged.
[0039] S6: Perform thermal cycling tests and thermal resistance analysis on the packaged chip to verify the synergistic heat dissipation effect of microchannels and phase change materials. The test data is fed back to the previous steps to adjust the coating thickness and microchannel density and optimize the overall heat dissipation performance.
[0040] In step S1, during the pre-assembly of the thermally conductive filler, a 3% (w / w) solution of silane coupling agent KH560 in anhydrous ethanol is first prepared. Titanate-modified diamond particles and carbon nanotubes are then added to this solution according to a preset ratio. The mixture is then placed in a 300W ultrasonic cleaner with an ultrasonic frequency of 40kHz and continuously dispersed for 40 minutes. During dispersion, a 2-minute pause is taken every 10 minutes to prevent localized overheating and agglomeration of the carbon nanotubes. Simultaneously, a magnetic stirrer is used to synchronously stir the mixture at 200 rpm to ensure uniform distribution of the titanate-modified diamond particles and carbon nanotubes in the solution.
[0041] In step S1, after dispersion, the mixture is transferred to a rotary evaporator, set at 60°C and a vacuum of 0.09 MPa, to evaporate and remove the anhydrous ethanol solvent, yielding a dry pre-assembled thermally conductive filler unit. This operation, through the bridging effect of the silane coupling agent, promotes the formation of a stable bond between the carbon nanotubes and the surface of the titanate-modified diamond particles, laying the structural foundation for the subsequent construction of a three-dimensional thermally conductive network.
[0042] In step S2, the composite thermally conductive coating formulation includes 28 parts by weight of titanate-modified diamond particles, 22 parts by weight of phosphorus-doped copper nanowires, 20 parts by weight of polyimide-silica hybrid resin, 4 parts by weight of silane coupling agent KH560, 8 parts by weight of carbon nanotubes, 3 parts by weight of molybdate antioxidant, and 5 parts by weight of sodium borohydride trigger.
[0043] In step S2, the components of the composite thermally conductive coating construct a coating structure with both high thermal conductivity and processability through a linkage mechanism such as coordination bonding between titanate and copper, interfacial diffusion of phosphorus elements, and three-dimensional interpenetration of carbon nanotubes, providing an ideal substrate for subsequent laser-induced microchannel forming and liquid metal filling.
[0044] In step S2, the method for preparing the composite thermally conductive coating includes:
[0045] a. Pre-assembly of thermally conductive fillers: Titanate-modified diamond particles and carbon nanotubes are added to an anhydrous ethanol solution of silane coupling agent KH560 and ultrasonically dispersed at 300W for 40 minutes, so that the carbon nanotubes are tightly bonded to the diamond surface through π-π bonds to form a "diamond-carbon nanotube" pre-assembly unit, which lays the basic framework for subsequent three-dimensional linkage with copper nanowires.
[0046] b. Functional modification of copper nanowires: Phosphorus-doped copper nanowires were immersed in an aqueous solution of molybdate antioxidant and stirred in a water bath at 60°C for 20 minutes to form a surface passivation film; then sodium borohydride trigger was added and ultrasonically mixed for 15 minutes to allow the trigger to adsorb onto the active sites of the copper nanowires, providing triggering conditions for the interfacial phosphating reaction.
[0047] c. Preparation of composite slurry: The polyimide-silica hybrid resin is heated to 70°C, and pre-assembled thermally conductive filler units and functionalized copper nanowires are added in sequence. The mixture is stirred at high speed of 1200 rpm for 90 minutes, and then circulated and ground three times by a three-roll mill to make the titanate groups coordinate with the copper nanowires to prepare a uniform and stable composite thermally conductive slurry.
[0048] d. Substrate coating deposition: A composite process of magnetron sputtering and spin coating is used. First, a 5-micron titanium transition layer is magnetron sputtered on the silicon-based chip substrate to enhance the adhesion. Then, the composite slurry is spin-coated at 2500 rpm for 40 seconds to form an initial coating of about 70 microns thick.
[0049] e. Curing and interface strengthening: The substrate is placed in a vacuum oven and kept at 100°C for 40 minutes to remove the solvent. Then, the temperature is raised to 280°C and kept at 280°C for 3 hours to complete the resin curing. During the curing process, sodium borohydride decomposes to generate active hydrogen, which induces phosphorus in the copper nanowires to diffuse to the diamond surface, forming a copper phosphide interface transition layer, upgrading the physical bonding of each thermally conductive phase to chemical bonding.
[0050] f. Post-processing and performance optimization: Plasma etching is used to remove surface impurities from the cured coating and control the surface roughness; then, femtosecond laser scanning is used to induce the directional migration of copper nanowires to construct a heat-conducting channel precursor that is consistent with the heat flow direction of the chip, thus completing the preparation of the composite heat-conducting coating.
[0051] In step S3, the polyimide-silica hybrid resin is first placed in a three-necked flask equipped with a heating mantle. The resin temperature is raised to 70°C using the heating mantle, while a mechanical stirrer is used to continuously stir at 500 rpm to ensure the resin is in a uniform flow state. Then, according to the preset weight proportions, pre-assembled thermally conductive filler units are added, and the stirring speed is maintained constant for 30 minutes to ensure the filler units are uniformly dispersed in the resin matrix. Next, functionalized phosphorus-doped copper nanowires are added, and the stirring speed is increased to 1200 rpm, continuing to stir for 60 minutes to allow the copper nanowires to fully mix with the resin and filler units. After stirring, the mixture is transferred to a three-roll mill with roller spacing of 20 μm, 10 μm, and 5 μm, and subjected to three cycles of grinding. During each grinding cycle, the slurry feed rate is controlled at 5 ml / min to ensure no significant particle agglomeration in the slurry, ultimately obtaining a uniform and stable composite thermally conductive slurry. This process combines high-speed stirring with multi-roll milling to achieve uniform dispersion of each thermally conductive component in the resin matrix, while also promoting coordination bonding between titanate groups and copper nanowires, thus strengthening the interfacial bonding between the thermally conductive phases.
[0052] In step S4, a silicon-based chip substrate is first selected as the deposition substrate. The substrate is placed in an ultrasonic cleaner and cleaned sequentially with acetone, anhydrous ethanol, and deionized water for 15 minutes each to remove surface oil and impurities. Then, the surface moisture is dried with a nitrogen gun, and the substrate is transferred to the vacuum chamber of a magnetron sputtering device. Magnetron sputtering parameters are set, a pure titanium target is selected, the background vacuum in the vacuum chamber is evacuated to 5 × 10⁻⁴ Pa, argon gas is introduced to maintain the working pressure at 0.3 Pa, the sputtering power is set to 150 W, and the sputtering time is controlled at 12 minutes. A titanium transition layer with a thickness of approximately 5 micrometers is deposited on the surface of the silicon-based chip substrate to enhance the adhesion between the subsequent coating and the substrate. After magnetron sputtering, the substrate is transferred to a spin coater. An appropriate amount of composite thermally conductive slurry is dropped onto the center of the substrate. The spin coater speed is set to 2500 r / min, and the spin coater time is 40 seconds. During the spin coater process, it is ensured that the slurry evenly covers the substrate surface, ultimately forming an initial coating with a thickness of approximately 70 micrometers on the substrate. This operation combines magnetron sputtering and spin coating processes to achieve a strong bond between the coating and the substrate, while ensuring the uniformity of the initial coating thickness.
[0053] In step S5, the silicon-based chip substrate with the initial coating is placed in a vacuum oven. The oven temperature is initially set to 100°C and held for 40 minutes to remove residual organic solvents from the coating and prevent air bubbles from affecting the coating's density during curing. Subsequently, the oven temperature is increased to 280°C at a rate of 5°C per minute and held for 3 hours to complete the curing reaction of the polyimide-silica hybrid resin. During curing, the vacuum level inside the oven is maintained at 0.08 MPa to prevent external oxygen from affecting the oxidation resistance of the copper nanowires. During the high-temperature curing stage, the sodium borohydride trigger in the coating gradually decomposes to generate active hydrogen atoms. These active hydrogen atoms promote the diffusion of phosphorus from the phosphorus-doped copper nanowires to the surface of the titanate-modified diamond particles, forming a copper phosphide transition layer at the interface. This transforms the original physical bond into a chemical bond, significantly reducing interfacial thermal resistance and enhancing the thermal conductivity between the thermally conductive phases.
[0054] In step S6, the cured coated substrate is first transferred to a plasma etching apparatus using argon as the working gas. The gas flow rate is set to 20 sccm, the RF power to 150 W, and the etching time to 5 minutes. This removes residual resin impurities and weakly bonded particles from the coating surface, while simultaneously adjusting the surface roughness to approximately Ra 0.8 μm to provide a good surface condition for subsequent processes. After etching, the substrate is fixed on a femtosecond laser processing platform. The laser wavelength is set to 1064 nm, the pulse width to 200 fs, the repetition frequency to 100 kHz, the scanning speed to 500 mm / s, and the laser power to 8 W. The coating is scanned according to a preset heat conduction channel path. The thermal effect of the femtosecond laser induces the directional migration of copper nanowires in the coating, constructing a heat conduction channel precursor within the coating that aligns with the heat flow direction of the chip. This further optimizes the heat conduction path of the coating and improves the overall thermal conductivity. After laser scanning, the coating surface is purged with a nitrogen gun to remove debris generated during processing, ultimately yielding a composite thermally conductive coating with optimized performance.
[0055] Comparative example:
[0056] A method for manufacturing a chip heat dissipation structure includes the following steps:
[0057] Raw material preparation: Natural diamond particles that have not been modified with titanate, pure copper nanowires that have not been doped with phosphorus and functionalized, ordinary carbon nanotubes that have not been treated with coupling agents, and pure polyimide resin that has not been doped with silica were selected as raw materials. The mass ratio of each component is completely consistent with that of the embodiments of the present invention.
[0058] Composite slurry preparation: Pure polyimide resin was added to a three-necked flask, and all thermally conductive fillers were directly added at room temperature with a mechanical stirring speed of 800 r / min. After stirring for 90 minutes, the mixture was transferred to a three-roll mill and milled twice each with a roller spacing of 10 μm and 5 μm to obtain the composite slurry. No silane coupling agent was used for pre-assembly treatment throughout the process.
[0059] Coating deposition: The silicon-based chip substrate was simply wiped with anhydrous ethanol without magnetron sputtering of the transition layer. The composite slurry was directly dropped onto the substrate surface and spin-coated at 2000 r / min for 30 seconds to form an initial coating with a thickness of about 70 μm.
[0060] Curing process: The coated substrate was placed in a regular oven and heated directly to 280°C for 3 hours to complete the curing process. No segmented heating and adhesive removal or interface strengthening treatment was performed. No plasma etching or femtosecond laser scanning post-processing was performed after curing.
[0061] A comprehensive comparison of thermal conductivity performance is available. Figure 2 Thermal conductivity was tested using the laser flare method (ASTM E1461 standard). The sample surface was heated by a pulsed laser, and the back-side temperature response curve was acquired. Thermal conductivity values at different temperatures were derived by combining data on thermal diffusivity, density, and specific heat capacity. Interfacial thermal resistance was tested using the time-domain thermal reflectance method (TDTR). The attenuation of the reflected signal from the thermal pulse at the coating-substrate interface was analyzed, and the thermal resistance loss at the interface was calculated. The highest surface temperature of the chip was captured using an infrared thermal imager under constant heat flux density heating conditions. The heat flux density was precisely controlled by a precision heating stage, and the testing environment was room temperature and windless.
[0062] A comparison of long-term stability and reliability across multiple scenarios is available. Figure 3 The bonding strength was tested using a tensile peel test on a universal testing machine (GB / T 5210 standard). The coating-substrate composite specimen was prepared as a standard tensile test piece, and the maximum tensile force during coating peeling was measured. The bonding strength was calculated based on the effective area of the specimen. Thermal conductivity retention rate is the ratio of thermal conductivity after aging / environmental testing to the initial thermal conductivity, expressed as a percentage. Thermal cycling tests followed IEC 60068-2-14 standard, with a temperature range of -40℃ to 125℃ and a cycle duration of 1 hour. High-temperature aging was continuously conducted in a 150℃ constant temperature chamber. Salt spray testing followed GB / T 10125 standard, and damp heat testing followed GB / T 2423.3 standard. After testing, the coating appearance was observed, and the core performance indicators were retested.
[0063] like Figure 2As shown, the thermal conductivity data across the entire temperature range demonstrates that the thermal conductivity of the heat dissipation structure of this invention remains consistently above 75 W / (m·K) within the range of -40℃ to 150℃, with performance degradation of less than 3% under high-temperature conditions. In contrast, the thermal conductivity of the comparative example continuously declines with increasing temperature, reaching only 81% of its initial value at 150℃. This fully demonstrates the role of functionalized fillers and interface strengthening processes in improving thermal conductivity stability. Regarding interface thermal resistance, the value of this invention is only 25% of that of the comparative example, indicating that the pre-assembly process allows for a tighter bond between the thermally conductive filler and the substrate, significantly reducing interface heat loss. In chip temperature tests at different heat flux densities, the highest temperature of the chip in this invention is consistently more than 20℃ lower than that of the comparative example, with a temperature difference of nearly 28℃ at a heat flux density of 15 W / cm². This proves that the three-dimensional thermally conductive network of this invention can more efficiently dissipate chip heat, meeting the stringent heat dissipation requirements of high-power chips.
[0064] like Figure 3 As shown in the strength test results, the initial bonding strength of this invention is 73.5% higher than that of the comparative example. After 2000 cycles of thermal cycling, it still maintains 24.5 MPa, while the comparative example only has 5.2 MPa and shows obvious delamination. This indicates that the interface strengthening treatment between the magnetron sputtering transition layer and the curing stage fundamentally solves the problem of easy peeling of traditional coatings. In aging and environmental tests, the thermal conductivity retention rate of this invention still reaches 92.1% after 3000 hours of high-temperature aging, and the performance retention rate after salt spray and damp heat tests is also maintained above 95%. In contrast, the thermal conductivity retention rate of the comparative example is less than 70% after the same tests, and the coating shows damage such as oxidation discoloration and edge cracking. This fully verifies the antioxidant design and component synergy of this invention, which significantly improves the long-term reliability and environmental adaptability of the heat dissipation structure.
[0065] In summary, in this invention, the titanate-modified diamond particles and phosphorus-doped copper nanowires inside the composite thermally conductive coating form a tight chemical bond interface during the preparation process, avoiding the thermal resistance loss caused by simple mixing of traditional fillers. Combined with the three-dimensional thermally conductive network built from carbon nanotubes, the heat generated by the chip can be rapidly conducted to the outside along a predetermined path. Simultaneously, the antioxidant components of molybdate and the protective synergy of the copper nanowires effectively suppress oxidation aging under high-temperature conditions, allowing the heat dissipation structure to maintain stable thermal conductivity even during prolonged high-load operation, making it suitable for demanding working environments such as servers and industrial control chips.
[0066] The pre-assembly step ensures uniform dispersion of the thermally conductive filler, avoiding localized thermal blind spots caused by agglomeration. The deposition method combining magnetron sputtering and spin coating ensures a strong bond between the coating and the chip substrate, preventing delamination due to thermal expansion and contraction. Interface strengthening treatment during the curing stage further tightens the adhesion between the thermally conductive components, while post-processing laser scanning specifically optimizes the thermal channel routing to better align with the chip's heat flow distribution. This entire process guarantees both the density and uniformity of the coating, while allowing for adjustments to the thermal path according to the needs of different chips, significantly improving the adaptability and reliability of the heat dissipation structure.
[0067] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the term "comprising" or any other variations thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0068] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method of manufacturing a chip heat spreading structure, characterized by: The method includes the following steps: S1: Plasma etching is performed on the silicon-based chip substrate to create nanoscale rough textures on the substrate surface. S2: A composite thermally conductive coating is deposited on the surface of the treated substrate using magnetron sputtering. The coating is composed of interwoven diamond particles and copper nanowires, with a thickness controlled between 50 and 80 micrometers. S3: By scanning the composite thermally conductive coating with a femtosecond laser, the copper nanowires in the coating are directionally migrated and self-assembled to form a three-dimensional network microchannel using the laser thermal effect, with the channel diameter controlled between 10 and 20 micrometers. S4: Liquid metal phase change material is injected into the microchannel. The high wettability between the diamond particles on the microchannel wall and the liquid metal is used to achieve uniform filling. The phase change material absorbs heat and undergoes a phase change when the chip is working. S5: Bond and package the substrate with heat dissipation structure to the chip wafer to ensure precise alignment between the core heat-generating area of the chip and the microchannel array. Utilize the pressure during the packaging process to make the phase change material fully contact the chip surface and enhance the interface heat conduction. S6: Perform thermal cycling tests and thermal resistance analysis on the packaged chip. Once the tests are passed, the entire manufacturing process is complete.
2. The method of claim 1, wherein: In step S1, during the pre-assembly of the thermally conductive filler, a 3% mass fraction of anhydrous ethanol solution of silane coupling agent KH560 is first prepared. Titanate-modified diamond particles and carbon nanotubes are added to the solution according to a preset ratio. Then, the mixed system is placed in an ultrasonic cleaner with a power of 300W, the ultrasonic frequency is set to 40kHz, and the dispersion treatment is carried out for 40 minutes. During the dispersion process, the process is paused for 2 minutes every 10 minutes.
3. The method of claim 1, wherein: In step S1, after dispersion, the mixture is transferred to a rotary evaporator, the temperature is set to 60°C and the vacuum degree is 0.09MPa, and the anhydrous ethanol solvent is evaporated to obtain a dry pre-assembled thermally conductive filler unit. This operation promotes the formation of a stable bond between carbon nanotubes and titanate-modified diamond particles through the bridging effect of silane coupling agent, laying the structural foundation for the subsequent construction of a three-dimensional thermally conductive network.
4. The method of claim 1, wherein: In step S2, the composite thermally conductive coating formulation includes 28 parts by weight of titanate-modified diamond particles, 22 parts by weight of phosphorus-doped copper nanowires, 20 parts by weight of polyimide-silica hybrid resin, 4 parts by weight of silane coupling agent KH560, 8 parts by weight of carbon nanotubes, 3 parts by weight of molybdate antioxidant, and 5 parts by weight of sodium borohydride trigger.
5. The method of claim 1, wherein: In step S2, the components of the composite thermally conductive coating construct a coating structure with both high thermal conductivity and processability through a linkage mechanism such as coordination bonding between titanate and copper, interfacial diffusion of phosphorus elements, and three-dimensional interpenetration of carbon nanotubes, providing an ideal substrate for subsequent laser-induced microchannel forming and liquid metal filling.
6. The method of claim 1, wherein: In step S2, the method for preparing the composite thermally conductive coating includes: a. Thermally conductive filler pre-assembly: Titanate-modified diamond particles and carbon nanotubes are added to an anhydrous ethanol solution of silane coupling agent KH560 and ultrasonically dispersed at 300W for 40 minutes to allow carbon nanotubes to be tightly bonded to the diamond surface through π-π bonds, forming a "diamond-carbon nanotube" pre-assembly unit, which provides a basic framework for subsequent three-dimensional linkage with copper nanowires. b. Functional modification of copper nanowires: Phosphorus-doped copper nanowires were immersed in an aqueous solution of molybdate antioxidant and stirred in a water bath at 60°C for 20 minutes to form a surface passivation film; then sodium borohydride trigger was added and ultrasonically mixed for 15 minutes to allow the trigger to adsorb onto the active sites of the copper nanowires, providing triggering conditions for the interfacial phosphating reaction. c. Preparation of composite slurry: The polyimide-silica hybrid resin is heated to 70°C, and pre-assembled thermally conductive filler unit and functionalized copper nanowires are added in sequence. The mixture is stirred at high speed of 1200 rpm for 90 minutes, and then circulated and ground three times by a three-roll mill to make the titanate groups coordinate with the copper nanowires to prepare a uniform and stable composite thermally conductive slurry. d. Substrate coating deposition: A composite process of magnetron sputtering and spin coating is used. First, a 5-micron titanium transition layer is magnetron sputtered on the silicon-based chip substrate to enhance the adhesion. Then, the composite slurry is spin-coated at 2500 rpm for 40 seconds to form an initial coating of about 70 microns thick. e. Curing and interface strengthening: The substrate is placed in a vacuum oven and kept at 100°C for 40 minutes to remove the solvent. Then the temperature is raised to 280°C and kept for 3 hours to complete the resin curing. During the curing process, sodium borohydride decomposes to generate active hydrogen, which induces phosphorus in copper nanowires to diffuse to the diamond surface, forming a copper phosphide interface transition layer, upgrading the physical bonding of each thermally conductive phase to chemical bonding. f. Post-processing and performance optimization: Plasma etching is used to remove surface impurities from the cured coating and control the surface roughness; then, femtosecond laser scanning is used to induce the directional migration of copper nanowires to construct a heat-conducting channel precursor that is consistent with the heat flow direction of the chip, thus completing the preparation of the composite heat-conducting coating.
7. The method for manufacturing a chip heat dissipation structure as described in claim 1, characterized in that: In step S3, the polyimide-silica hybrid resin is first placed in a three-necked flask with a heating mantle. The resin temperature is raised to 70°C by the heating mantle, and a mechanical stirrer is used to continuously stir the resin at a speed of 500 r / min to ensure that the resin is in a uniform flow state. Then, according to the preset weight proportions, the pre-assembled thermally conductive filler unit is added first, and the stirring speed is kept constant for 30 minutes to make the filler unit uniformly dispersed in the resin matrix. Next, the functionalized phosphorus-doped copper nanowires are added, the stirring speed is increased to 1200 r / min, and stirring is continued for 60 minutes to allow the copper nanowires to be fully mixed with the resin and filler unit.
8. The method for manufacturing a chip heat dissipation structure as described in claim 1, characterized in that: In step S4, a silicon-based chip substrate is first selected as the deposition substrate. The substrate is placed in an ultrasonic cleaner and cleaned sequentially with acetone, anhydrous ethanol, and deionized water for 15 minutes each to remove surface oil and impurities. Then, the surface moisture is dried with a nitrogen gun and transferred to the vacuum chamber of a magnetron sputtering device. The magnetron sputtering parameters are set, a pure titanium target is selected, the background vacuum in the vacuum chamber is evacuated to 5×10^-4 Pa, argon gas is introduced to maintain the working pressure at 0.3 Pa, the sputtering power is set to 150 W, and the sputtering time is controlled to 12 minutes to deposit a titanium transition layer with a thickness of about 5 micrometers on the surface of the silicon-based chip substrate.
9. The method for manufacturing a chip heat dissipation structure as described in claim 1, characterized in that: In step S5, the silicon-based chip substrate with the initial coating is placed in a vacuum oven. First, the oven temperature is set to 100°C and kept at that temperature for 40 minutes to remove residual organic solvents from the coating and prevent bubbles from forming during the curing process, which would affect the density of the coating. Then, the oven temperature is raised to 280°C at a rate of 5°C per minute and kept at that temperature for 3 hours to complete the curing reaction of the polyimide-silica hybrid resin.
10. The method of claim 1, wherein: In step S6, the cured coating substrate is first transferred to a plasma etching device, using argon as the working gas, with a gas flow rate of 20 sccm, a radio frequency power of 150W, and an etching time of 5 minutes. After etching, the substrate is fixed on a femtosecond laser processing platform. The laser wavelength is set to 1064nm, the pulse width to 200fs, the repetition frequency to 100kHz, the scanning speed to 500mm per second, and the laser power to 8W. The coating is then scanned according to the preset heat conduction channel path.