Power conversion device

Abstract

This invention provides a power conversion device capable of minimizing the induction of switching ripple in a GND-shared dual inverter. The power conversion device includes: a primary-side inverter connected to one end of an open-type coil; and a secondary-side inverter connected to the other end of the coil, applying the differential voltage between the primary and secondary-side inverters to a motor. The primary-side inverter is connected to a DC power supply, and the secondary-side inverter is connected to a capacitor. The negative power lines of the primary and secondary-side inverters are shared, and the device is capable of eliminating or suppressing the zero-phase voltage (V) of the primary-side inverter. z1 ) and the zero-phase voltage (V) of the secondary inverter z2 The potential difference is the zero-phase voltage (V). z ) control device (6) for changes.

Description

Technical Field

[0001] The present invention relates to a power conversion device that applies AC output to a motor having an open coil structure with open ends, using two inverters, a primary-side inverter and a secondary-side inverter. Background Technology

[0002] For example, in the case of driving the electric compressor of the air conditioning unit for electric vehicles such as electric cars and hybrid vehicles, a three-phase permanent magnet synchronous motor is used. The motor control method using a three-phase modulation inverter typically controls the d-axis current i. d With q-axis current i q Vector control.

[0003] Here, when the input voltage drops, the motor driven by the inverter experiences a decrease in the speed it can drive or a decrease in the torque it can output at high speeds, thus tending to narrow the range capable of high-speed driving. In the aforementioned vehicle-mounted electric compressors that drive the compression mechanism via a motor housed within a casing, the required range of input voltage was previously not large; however, in recent years, even for electric compressors, the requirements for the driveable range in response to changes in input voltage have become more stringent.

[0004] However, in electric compressors used in vehicles, since the electric vehicle's battery is used as a DC power source, there is a drop in input voltage. When the input voltage drops, the output torque becomes lower in the high-speed range.

[0005] Therefore, as a method to increase the output voltage to the motor relative to the input voltage, various dual-inverter power conversion devices have been proposed (for example, see Patent Document 1 and Patent Document 2). These devices use two inverters on the primary and secondary sides to sandwich a motor with a so-called open coil structure (a motor that is led outward without being connected to the neutral point of the motor) to apply the differential voltage between the primary-side inverter and the secondary-side inverter to drive the motor. Existing technical documents Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2006-149153 Patent Document 2: Japanese Patent Application Publication No. 2005-33984 Summary of the Invention The problem to be solved by the present invention

[0007] In a dual-inverter power conversion device that drives a motor with an open coil structure, since there are two inverters on the primary and secondary sides, there is a degree of freedom in how to allocate the voltage command value to the two inverters.

[0008] Furthermore, conventional dual-inverter power conversion devices can be broadly categorized into... Figures 19-21 The three types shown. Figure 19 It is a typical power conversion device using a shared-power dual inverter. In Figure 19 In the above, M is the motor with an open-structure coil, INV1 is the primary-side inverter, INV2 is the secondary-side inverter, and these are clamped into the stator coil of motor M.

[0009] A shared-power dual inverter is the simplest type, allowing the primary and secondary sides to share the same power supply. Since there is only one power supply, the voltage ratings of all semiconductor components and passive components (capacitors, etc.) on both the primary and secondary sides must be set according to the power supply voltage. Furthermore, because a path for zero-phase current exists, measures must be taken to counteract this zero-phase current, but both the primary and secondary sides can output effective power P and ineffective power Q.

[0010] Furthermore, in this configuration, since a shared power supply is used on both the primary and secondary sides, half of the output voltage command value is achieved by each inverter INV1 and INV2.

[0011] then, Figure 20 It is a power conversion device using an isolated power supply type dual inverter. Even in Figure 20 In this design, M is also a motor with an open-type coil structure. INV1 is the primary-side inverter, and INV2 is the secondary-side inverter. These are clamped into the stator coils of motor M. However, in this configuration, two isolated power supplies are configured on the primary and secondary sides respectively. Because two isolated power supplies are required, there is a problem with the size of the device. However, it has the advantages of no zero-phase current flowing and the ability to output effective power P and ineffective power Q on both the primary and secondary sides.

[0012] Furthermore, in this configuration, since the primary and secondary sides are driven by different power supplies (voltages), the output is determined based on the voltage ratio. For example, the voltage V of the power supply on the primary side... dc1 The voltage V of the power supply on the secondary side dc2 In the case of 1 / 2, 1 / 3 of the voltage command value is output by the primary-side inverter INV1, and 2 / 3 of the voltage command value is output by the secondary-side inverter INV2.

[0013] then, Figure 21 It is a power conversion device using a floating capacitor type dual inverter. Even in Figure 21In this configuration, M is also a motor with an open-type coil structure. INV1 is the primary-side inverter, and INV2 is the secondary-side inverter. These are clamped into the stator coil of motor M. However, in this configuration, a floating capacitor C is configured in the secondary-side inverter. The capacitor is charged and discharged from the motor side, thereby controlling the secondary-side voltage.

[0014] The floating capacitor method has the characteristics of being able to control the secondary side voltage and not allowing zero-phase current to flow. On the other hand, in order to drive the switching elements of the secondary side inverter, an additional power supply is required for driving.

[0015] Furthermore, since the power supply of the secondary-side inverter becomes a capacitor, it can only supply ineffective power Q. Therefore, the effective voltage V of the primary-side inverter INV1 output voltage command value is... real The secondary inverter INV2 outputs an invalid voltage V. imag Additionally, the invalid voltage V that cannot be output by the secondary-side inverter INV2. imag It is also borne by the primary-side inverter INV1.

[0016] exist Figure 21 In the power conversion device of the floating capacitor type dual inverter shown, the primary-side inverter INV1 can output both active power P and inactive power Q, while the secondary-side inverter INV2 can only output inactive power Q. Therefore, in the power conversion device of the floating capacitor type dual inverter, the primary-side inverter INV1 can output both active power P and inactive power Q, while the secondary-side inverter INV2 can only output inactive power Q. Figure 22 In the control shown in the block diagram, the voltage command values ​​of the primary-side inverter INV1 and the secondary-side inverter INV2 are allocated according to the following mathematical formulas (I) and (II) to drive the motor M.

[0017] [Mathematical Expression 1]

[0018] In addition, Figure 22 In mathematical expressions (I) and (II), V d ref It is the d-axis voltage command value, V q ref This is the q-axis voltage command value, i d It is the d-axis current, i q It is the q-axis current, θ Im It is the phase of the motor current, V real It is the effective voltage, V imag It is an invalid voltage, v d1 ref This is the d-axis voltage command value of the primary-side inverter INV1, v q1 ref This is the q-axis voltage command value of the primary-side inverter INV1, v d2 refThis is the d-axis voltage command value of the secondary-side inverter INV2, v q2 ref This is the q-axis voltage command value for the secondary-side inverter INV2.

[0019] Furthermore, in the power conversion device of the floating capacitor type dual inverter, in addition to driving the motor M, it is also necessary to control the DC link voltage of the secondary inverter INV2, that is, the secondary voltage Vdc2, and therefore add the voltage vector component required for charging the capacitor C.

[0020] In this case, in the power conversion device of the floating capacitor type dual inverter, since there is no zero-phase current, the motor current I is utilized. m And voltage vector, controlling the secondary side voltage V dc2 That is, such as Figure 23 As shown, the phase difference of the voltage vector between the primary-side inverter INV1 and the secondary-side inverter INV2 is controlled, thereby controlling the secondary-side voltage V. dc2 The charging and discharging modes.

[0021] Specifically, if the output voltage vector V2 of the secondary inverter INV2 is made close to the current phase (+β) with a phase lead of 90 degrees relative to the current phase, it becomes a charging mode; conversely, if the phase is made to lead (-β), it becomes a discharging mode. Furthermore, besides this method, there are many other methods such as adding phase difference and allocating vectors. In such a floating capacitor type dual inverter power conversion device, since the capacitor C of the secondary inverter INV2 can be boosted while driving the motor M, it has the advantage of further increasing the voltage that can be applied to the motor M compared to a shared power supply type.

[0022] However, the conventional dual-inverter power conversion devices described above all have a large number of components, making it difficult to achieve low cost and miniaturization. In particular, in the floating capacitor type dual-inverter power conversion device, since the secondary-side inverter INV2 is at a floating potential, the gate drive power supply for the switching elements of the secondary-side inverter INV2 is different from that of the primary-side inverter INV1. Therefore, an isolated power supply is required for the gate drive of the switching elements of the secondary-side inverter INV2, which has a different reference potential. In devices with limited substrate area, such as electric compressors used in automobiles, it is difficult to adopt this method in terms of component mounting area and cost.

[0023] Therefore, the applicant first raised Figure 1 The power conversion device shown. This method uses a primary-side inverter INV1 and a secondary-side inverter INV2 to convert... Figure 19 The power supply type shown has separate positive power lines, and only the negative power lines are shared, such as... Figure 21As shown in the floating capacitor type, the capacitor is configured on the secondary side. Hereinafter, the power conversion device using this method will be referred to as a GND-shared type dual inverter. In this method, it is possible to connect with... Figure 22 , Figure 23 The control of the power conversion device in the floating capacitor type dual inverter described herein also controls the secondary side voltage. Moreover, since the secondary side voltage can be stepped up or down, the operating range can be expanded by stepping up the secondary side voltage.

[0024] Furthermore, in the GND-shared type dual inverter power conversion device, similar to the power supply-shared type, the power supply of the drive circuit of the secondary-side inverter INV2 can be shared. Moreover, the GND-shared type, which allows the primary-side inverter INV1 on the power supply side to be constructed with high-voltage components and the controllable secondary-side inverter INV2 to be constructed with low-voltage components, offers significant advantages in applications with large power supply voltage fluctuations, as the power supply of the drive circuit of the secondary-side inverter INV2 can be shared with that of the primary-side inverter INV1.

[0025] However, in this type of GND-shared dual-inverter power conversion device, there is a problem with the flow of zero-phase current. In particular, when driving by boosting the secondary-side voltage, there is a tendency for the instantaneous potential difference caused by the PWM of the primary-side inverter INV1 and the secondary-side inverter INV2 to increase, thus inducing zero-phase current ripple. Since the impedance of this zero phase is smaller than that of the three phases (UVW phases), the instantaneous zero-phase voltage fluctuation caused by the switching of the primary-side inverter INV1 and the secondary-side inverter INV2 induces a large current ripple. In addition to concerns about increased losses and conducted noise, the increased current amplitude due to the ripple necessitates an increase in the maximum rated current.

[0026] The present invention was made to solve this prior art problem and provides a power conversion device that can minimize the induction of switching ripple in the above-mentioned GND shared type dual inverter. Methods for solving problems

[0027] The power conversion device of the present invention includes: a primary-side inverter connected to one end of a coil with an open structure of a motor; and a secondary-side inverter connected to the other end of the coil, wherein a differential voltage between the primary-side inverter and the secondary-side inverter is applied to the motor; the primary-side inverter is connected to a DC power supply; the secondary-side inverter is connected to a capacitor; and the negative power lines of the primary-side inverter and the secondary-side inverter are shared. The power conversion device also includes a control device that eliminates or suppresses the zero-phase voltage V of the primary-side inverter. z1 With the zero-phase voltage V of the secondary inverter z2 The potential difference, i.e., the zero-phase voltage V z Changes.

[0028] The power conversion device of technical solution 2 is characterized in that, in the above invention, the primary-side inverter and the secondary-side inverter are each composed of multiple switching elements. The positive input terminal of the primary-side inverter is connected to the positive power line of the DC power supply, and the negative input terminal of the primary-side inverter is connected to the negative power line of the DC power supply. The output terminal of the primary-side inverter is connected to one end of the coil, and the output terminal of the secondary-side inverter is connected to the other end of the coil. A capacitor is connected between the positive input terminal and the negative input terminal of the secondary-side inverter. The positive input terminal of the secondary-side inverter is not connected to the positive power line of the DC power supply, and the negative input terminal of the secondary-side inverter is connected to the negative power line of the DC power supply. Furthermore, by using a control device to switch each switching element, an AC output is generated from the DC power supply.

[0029] The power conversion device of technical solution 3 is characterized in that, in the invention of technical solution 1, the control device includes: a secondary side voltage control unit, which controls the secondary side voltage according to the secondary side voltage command value v. dc2 ref Generate zero-phase current command value i z ref The z-axis current control unit, based on the zero-phase current command value i z ref Generate zero-phase voltage command value v z ref ; and the output voltage command generation unit, based on the dq axis voltage command value v dq ref Generate primary-side output voltage vector command values ​​and secondary-side output voltage vector command values. Based on the primary-side output voltage vector command value, generate the primary-side output voltage command value v used to switch the primary-side inverter. uvw1 ref The secondary-side output voltage command value v is generated based on the secondary-side output voltage vector command value to switch the secondary-side inverter. uvw2 ref .

[0030] The power conversion device of technical solution 4 is characterized in that, in the above invention, the output voltage command generation unit generates the dq axis voltage command value v dq ref Decomposed into effective voltage V real With invalid voltage V imag The effective voltage V real As the primary-side output voltage vector command value, the invalid voltage V imag As the secondary side output voltage vector command value.

[0031] The power conversion device of technical solution 5 is characterized in that, in the invention of technical solution 3, the control device includes: a primary-side modulation unit, which, based on the primary-side output voltage command value v... uvw1 ref The primary-side inverter generates the switching signal; and the secondary-side modulation unit generates the switching signal based on the secondary-side output voltage command value v. uvw2 ref Generate the switching signal for the secondary inverter.

[0032] The power conversion device of the invention of technical solution 6 is characterized in that, in the above invention, the secondary side modulation unit performs any one of the following: pulse width modulation that outputs only odd voltage vectors in one control cycle, pulse width modulation that outputs only even voltage vectors in one control cycle, and pulse width modulation that switches between pulse width modulation that outputs only odd voltage vectors in one control cycle and pulse width modulation that outputs only even voltage vectors in one control cycle according to the voltage vector command value, thereby generating a switching signal to eliminate or suppress fluctuations in the zero-phase voltage.

[0033] The power conversion device of the invention of technical solution 7 is characterized in that, in the above invention, the primary side modulation unit performs pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating a switching signal to eliminate or suppress the fluctuation of the zero phase voltage.

[0034] The power conversion device of invention 8 is characterized in that, in invention 6 or 7, the output voltage command generation unit generates the zero-phase voltage command value v z ref and the zero-phase voltage v of the secondary inverter z2 The sum of these values ​​is added to the primary-side output voltage vector command value.

[0035] The power conversion device of the invention of technical solution 9 is characterized in that, in the invention of technical solution 5, the primary side modulation unit and the secondary side modulation unit perform pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating a switching signal to eliminate or suppress the fluctuation of the zero phase voltage.

[0036] The power conversion device of technical solution 10 is characterized in that, in the above invention, the output voltage command generation unit generates the zero-phase voltage command value v z ref The output voltage vector command value assigned to the primary side is added to the output voltage vector command value assigned to the secondary side.

[0037] The power conversion device of the invention of technical solution 11 is characterized in that, in the above invention, the output voltage command generation unit has a case in which the gain M1 allocated to the primary side output voltage vector command value is set to 1 and the gain M2 allocated to the secondary side output voltage vector command value is set to 0.

[0038] The power conversion device of the invention of technical solution 12 is characterized in that, in the invention of technical solution 10, the output voltage command generation unit has a case in which the gain M1 allocated to the primary side output voltage vector command value is set to 0 and the gain M2 allocated to the secondary side output voltage vector command value is set to 1.

[0039] The power conversion device of the invention of technical solution 13 is characterized in that, in the invention of technical solution 5, the primary side modulation unit performs any one of the following: pulse width modulation that outputs only odd voltage vectors in one control cycle, pulse width modulation that outputs only even voltage vectors in one control cycle, and pulse width modulation that switches between pulse width modulation that outputs only odd voltage vectors in one control cycle and pulse width modulation that outputs only even voltage vectors in one control cycle according to the voltage vector command value, thereby generating a switching signal to eliminate or suppress the fluctuation of the zero phase voltage.

[0040] The power conversion device of the invention of technical solution 14 is characterized in that, in the above invention, the secondary side modulation unit performs pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating a switching signal to eliminate or suppress the fluctuation of the zero phase voltage.

[0041] The power conversion device of invention 15 is characterized in that, in invention 13 or 14, the output voltage command generation unit generates the zero-phase voltage command value v z ref and the zero-phase voltage v of the primary-side inverter z1 The sum of these values ​​is added to the secondary-side output voltage vector command value. Invention Effects

[0042] According to the present invention, the power conversion device includes: a primary-side inverter connected to one end of a coil with an open structure of a motor; and a secondary-side inverter connected to the other end of the coil, wherein the differential voltage between the primary-side inverter and the secondary-side inverter is applied to the motor. By employing a GND-shared type dual inverter in which the primary-side inverter is connected to a DC power supply, the secondary-side inverter is connected to a capacitor, and the negative power lines of the primary-side inverter and the secondary-side inverter are shared, the capacitor is charged from the DC power supply via the motor through the secondary-side inverter. The voltage charged to the capacitor by the secondary-side inverter is used to apply an AC output to the motor, thereby expanding the drivable range in response to changes in the input voltage.

[0043] In addition, in the power conversion device of the GND shared type dual inverter, as in the invention of technical solution 2, the positive input terminal of the secondary inverter is not connected to the positive power line of the DC power supply, and the negative input terminal of the secondary inverter is connected to the negative power line of the DC power supply. Therefore, the secondary inverter will not become a floating potential, and the reference voltage of the primary inverter and the secondary inverter will be consistent.

[0044] Therefore, the gate drive power supply (isolated power supply) of the secondary inverter does not need to be configured separately from the gate drive power supply (isolated power supply) of the primary inverter's switching elements. The switching elements of the primary inverter and the secondary inverter can be switched by a shared gate drive power supply, and the driveable region for changes in input voltage can be expanded without the use of a boost converter or the like.

[0045] In addition, since there is no need to configure a separate power supply for the gate drive for each inverter, the increase in component mounting area can be suppressed, and miniaturization and cost reduction can be achieved. Therefore, it is extremely effective in equipment such as electric compressors for vehicles, where there are strong requirements for cost reduction and the power conversion device needs to be miniaturized due to the limitation of substrate area.

[0046] In particular, in this invention, the control device eliminates or suppresses the zero-phase voltage V of the primary-side inverter. z1 With the zero-phase voltage V of the secondary inverter z2 The potential difference, i.e., the zero-phase voltage V z The variation of the current makes it possible to minimize the induction of switching ripple, especially when driving in a state that boosts the secondary side voltage, reduce current amplitude, prevent losses and increased conducted noise, and eliminate the need for an increase in the maximum rated current.

[0047] Furthermore, if the control device is configured as described in technical solution 3, it includes: a secondary-side voltage control unit that controls the secondary-side voltage command value v. dc2ref Generate zero-phase current command value i z ref The z-axis current control unit, based on the zero-phase current command value i z ref Generate zero-phase voltage command value v z ref ; and the output voltage command generation unit, based on the dq axis voltage command value v dq ref Generate primary-side output voltage vector command values ​​and secondary-side output voltage vector command values. Based on the primary-side output voltage vector command value, generate the primary-side output voltage command value v used to switch the primary-side inverter. uvw1 ref The secondary-side output voltage command value v is generated based on the secondary-side output voltage vector command value to switch the secondary-side inverter. uvw2 ref This enables stable secondary-side voltage control and motor drive control.

[0048] In this case, for example as in the invention of technical solution 4, the output voltage command generation unit generates the dq axis voltage command value v. dq ref Decomposed into effective voltage V real With invalid voltage V imag The effective voltage V real As the primary-side output voltage vector command value, the invalid voltage V imag As the secondary side output voltage vector command value.

[0049] Furthermore, as in the invention of technical solution 5, the control device is configured to include: a primary-side modulation unit, which, based on the primary-side output voltage command value v uvw1 ref The primary-side inverter generates the switching signal; and the secondary-side modulation unit generates the switching signal based on the secondary-side output voltage command value v. uvw2 ref Generate the switching signal for the secondary inverter.

[0050] Moreover, for example, as in the invention of technical solution 6, the secondary-side modulation unit performs any one of the following: pulse width modulation that outputs only odd voltage vectors in one control cycle, pulse width modulation that outputs only even voltage vectors in one control cycle, and pulse width modulation that switches between pulse width modulation that outputs only odd voltage vectors in one control cycle and pulse width modulation that outputs only even voltage vectors in one control cycle according to the voltage vector command value, thereby generating a switching signal to eliminate or suppress fluctuations in the zero-phase voltage, thereby effectively suppressing the induction of switching ripple.

[0051] In addition, as in the invention of technical solution 7, the primary side modulation unit performs pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating a switching signal, thereby eliminating or suppressing the fluctuation of the zero phase voltage, and thus more effectively suppressing the induction of switching ripple.

[0052] In this case, as in the invention of technical solution 8, the output voltage command generation unit generates the zero-phase voltage command value v. z ref and the zero-phase voltage v of the secondary inverter z2 The sum of these values ​​is added to the primary-side output voltage vector command value.

[0053] Furthermore, even if, as in the invention of technical solution 9, the primary-side modulation unit and the secondary-side modulation unit perform pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating a switching signal and eliminating or suppressing the fluctuation of the zero-phase voltage, the induction of switching ripple can be effectively suppressed.

[0054] In this case, as in the invention of technical solution 10, the output voltage command generation unit generates the zero-phase voltage command value v z ref The output voltage vector command values ​​assigned to the primary side and the secondary side are added together. As in invention 11, the gain M1 assigned to the primary side output voltage vector command value is set to 1, and the gain M2 assigned to the secondary side output voltage vector command value is set to 0. As in invention 12, the gain M1 assigned to the primary side output voltage vector command value is set to 0, and the gain M2 assigned to the secondary side output voltage vector command value is set to 1. This increases the degree of control freedom. If the gain assigned to the inverter with the higher DC link voltage is set to 1, and the gain assigned to the inverter with the lower DC link voltage is set to 0, then the inverter with the higher voltage can bear the zero-phase voltage command value v. z ref And it can ensure the effectiveness of the operating range.

[0055] Furthermore, even if, as in the invention of technical solution 13, the primary-side modulation unit performs any one of the following pulse width modulations—that outputs only odd-number voltage vectors in one control cycle, that outputs only even-number voltage vectors in one control cycle, and that switches between pulse width modulations that output only odd-number voltage vectors in one control cycle and pulse width modulations that output only even-number voltage vectors in one control cycle according to the voltage vector command value—to generate a switching signal, thereby eliminating or suppressing fluctuations in the zero-phase voltage, the induction of switching ripple can be effectively suppressed.

[0056] In addition, as in the invention of technical solution 14, the secondary-side modulation unit performs pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating a switching signal, thereby eliminating or suppressing the fluctuation of the zero-phase voltage, and thus more effectively suppressing the induction of switching ripple.

[0057] In this case, as in the invention of technical solution 15, the output voltage command generation unit generates the zero-phase voltage command value v. z ref and the zero-phase voltage v of the primary-side inverter z1 The sum of these values ​​is added to the secondary-side output voltage vector command value. Attached Figure Description

[0058] Figure 1 This is an electrical circuit diagram of a power conversion device for a GND-shared dual inverter according to an embodiment of the present invention. Figure 2 yes Figure 1 A block diagram of the control device for a power conversion device. Figure 3 Yes Figure 1 The diagram illustrates the equivalent circuit of the zero-phase component of the power conversion device. Figure 4 It is Figure 1 The figure is obtained by modeling the secondary side voltage control of the power conversion device. Figure 5 yes Figure 2 A block diagram detailing the output voltage command generation unit, primary-side modulation unit, and secondary-side modulation unit of the control device (Example 1). Figure 6 Yes Figure 5 The diagram illustrates the linear output region and PWM mode of RSPWM based on odd voltage vectors executed by the secondary-side modulation unit. Figure 7 Yes Figure 5 The diagram illustrates the linear output region and PWM mode of RSPWM based on even voltage vectors executed by the secondary-side modulation unit. Figure 8 It is a use Figure 5 The diagram illustrates the effect of the control device under certain conditions. Figure 9 It is a use Figure 5 The diagram illustrates the zero-phase current of the control device under certain conditions. Figure 10 yes Figure 2A block diagram detailing the output voltage command generation unit, primary-side modulation unit, and secondary-side modulation unit of another embodiment of the control device (Embodiment 2). Figure 11 Yes Figure 10 The diagram illustrates the ZFCPWM PWM mode executed by the primary-side modulation unit. Figure 12 It is a use Figure 10 The diagram illustrates the effect of the control device under certain conditions. Figure 13 It is a use Figure 10 The diagram illustrates the zero-phase current of the control device under certain conditions. Figure 14 yes Figure 2 A detailed block diagram of the output voltage command generation unit, primary-side modulation unit, and secondary-side modulation unit of another embodiment of the control device (Embodiment 3). Figure 15 It is a use Figure 14 The diagram illustrates the effect of the control device under certain conditions. Figure 16 It is a use Figure 14 The diagram illustrates the zero-phase current of the control device under certain conditions. Figure 17 This is a diagram illustrating a typical three-phase modulation. Figure 18 Yes Figure 17 The diagram illustrates the zero-phase current under the given conditions. Figure 19 This is the electrical circuit diagram of a power conversion device for a conventional power-shared dual inverter. Figure 20 This is the electrical circuit diagram of a power conversion device for a conventional isolated power supply type dual inverter. Figure 21 This is the electrical circuit diagram of a conventional floating capacitor type dual inverter power conversion device. Figure 22 It is used for Figure 21 A block diagram illustrating the drive control method of the power conversion device of a floating capacitor type dual inverter. Figure 23 Yes Figure 21 The diagram illustrates the charging and discharging modes of the capacitors in the power conversion device of a floating capacitor type dual inverter. Detailed Implementation

[0059] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. (1) Power conversion device 1 Figure 1This is an electrical circuit diagram of a power conversion device 1 using a GND-shared type dual inverter according to an embodiment of the present invention. The power conversion device 1 of this embodiment converts the DC voltage V from a DC power source (e.g., a high-voltage battery from an electric vehicle) 2. dc (For example, DC 500V) is converted to three-phase AC voltage (AC output) and supplied to motor M. The motor M in this embodiment includes a stator with coils and a rotor with magnets internally mounted and rotating therein. It is a three-phase permanent magnet synchronous motor (Interior Permanent Magnet Synchronous Motor) that drives the electric compressor of an air conditioning unit used in electric vehicles such as electric cars and hybrid vehicles. Furthermore, the DC voltage V of the DC power supply 2... dc The primary side voltage V, which will be discussed later. dc1 .

[0060] In the embodiment, the power conversion device 1 comprises a three-phase primary-side inverter INV1 including upper and lower arm switching elements 3A to 3F, a three-phase secondary-side inverter INV2 including upper and lower arm switching elements 4A to 4F, and a control device 6. Figure 2 Furthermore, in this embodiment, each switching element 3A-3F and 4A-4F is composed of an insulated gate bipolar transistor (IGBT) with a MOS structure incorporated in its gate portion.

[0061] In this invention, the DC voltage V of the DC power supply 2 is converted into DC voltage V by the primary-side inverter INV1 and the secondary-side inverter INV2. dc The voltage is converted to three-phase AC voltage (AC output), and the differential voltage between inverters INV1 and INV2 is applied to the coils (stator coils) 7U, 7V, and 7W of motor M. Here, the coils 7U, 7V, and 7W of motor M are open-structure coils that do not have a neutral point bus.

[0062] (2) Primary-side inverter INV1 The primary-side inverter INV1 includes a U-phase half-bridge circuit 9U, a V-phase half-bridge circuit 9V, and a W-phase half-bridge circuit 9W. Each phase's half-bridge circuit 9U to 9W individually includes the aforementioned upper arm switching elements 3A to 3C and lower arm switching elements 3D to 3F. Furthermore, each switching element 3A to 3F has a built-in freewheeling diode connected in reverse parallel.

[0063] Furthermore, the collectors of the upper arm switching elements 3A to 3C of the primary-side inverter INV1, which serve as the positive input terminal, are connected to the positive power supply line 11 (HV+) of the DC power supply 2. On the other hand, the emitters of the lower arm switching elements 3D to 3F of the primary-side inverter INV1, which serve as the negative input terminal, are connected to the negative power supply line 12 (HV-) of the DC power supply 2. In addition, 13 in the figure is a capacitor connected between the positive power supply line 11 and the negative power supply line 12, which constitutes a noise filter.

[0064] The emitter of the upper arm switching element 3A of the half-bridge circuit 9U of the U phase of the primary-side inverter INV1 is connected to the collector of the lower arm switching element 3D. Their connection point (midpoint of the arm: the output terminal of the primary-side inverter INV1) is connected to one end of the coil 7U of the U phase of the motor M.

[0065] In addition, the emitter of the upper arm switching element 3B of the V-phase half-bridge circuit 9V is connected to the collector of the lower arm switching element 3E, and their connection point (midpoint of the arm: the output terminal of the primary side inverter INV1) is connected to one end of the V-phase stator coil 7V of the motor M.

[0066] In addition, the emitter of the upper arm switching element 3C of the half-bridge circuit 9W of phase W is connected to the collector of the lower arm switching element 3F, and their connection point (midpoint of the arm: the output terminal of the primary side inverter INV1) is connected to one end of the stator coil 7W of phase W of motor M.

[0067] (3) Secondary inverter INV2 The secondary inverter INV2 also has three half-bridge circuits 16U, 16V, and 16W corresponding to UVW. Moreover, it is configured as follows: the neutral points of each phase of motor M are not connected, and the coils 7U to 7W of motor M are sandwiched between the half-bridge circuits 9U to 9W of primary inverter INV1 and the half-bridge circuits 16U to 16W of secondary inverter INV2.

[0068] The half-bridge circuits 16U to 16W of the secondary-side inverter INV2 also each have upper arm switching elements 4A to 4C and lower arm switching elements 4D to 4F. In addition, each switching element 4A to 4F also has a freewheeling diode connected in reverse parallel.

[0069] Furthermore, a capacitor C is connected between the collector of the upper arm switching elements 4A to 4C, which serve as the positive input terminal of the secondary-side inverter INV2, and the emitter of the lower arm switching elements 4D to 4F, which serve as the negative input terminal of the secondary-side inverter INV2.

[0070] However, the collectors of the upper arm switching elements 4A to 4C of the secondary-side inverter INV2, which serve as the positive input terminal, are not connected to the positive power supply line 11 of the DC power supply 2 and are disconnected. On the other hand, in this invention, the emitters H of the lower arm switching elements 4D to 4F of the secondary-side inverter INV2, which serve as the negative input terminal, are connected to the negative power supply line 12 of the DC power supply 2.

[0071] Furthermore, the emitter of the upper arm switching element 4A of the U-phase half-bridge circuit 16U is connected to the collector of the lower arm switching element 4D, and their connection point (midpoint of the arm: the output terminal of the secondary side inverter INV2) is connected to the other end of the U-phase coil 7U of the motor M.

[0072] In addition, the emitter of the upper arm switching element 4B of the V-phase half-bridge circuit 16V is connected to the collector of the lower arm switching element 4E, and their connection point (midpoint of the arm: the output terminal of the secondary side inverter INV2) is connected to the other end of the V-phase stator coil 7V of the motor M.

[0073] Furthermore, the emitter of the upper arm switching element 4C of the half-bridge circuit 16W of phase W is connected to the collector of the lower arm switching element 4F, and their connection point (midpoint of the arm: the output terminal of the secondary-side inverter INV2) is connected to the other end of the stator coil 7W of phase W of motor M. That is, the power conversion device 1 of the present invention is configured as described in the GND shared type dual inverter configuration.

[0074] (4) Control device 6 then, Figure 2 A block diagram of the control device 6 is shown. In this embodiment, the control device 6 comprises a microcomputer equipped with a processor, and receives a speed command value ω from the ECU of the electric vehicle. rm ref and secondary side voltage command value v dc2 ref The phase current of motor M is input from the current sensor (not shown in the figure). Based on this, the on / off state of each switching element 3A~3F and 4A~4F of the primary-side inverter INV1 and the secondary-side inverter INV2 is controlled (switched).

[0075] Specifically, the gate voltage applied to the gates of each switching element 3A-3F and 4A-4F is controlled. Furthermore, the control device 6 in this embodiment is configured to include a speed control unit 21, a dqz-axis current control unit 22 (which is the z-axis current control unit of this invention), an output voltage command generation unit 23, a primary-side modulation unit 24, a secondary-side modulation unit 26, and a secondary-side voltage control unit 27.

[0076] Speed ​​control unit 21 utilizes PI calculation and q-axis current i q The relationship between the current and torque is calculated and the q-axis current command value i is output. qref Additionally, the secondary-side voltage control unit 27 controls the secondary-side voltage according to the secondary-side voltage command value v. dc2 ref Generate zero-phase current command value i z ref .

[0077] The dqz axis current control unit 22 calculates and outputs the d-axis voltage command value v using PI calculation and decoupling control. d ref and the q-axis voltage command value v q ref In this case, the dq-axis current control unit 22 basically calculates the command value i to eliminate the d-axis current. d ref With d-axis current i d (Estimated value), q-axis current command value i q ref With q-axis current i q The d-axis voltage command value v in the direction of the deviation of the estimated value. d ref With q-axis voltage command value v q ref .

[0078] Furthermore, the dq z-axis current control unit 22, which is the z-axis current control unit of the present invention, generates and outputs the secondary side voltage V through which the voltage V flows. dc2 Controlled to secondary side voltage command value V dc2 ref The required secondary-side DC link current (in this invention, the zero-phase current i) is used. z The zero-phase voltage command value v (as an indicator of the secondary-side DC link current) z ref .

[0079] Then, the output voltage command generation unit 23 generates the output voltage command based on the d-axis current i. d (Estimated value) and q-axis current i q (Estimated value), d-axis voltage command value v output by dqz-axis current control unit 22 d ref With q-axis voltage command value v q ref The aforementioned zero-phase voltage command value v z ref Generates and outputs the primary-side output voltage command value v for switching each of the switching elements 3A to 3F of the primary-side inverter INV1. u1 ref v v1 ref v w1 refAnd the secondary-side output voltage command value v used to switch each of the switching elements 4A to 4F of the secondary-side inverter INV2. u2 ref v v2 ref v w2 ref The operation of the secondary-side voltage control unit 27, the dqz-axis current control unit 22, and the output voltage command generation unit 23 will be described in detail later.

[0080] The primary-side modulation unit 24 modulates the primary-side output voltage command value v. u1 ref v v1 ref v w1 ref The primary-side inverter switching signal (PWM signal) is generated and output for switching (PWM control) of each switching element 3A to 3F of the primary-side inverter INV1. Additionally, the secondary-side modulation unit 26 generates and outputs the primary-side inverter switching signal (PWM signal) based on the secondary-side output voltage command value v. u2 ref v v2 ref v w2 ref The secondary-side inverter switching signal (PWM signal) is generated and output for switching (PWM control) each of the switching elements 4A to 4F of the secondary-side inverter INV2. The operation of the primary-side modulation unit 24 and the secondary-side modulation unit 26 will be described in detail later. Example 1

[0081] (5) The structure and operation of the dqz axis current control unit 22, the output voltage command generation unit 23, the primary side modulation unit 24, and the secondary side modulation unit 25 Next, refer to Figures 3-9 The operation of the dqz axis current control unit 22, output voltage command generation unit 23, primary-side modulation unit 24, and secondary-side modulation unit 25 in this embodiment will be described. Here, Figure 1 The equivalent circuit of the zero-phase component of the power conversion device 1 becomes in Figure 3 The circuit shown on the lower side. Figure 3 The equivalent circuit on the lower side can be regarded as a chopper circuit that combines a buck chopper and a boost chopper.

[0082] Furthermore, in the diagram, V dc1 This is the primary-side voltage, which serves as the DC voltage of DC power supply 2. Additionally, C... dc2 It is the capacitance of capacitor C, L z It is the self-inductance of the z-axis of motor M, R a It is the internal resistance.

[0083] From this equivalent circuit, it can be seen that by utilizing the zero-phase voltage v of the primary-side inverter INV1... z1 The zero-phase voltage v of the secondary-side inverter INV2 z2 The potential difference, i.e., the zero-phase voltage v z (=v) z1 -v z2 Controlling the zero-phase current i z This allows control of the secondary side voltage v. dc2 Therefore, the control device 6 of the present invention employs a zero-phase current i z This serves as an indicator of the secondary-side DC link current. It is based on the zero-phase current i. z It is roughly the same as the secondary side DC link current.

[0084] As described above, assuming that the zero-phase component (z-axis) of the power conversion device 1 can be equivalently represented as a chopper circuit, for Figure 1 The power conversion device 1, if modeled with both the controller and the controlled object (plant model), becomes... Figure 4 As shown. In this case, the controlled object model of the controlled object is related to the voltage (hereinafter v). z -e z ) to current (zero phase current i) z The model (represented by 31 in the figure) assumes an LR load similar to the dq axis, starting from the zero-phase current i. z Secondary side voltage V dc2 The model (represented by 32 in the figure) is modeled as a simple capacitor. Furthermore, ω re It is the electric angular velocity, θ re It refers to the rotor position.

[0085] In addition, for the control system, the voltage PI control system 33, which performs secondary-side voltage control, outputs the zero-phase current command value i. z ref Controlling the zero-phase current i z The current PI control system 34 outputs the zero-phase voltage command value v. z ref Then, the induced voltage component e in the z-axis induced by the rotation of motor M will be compensated. z Decoupling voltage command value e z est With zero-phase voltage command value v z ref Add them together to get the zero-phase voltage v. z Output. Therefore, for the aforementioned Figure 1 The power conversion device 1 shown can be designed with a controller.

[0086] Furthermore, the secondary side voltage V of the z-axis control system described above is used. dc2 Controlled by zero-phase current i z The controlling effect. In Figure 4 In the model, due to the application of PI control, the control of the secondary side voltage V... dc2 For the DC component, it has sufficient performance. However, if due to the decoupling voltage command value e z est Parameter errors, etc., cause zero-phase current i z If ripple is generated, the secondary side voltage V dc2 It also induces ripple. Therefore, from the perspective of voltage quality, a high degree of current control can be achieved by using controllers that suppress AC components (periodic disturbance components), periodic disturbance suppression control, sine wave tracking control, repetitive control, etc.

[0087] Figure 5 The diagram shows a block diagram of the output voltage command generation unit 23, designed using the modeling described above. Furthermore, Figure 4 The voltage PI control system 33 is composed of Figure 2 The secondary side voltage control unit 27 outputs a zero-phase current command value i. z ref (Control secondary side voltage V) dc2 (Required secondary-side DC link current command value). Additionally... Figure 4 The current PI control system consists of 34 Figure 2 Part of the dqz-axis current control unit 22, which outputs a function to control the zero-phase current i z (Secondary-side DC link current) controlled to zero-phase current command value i z ref (Secondary-side DC link current command value) zero-phase voltage command value v z ref .

[0088] In the embodiment, the zero-phase current command value i output from the voltage PI control system 33 is input to the current PI control system 34 constituting the dqz axis current control unit 22. z ref Subtract the zero-phase current i fed back z The obtained value. Then, the current PI control system 34 of the dqz axis current control unit 22 calculates the zero-phase current elimination command value i. z ref With zero phase current i z The zero-phase voltage command value v in the direction of the difference zref The zero-phase current i z Control to zero phase current command value i z ref .

[0089] and, Figure 5 The box shown on the left is Figure 2 The output voltage command generation unit 22. The basic control block of this output voltage command generation unit 22 is... Figure 22 The same applies to the power conversion device of the floating capacitor type dual inverter shown. That is, the output voltage command generation unit 22 of this embodiment has an effective / ineffective decomposition unit 36, which decomposes the d-axis voltage command value v according to the mathematical formula (I). d ref and the q-axis voltage command value v q ref Decomposed into effective voltage V real With invalid voltage V imag The effective voltage V real This is an example of the primary-side output voltage vector command value of the present invention, with an invalid voltage V. imag This is an example of the secondary-side output voltage vector command value of the present invention.

[0090] The output voltage command generation unit 22, based on the mathematical formula (II), decomposes the effective voltage V as described above. real Set the d-axis voltage command value v of the primary-side inverter INV1 d1 ref The q-axis voltage command value v of the primary-side inverter INV1 is... q1 ref Set it to 0. Additionally, set the d-axis voltage command value v of the secondary inverter INV2 to 0. d2 ref Set it to 0, and the invalid voltage V imag Set the q-axis voltage command value v of the secondary inverter INV2. q2 ref .

[0091] Next, the dq-uvw conversion unit 37 of the output voltage command generation unit 22 converts the d-axis voltage command value v of the primary-side inverter INV1 into a voltage value v. d1 ref and the q-axis voltage command value v of the primary-side inverter INV1 q1 ref The output voltage command values ​​of each phase (uvw) of the primary-side inverter INV1 are converted into the output voltage command values ​​of each phase. Additionally, the d-axis voltage command value (v) of the secondary-side inverter INV2 is converted into the output voltage command values ​​of each phase (uvw) by the dq-uvw conversion unit 38. d2 refand the q-axis voltage command value v of the secondary inverter INV2 q2 ref As the secondary side output voltage command value v u2 ref v v2 ref v w2 ref Output.

[0092] In addition, the output voltage command generation unit 22 uses the addition unit 42 to process the zero-phase voltage command value v output by the dqz axis current control unit 22. z ref The zero-phase voltage v from the secondary-side inverter INV2 of the secondary-side conversion section 26 z2 In total, the addition unit 41 adds this total value to the output voltage command values ​​of each phase of the primary-side inverter INV1 (uvw phase) output by the dq-uvw conversion unit 37, and obtains the primary-side output voltage command value v. u1 ref V v1 ref V w1 ref Output.

[0093] That is, by changing the zero-phase voltage command value v z ref and the zero-phase voltage v of the secondary inverter INV2 z2 The sum of the obtained values ​​and the effective voltage V, which serves as the primary-side output voltage vector command value, are combined. real (Actually, these values ​​are converted to output voltage command values ​​for each phase of UVW) and then added together to generate and output the primary-side output voltage command value V. u1 ref v v1 ref v w1 ref .

[0094] By doing so, the output voltage command generation unit 22 generates the voltage command based on the d-axis voltage command value v. d ref and the q-axis voltage command value v q ref Generate the effective voltage V as the primary-side output voltage vector command value. real And the invalid voltage V, which serves as the secondary-side output voltage vector command value. imag The total value is then compared with the effective voltage V. real The sums generate the primary-side output voltage command value v for switching the primary-side inverter INV1. u1 ref v v1ref v w1 ref According to the invalid voltage V imag Generate the secondary-side output voltage command value v for switching the secondary-side inverter INV2. u2 ref v v2 ref v w2 ref .

[0095] In this embodiment, the primary-side modulation unit 24 outputs the primary-side output voltage command value v based on the output voltage command generation unit 22. u1 ref v v1 ref v w1 ref Performing standard three-phase modulation (hereinafter referred to as CPWM), generating and outputting primary-side inverter switching signals (PWM signals) S for switching (PWM control) the switching elements 3A to 3F of the primary-side inverter INV1. u1 S v1 S w1 .

[0096] (5-1) RSPWM based on odd voltage vector On the other hand, the secondary-side modulation unit 26 in this embodiment outputs a secondary-side output voltage command value v based on the output voltage command generation unit 22. u2 ref v v2 ref v w2 ref Using RSPWM (Remote State PWM) based on odd voltage vectors, a secondary-side inverter switching signal (PWM signal) S is generated and output to control the switching (PWM control) of each switching element 4A~4F of the secondary-side inverter INV2. u2 S v2 S w2 .

[0097] RSPWM based on odd-number voltage vectors outputs only eight voltage vectors (the basic output vectors) from V0 to V7 in one control cycle. Figure 6 The pulse width modulation of the odd-numbered voltage vectors V1, V3, and V5 is shown. Furthermore, in Figure 6 In the middle, v u It is the U-phase voltage of motor M, v v It is the phase voltage, v w It is the W-phase voltage, v zIt is the zero-phase voltage (in this embodiment, since RSPWM is performed using the secondary-side modulation unit 26, it is actually the zero-phase voltage v of the secondary-side inverter INV2). z2 ).

[0098] (5-2) RSPWM based on even voltage vector Furthermore, it is not limited to the RSPWM based on odd voltage vectors as described above, but can also be the secondary-side output voltage command value v output by the secondary-side modulation unit 26 according to the output voltage command generation unit 22. u2 ref v v2 ref v w2 ref Using RSPWM based on even-number voltage vectors, a secondary-side inverter switching signal (PWM signal) S is generated and output to control the switching of each switching element 4A~4F of the secondary-side inverter INV2 (PWM control). u2 S v2 S w2 .

[0099] RSPWM based on even-number voltage vectors outputs only one of the eight voltage vectors V0 to V7 in one control cycle. Figure 7 The even-numbered voltage vectors V2, V4, and V6 are shown in the pulse width modulation. In addition to the RSPWM based on even-numbered voltage vectors and RSPWM based on odd-numbered voltage vectors as described above, a full-voltage vector RSPWM can also be executed, which switches between RSPWM based on odd-numbered voltage vectors and RSPWM based on even-numbered voltage vectors according to the voltage vector command value.

[0100] Based on the RSPWM described above, such as Figure 6 , Figure 7 As shown, it can eliminate the zero-phase voltage v z The change is due to the modulation method, and the zero-phase voltage v z (In this embodiment, the zero-phase voltage v) z2 The zero-phase voltage v of the secondary-side inverter INV2, as described above, becomes a fixed value, thus making it a fixed value. z2 With zero-phase voltage command value v z ref The sum of these values ​​is used as the zero-phase voltage v of the primary-side inverter INV1. z1 The output voltage command values ​​of each phase of the primary-side inverter INV1, which are output by the addition unit 41 and the dq-uvw conversion unit 37, are added together to obtain the primary-side output voltage command value v. u1 ref v v1 ref vw1 ref .

[0101] Figure 8 The topmost layer represents the zero-phase voltage v of the primary-side inverter INV1 in this embodiment. z1 The second layer from the top represents the zero-phase voltage v of the secondary-side inverter INV2. z2 The third layer from the top represents the zero-phase voltage v. z1 - Zero-phase voltage v z2 The derived zero-phase voltage v z The bottom layer represents the zero-phase current i. z The zero-phase voltage v of the primary-side inverter INV1 z1 Due to CPWM, there were 6 changes, but the zero-phase voltage v of the secondary-side inverter INV2 remained unchanged. z2 The fluctuations were completely suppressed by the effect of RSPWM, becoming a fixed value. Therefore, only the zero-phase voltage v of the primary-side inverter INV1 driven by CPWM... z1 The change induces the zero-phase current i z Switching ripple.

[0102] Figure 9 The zero-phase current i in this embodiment is shown in the figure. z The amplitude. Here, when CPWM is executed by both the primary-side modulation unit 24 and the secondary-side modulation unit 26, it is equivalent to Figure 8 The values ​​shown become Figure 17 As shown, the zero-phase current i z The amplitude becomes Figure 18 As shown. In this case, the zero-phase voltage v of the primary-side inverter INV1. z1 and the zero-phase voltage v of the secondary-side inverter INV2 z2 The CPWM pulses change six times, inducing amplitude variations across four voltage levels, thus significantly increasing the zero-phase current i. z The switching ripple. If this is... Figure 18 If the amplitude is set to 100%, then Figure 9 The amplitude was suppressed to 83.6% under these conditions.

[0103] As described above, by setting the power conversion device 1 of the present invention as a GND-shared dual inverter, the capacitor C is charged from the DC power supply 2 via the motor M through the secondary-side inverter INV2, and the voltage charged to the capacitor C through the secondary-side inverter INV2 is used to apply an AC output to the motor M, thereby enabling an expansion of the driveable area in response to changes in the input voltage.

[0104] In addition, the positive input terminal of the secondary inverter INV2 is not connected to the positive power line 11 of the DC power supply 2, and the negative input terminal of the secondary inverter INV2 is connected to the negative power line 12 of the DC power supply 2. Therefore, the secondary inverter INV2 will not become a floating potential, so that the reference voltages of the primary inverter INV1 and the secondary inverter INV2 are consistent.

[0105] Therefore, the gate drive power supply for the switching elements 4A to 4F of the secondary inverter INV2 does not need to be configured separately from the gate drive power supply for the switching elements 3A to 3F of the primary inverter INV1. The switching elements 3A to 3F of the primary inverter INV1 and the switching elements 4A to 4F of the secondary inverter INV2 can be switched using a shared gate drive power supply. Thus, the driveable region can be expanded in response to changes in input voltage without using a separate boost converter or the like.

[0106] Furthermore, since there is no need to configure a power supply for the gate drive of each inverter, the increase in component mounting area can be suppressed, enabling miniaturization and cost reduction. Therefore, it is extremely effective in equipment such as electric compressors for vehicles, where there is a strong demand for cost reduction due to large input voltage variations and where the substrate area is limited and miniaturization of power conversion devices is required.

[0107] In particular, in this invention, the control device 6 eliminates or suppresses the zero-phase voltage v of the primary-side inverter INV1. z1 The zero-phase voltage v of the secondary-side inverter INV2 z2 The potential difference, i.e., the zero-phase voltage v z The variation, therefore especially in causing the secondary side voltage v dc2 When driven under boost conditions, the induction of switching ripple can be minimized, the current amplitude can be reduced, the loss and the increase of conducted noise can be prevented, and the maximum rated current does not need to be increased.

[0108] Furthermore, the control device 6 is configured to include: a secondary-side voltage control unit 27, which controls the voltage based on the secondary-side voltage command value v. dc2 ref Generate zero-phase current command value i z ref The dqz axis current control unit 22, based on the zero-phase current command value i z ref Generate zero-phase voltage command value v z ref ; and the output voltage command generation unit 23, based on the dq axis voltage command value v d ref V q ref Generating effective voltage V real(Primary-side output voltage vector command value) and invalid voltage V imag (Secondary side output voltage vector command value), based on the effective voltage V real Generate the primary-side output voltage command value v for switching the primary-side inverter INV1. u1 ref v v1 ref v w1 ref According to the invalid voltage V imag Generate the secondary-side output voltage command value v for switching the secondary-side inverter INV2. u2 ref v v2 ref v w2 ref Therefore, a stable secondary side voltage V can be achieved. dc2 The control of the motor and the drive control of the motor M.

[0109] Furthermore, in this embodiment, the secondary-side modulation unit 26 executes any one of the following: pulse width modulation (RSPWM) that outputs only odd-numbered voltage vectors in one control cycle, pulse width modulation (RSPWM) that outputs only even-numbered voltage vectors in one control cycle, and pulse width modulation (full-vector RSPWM) that switches between pulse width modulation that outputs only odd-numbered voltage vectors in one control cycle and pulse width modulation that outputs only even-numbered voltage vectors in one control cycle according to the voltage vector command value, to generate a switching signal S. u2 S v2 S w2 Therefore, it can suppress the zero-phase voltage v z The changes can effectively suppress the induction of switching ripple. Example 2

[0110] (6) The configuration and operation of the output voltage command generation unit 23, the primary side modulation unit 24 and the secondary side modulation unit 25 (another embodiment) Next, refer to Figures 10-13 Another embodiment of the power conversion device 1 of the present invention will be described. In this embodiment, the described... Figure 5 In this embodiment, the primary-side modulation unit 24 does not perform the usual three-phase modulation (CPWM), but instead performs... Figure 10 The ZFCPWM shown. In Figure 10 Other components and Figure 5 same.

[0111] (6-1) ZFCPWM That is, in this embodiment, the primary-side modulation unit 24 outputs the secondary-side output voltage command value v based on the output voltage command generation unit 22. u2 ref v v2 ref v w2 ref Through ZFCPWM (Zero Voltage Fluctuation Cancel PWM), a primary-side inverter switching signal (PWM signal) S is generated and output to control the switching (PWM control) of each switching element 3A~3F of the primary-side inverter INV1. u1 S v1 S w1 .

[0112] ZFCPWM is a pulse width modulation technique that synchronizes the rise and fall times of the phase voltages of other phases with the rise and fall times of the phase voltage of a specific phase. That is, it synchronizes the switching times twice in opposite phases within one carrier cycle. For example, as... Figure 11 As shown, make the phase V voltage v v The timing of the drop is related to the U-phase voltage v u The rise times are consistent, making the W-phase voltage v w The rise time and the U-phase voltage v u The timing of their descent is consistent.

[0113] In ZFCPWM, instead of allowing zero-phase voltage v for one carrier cycle, z (v in this embodiment) z1 The value can be changed at most twice, and the average zero-phase voltage v can be arbitrarily specified. z Therefore, based on the output degrees of freedom of PWM, the modulating region becomes the entire hexagon (vector).

[0114] Figure 12 The topmost layer represents the zero-phase voltage v of the primary-side inverter INV1 in this embodiment. z1 The second layer from the top represents the zero-phase voltage v of the secondary-side inverter INV2. z2 The third layer from the top represents the zero-phase voltage v. z1 - Zero-phase voltage v z2 The derived zero-phase voltage v z The bottom layer represents the zero-phase current i. z Through ZFCPWM, the zero-phase voltage v of the primary-side inverter INV1 is... z1 The number of changes (2 changes) and the level of change. Figure 5 The CPWM is significantly suppressed compared to the case where it is used.

[0115] Moreover, even in this embodiment, the zero-phase voltage v of the secondary-side inverter INV2 z2 Also utilizing the effect of RSPWM, fluctuations are completely suppressed, becoming a fixed value. Therefore, solely due to the zero-phase voltage v of the primary-side inverter INV1 driven by ZFCPWM... z1 The change induces the zero-phase current i z Switching ripple.

[0116] Figure 13 The zero-phase current i in this embodiment is shown in the figure. z The amplitude of the phase. In this embodiment, the zero-phase current i is known. z The switching ripple is induced solely by the ZFCPWM of the primary-side inverter INV1, but the level and frequency of variation are small. Therefore, when... Figure 18 When the amplitude is set to 100% as shown, Figure 13 The amplitude was significantly suppressed to 14.7%, which was an improvement. Example 3

[0117] (7) The configuration and operation of the output voltage command generation unit 23, the primary side modulation unit 24 and the secondary side modulation unit 25 (another embodiment) Next, refer to Figures 14-16 A power conversion device 1 according to another embodiment of the present invention will be described. In this embodiment, the described... Figure 10 In this embodiment, the secondary-side modulation unit 26 does not execute the RSPWM described above, but instead executes as follows: Figure 14 The ZFCPWM described above is shown. Furthermore, it is assumed that... Figure 14 Chinese use and Figure 10 The same reference numerals denote parts that perform the same or identical functions.

[0118] That is, both the primary-side modulation unit 24 and the secondary-side modulation unit 26 execute ZFCPWM. In this embodiment, both the primary-side modulation unit 24 and the secondary-side modulation unit 26 can arbitrarily output a zero-phase voltage v. z Therefore, regarding the zero-phase voltage v z The output has degrees of freedom. Therefore, the zero-phase voltage command value v is as follows: z ref It is allocated to the primary-side inverter INV1 and the secondary-side inverter INV2.

[0119] (7-1) Zero-phase voltage distribution section 39 That is, in the power conversion device 1 of this embodiment, the output voltage command generation unit 23 includes a zero-phase voltage distribution unit 39. Figure 14 The zero-phase voltage distribution unit 39 will convert the zero-phase voltage command value v output by the dqz axis current control unit 22 into a voltage distribution unit.z ref The gain M1 used to allocate to the primary-side inverter INV1 and the gain M2 used to allocate to the secondary-side inverter INV2 are allocated to each inverter INV1 and INV2.

[0120] Furthermore, the zero-phase voltage command value v, multiplied by the gain M1, is calculated using the addition unit 41. z ref The output voltage command values ​​of each phase of the primary-side inverter INV1, output from the dq-uvw conversion unit 37, are added to obtain the primary-side output voltage command value v. u1 ref v v1 ref v w1 ref The output is then processed by the addition unit 42, which multiplies the zero-phase voltage command value v by the gain M2. z ref The output voltage command values ​​of each phase of the secondary-side inverter INV2, output from the dq-uvw conversion unit 38, are added together to obtain the secondary-side output voltage command value v. u2 ref v v2 ref v w2 ref Output.

[0121] That is, by using the zero-phase voltage command value v z ref The effective voltage V assigned as the primary-side output voltage vector command value real With respect to the invalid voltage V, which is the vector command value of the secondary-side output voltage. imag (Actually, these values ​​are converted to the output voltage command values ​​of each phase (uvw) and then added together to generate and output the primary-side output voltage command value v.) u1 ref v v1 ref v w1 ref and the secondary side output voltage command value v u2 ref v v2 ref v w2 ref .

[0122] Here, gain M1 + gain M2 = 1. Furthermore, the zero-phase voltage distribution unit 39 has two cases: gain M1 = 1 and gain M2 = 0, and gain M1 = 0 and gain M2 = 1. Therefore, it is also possible to add the zero-phase voltage command value v to the output voltage command values ​​of each phase uvw of either inverter INV1 or INV2. z ref And the zero-phase voltage command value v is not applied to the other side. z ref The situation.

[0123] Basically, as long as the zero-phase voltage command value v is... z ref The output voltage command values ​​of each phase of inverters INV1 and INV2 output from the dq-uvw conversion units 37 and 38 are added together. However, since a zero-phase voltage is added, considering the operating range, it is preferable that the inverter with the higher voltage bears the zero-phase voltage. When the voltage of the primary-side inverter INV1 is higher, the zero-phase voltage distribution unit 39 is set with gain M1=1 and gain M2=0, so that only the primary-side inverter INV1 bears the zero-phase voltage command value v. z ref .

[0124] Furthermore, the zero-phase voltage command value v, which is multiplied by the gain M2 after addition in the addition unit 42, is used as an example. z ref The sign is set to - (i.e., subtraction calculation) because a zero-phase voltage v needs to be set between the primary-side inverter INV1 and the secondary-side inverter INV2. z The potential difference, the addition unit 42 actually becomes the subtraction unit, which takes the zero-phase voltage command value v after multiplying by the gain M2 as the value. z ref Set the value to negative and add it to the output voltage command value of each phase of UVW.

[0125] That is, the output voltage command generation unit 22 in this embodiment generates the output voltage command based on the d-axis voltage command value v. d ref and the q-axis voltage command value v q ref Generates an effective voltage V, which serves as the primary-side output voltage vector command value. real And the invalid voltage V, which serves as the secondary-side output voltage vector command value. imag By using the zero-phase voltage command value v z ref Assigned to effective voltage V real and invalid voltage V imag The values ​​are added together to generate and output the primary-side output voltage command value v for switching the primary-side inverter INV1.u1 ref v v1 ref v w1 ref And the secondary-side output voltage command value v used to switch the secondary-side inverter INV2. u2 ref v v2 ref v w2 ref .

[0126] The primary-side modulation unit 24 outputs the primary-side output voltage command value v based on the output voltage command generation unit 23. u1 ref v v1 ref v w1 ref The primary-side inverter switching signal (PWM signal) S is generated and output via ZFCPWM to control the switching of each switching element 3A~3F of the primary-side inverter INV1 (PWM control). u1 S v1 S w1 Additionally, the secondary-side modulation unit 26 also generates the secondary-side output voltage command value v based on the output voltage command generation unit 29. u2 ref v v2 ref v w2 ref Generates and outputs secondary-side inverter switching signals (PWM signals) S for switching (PWM control) each of the switching elements 4A~4F of the secondary-side inverter INV2. u2 S v2 S w2 .

[0127] Figure 15 The topmost layer represents the zero-phase voltage v of the primary-side inverter INV1 in this embodiment. z1 The second layer from the top represents the zero-phase voltage v of the secondary-side inverter INV2. z2 The third layer from the top represents the zero-phase voltage v. z1 - Zero-phase voltage v z2 The derived zero-phase voltage v z The bottom layer represents the zero-phase current i. z The zero-phase voltage v of the primary-side inverter INV1 z1 and the zero-phase voltage v of the secondary-side inverter INV2 z2 The changes occurred twice due to ZFCPWM. However, the number of changes and the amplitude were small, resulting in a smaller switching ripple.

[0128] Figure 16 The zero-phase current i in this embodiment is shown in the figure. z The amplitude. From this embodiment, it can be seen that although both the primary-side inverter INV1 and the secondary-side inverter INV2 experience zero-phase current i due to ZFCPWM. z The switching ripple is induced, but the number of fluctuations and the amplitude are small, so when... Figure 18 When the amplitude is set to 100% as shown, Figure 16 The amplitude was significantly suppressed to 10.2%, which was an improvement. Example 4

[0129] In this embodiment 1, the primary-side modulation unit 24 performs CPWM and the secondary-side modulation unit 26 performs RSPWM. However, it is not limited to this; the primary-side modulation unit 24 may also perform RSPWM and the secondary-side modulation unit 26 may perform CPWM.

[0130] However, in this case, contrary to the case in Example 1, the zero-phase voltage v of the primary-side inverter INV1 is... z1 With zero-phase voltage command value v z ref The sum of these values ​​is used as the zero-phase voltage v of the secondary-side inverter INV2. z2 The output voltage is added to the output voltage command values ​​of each phase of the secondary-side inverter INV2 output by the dq-uvw conversion unit 38 to obtain the secondary-side output voltage command value v. u2 ref v v2 ref v w2 ref . Example 5

[0131] In addition, in the second embodiment described above, the primary-side modulation unit 24 is configured to perform ZFCPWM and the secondary-side modulation unit 26 is configured to perform RSPWM. However, this is not a limitation; the primary-side modulation unit 24 may also perform RSPWM and the secondary-side modulation unit 26 may perform ZFCPWM.

[0132] However, in this case, which is also the opposite of the case in Example 2, the zero-phase voltage v of the primary-side inverter INV1 is... z1 With zero-phase voltage command value v z ref The sum of these values ​​is used as the zero-phase voltage v of the secondary-side inverter INV2. z2 The output voltage is added to the output voltage command values ​​of each phase of the secondary-side inverter INV2 output by the dq-uvw conversion unit 38 to obtain the secondary-side output voltage command value v. u2ref v v2 ref v w2 ref .

[0133] Furthermore, in various embodiments, the zero-phase voltage v is suppressed by executing RSPWM and ZFCPWM. z However, these modulation methods can also be used to eliminate the zero-phase voltage v, depending on specific conditions such as the allowable operating range. z Changes.

[0134] Furthermore, in this embodiment, the output voltage command generation unit 23 is configured to divide and generate an effective voltage V. real With invalid voltage V imag The primary-side output voltage vector command value and the secondary-side output voltage vector command value are used as the primary-side output voltage vector command value, but the inventions of technical solutions 1 to 3 are not limited to this, and the method for determining the primary-side output voltage vector command value and the secondary-side output voltage vector command value can be modified in various ways. That is, as an addition of the zero-phase voltage command value v z ref One of the previous methods for determining the primary-side output voltage vector command value and the secondary-side output voltage vector command value involved dividing it into effective voltage V. real With invalid voltage V imag The method.

[0135] Furthermore, while switching elements composed of IGBTs have been used in the embodiments, MOSFETs may also be used. In particular, the specific configurations and values ​​shown in the embodiments are not limited to these and can be modified without departing from the spirit of the invention. Explanation of reference numerals in the attached figures:

[0136] 1: Power conversion device; 2: DC power supply; 3A~3F, 4A~4F: Switching element; 6: Control device; 7U, 7V, 7W: Coil; 11: Positive power supply line; 12: Negative power supply line; 21: Speed ​​control unit; 22: dqz axis current control unit (z axis current control unit); 23: Output voltage command generation unit; 24: Primary side modulation unit; 26: Secondary side modulation unit; 27: Secondary side voltage control unit; 36: Effective / ineffective decomposition unit; 39: Zero phase voltage distribution unit; C: Capacitor; INV1: Primary side inverter; INV2: Secondary side inverter; M: Motor.

Claims

1. A power conversion device, characterized in that, The power conversion device includes: a primary-side inverter connected to one end of a coil with an open structure in the motor; and a secondary-side inverter connected to the other end of the coil, applying the voltage difference between the primary-side inverter and the secondary-side inverter to the motor. The primary-side inverter is connected to a DC power supply. The secondary-side inverter is connected to the capacitor. The primary-side inverter shares the same negative-side power line as the secondary-side inverter. The power conversion device includes a control device that eliminates or suppresses the potential difference between the zero-phase voltage of the primary-side inverter and the zero-phase voltage of the secondary-side inverter, i.e., the variation of the zero-phase voltage.

2. The power conversion device according to claim 1, characterized in that, The primary-side inverter and the secondary-side inverter are each composed of multiple switching elements. The positive input terminal of the primary-side inverter is connected to the positive power line of the DC power supply, the negative input terminal of the primary-side inverter is connected to the negative power line of the DC power supply, and the output terminal of the primary-side inverter is connected to one end of the coil. The output terminal of the secondary-side inverter is connected to the other end of the coil, and the capacitor is connected between the positive and negative input terminals of the secondary-side inverter. The positive input terminal of the secondary inverter is not connected to the positive power line of the DC power supply, while the negative input terminal of the secondary inverter is connected to the negative power line of the DC power supply. An AC output is generated from the DC power supply by switching each of the switching elements using the control device.

3. The power conversion device according to claim 1, characterized in that, The control device includes: The secondary side voltage control unit generates a zero-phase current command value based on the secondary side voltage command value; The z-axis current control unit generates a zero-phase voltage command value based on the zero-phase current command value; and The output voltage command generation unit generates primary-side output voltage vector command values ​​and secondary-side output voltage vector command values ​​based on the dq-axis voltage command values. It also generates primary-side output voltage command values ​​for switching the primary-side inverter based on the primary-side output voltage vector command values ​​and secondary-side output voltage command values ​​for switching the secondary-side inverter based on the secondary-side output voltage vector command values.

4. The power conversion device according to claim 3, characterized in that, The output voltage command generation unit decomposes the dq axis voltage command value into effective voltage and invalid voltage, uses the effective voltage as the primary side output voltage vector command value, and uses the invalid voltage as the secondary side output voltage vector command value.

5. The power conversion device according to claim 3, characterized in that, The control device includes: The primary-side modulation unit generates the switching signal of the primary-side inverter based on the primary-side output voltage command value; and The secondary-side modulation unit generates the switching signal of the secondary-side inverter based on the secondary-side output voltage command value.

6. The power conversion device according to claim 5, characterized in that, The secondary-side modulation unit performs any one of the following pulse width modulations in a control cycle: pulse width modulation that outputs only odd voltage vectors in a control cycle, pulse width modulation that outputs only even voltage vectors in a control cycle, and pulse width modulation that switches between outputting only odd voltage vectors in a control cycle and outputting only even voltage vectors in a control cycle according to the voltage vector command value, thereby generating the switching signal to eliminate or suppress the fluctuation of the zero-phase voltage.

7. The power conversion device according to claim 6, characterized in that, The primary-side modulation unit performs pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating the switching signal to eliminate or suppress the fluctuation of the zero-phase voltage.

8. The power conversion device according to claim 6 or 7, characterized in that, The output voltage command generation unit adds the sum of the zero-phase voltage command value and the zero-phase voltage of the secondary inverter to the primary-side output voltage vector command value.

9. The power conversion device according to claim 5, characterized in that, The primary-side modulation unit and the secondary-side modulation unit perform pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating the switching signal to eliminate or suppress the fluctuation of the zero-phase voltage.

10. The power conversion device according to claim 9, characterized in that, The output voltage command generation unit assigns the zero-phase voltage command value to the primary-side output voltage vector command value and the secondary-side output voltage vector command value, and then adds them together.

11. The power conversion device according to claim 10, characterized in that, The output voltage command generation unit has the option to set the gain of the output voltage vector command value assigned to the primary side to 1 and the gain of the output voltage vector command value assigned to the secondary side to 0.

12. The power conversion device according to claim 10, characterized in that, The output voltage command generation unit has the option to set the gain of the output voltage vector command value assigned to the primary side to 0 and the gain of the output voltage vector command value assigned to the secondary side to 1.

13. The power conversion device according to claim 5, characterized in that, The primary-side modulation unit performs any one of the following pulse width modulations in a control cycle: pulse width modulation that outputs only odd voltage vectors in a control cycle, pulse width modulation that outputs only even voltage vectors in a control cycle, and pulse width modulation that switches between outputting only odd voltage vectors in a control cycle and outputting only even voltage vectors in a control cycle according to the voltage vector command value, thereby generating the switching signal to eliminate or suppress the fluctuation of the zero-phase voltage.

14. The power conversion device according to claim 13, characterized in that, The secondary-side modulation unit performs pulse width modulation to make the timing of the rise and fall of the phase voltage of other phases coincide with the timing of the rise and fall of the phase voltage of a specific phase, thereby generating the switching signal to eliminate or suppress the fluctuation of the zero-phase voltage.

15. The power conversion device according to claim 13 or 14, characterized in that, The output voltage command generation unit adds the sum of the zero-phase voltage command value and the zero-phase voltage of the primary-side inverter to the secondary-side output voltage vector command value.

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