One-step two-bit successive approximation depth extraction circuit for SPAD arrays

Abstract

This invention discloses a one-step, two-bit successive approximation depth extraction circuit for SPAD arrays, belonging to the field of single-photon detection and integrated circuits. The circuit includes: an extremum tracking circuit, a dual-mode counting circuit, a range compression circuit, an event-driven pulse sampling circuit, a time quantization circuit, and a depth information decoding circuit. The extremum tracking circuit extracts the extreme values ​​of SPAD photon trigger pulses and their corresponding trigger times within macropixels during the coarse quantization stage. The dual-mode counting circuit performs difference counting on the coarse or fine quantization results. The range compression circuit dynamically compresses the effective working range based on the counting results. The event-driven pulse sampling circuit initiates lossless sampling during the fine quantization stage. The time quantization circuit performs high-precision time quantization operations. The depth information decoding circuit fuses the coarse and fine quantization data and decodes and outputs depth information. This invention effectively balances background noise suppression, time quantization efficiency, and circuit implementation complexity while ensuring measurement accuracy.

Description

Technical Field

[0001] This invention belongs to the field of single-photon detection and integrated circuit technology, specifically relating to a one-step two-bit successive approximation depth extraction circuit for SPAD arrays. Background Technology

[0002] Single-photon avalanche diode (SPAD) arrays have been widely used in LiDAR, 3D imaging, and Time-of-Flight (ToF) depth ranging technologies due to their single-photon detection capability, high temporal resolution, and good adaptability to low-light environments. However, under conditions of strong background light or high darkness counting, SPAD arrays are prone to generating a large number of random triggering events unrelated to the actual echo, which affects the accuracy of depth information extraction.

[0003] In existing technologies, depth information extraction for SPAD arrays is mainly achieved through the collaborative implementation of two key technologies: photon trigger event (PTA) statistics and time quantization control. On the one hand, PTA statistics typically employ a histogram-based accumulation method. This method counts PTA output photon trigger events segmented along a time axis, accumulating the number of triggers at each time point to form a histogram. The peak value of the histogram is then used to locate the actual echo arrival time, thereby improving the measurement signal-to-noise ratio. On the other hand, time quantization control often utilizes a fixed measurement window or a scanning method covering the entire dynamic range of time. This method, when the echo location is unknown, uses a preset fixed time window for quantization or performs a full-coverage scan across the entire dynamic range of the system's measurement, using a unified, high-precision time quantization method to mark the time of photon trigger events. Furthermore, to improve integration, some solutions employ a macro-pixel structure, outputting multiple SPAD components in parallel to improve photon reception efficiency and simplify array readout logic.

[0004] However, existing histogram-based accumulation methods often require significant storage resources and computational overhead, making it difficult to meet the high integration and low power consumption requirements of large-scale SPAD arrays. Furthermore, using a fixed measurement window or scanning methods covering the entire time dynamic range results in high-precision time quantization of the entire time range before the echo position is determined, leading to low resource utilization of the time quantization circuit and limited overall system energy efficiency. For macro-pixel structure SPAD arrays, existing solutions struggle to simultaneously ensure measurement accuracy while also achieving good background noise suppression, time quantization efficiency, and circuit implementation complexity. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides a one-step, two-bit successive approximation depth extraction circuit and method for SPAD arrays. The technical problem to be solved by this invention is achieved through the following technical solution: In a first aspect, this invention proposes a one-step, two-bit successive approximation depth extraction circuit for SPAD arrays, comprising: an extremum tracking circuit, a dual-mode counting circuit, an interval compression circuit, an event-driven pulse sampling circuit, a time quantization circuit, and a depth information decoding circuit; wherein... The extreme value tracking circuit is configured to extract the edges of multiple SPAD photon trigger pulses within the macro pixel, sum the photon trigger events and detect the extreme values ​​during the coarse quantization stage, and output the maximum number of photon trigger events and the corresponding trigger time within a single exposure cycle, which are used as statistical data for the coarse quantization stage to the dual-mode counting circuit. The dual-mode counting circuit is configured to perform difference statistics on photon triggering events based on the current effective working interval for either coarse quantization stage statistical data or fine quantization stage statistical data, using both incremental and decremental counting modes, and output the dual-mode counting results to the interval compression circuit and the depth information decoding circuit. The interval compression circuit is configured to determine the echo position based on the dual-mode counting result and a preset threshold, and dynamically compress the effective working interval according to the determination result to achieve successive approximation positioning of two bits per step, and output the compressed effective working interval to the dual-mode counting circuit, the time quantization circuit and the depth information decoding circuit; at the same time, when the effective working interval is compressed to a quantization step smaller than the coarse quantization stage, the fine quantization enable signal is output to the event-driven pulse sampling circuit and the time quantization circuit. The event-driven pulse sampling circuit is configured to initiate fine quantization operation based on the fine quantization enable signal. During the fine quantization stage, it performs lossless sampling of multiple SPAD photon trigger pulses within the macro-pixel and outputs the sampling trigger signal to the time quantization circuit. The time quantization circuit is configured to perform high-precision time quantization based on the time interval between the sampling trigger signal and the rising edge of the effective working interval, and output the fine quantization stage statistical data to the dual-mode counting circuit. The depth information decoding circuit is configured to decode and output the final depth information by fusing coarse quantization results and fine quantization results based on the dual-mode counting results and the effective working range.

[0006] Secondly, this invention proposes a one-step, two-bit successive approximation depth extraction method for SPAD arrays. This method is implemented using the circuit proposed in the first aspect of this invention and includes a coarse quantization stage and a fine quantization stage; wherein... In the coarse quantization stage, the extreme value tracking circuit, dual-mode counting circuit and interval compression circuit work together to complete the extreme value detection of photon trigger pulse, the difference statistics of photon trigger events and the dynamic compression of the effective working interval; the event-driven pulse sampling circuit and the time quantization circuit are in standby state, and the coarse quantization results are temporarily stored by the depth information decoding circuit, so as to achieve rapid coarse positioning of the echo position as a whole. During the fine quantization stage, the extreme value tracking circuit stops working, and the event-driven pulse sampling circuit and time quantization circuit enter the working state to complete the lossless sampling and high-precision time quantization of photon-triggered events; the dual-mode counting circuit and the interval compression circuit continue to work together to complete the fine interval positioning; the depth information decoding circuit temporarily stores the fine quantization results to prepare for the final depth information output; Finally, the coarse quantization result and the fine quantization result are fused by the depth information decoding circuit to output the depth information.

[0007] The beneficial effects of this invention are: This invention provides a one-step, two-bit successive approximation depth extraction circuit for SPAD arrays, comprising: an extremum tracking circuit, a dual-mode counting circuit, an interval compression circuit, an event-driven pulse sampling circuit, a time quantization circuit, and a depth information decoding circuit. Specifically, the extremum tracking circuit extracts the extrema of the SPAD photon trigger pulse within a macro-pixel and the corresponding trigger time during the coarse quantization stage, and outputs this to the dual-mode counting circuit. The dual-mode counting circuit, based on the control of the interval compression circuit, performs difference counting on the statistical data from the coarse or fine quantization stages and outputs the counting result. The interval compression circuit dynamically compresses the effective working interval based on the counting result and outputs a fine quantization enable signal. The event-driven pulse sampling circuit initiates lossless sampling during the fine quantization stage and outputs a sampling trigger signal to the time quantization circuit. The time quantization circuit performs high-precision time quantization based on this signal and outputs fine quantization statistical data. The depth information decoding circuit fuses the coarse and fine quantization data and decodes and outputs the final depth information. This invention, through the circuit architecture combining extremum tracking, dynamic interval compression, and staged quantization, achieves the following beneficial effects: 1. Significantly reduces storage and computing overhead, adapting to the high integration and low power consumption requirements of large-scale SPAD arrays.

[0008] This invention is based on the statistical characteristics of echo photon triggering events. It uses an extreme value tracking circuit to perform extreme value detection on macro-pixel photon triggering events within a single exposure cycle, effectively suppressing invalid triggering caused by background noise. At the same time, it combines the statistical analysis of the increase and decrease count difference of the dual-mode counting circuit with the dynamic measurement window adjustment of the interval compression circuit. It can accurately locate the echo position without constructing a histogram of photon triggering events, greatly reducing storage resource consumption and computational overhead, and meeting the application requirements of high integration and low power consumption of large-scale SPAD arrays.

[0009] 2. Improve the utilization rate of time quantization circuit and improve the overall energy efficiency of the system.

[0010] This invention achieves lossless sampling of photon-triggered events through an event-driven pulse sampling circuit, and completes efficient quantization in conjunction with a high-precision time quantization circuit, avoiding redundant quantization operations in invalid intervals, improving the resource utilization of core modules such as the time quantization circuit, and further reducing overall power consumption.

[0011] 3. Balancing dynamic range, measurement accuracy, and circuit complexity.

[0012] This invention constructs a distributed quantization strategy that combines coarse quantization and fine quantization. The coarse quantization stage covers a wide measurement range with a large step size, while the fine quantization stage achieves high-precision time extraction with a small step size, thus balancing dynamic range and measurement accuracy. At the same time, it simplifies the circuit structure and reduces the implementation complexity, effectively solving the problem that traditional solutions struggle to balance dynamic range, measurement accuracy, time quantization efficiency, and circuit complexity.

[0013] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0014] Figure 1 A block diagram of a one-step two-bit successive approximation depth extraction circuit for SPAD arrays provided in an embodiment of the present invention; Figure 2 A detailed structural diagram of a one-step two-bit successive approximation depth extraction circuit for SPAD arrays provided in an embodiment of the present invention; Figure 3 This is a flowchart illustrating the one-step two-bit successive approximation depth extraction method for SPAD arrays provided in an embodiment of the present invention. Explanation of reference numerals in the attached figures: 100 - Extreme value tracking circuit, 101 - Edge detection circuit, 102 - Timing circuit, 103 - Summation circuit, 104 - Comparison circuit, 105 - Storage circuit; 200 - Dual-mode counting circuit; 201 - Selection circuit; 202 - Counting control circuit; 203 - Bidirectional counting circuit. 300 - Interval compression circuit; 301 - Echo determination circuit; 302 - Interval adjustment circuit; 400 - Event-driven pulse sampling circuit, 401 - Pulse compression circuit, 402 - OR gate logic circuit, 403 - Photon-triggered event sampling circuit; 500 - Time quantization circuit, 501 - Delay unit, 502 - Second sampling circuit, 503 - Latch circuit, 504 - Second decoding circuit; 600- Depth Information Decoding Circuit. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] It should be noted that in this invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes that element.

[0017] A first aspect of the present invention provides a depth information extraction circuit for SPAD arrays. See also... Figure 1 , Figure 1 This is a block diagram of a one-step, two-bit successive approximation depth extraction circuit for SPAD arrays provided in an embodiment of the present invention. The circuit includes: an extremum tracking circuit 100, a dual-mode counting circuit 200, an interval compression circuit 300, an event-driven pulse sampling circuit 400, a time quantization circuit 500, and a depth information decoding circuit 600; wherein... The extreme value tracking circuit 100 is configured to perform edge extraction, photon trigger event summation and extreme value detection on multiple SPAD photon trigger pulses within a macro pixel during the coarse quantization stage, and output the maximum number of photon trigger events and the corresponding trigger time within a single exposure cycle as statistical data for the coarse quantization stage to the dual-mode counting circuit 200. The dual-mode counting circuit 200 is configured to perform difference statistics on photon triggering events based on the current effective working interval for coarse quantization stage statistical data or fine quantization stage statistical data, using two working modes: incremental counting and decremental counting. The dual-mode counting results are then output to the interval compression circuit 300 and the depth information decoding circuit 600. The interval compression circuit 300 is configured to determine the echo position based on the dual-mode counting result and a preset threshold, and dynamically compress the effective working interval according to the determination result to achieve successive approximation positioning of two bits per step, and output the compressed effective working interval to the dual-mode counting circuit 200, the time quantization circuit 500 and the depth information decoding circuit 600; at the same time, when the effective working interval is compressed to a quantization step smaller than the coarse quantization stage, a fine quantization enable signal is output to the event-driven pulse sampling circuit 400 and the time quantization circuit 500. The event-driven pulse sampling circuit 400 is configured to start the fine quantization operation based on the fine quantization enable signal. During the fine quantization stage, it performs lossless sampling of multiple SPAD photon trigger pulses within the macro pixel and outputs the sampling trigger signal to the time quantization circuit 500. The time quantization circuit 500 is configured to perform high-precision time quantization based on the time interval between the sampling trigger signal and the rising edge of the effective working interval, and output the fine quantization stage statistical data to the dual-mode counting circuit 200. The depth information decoding circuit 600 is configured to decode and output the final depth information by fusing coarse quantization results and fine quantization results based on the dual-mode counting results and the effective working range.

[0018] For example, the present invention is based on Figure 1 The circuit architecture shown divides the depth information extraction process into two stages: coarse quantization and fine quantization. In the coarse quantization stage, the system uses the extreme value tracking circuit 100 to perform preliminary statistics on macro-pixel photon triggering events. Combined with the increase / decrease count difference statistics from the dual-mode counting circuit 200 and the dynamic interval compression from the interval compression circuit 300, the system performs preliminary localization of the echo photons. In the fine quantization stage, the system first uses the event-driven pulse sampling circuit 400 to perform lossless sampling of photon triggering events within the macro-pixel and records the triggering state of all SPADs in the macro-pixel at any given time. Then, the time quantization circuit 500 performs high-precision quantization on the time interval between the sampled photon triggering time and the edge of the effective working interval. Based on the SPAD triggering state and the output of the time quantization circuit 500, the system obtains the triggering times of all SPADs in the macro-pixel. Combined with the dual-mode counting circuit 200 and the interval compression circuit 300, the system performs high-precision localization of the echo photons. After measurement, the depth information calculation circuit calculates the results from the coarse and fine quantization stages, generates the final depth information, and resets the system to await the next measurement.

[0019] Each circuit module will be described in detail below.

[0020] First, the extreme value tracking circuit 100 will be described in detail. Please refer to [link / reference]. Figure 2 , Figure 2This is a detailed structural diagram of a one-step two-bit successive approximation depth extraction circuit for SPAD arrays provided in an embodiment of the present invention. The extreme value tracking circuit 100 includes an edge detection circuit 101, a timing circuit 102, a summing circuit 103, a comparison circuit 104, and a storage circuit 105.

[0021] Optionally, in this embodiment, the edge detection circuit 101 is configured to detect the rising edge of multiple SPAD photon trigger pulses within the macropixel and output all detected valid edges to the summing circuit 103.

[0022] Specifically, in this embodiment, the circuit can be implemented using a high-speed comparator array or a digital edge extraction unit to ensure timely capture of single-photon triggering events. Simultaneously, the edge detection circuit 101 processes pulse inputs from M×N SPADs through a parallel structure and outputs all detected valid edges to the summing circuit 103 for subsequent counting and statistics.

[0023] Optionally, in this embodiment, the timing circuit 102 is configured to continuously count the entire effective working interval based on a reference clock to generate preliminary time information corresponding to the photon triggering event.

[0024] Specifically, during each measurement process, the timing circuit 102 uses the system master clock or on-chip reference clock as a reference, takes the rising edge of the measurement interval as the starting point, and continuously counts the entire measurement interval using an incrementing counter to construct preliminary timing information. In the fine quantization stage, this timing information corresponds to the final quantization result of the coarse quantization stage.

[0025] Optionally, in this embodiment, the summing circuit 103 is configured to count the total number of photon triggering events occurring in a single clock cycle of the macropixel based on all detected valid edges, and output the total number of photon triggering events to the comparison circuit 104.

[0026] Specifically, the summing circuit 103 is used to accumulate and sum the photon trigger pulses of each edge detection circuit 101 within the macropixel in each clock cycle of the timing circuit 102. In this embodiment, the circuit is implemented using a multi-input adder array. The timing circuit 102 uses its clock as a reference to drive the summing circuit 103 to accumulate the number of events in real time in each clock cycle, and outputs the sum of photon trigger events in that cycle to the comparison circuit 104.

[0027] Optionally, in this embodiment, the comparison circuit 104 is configured to compare the total number of photon triggering events in the current period with the historical maximum number of photon triggering events stored in the storage circuit 105, and output a control signal to the storage circuit 105 according to the comparison result to control the update of the maximum number of photon triggering events.

[0028] Specifically, the comparator circuit 104 compares the sum of photon-triggered events output by the summing circuit 103 with the maximum number of photon-triggered events stored in the storage circuit. If the total number of photon-triggered events in the current period is greater than the historical maximum number of photon-triggered events stored in the storage circuit 105, a control signal is output to the storage circuit 105 to update the maximum number of photon-triggered events to the total number of photon-triggered events in the current period; if the total number of photon-triggered events in the current period is less than the historical maximum number of photon-triggered events stored in the storage circuit 105, the historical maximum number of photon-triggered events in the storage circuit 105 remains unchanged.

[0029] Optionally, in this embodiment, the storage circuit 105 is configured to save and update the maximum number of photon triggering events and their corresponding triggering times within a single exposure cycle.

[0030] Specifically, before each measurement begins, the storage circuit 106 is reset to clear previous data. During the measurement, under the control of the comparison circuit 104, when the sum of photon trigger events in the current clock cycle is greater than the stored maximum value, the storage circuit 106 updates the new maximum number of photon trigger events and their corresponding trigger times. If the sum of photon trigger events is less than or equal to the stored value, the original data remains unchanged. After the measurement is completed, the storage circuit 106 outputs the saved maximum sum of photon trigger events and their trigger times to the dual-mode counting circuit 200 for subsequent processing.

[0031] The dual-mode counting circuit 200 will be described in detail below. Please continue reading... Figure 2 The dual-mode counting circuit 200 includes a selection circuit 201, a counting control circuit 202, and a bidirectional counting circuit 203.

[0032] Optionally, in this embodiment, the selection circuit 201 is configured to select the statistical data of the coarse quantization stage output by the extremum tracking circuit 100 in the coarse quantization stage, and select the statistical data of the fine quantization stage output by the time quantization circuit 500 in the fine quantization stage. Specifically, the selection circuit 201 is used to provide appropriate input data to the bidirectional counting circuit 203 at different quantization stages. In this embodiment, the selection circuit 201 is implemented using a multiplexer. Specifically, in the coarse quantization stage, the selection circuit 201 outputs the maximum photon count result of the extremum tracking circuit 100 to support the bidirectional counting circuit 203 in performing rapid preliminary statistics on echo photons; in the fine quantization stage, the selection circuit 201 outputs photon trigger event data from the event-driven pulse sampling circuit 400 to support the bidirectional counting circuit 203 in performing lossless cumulative statistics on macro-pixel photon trigger events.

[0033] Optionally, in this embodiment, the counting control circuit 202 is configured to determine the sub-interval where the photon triggering event is located based on the output of the selection circuit 201, and output a corresponding counting control signal based on the sub-interval to control the counting direction and the magnitude of the accumulated count of the bidirectional counting circuit 203.

[0034] Specifically, during the first determination phase, the bidirectional counting circuit 203 is split into a first sub-counter and a second sub-counter. When the photon triggering time is within the first sub-interval, the first sub-counter is controlled to operate in increment mode. When the photon triggering time is within the second sub-interval, the first sub-counter is controlled to operate in decrement mode. When the photon triggering time is within the third sub-interval, the second sub-counter is controlled to operate in increment mode. When the photon triggering time is within the fourth sub-interval, the second sub-counter is controlled to operate in decrement mode.

[0035] During the second determination phase, the first and second sub-counters are merged and configured into a single bidirectional counter. When the photon triggering time is within the first sub-interval, the merged counter is controlled to operate in incrementing mode; when the photon triggering time is within the second sub-interval, the merged counter is controlled to operate in decrementing mode.

[0036] Optionally, in this embodiment, the bidirectional counting circuit 203 is configured to perform difference statistics on photon triggering events in different sub-intervals through incrementing and decrementing counting modes at different determination stages, based on the counting direction and the magnitude of the accumulated count, and output the dual-mode counting result.

[0037] Specifically, in the first determination stage, the bidirectional counting circuit 203 is split into a first sub-counter and a second sub-counter. The first sub-counter increments or decrements the count of photon-triggered events in the first two sub-intervals according to the counting control signal to generate a first counting result. The second sub-counter increments or decrements the count of photon-triggered events in the latter two sub-intervals according to the counting control signal to generate a second counting result. By statistically analyzing the increment / decrement difference of the counts for photon-triggered events in different sub-intervals using the two sub-counters, the distribution information of echo photons in each sub-interval is obtained.

[0038] In the second determination stage, the first sub-counter and the second sub-counter are combined and configured into a single bidirectional counter, and increment or decrement the counter according to the counting control signal to generate a third counting result, which is the counting result of the second determination stage.

[0039] Based on the two-stage counting mechanism described above, the system can simultaneously determine two bits of information in the interval where the echo is located during each round of judgment, achieving step-by-step two-bit successive approximation quantization, thereby gradually narrowing the measurement interval where the echo is located while reducing the number of judgment rounds.

[0040] The following section provides a detailed description of the interval compression circuit 300. Please continue reading... Figure 2 The interval compression circuit 300 includes an echo determination circuit 301 and an interval adjustment circuit 302.

[0041] Optionally, in this embodiment, the echo determination circuit 301 is configured to determine the echo position at different determination stages: in the first determination stage, the first counting result and the second counting result are detected and the echo position is determined; when the determination result is clear, the echo position determination result is output; when the determination result is unclear, a control signal to enter the second determination stage is output; in the second determination stage, the echo position is further determined according to the third counting result and the echo position determination result is output.

[0042] Specifically, in the first determination stage, the echo determination circuit 301 detects the first and second counting results and makes a preliminary determination of the echo position based on the difference between them. When one of the counting results overflows, the echo determination circuit 301 outputs an exposure termination signal in advance to stop the current exposure process and determines the first and second counting results. When the absolute difference between the first and second counting results is greater than a first preset threshold, the echo is determined to be located in the two sub-intervals corresponding to the counting result with the larger absolute value, and the specific sub-interval is further determined based on the sign of the counting result: when the first counting result is positive or negative, the echo is determined to be located in the first or second sub-interval, respectively; when the second counting result is positive or negative, the echo is determined to be located in the third or fourth sub-interval, respectively. When the exposure ends and neither the first nor the second counting result overflows, and the absolute difference between them is less than the first preset threshold, the echo determination circuit 301 outputs a control signal to enter the second determination stage. In the second determination stage, the echo determination circuit 301 further determines the echo position based on the relationship between the absolute value of the counting result in the second determination stage and the second preset threshold. When the absolute value of the counting result in the second determination stage is greater than the second preset threshold, the echo is determined to be located at the boundary between the first sub-interval and the second sub-interval or the boundary between the third sub-interval and the fourth sub-interval based on its sign; when the absolute value of the counting result in the second determination stage is less than or equal to the second preset threshold, the echo is determined to be located at the center of the current effective working interval.

[0043] Optionally, in this embodiment, the interval adjustment circuit 302 is configured to dynamically compress the effective working interval based on the echo position determination result, and output a fine quantization enable signal when the effective working interval is compressed to a value smaller than the quantization step of the coarse quantization stage.

[0044] Optionally, in this embodiment, the effective working range is dynamically compressed in the interval adjustment circuit 302 based on the echo position determination result, including: In the initial measurement phase, the entire effective working area is divided into four sub-areas at equal intervals, and the location information of each sub-area is output. After the first determination stage is completed, the effective working range is compressed into the sub-range corresponding to the echo position based on the echo position determination result, and the compressed effective working range is obtained. At the same time, the compressed effective working range is further divided into four sub-ranges, and the position information of each sub-range is output for the next round of echo position determination. When entering the second determination stage, the current effective working range is divided into two sub-ranges, and the position information of the two sub-ranges is output to further determine the echo position. The effective working range is then compressed into the sub-range corresponding to the echo position to obtain the compressed effective working range.

[0045] Specifically, when the echo determination circuit 301 determines that the echo is located in one of the four sub-intervals, the interval adjustment circuit 302 performs interval compression on the current effective working interval, updating the effective working interval to the sub-interval where the echo is located, and then dividing the updated effective working interval into four equally spaced sub-intervals for the next round of echo position determination. When the echo determination circuit 301 outputs the echo position at the boundary between two adjacent sub-intervals, the interval adjustment circuit 302 adjusts the effective working interval to the position at the boundary. In the coarse quantization stage, the interval adjustment circuit 302 quickly locates the approximate position of the echo photon through step-by-step interval compression; when the effective working interval is compressed step-by-step to a quantization step smaller than that of the coarse quantization stage, the interval adjustment circuit 302 determines that the coarse quantization stage has ended, and enables the event-driven pulse sampling circuit and time quantization circuit, and the system switches to the fine quantization stage, where the echo photon position is further finely located through a higher precision quantization step.

[0046] Furthermore, the measurement process of this invention includes two stages: a coarse quantization stage and a fine quantization stage. In the coarse quantization stage, the interval adjustment circuit 302 rapidly locates the approximate position of the echo photon by progressively compressing the interval. When the effective working interval is progressively compressed to a quantization step smaller than that of the coarse quantization stage, the interval adjustment circuit 302 determines that the coarse quantization stage has ended and enables the event-driven pulse sampling circuit and time quantization circuit. The system then switches to the fine quantization stage, where the position of the echo photon is further finely located using a higher precision quantization step.

[0047] The event-driven pulse sampling circuit 400 is described in detail below. Please continue reading... Figure 2 The event-driven pulse sampling circuit 400 includes a pulse compression circuit 401, an OR gate logic circuit 402, and a photon-triggered event sampling circuit 403.

[0048] Optionally, in this embodiment, the pulse compression circuit 401 is configured to compress multiple SPAD photon trigger pulses within a macropixel into a narrow pulse signal of fixed width.

[0049] Specifically, in this embodiment, the pulse compression circuit 401 compresses the photon trigger pulses with variable widths output by each SPAD within the macropixel into narrow pulse signals with fixed widths. Regardless of the difference in the input pulse width, each photon trigger event can be standardized and identified, providing a reliable and consistent signal basis for subsequent logic processing.

[0050] Optionally, in this embodiment, the OR gate logic circuit 402 is configured to summarize and merge narrow pulse signals through OR gate logic, and output a macro-pixel level unified trigger signal.

[0051] Specifically, in this embodiment, the output signals of the pulse compression circuit 401 corresponding to all SPADs in the macro-pixel are summarized and merged by the OR gate logic circuit 402 to form a unified photon trigger pulse output signal at the macro-pixel level. This ensures that the triggering event of any SPAD in the macro-pixel can be reflected in the macro-pixel output in real time, thereby ensuring that the photon triggering event sampling circuit 403 can perform lossless sampling and statistics on all photon triggering events.

[0052] Optionally, in this embodiment, the photon trigger event sampling circuit 403 is configured to sample the triggering state of multiple SPAD photon trigger pulses within the macropixel without loss of data under the control of the trigger signal, and to determine the triggering time of each SPAD.

[0053] Specifically, the photon trigger event sampling circuit 403 is used to perform lossless sampling of photon trigger events within the macro-pixel under the control of the pulse signal output by the OR gate logic circuit 402, and obtain the trigger state of all SPADs in the macro-pixel at any photon trigger time, and obtain the trigger time of all SPADs in the macro-pixel based on the measurement results of the time quantization circuit 500.

[0054] Optionally, in this embodiment, the photon-triggered event sampling circuit 403 includes a first sampling circuit and a first decoding circuit; wherein, The first sampling circuit is configured to sample multiple SPAD photon trigger pulses within a macro pixel under the control of the trigger signal, so as to obtain the triggering state of different SPADs in the macro pixel at the same triggering moment. The first decoding circuit is configured to determine the trigger time of each SPAD based on the output state of the first sampling circuit and the output information of the time quantization circuit, and output a sampling trigger signal.

[0055] Specifically, under the control of the output pulse of OR gate logic 402, the first sampling circuit samples the output pulse of each SPAD in the macro pixel in real time, and the first decoding circuit obtains the trigger time of all SPADs in the macro pixel by the output state of the first sampling circuit and the time interval of the trigger pulse output by the time quantization circuit 500.

[0056] For example, within a single exposure cycle, the time quantization circuit outputs five valid values, with quantization results A1, A2, A3, A4, and A5. The macropixel contains 16 SPADs. The photon-triggered event sampling circuit 403 will definitely store five non-zero states, for example, 1100001100000000, 0011000011000000, 0000100000100000, and 00000110000. Given 11000,0000000100000100, we can obtain the measurement results of the 1st, 2nd, 7th, and 8th SPADs in the macropixel as A1, the measurement results of the 3rd, 4th, 9th, and 10th SPADs as A2, the measurement results of the 5th and 11th SPADs as A3, the measurement results of the 6th, 7th, 12th, and 13th SPADs as A4, and the measurement results of the 8th and 14th SPADs as A5.

[0057] The following section provides a detailed introduction to the time quantization circuit 500. Please continue reading... Figure 2 The time quantization circuit 500 includes a delay unit 501, a second sampling circuit 502, a latch circuit 503, and a second decoding circuit 504.

[0058] Optionally, in this embodiment, the delay unit 501 is configured to delay the fine quantization enable signal output by the interval compression circuit 300 through a multi-level delay chain.

[0059] Specifically, delay unit 501 is used to delay the interval enable signal output by the interval compression circuit through a multi-stage delay chain, thereby generating a high-precision time reference signal. Delay unit 501 can employ a multi-stage chained delay structure or a transmission gate delay chain, and the delay accuracy can be fine-tuned according to design requirements to achieve nanosecond or even picosecond-level time resolution. During the fine-quantization stage, this unit provides precise time information between the occurrence of the photon trigger event and the rising edge of the effective working interval enable signal.

[0060] Optionally, in this embodiment, the second sampling circuit 502 is configured to sample the state of the real-time sampling delay unit 501 under the triggering of the sampling trigger signal output by the event-driven pulse sampling circuit 400.

[0061] Specifically, the sampling circuit 502 samples the output states of each stage of the delay unit 501 in real time under the trigger signal output by the event-driven pulse sampling circuit 400.

[0062] Optionally, in this embodiment, the latch circuit 503 is configured to latch and hold the flip-off time information of the delay unit 501.

[0063] Specifically, the latch circuit 503 uses the control of the OR gate logic output signal to latch and hold the flip-off moment of the delay unit, thereby avoiding time information distortion during subsequent decoding.

[0064] Optionally, in this embodiment, the second decoding circuit 504 is configured to quantize the photon return time according to the output of the latch circuit 503, realize high-precision time decoding, and output detailed quantization stage statistics.

[0065] Finally, the depth information decoding circuit 600 will be described in detail.

[0066] Specifically, the depth information decoding circuit 600 is used to comprehensively calculate the quantization results obtained from the coarse quantization stage and the fine quantization stage after a complete measurement cycle. Based on the preliminary quantization results from the coarse quantization stage and combined with the high-precision quantization results output by the interval compression circuit 300 in the fine quantization stage, this circuit reconstructs the actual arrival time of the photon triggering event, thereby calculating the corresponding depth information.

[0067] Understandably, after calculating and generating the current depth information, each circuit module needs to be reset in preparation for the next measurement.

[0068] It should be noted that the specific results of the edge detection circuit 101, timing circuit 102, summing circuit 103, comparison circuit 104, storage circuit 105, selection circuit 201, counting control circuit 202, bidirectional counting circuit 203, echo determination circuit 301, interval adjustment circuit 302, pulse compression circuit 401, OR gate logic circuit 402, photon trigger event sampling circuit 403, first sampling circuit, first decoding circuit, delay unit 501, second sampling circuit 502, latch circuit 503, and second decoding circuit 504 involved in this invention can be implemented using existing conventional circuits or functional modules according to their specific functional requirements. This embodiment does not specifically limit the stinger.

[0069] It should be understood that the circuit functional modules in the various embodiments of the present invention can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated module can be implemented in hardware or in the form of hardware plus software functional modules.

[0070] Meanwhile, the macro-pixels mentioned in this invention can also contain one or more SPADs. Then, the outputs of the macro-pixels are grouped into macro-pixel groups, and the outputs of the macro-pixel groups are connected through an OR gate. Then, an event-driven pulse sampling circuit and a time quantization circuit are used to realize the quantization of the trigger time of the output pulses of multiple macro-pixels by a single time-to-digital converter circuit.

[0071] In summary, the one-step, two-bit successive approximation depth extraction circuit for SPAD arrays provided by this invention includes: an extremum tracking circuit, a dual-mode counting circuit, an interval compression circuit, an event-driven pulse sampling circuit, a time quantization circuit, and a depth information decoding circuit. Specifically, the extremum tracking circuit extracts the extreme values ​​of SPAD photon trigger pulses within macropixels and their corresponding trigger times during the coarse quantization stage, and outputs them to the dual-mode counting circuit. The dual-mode counting circuit, based on the control of the interval compression circuit, performs difference counting on the statistical data from the coarse or fine quantization stages and outputs the counting results. The interval compression circuit dynamically compresses the effective working interval based on the counting results and outputs a fine quantization enable signal. The event-driven pulse sampling circuit initiates lossless sampling during the fine quantization stage and outputs a sampling trigger signal to the time quantization circuit. The time quantization circuit performs high-precision time quantization based on this signal and outputs fine quantization statistical data. The depth information decoding circuit fuses the coarse and fine quantization data and decodes and outputs the final depth information. The entire process follows a logical architecture of "coarse quantization—fine quantization—depth calculation," and is suitable for SPAD arrays with macropixel structures. While ensuring measurement accuracy, it effectively balances background noise suppression capability, time quantization efficiency, and circuit implementation complexity.

[0072] This invention achieves the following beneficial effects through a circuit architecture that combines extreme value tracking, interval dynamic compression, and staged quantization: 1. Significantly reduces storage and computing overhead, adapting to the high integration and low power consumption requirements of large-scale SPAD arrays.

[0073] This invention combines the statistical analysis of the increase / decrease difference of the dual-mode counting circuit with the dynamic measurement window adjustment of the interval compression circuit. It can accurately locate the echo position without constructing a photon trigger event histogram, which greatly reduces the storage resource occupation and computational overhead, and meets the application requirements of high integration and low power consumption of large-scale SPAD arrays.

[0074] 2. Improve the utilization rate of time quantization circuit and improve the overall energy efficiency of the system.

[0075] This invention achieves lossless sampling of photon-triggered events through an event-driven pulse sampling circuit, and completes efficient quantization in conjunction with a high-precision time quantization circuit, avoiding redundant quantization operations in invalid intervals, improving the resource utilization of core modules such as the time quantization circuit, and further reducing overall power consumption.

[0076] 3. Balancing dynamic range, measurement accuracy, and circuit complexity.

[0077] This invention constructs a distributed quantization strategy that combines coarse quantization and fine quantization. The coarse quantization stage covers a wide measurement range with a large step size, while the fine quantization stage achieves high-precision time extraction with a small step size. At the same time, it simplifies the circuit structure, reduces the implementation complexity, and effectively solves the problem that traditional solutions cannot simultaneously balance dynamic range, measurement accuracy, time quantization efficiency, and circuit complexity.

[0078] Based on the same inventive concept, a second aspect of this invention also provides a one-step, two-bit successive approximation depth extraction method for SPAD arrays, mainly including a coarse quantization stage and a fine quantization stage. Please refer to... Figure 3 , Figure 3 This is a flowchart illustrating a one-step, two-bit successive approximation depth extraction method for SPAD arrays provided in an embodiment of the present invention. The method mainly includes: Step 1: In the coarse quantization stage, the extreme value tracking circuit 100, the dual-mode counting circuit 200, and the interval compression circuit 300 work together to complete the extreme value detection of photon trigger pulses, the statistical analysis of photon trigger event differences, and the dynamic compression of the effective working interval; the event-driven pulse sampling circuit 400 and the time quantization circuit 500 are in standby mode, and the coarse quantization results are temporarily stored using the depth information decoding circuit 600, so as to achieve rapid coarse positioning of the echo position as a whole; Step 2: In the fine quantization stage, the extreme value tracking circuit 100 stops working, and the event-driven pulse sampling circuit 400 and the time quantization circuit 500 enter the working state to complete the lossless sampling and high-precision time quantization of photon-triggered events; the dual-mode counting circuit 200 and the interval compression circuit 300 continue to work together to complete the fine interval positioning; the depth information decoding circuit 600 temporarily stores the fine quantization results to prepare for the final depth information output; Step 3: Finally, the coarse quantization result and the fine quantization result are fused by the depth information decoding circuit 600 to output the depth information.

[0079] Understandably, after calculating and generating the current depth information, each circuit module needs to be reset in preparation for the next measurement.

[0080] It should be noted that the method embodiment provided in the second aspect of the present invention is relatively simple to describe because it is based on the circuit provided in the first aspect of the present invention. For relevant details, please refer to the description of the method embodiment. It also has the same beneficial effects as the circuit embodiment.

[0081] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A one-step, two-bit successive approximation depth extraction circuit for SPAD arrays, characterized in that, include: The circuit includes an extreme value tracking circuit (100), a dual-mode counting circuit (200), an interval compression circuit (300), an event-driven pulse sampling circuit (400), a time quantization circuit (500), and a depth information decoding circuit (600); among which, The extreme value tracking circuit (100) is configured to perform edge extraction, photon trigger event summation and extreme value detection on multiple SPAD photon trigger pulses within the macro pixel during the coarse quantization stage, and output the maximum number of photon trigger events and the corresponding trigger time within a single exposure cycle as statistical data of the coarse quantization stage to the dual-mode counting circuit (200). The dual-mode counting circuit (200) is configured to perform difference statistics on photon triggering events based on the current effective working interval for the statistical data of the coarse quantization stage or the statistical data of the fine quantization stage, using two working modes: incremental counting and decremental counting, and output the dual-mode counting results to the interval compression circuit (300) and the depth information decoding circuit (600). The interval compression circuit (300) is configured to determine the echo position based on the dual-mode counting result and a preset threshold, and dynamically compress the effective working interval based on the determination result to achieve successive approximation positioning with two bits per step, and output the compressed effective working interval to the dual-mode counting circuit (200), the time quantization circuit (500), and the depth information decoding circuit (600); at the same time, when the effective working interval is compressed to a quantization step smaller than the coarse quantization stage, a fine quantization enable signal is output to the event-driven pulse sampling circuit (400) and the time quantization circuit (500); The event-driven pulse sampling circuit (400) is configured to start a fine quantization operation based on the fine quantization enable signal, perform lossless sampling of multiple SPAD photon trigger pulses within the macro pixel during the fine quantization stage, and output a sampling trigger signal to the time quantization circuit (500). The time quantization circuit (500) is configured to perform high-precision time quantization based on the time interval between the sampling trigger signal and the rising edge of the effective working interval, and output the fine quantization stage statistical data to the dual-mode counting circuit (200). The depth information decoding circuit (600) is configured to decode and output the final depth information by fusing coarse quantization results and fine quantization results based on the dual-mode counting results and the effective working range.

2. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 1, characterized in that, The extreme value tracking circuit (100) includes an edge detection circuit (101), a timing circuit (102), a summing circuit (103), a comparison circuit (104), and a storage circuit (105); wherein, The edge detection circuit (101) is configured to detect the rising edge of multiple SPAD photon trigger pulses within the macropixel and output all detected valid edges to the summing circuit (103). The timing circuit (102) is configured to continuously count photon triggering events throughout the entire effective working interval based on a reference clock, and generate preliminary time information corresponding to the photon triggering events; The summing circuit (103) is configured to count the total number of photon triggering events that occur in a single clock cycle of a macropixel based on all detected valid edges, and output the total number of photon triggering events to the comparison circuit (104); The comparison circuit (104) is configured to compare the total number of photon triggering events in the current period with the historical maximum number of photon triggering events stored in the storage circuit (105), and output a control signal to the storage circuit (105) according to the comparison result to control the updating of the maximum number of photon triggering events; The storage circuit (105) is configured to save and update the maximum number of photon triggering events and their corresponding triggering times within a single exposure cycle.

3. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 2, characterized in that, In the comparison circuit (104), an update control signal is output to the storage circuit (105) based on the comparison result to control the update of the maximum number of photon triggering events, including: If the total number of photon triggering events in the current period is greater than the maximum number of historical photon triggering events stored in the storage circuit (105), a control signal is output to the storage circuit (105) to update the maximum number of photon triggering events to the total number of photon triggering events in the current period. If the total number of photon triggering events in the current period is less than the number of historical maximum photon triggering events stored in the storage circuit (105), then the number of historical maximum photon triggering events stored in the storage circuit (105) remains unchanged.

4. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 1, characterized in that, The dual-mode counting circuit (200) includes a selection circuit (201), a counting control circuit (202), and a bidirectional counting circuit (203); wherein, The selection circuit (201) is configured to select the coarse quantization stage statistical data output by the extreme value tracking circuit (100) in the coarse quantization stage, and to select the fine quantization stage statistical data output by the time quantization circuit (500) in the fine quantization stage. The counting control circuit (202) is configured to determine the sub-interval where the photon triggering event is located based on the output of the selection circuit (201), and output a corresponding counting control signal based on the sub-interval to control the counting direction and the magnitude of the count accumulation of the bidirectional counting circuit (203); The bidirectional counting circuit (203) is configured to perform difference statistics on photon triggering events in different sub-intervals at different determination stages using an incrementing counting mode and a decrementing counting mode, based on the counting direction and the magnitude of the accumulated count, and output a dual-mode counting result; wherein... In the first determination stage, the bidirectional counting circuit (203) is split into a first sub-counter and a second sub-counter; the first sub-counter performs increment or decrement counting on the photon triggering events in the first two sub-intervals according to the counting control signal to generate a first counting result; the second sub-counter performs increment or decrement counting on the photon triggering events in the last two sub-intervals according to the counting control signal to generate a second counting result. In the second determination stage, the first sub-counter and the second sub-counter are combined and configured into a single bidirectional counter, and increment or decrement counting is performed according to the counting control signal to generate a third counting result.

5. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 4, characterized in that, The interval compression circuit (300) includes an echo determination circuit (301) and an interval adjustment circuit (302); wherein, The echo determination circuit (301) is configured to determine the echo position at different determination stages: In the first determination stage, the first and second counting results are detected and the echo position is determined. When the determination result is clear, the echo position determination result is output. When the determination result is unclear, the control signal to enter the second determination stage is output. In the second determination stage, the echo position is further determined based on the third counting result and the echo position determination result is output. The interval adjustment circuit (302) is configured to dynamically compress the effective working interval according to the echo position determination result, and output a fine quantization enable signal when the effective working interval is compressed to a value smaller than the quantization step of the coarse quantization stage.

6. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 5, characterized in that, In the interval adjustment circuit (302), the effective working interval is dynamically compressed according to the echo position determination result, including: In the initial measurement phase, the entire effective working area is divided into four sub-areas at equal intervals, and the location information of each sub-area is output. After the first determination stage is completed, based on the echo position determination result, the effective working interval is compressed into the sub-interval corresponding to the echo position to obtain the compressed effective working interval; at the same time, the compressed effective working interval is divided into four sub-intervals again, and the position information of each sub-interval is output for the next round of echo position determination. When entering the second determination stage, the current effective working interval is divided into two sub-intervals, and the position information of the two sub-intervals is output to further determine the echo position. The effective working interval is then compressed into the sub-interval corresponding to the echo position to obtain the compressed effective working interval.

7. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 1, characterized in that, The event-driven pulse sampling circuit (400) includes a pulse compression circuit (401), an OR gate logic circuit (402), and a photon-triggered event sampling circuit (403); wherein, The pulse compression circuit (401) is configured to compress multiple SPAD photon trigger pulses within a macropixel into a narrow pulse signal of fixed width. The OR gate logic circuit (402) is configured to summarize and merge the narrow pulse signal through OR gate logic, and output a macro-pixel level unified trigger signal; The photon trigger event sampling circuit (403) is configured to sample the triggering state of multiple SPAD photon trigger pulses within a macropixel without loss of data under the control of the trigger signal, and to determine the triggering time of each SPAD.

8. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 7, characterized in that, The photon-triggered event sampling circuit (403) includes a first sampling circuit and a first decoding circuit; wherein, The first sampling circuit is configured to sample multiple SPAD photon trigger pulses within a macro pixel under the control of the trigger signal, so as to obtain the triggering state of different SPADs in the macro pixel at the same triggering moment; The first decoding circuit is configured to determine the trigger time of each SPAD based on the output state of the first sampling circuit and the output information of the time quantization circuit, and output a sampling trigger signal.

9. The one-step two-bit successive approximation depth extraction circuit for SPAD arrays according to claim 1, characterized in that, The time quantization circuit (500) includes a delay unit (501), a second sampling circuit (502), a latch circuit (503), and a second decoding circuit (504); wherein, The delay unit (501) is configured to delay the fine quantization enable signal output by the interval compression circuit (300) through a multi-stage delay chain; The second sampling circuit (502) is configured to sample the state of the delay unit (501) in real time under the triggering of the sampling trigger signal output by the event-driven pulse sampling circuit (400); The latch circuit (503) is configured to latch and hold the flip-off time information of the delay unit (501); The second decoding circuit (504) is configured to quantize the photon return time according to the output of the latch circuit (503), realize high-precision time decoding, and output detailed quantization stage statistics.

10. A one-step two-bit successive approximation depth extraction method for SPAD arrays, characterized in that, The method is implemented using the circuit described in any one of claims 1-9, and includes a coarse quantization stage and a fine quantization stage; wherein... In the coarse quantization stage, the extreme value tracking circuit (100), the dual-mode counting circuit (200), and the interval compression circuit (300) work together to complete the photon trigger pulse extreme value detection, photon trigger event difference statistics, and effective working interval dynamic compression; the event-driven pulse sampling circuit (400) and the time quantization circuit (500) are in standby mode, and the depth information decoding circuit (600) is used to temporarily store the coarse quantization results, so as to achieve rapid coarse positioning of the echo position as a whole; During the fine quantization stage, the extreme value tracking circuit (100) stops working, and the event-driven pulse sampling circuit (400) and the time quantization circuit (500) enter the working state to complete the lossless sampling and high-precision time quantization of photon-triggered events; the dual-mode counting circuit (200) and the interval compression circuit (300) continue to work together to complete the fine interval positioning; the depth information decoding circuit (600) temporarily stores the fine quantization results to prepare for the final depth information output; Finally, the depth information is output by fusing the coarse quantization result and the fine quantization result through the depth information decoding circuit (600).

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