FPGA-based weak optical lock-in amplification and smoothing filtering system and method

Abstract

This application discloses a weak optical phase-locked amplification and smoothing filtering system and method based on FPGA, belonging to the field of weak signal detection and digital signal processing technology. The system includes: an optical chopper to modulate the weak optical signal; a two-stage amplification circuit composed of a low-noise transimpedance amplifier and a voltage follower, matched with a high-precision ADC; digital phase-locked demodulation using a CORDIC algorithm within the FPGA to generate an orthogonal reference sequence, outputting I / Q components; and a Kalman smoothing filter performing forward filtering and backward smoothing recursion on the I / Q components, outputting the noise-suppressed amplitude and phase. This invention solves the problems of low signal-to-noise ratio and poor real-time performance in extremely weak signal detection through an integrated architecture of front-end low-noise adaptation, FPGA parallel phase-locked demodulation, and IQ domain Kalman smoothing filtering, significantly improving the accuracy of amplitude and phase measurement.

Description

Technical Field

[0001] This invention belongs to the field of weak signal detection and digital signal processing technology, specifically relating to an FPGA-based weak optical phase-locked amplification and smoothing filtering system and method, which is suitable for the extraction and noise suppression of ultra-weak photoelectric signals in applications such as precision optical measurement, biosensing, and spectral detection. Background Technology

[0002] In applications such as precision optical measurement, biosensing, and spectral detection, the amplitude of the electrical signal formed after the optical signal to be measured is converted by a photodetector may be as low as microvolts or even sub-microvolts. This makes it susceptible to detector thermal noise, amplifier circuit noise, and environmental interference, making it difficult to directly extract the effective signal. Lock-in amplification (LLA) technology, through phase-sensitive detection synchronized with a reference signal and narrowband filtering, can extract the target signal related to the reference frequency from a strong noise background, and is a commonly used technique for weak signal detection.

[0003] However, existing technologies still have the following shortcomings when processing ultra-weak photoelectric signals: (1) In the front-end analog conditioning link, traditional single-stage high-gain amplifier circuits are easily affected by the operational amplifier input bias current, photodetector junction capacitance and subsequent load, which may lead to increased output noise, signal distortion or limited dynamic range, making it difficult to stably match the input requirements of high-resolution analog-to-digital converters; (2) Digital phase-locked loop processing schemes based on DSP or microcontrollers usually rely on serial instruction execution, and the parallelism in the processes of reference signal generation, multiplication demodulation and digital filtering is limited, and the real-time processing capability is somewhat limited; (3) Some existing FPGA phase-locked loop processing schemes mainly realize the generation of quadrature reference signals and multiplication demodulation. The in-phase and quadrature components after demodulation are usually only processed by low-pass filtering. Under extremely low signal-to-noise ratio conditions, there is a trade-off between the noise suppression capability of low-pass filtering and the dynamic response speed, making it difficult to obtain stable amplitude measurement results and phase measurement results at the same time.

[0004] For example, Chinese patent document CN115048033A discloses a lock-in amplification technique for trace gas detection, which integrates a modulation signal generation module, a frequency multiplication module, and a quadrature lock-in amplifier into an FPGA. However, this scheme uses a dual-port RAM to generate the reference signal, and its post-processing is only a simple square root operation, without involving Kalman smoothing filtering. Therefore, it is necessary to provide a weak optical signal detection scheme that can take into account low-noise signal conditioning at the front end, parallel lock-in demodulation in FPGA hardware, and statistical smoothing processing after demodulation, so as to improve the noise suppression capability, real-time processing capability, and amplitude and phase output stability in the detection process of ultra-weak photoelectric signals. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a weak light phase-locked amplification and smoothing filtering system and method based on FPGA, aiming to solve the problems of low signal-to-noise ratio, poor real-time performance, and unstable amplitude and phase output in the detection of extremely weak light signals.

[0006] The technical solution adopted by this application to solve its technical problem is: In a first aspect, embodiments of this application provide a weak optical phase-locked amplification and smoothing filtering system based on an FPGA, comprising: The signal modulation and front-end acquisition link includes an optical chopper, a photodetector, a two-stage amplifier circuit, and an analog-to-digital converter. The optical chopper is used to periodically modulate weak optical signals. The modulation frequency of the optical chopper is controlled by a reference signal generated by the FPGA to synchronize the chopping frequency with the subsequent digital phase-locked demodulation reference signal. The two-stage amplifier circuit includes a first-stage low-noise transimpedance amplifier and a second-stage voltage follower to convert the modulated weak current signal into a voltage signal and drive the analog-to-digital converter. The FPGA-based on-chip digital processing system includes a digital lock-in amplifier module and a Kalman smoothing filter module. The digital lock-in amplifier module generates an orthogonal reference sequence based on the CORDIC algorithm, performs phase-sensitive detection and low-pass filtering on the digital sampling sequence, and outputs in-phase component I and quadrature component Q. The Kalman smoothing filter module receives the in-phase component I and the quadrature component Q, performs forward filtering and backward smoothing recursion based on the state equation, and outputs noise-suppressed amplitude and phase data.

[0007] On the other hand, the present application provides a method for weak light phase-locked amplification and smoothing filtering based on the above system, which includes the following steps: S1: The weak light signal incident on the photodetector is periodically modulated by an optical chopper. The modulation frequency of the optical chopper is controlled by a reference signal generated by the FPGA to ensure that the chopping frequency is synchronized with the reference signal of the subsequent digital phase-locked demodulation, so that the photodetector outputs a weak photocurrent signal corresponding to the modulation frequency. The weak photocurrent signal is converted into a voltage signal by a first-stage low-noise transimpedance amplifier, and after impedance transformation and load isolation by a second-stage voltage follower, it is sampled by an analog-to-digital converter to obtain a digital sampling sequence. S2: In the FPGA, a phase step word is generated based on the sampling clock frequency and modulation frequency, and a phase control word is obtained by phase accumulation; the CORDIC algorithm is used to generate a cosine reference sequence and a sine reference sequence with the same frequency as the modulation frequency based on the phase control word; the digital sampling sequence is multiplied by the cosine reference sequence and the sine reference sequence respectively to obtain an in-phase mixer signal and a quadrature mixer signal, and after being low-pass digitally filtered, the in-phase component I and the quadrature component Q are output; S3: Construct an observation vector using the in-phase component I and the quadrature component Q, and establish a linear state-space model using the in-phase component state and the quadrature component state as state variables; perform recursive estimation of the state variables through forward Kalman filtering, and cache the forward filtered state estimate, state prediction, filter covariance matrix, and prediction covariance matrix at each sampling time; after the data block of the preset length is processed, perform backward smoothing recursion based on the cached data to obtain the smoothed in-phase estimation component and quadrature estimation component; S4: Calculate the amplitude and phase of the measured signal based on the smoothed in-phase and quadrature estimation components, and output the amplitude detection result and phase detection result after noise suppression.

[0008] One of the above technical solutions has the following advantages or beneficial effects: (1) The present invention uses a first-stage low-noise transimpedance amplifier and a second-stage voltage follower to form a two-stage amplifier circuit. The first-stage transimpedance amplifier converts the weak current signal output by the photodetector into a voltage signal. The second-stage voltage follower provides high input impedance and low output impedance, realizing impedance matching between the front and rear stages and load isolation. This effectively avoids the influence of the equivalent impedance of the ADC input terminal and the sampling capacitor on the gain of the front stage, and improves the sampling stability of the high-precision ADC.

[0009] (2) The present invention generates an orthogonal reference sequence based on the CORDIC algorithm in the FPGA without the need to store a waveform lookup table, thus saving the internal storage resources of the FPGA. At the same time, the CORDIC algorithm adopts a rotating mode iterative calculation, which can output cosine and sine values ​​simultaneously within one clock cycle. It has good phase continuity and no phase truncation error, thus improving the orthogonality accuracy of the reference signal.

[0010] (3) This invention employs a combination of forward Kalman filtering and backward smoothing recursion to smooth the I / Q components: the forward Kalman filtering uses current and historical observation information to estimate the state in real time, while the backward smoothing recursion uses future information of the entire data block to correct the forward estimation result. The two work together to significantly reduce amplitude jitter and phase drift caused by random noise while maintaining the dynamic trend of signal change. Compared with the processing scheme that only uses low-pass filtering, this invention can obtain more stable amplitude and phase output under extremely low signal-to-noise ratio conditions.

[0011] (4) This invention integrates low-noise analog conditioning at the front end, parallel phase-locked loop demodulation in FPGA hardware, and Kalman smoothing filtering in the IQ domain into an organic whole, with each component working in synergy and supporting the others. The front-end secondary amplifier circuit ensures that the ADC can acquire a digital sampling sequence with a high signal-to-noise ratio, providing a high-quality input for subsequent digital phase-locked loop demodulation; the parallel architecture in FPGA hardware enables CORDIC reference generation and phase-sensitive detection to be completed in real time, providing a continuous, low-latency I / Q data stream for Kalman smoothing filtering; Kalman smoothing filtering further mines the statistical information in the I / Q components, refining and optimizing the results of the previous stage processing. The combined effect of these three components enables this invention to obtain stable and accurate amplitude and phase detection results even when the equivalent voltage amplitude of the input optical signal is as low as 0.5μV. This combination, through deep collaboration between hardware and algorithms, solves the comprehensive technical problems of low signal-to-noise ratio, poor real-time performance, and unstable amplitude and phase output in the detection of extremely weak signals. Furthermore, this invention ensures strict synchronization between the chopping frequency and the digital phase-locked demodulation reference signal by actively controlling the modulation frequency of the optical chopper using an FPGA, thereby eliminating phase errors caused by frequency mismatch and further improving measurement accuracy.

[0012] (5) The length N of the backward smoothing filter data block in this invention can be flexibly selected according to the actual signal-to-noise ratio and real-time requirements. For example, when the signal-to-noise ratio is low, a larger N (such as 1024) can be selected to obtain the best noise suppression, and the output delay is about 100ms. In scenarios with high real-time requirements, a smaller N (such as 64) can be selected, with a delay of only a few milliseconds, and still achieves a smoothing effect superior to traditional low-pass filtering. This configurability enables this invention to adapt to the needs of different application scenarios, combining high performance and flexibility. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of a weak optical phase-locked amplification and smoothing filtering system based on an exemplary embodiment. Figure 2 This is a flowchart illustrating an FPGA-based method for weak optical phase-locked amplification and smoothing filtering, according to an exemplary embodiment. Figure 3 This is a schematic diagram of another FPGA-based weak optical phase-locked amplification and smoothing filtering system structure, according to an exemplary embodiment. Detailed Implementation

[0014] To more clearly illustrate the technical features of this application, the following detailed description is provided through specific embodiments and in conjunction with the accompanying drawings.

[0015] Example 1 like Figure 1As shown in the figure, an embodiment of this application provides a weak optical phase-locked amplification and smoothing filtering system based on FPGA, comprising: The signal modulation and front-end acquisition link includes an optical chopper, a photodetector, a two-stage amplifier circuit, and an analog-to-digital converter. The optical chopper is used to periodically modulate the weak optical signal, and its modulation frequency is controlled by the reference clock signal output by the FPGA to ensure strict synchronization with the frequency and phase of the subsequent digital phase-locked demodulation reference signal. The two-stage amplifier circuit includes a first-stage low-noise transimpedance amplifier and a second-stage voltage follower, which are used to convert the modulated weak current signal into a voltage signal and drive the analog-to-digital converter. The FPGA-based on-chip digital processing system includes a digital lock-in amplifier module and a Kalman smoothing filter module. The digital lock-in amplifier module generates an orthogonal reference sequence based on the CORDIC algorithm, performs phase-sensitive detection and low-pass filtering on the digital sampling sequence, and outputs in-phase component I and quadrature component Q. The Kalman smoothing filter module receives the in-phase component I and the quadrature component Q, performs forward filtering and backward smoothing recursion based on the state equation, and outputs noise-suppressed amplitude and phase data.

[0016] Preferably, the first-stage low-noise transimpedance amplifier consists of a low-input-bias-current operational amplifier, a feedback resistor Rf, and a feedback capacitor Cf. The feedback resistor Rf is connected between the output terminal and the inverting input terminal of the low-input-bias-current operational amplifier, and the feedback capacitor Cf is connected in parallel with the feedback resistor Rf. The second-stage voltage follower consists of a precision operational amplifier, whose input terminal is connected to the output terminal of the first-stage low-noise transimpedance amplifier, and whose output terminal is connected to the input terminal of the analog-to-digital converter.

[0017] Preferably, the low input bias current operational amplifier is an ADA4530-1 or an equivalent operational amplifier with a femtoampere-level input bias current; the precision operational amplifier is an OPA192 or an equivalent operational amplifier with low offset, rail-to-rail input / output, and capacitive load drive capability.

[0018] Preferably, the digital lock-in amplifier module includes: a phase accumulation unit, used to generate a phase step word based on the sampling clock frequency and modulation frequency, perform phase accumulation, and output a phase control word; a CORDIC reference generation unit, connected to the phase accumulation unit, used to iteratively generate a cosine reference sequence and a sine reference sequence based on the phase control word in rotation mode; a first multiplier, used to multiply the digital sampling sequence with the cosine reference sequence to obtain an in-phase mixed signal; a second multiplier, used to multiply the digital sampling sequence with the sine reference sequence to obtain a quadrature mixed signal; a first low-pass digital filter, connected to the first multiplier, used to filter out the second harmonic component and high-frequency noise in the in-phase mixed signal and output an in-phase component I; and a second low-pass digital filter, connected to the second multiplier, used to filter out the second harmonic component and high-frequency noise in the quadrature mixed signal and output a quadrature component Q.

[0019] Preferably, the Kalman smoothing filter module includes: a forward Kalman filter submodule, used to construct an observation vector using the in-phase component I and the quadrature component Q. The system performs forward recursive estimation of state variables based on preset state equations and observation equations to obtain forward filtered state estimates and their covariance matrices at each sampling time. A storage submodule is used to cache the forward filtered state estimates, state predictions, and their corresponding covariance matrices. A backward smoothing recursive submodule is used to read the forward filtered state estimates and covariance matrices after processing a preset length of data block, calculate the smoothing gain, and recursively generate a smoothed state estimation sequence in reverse chronological order. An amplitude and phase calculation submodule is used to calculate and output noise-suppressed amplitude and phase data based on the in-phase and quadrature estimation components in the smoothed state estimation sequence.

[0020] Preferably, the backward smoothing recursive submodule adopts a fixed interval smoothing method, using the forward filter state estimate and the filter covariance matrix at the last sampling time N as the initial values ​​for backward smoothing, letting... , ;for Calculate the smoothing gain in reverse chronological order. and according to Update the smoothed state estimate.

[0021] Preferably, the analog-to-digital converter is a Σ-Δ type high-precision analog-to-digital converter, and its sampling rate is configured to be an integer multiple of the modulation frequency and greater than twice the modulation frequency.

[0022] Preferably, the FPGA is provided with a host computer communication interface, which is used to send the amplitude data and phase data output by the Kalman smoothing filter module to an external device via a bus.

[0023] Example 2 like Figure 2 As shown in the figure, the present application provides a method for weak optical phase-locked amplification and smoothing filtering based on the FPGA-based weak optical phase-locked amplification and smoothing filtering system described in Embodiment 1, which includes the following steps: S1: The weak light signal incident on the photodetector is periodically modulated by an optical chopper. The modulation frequency of the optical chopper is controlled by the reference clock signal output by the FPGA to ensure that the chopping frequency is strictly synchronized with the subsequent digital phase-locked demodulation reference signal, so that the photodetector outputs a weak photocurrent signal corresponding to the modulation frequency. The weak photocurrent signal is converted into a voltage signal by a first-stage low-noise transimpedance amplifier, and after impedance transformation and load isolation by a second-stage voltage follower, it is sampled by an analog-to-digital converter to obtain a digital sampling sequence.

[0024] The optical chopper has a modulation frequency of 1 kHz, the analog-to-digital converter has a sampling rate of 10 kHz, and the analog-to-digital converter is a Σ-Δ type high-precision analog-to-digital converter.

[0025] The first-stage low-noise transimpedance amplifier uses a low-input bias current operational amplifier. Its feedback resistor Rf ranges from 1MΩ to 100MΩ, and its feedback capacitor Cf ranges from 1pF to 10pF, in order to match the junction capacitance of the photodetector and stabilize the transimpedance gain.

[0026] The second-stage voltage follower is configured as a unity-gain buffer using a precision rail-to-rail operational amplifier with an input impedance greater than 1 GΩ and an output impedance less than 1 Ω, and is used to drive the input network of the analog-to-digital converter.

[0027] S2: In the FPGA, a phase step word is generated based on the sampling clock frequency and the modulation frequency, and a phase control word is obtained by phase accumulation; the CORDIC algorithm is used to generate a cosine reference sequence and a sine reference sequence with the same frequency as the modulation frequency based on the phase control word; the digital sampling sequence is multiplied by the cosine reference sequence and the sine reference sequence respectively to obtain an in-phase mixer signal and a quadrature mixer signal, and after being low-pass digitally filtered, the in-phase component I and the quadrature component Q are output.

[0028] The phase step word is calculated according to the following formula: , in, For modulation frequency, Where B is the sampling frequency, and B is the bit width of the phase accumulator, with a value ranging from 24 to 48 bits.

[0029] The CORDIC algorithm adopts a rotation mode, which approximates the target phase through several micro-rotation iterations, with the number of iterations being 12 to 20. It outputs both cosine and sine values ​​simultaneously, without the need to store waveform lookup tables.

[0030] The low-pass digital filter is an FIR filter with a cutoff frequency lower than the modulation frequency, used to filter out second harmonic components and noise above the cutoff frequency.

[0031] The in-phase and quadrature mixing signals are respectively low-pass digital filtered and then decimated and downsampled to reduce the data rate and match the processing speed of subsequent Kalman smoothing filtering.

[0032] S3: Construct an observation vector using the in-phase component I and the quadrature component Q, and establish a linear state-space model using the in-phase component state and the quadrature component state as state variables; perform recursive estimation of the state variables through forward Kalman filtering, and cache the forward filtered state estimate, state prediction, filter covariance matrix, and prediction covariance matrix at each sampling time; after the data block of the preset length is processed, perform backward smoothing recursion based on the cached data to obtain the smoothed in-phase estimate and quadrature estimate components.

[0033] The state equation of the linear state-space model is expressed as: , The observation equation is expressed as: , in, , , and All are identity matrices.

[0034] The process noise The covariance matrix Q and observation noise The covariance matrix R employs an adaptive adjustment strategy. Specifically, it is adjusted in real time based on the consistency between the actual and theoretical covariance of the innovation sequence (residuals): if the actual covariance of the residuals is greater than the theoretical prediction, Q is appropriately increased to improve the filter's ability to track state changes; conversely, Q is decreased to enhance the smoothing effect. In another embodiment, by calculating the signal-to-noise ratio (SNR) estimate within the current signal window, Q and R are adjusted according to a preset mapping relationship: when the SNR decreases, Q is decreased and R is increased to make the filter more confident in the calculated value; when the SNR increases, Q is increased and R is decreased to make the filter more confident in the observed data, thereby obtaining optimal estimation performance.

[0035] The preset data block length N is dynamically adjusted based on the actual signal-to-noise ratio (SNR) and real-time requirements, with N ranging from 64 to 1024. In scenarios with low SNR (e.g., SNR < 0 dB) and low real-time requirements, N = 1024 can be used to achieve optimal noise suppression, with an output delay of approximately 100 ms. In scenarios with moderate SNR (e.g., SNR > 10 dB) or high real-time requirements, N = 64 can be used, with a delay of only a few milliseconds, still achieving a significantly smoother effect than traditional low-pass filtering. Experiments show that when N is within the range of 64 to 1024, the system effectively suppresses noise, and the amplitude measurement standard deviation monotonically decreases as N increases, verifying the rationality and effectiveness of this value range.

[0036] The backward smoothing recursion employs a fixed interval smoothing algorithm, using the forward filter state estimate at the last sampling time N. and filter covariance matrix Using this as an initial value, the smoothing gain is calculated in reverse time order: , And update the smoothed state estimate: .

[0037] S4: Calculate the amplitude and phase of the measured signal based on the smoothed in-phase and quadrature estimation components, and output the amplitude detection result and phase detection result after noise suppression.

[0038] The amplitude A is calculated according to the formula Calculate the phase According to the formula Calculation, where and These are the smoothed in-phase and orthogonal estimation components, respectively.

[0039] In step S4, the output amplitude detection results and phase detection results are calibrated and corrected to compensate for the gain deviation and phase delay of the front-end analog link.

[0040] The amplitude and phase are transmitted to external devices in digital form through the FPGA's host computer communication interface, which can be an SPI, UART, or Ethernet interface.

[0041] Preferably, steps S1 to S4 are executed in parallel in a pipelined manner within the FPGA. The analog-to-digital conversion in step S1 and the digital phase-locked demodulation in step S2 are performed in parallel. The forward Kalman filtering in step S3 is performed synchronously with the output I / Q components in step S2. Step S4 outputs the result after the data block smoothing is completed, forming a continuous data stream processing.

[0042] Example 3 like Figure 3 As shown, this embodiment provides a weak optical phase-locked amplification and smoothing filtering system based on FPGA, including signal modulation and front-end acquisition links as well as an on-chip digital processing system of FPGA.

[0043] The signal modulation and front-end acquisition link includes a light source, an optical chopper 1, a photodetector 2, a two-stage amplifier circuit 3, and a high-precision analog-to-digital converter (ADC) 4. The light signal emitted by the light source is first periodically modulated by the optical chopper 1, and then illuminates the photodetector 2.

[0044] Optical chopper 1 employs a frequency-adjustable mechanical chopper, whose modulation frequency is controlled by the reference clock signal output from the FPGA, and is set to... This ensures that the chopping frequency is strictly synchronized with the subsequent digital phase-locked demodulation reference signal. It is used to periodically modulate the DC or slowly varying weak light signal incident on the photodetector 2, causing the photodetector 2 to output a weak photocurrent signal corresponding to the modulation frequency. After photoelectric conversion and front-end amplification, the equivalent voltage amplitude of the weak light signal can be as low as below 1μV, allowing for subsequent extraction via digital phase-locked amplification.

[0045] The photodetector 2 preferably employs a low-noise photomultiplier tube or a low-noise photodiode to convert the optical signal modulated by the optical chopper into a weak current signal corresponding to the modulation frequency. This weak current signal is susceptible to detector thermal noise, dark current noise, and environmental interference, and requires conditioning by a low-noise front-end amplifier circuit.

[0046] The second-stage amplifier circuit 3 consists of a first-stage transimpedance amplifier cascaded with a second-stage voltage follower. The first-stage transimpedance amplifier is preferably an Analog Devices ADA4530-1 operational amplifier, which features femtoampere input bias current, a built-in guard loop buffer, and a 4.5V to 16V supply range. Its feedback resistor... Configured with a 10MΩ feedback capacitor Configured to 2pF, the transimpedance output voltage meets the requirements. ,in The weak current output by the photodetector. This is the reference bias voltage. , Calculate the approximate cutoff frequency of its feedback network. A modulation frequency higher than 1kHz can ensure that the modulation signal passes through effectively and suppress high-frequency noise to a certain extent.

[0047] The second-stage voltage follower preferably uses the Texas Instruments OPA192 precision operational amplifier, configured as a unity-gain buffer. This device features low offset voltage, low offset drift, low noise, low input bias current, rail-to-rail input / output, a 10MHz gain-bandwidth product, a 20V / μs slew rate, and strong capacitive load driving capability. The voltage follower's high input impedance avoids directly loading the transimpedance amplifier output with the ADC input equivalent impedance and sampling capacitor, reducing the gain error of the preceding stage; its low output impedance drives the subsequent ADC input network, achieving impedance isolation between the analog front-end and the ADC, and improving the sampling stability of the 32-bit ADC.

[0048] The high-precision analog-to-digital converter 4 preferably adopts the AD7177-2 Σ-Δ ADC, which has a 32-bit data output capability and an output data rate configurable from 5SPS to 10kSPS. In this embodiment, the sampling rate is configured as follows: This is 10 times the modulation frequency, satisfying the requirements for oversampling and anti-aliasing. It should be noted that this invention does not limit the specific number of bits in the ADC. Those skilled in the art can choose a 24-bit, 32-bit, or higher bit ADC based on actual signal-to-noise ratio and dynamic range requirements, as long as high-precision sampling can be achieved. For example, a high-precision analog-to-digital converter can use a 24-bit Σ-Δ ADC (such as the AD7194) to reduce power consumption and cost, while still achieving good results in scenarios with lower signal-to-noise ratio requirements. The ADC outputs a digital sampling sequence. To the FPGA. The FPGA chip used is a Xilinx Zynq-7000 series fully programmable SoC device, and the digital lock-in amplifier module and Kalman smoothing filter module are both implemented based on programmable logic resources.

[0049] The digital lock-in amplifier module includes a phase accumulation unit, a CORDIC reference generation unit, a first multiplier, a second multiplier, a first low-pass digital filter, and a second low-pass digital filter.

[0050] The phase accumulation unit is based on the modulation frequency. With sampling frequency Calculate phase step word Where B is the bit width of the phase accumulator (32 bits in this embodiment), and phase accumulation is performed at each sampling clock cycle. The phase control word is obtained. .

[0051] The CORDIC reference generation unit is configured in rotation mode according to the phase control word. Iterative generation of cosine reference sequence Sine reference sequence The CORDIC algorithm approximates the target phase through several micro-rotation iterations, while simultaneously outputting cosine and sine values. It eliminates the need to store waveform lookup tables, thus saving FPGA internal storage resources.

[0052] The first multiplier will sample the digital sequence. With cosine reference sequence Multiplying them yields the in-phase mixed signal; the second multiplier multiplies the digital sampled sequence. With sinusoidal reference sequence Multiplying these components yields a quadrature mixed signal. A first low-pass digital filter and a second low-pass digital filter perform low-pass filtering on the in-phase and quadrature mixed signals, respectively, to remove the second harmonic component and high-frequency noise, outputting the in-phase component I and the quadrature component Q.

[0053] The first and second low-pass digital filters perform low-pass filtering on the in-phase and quadrature mixer signals, respectively, to remove the second harmonic component and high-frequency noise, outputting the in-phase component I and the quadrature component Q. The low-pass digital filters can be FIR filters, with their cutoff frequency designed to be lower than the modulation frequency f. ref This is to ensure that the second harmonic component is filtered out.

[0054] The Kalman smoothing filter module includes a forward Kalman filtering submodule, a storage submodule, a backward smoothing recursion submodule, and an amplitude and phase calculation submodule. Since the I and Q components retain the complete information of the original baseband signal and the noise has an additive Gaussian distribution, directly using I and Q as observations can avoid the nonlinear distortion caused by first calculating the amplitude and phase and the estimation bias under low signal-to-noise ratio.

[0055] The forward Kalman filter submodule receives the in-phase component I and quadrature component Q from the digital lock-in amplifier module and constructs the observation vector. Since the in-phase component I and the quadrature component Q are the demodulated baseband signal components, which can characterize the amplitude and phase information of the measured signal, this embodiment uses the in-phase component state and the quadrature component state as state variables to establish a linear state-space model.

[0056] Specifically, the state vector is represented as The state equation is expressed as The observation equation is expressed as .in, Here is the state transition matrix. For the observation matrix, For process noise, To mitigate observation noise. In one implementation, when the in-phase and quadrature components change slowly between adjacent sampling times, The identity matrix can be taken. An identity matrix can be used. In another implementation, when the in-phase and quadrature components change extremely slowly at adjacent sampling times, the state transition matrix... and observation matrix It can also be approximated as an identity matrix. For example, diagonal elements are allowed to fluctuate between 0.99 and 1.01, and off-diagonal elements are allowed to fluctuate between -0.01 and 0.01. This approximation will not have a substantial impact on the filtering accuracy and simplifies matrix operations, which is beneficial for real-time implementation on FPGAs.

[0057] At each sampling time k, the forward Kalman filter submodule performs state prediction and covariance prediction based on the state equation, and combines this with the current observation vector. Calculate the Kalman gain to obtain the forward filter state estimate. and the filter covariance matrix .

[0058] The storage submodule stores the forward filter state estimates at each sampling time. State prediction value Filter covariance matrix and predicting the covariance matrix Cache it in the FPGA's on-chip memory resources.

[0059] The backward smoothing recursion submodule starts after the data block of the preset length has been processed and uses a fixed interval smoothing method. After the observation data block of length N has been processed, the backward smoothing recursion submodule uses the forward filter state estimate and the filter covariance matrix at the last sampling time N as the initial values ​​for backward smoothing; that is, it sets the initial smoothing state estimate at the last sampling time N as... And set the initial value of the smoothed covariance to .

[0060] Subsequently, the backward smoothing recursion submodule recursively reads the forward filtered state estimate value at time k, starting from time k = N-1, in reverse chronological order. Filter covariance matrix The predicted state value X at time k+1 k+1|k And the predicted covariance matrix P k+1|k and according to Calculate the smoothing gain, and then according to The smoothed state estimate at time k, incorporating information from the entire observation data block, is obtained. Let X be the forward filter state estimate at the k-th sampling time. k+1|k Let X be the predicted state value at the (k+1)th sampling time, obtained from the prediction at the kth sampling time. k+1|N G is the smoothed state estimate at the (k+1)th sampling time obtained by combining the entire observation data block.k For smoothing gain.

[0061] In the above backward smoothing recursive formula, This represents the deviation between the smoothed estimate and the forward prediction estimate at time k+1, reflecting the correction information from subsequent observations to the forward prediction result; the smoothing gain G k This is used to measure the extent to which the corrected information is propagated backward to time k. When the correlation between states at adjacent times is strong and the prediction uncertainty is low, G... k A larger value indicates that subsequent observations have high reference value for the current state; when the system noise is large or the state changes rapidly, G... k The size is relatively small to avoid excessive smoothing that could lead to lag in dynamic response. Therefore, backward smoothing recursion is not a simple averaging filter, but rather, based on forward Kalman filtering, it utilizes the statistical information contained in subsequent sampling points within the entire observation data block to correct the states of in-phase and quadrature components at previous time points. This reduces amplitude jitter and phase drift caused by random noise while maintaining the dynamic trend of the signal.

[0062] The amplitude and phase calculation submodule calculates the amplitude and phase based on the smoothed in-phase estimated components. and orthogonal estimation components Calculate the amplitude A and phase φ using the following formulas: , .

[0063] After the system is powered on, the optical chopper periodically modulates the weak light signal incident on the photodetector at 1kHz. The photodetector converts the modulated light signal into a weak current signal corresponding to the modulation frequency. This weak current signal is converted into a voltage signal by the first-stage transimpedance amplifier unit, and then driven by the ADC after impedance transformation and load isolation by the second-stage voltage buffer unit. The ADC performs analog-to-digital conversion at a sampling rate of 10kHz, outputting a 32-bit digital sampling sequence to the FPGA. The FPGA's internal digital lock-in amplifier module generates a cosine reference sequence and a sine reference sequence, and performs phase-sensitive detection and low-pass filtering with the digital sampling sequence, respectively, outputting the in-phase component I and the quadrature component Q. The Kalman smoothing filter module performs forward Kalman filtering and backward smoothing recursion on the I and Q components, and calculates the amplitude and phase based on the smoothed I and Q components. Finally, the processing results are sent to external devices for display and storage through the host computer communication interface.

[0064] A method for weak optical phase-locked amplification and smoothing filtering based on the above system includes the following steps: S1: Signal Modulation and Front-End Acquisition: The weak light signal incident on the photodetector is periodically modulated by an optical chopper. The modulation frequency is controlled by a reference clock signal output from the FPGA and set to 1kHz to ensure synchronization with the subsequent digital phase-locked loop demodulation reference signal. This causes the photodetector to output a weak photocurrent signal corresponding to the modulation frequency. This weak photocurrent signal is converted into a voltage signal by a first-stage low-noise transimpedance amplifier, with feedback resistor R... f =10MΩ, feedback capacitor C f =2pF; after impedance transformation and load isolation by a second-stage voltage follower (OPA192 unity-gain buffer), the digital sample sequence is converted from analog to digital by an AD7177-2 high-precision Σ-Δ ADC at a sampling rate of 10kHz. In another embodiment, if a 24-bit ADC is used, the sampling rate can also be configured to 10kHz, with a reduced bit width but lower power consumption, making it suitable for portable devices.

[0065] S2: Digital phase-locked loop demodulation: Within the FPGA, based on the sampling frequency and modulation frequency Calculate phase step word Phase control word is obtained by phase accumulation. The CORDIC reference generation unit is configured in rotation mode, according to... Iterative generation of cosine reference sequence Sine reference sequence The digital sampled sequence is multiplied by the cosine reference sequence and the sine reference sequence respectively to obtain the in-phase mixer signal and the quadrature mixer signal. The signal is then filtered by an FIR low-pass filter (cutoff frequency < 1 kHz) to remove the second harmonic component and high-frequency noise, and the in-phase component I and the quadrature component Q are output.

[0066] S3: Forward Kalman Filtering and Backward Smoothing Recursion: Construct the observation vector using the in-phase component I and the quadrature component Q. The in-phase and quadrature component states are used as state variables. Establish a linear state-space model: , ,in and All values ​​are identity matrices. The forward Kalman filter submodule performs state prediction and update at each sampling time to obtain the forward filtered state estimate. and the filter covariance matrix And cache it in the storage submodule. Once the data block length N=256 has accumulated, the backward smoothing recursion submodule... and Using the initial value, recursively calculate the smoothing gain from k=N-1 to 1 in reverse order. And update the smoothed state estimate Obtain the smoothed in-phase estimation components and orthogonal estimation components .

[0067] S4: Amplitude and Phase Calculation: Based on the smoothed in-phase estimation components and orthogonal estimation components s Calculate the amplitude A and phase φ using the following formulas: , The processing results are then sent to external devices for display and storage via the host computer communication interface.

[0068] Under experimental verification conditions, the equivalent voltage amplitude of the input optical signal was 0.5 μV, the modulation frequency was 1 kHz, the ADC sampling rate was 10 kHz, and the data block length was N = 256. After processing by the system of this invention, the amplitude output fluctuation (standard deviation) was reduced by approximately 65% ​​compared to the scheme using only low-pass filtering, and the phase output jitter (RMS phase error) was reduced by approximately 58%, verifying the significant effect of this invention in the detection of extremely weak optical signals.

[0069] This invention solves the problems of low signal-to-noise ratio and poor real-time performance in the detection of extremely weak signals by integrating a low-noise front-end adaptation, FPGA parallel phase-locked demodulation, and IQ-domain Kalman smoothing filter, significantly improving the accuracy of amplitude and phase measurements. Simultaneously, by actively controlling the optical chopper frequency through the FPGA, strict synchronization between the chopper and the reference signal is achieved, eliminating frequency mismatch errors. The configurable data block length N accommodates the real-time performance and noise suppression requirements of different application scenarios. This invention can be widely applied in fields requiring the detection of ultra-weak light signals, such as precision optical measurement, biofluorescence detection, fiber optic sensing, and spectral analysis, demonstrating clear industrial practical value and broad application prospects.

[0070] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and not to limit them. Although this application has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation methods of this application. Any modifications or equivalent substitutions that do not depart from the spirit and scope of this application should be covered within the protection scope of the claims of this application.

Claims

1. A weak optical phase-locked amplification and smoothing filtering system based on FPGA, characterized in that, include: The signal modulation and front-end acquisition link includes an optical chopper, a photodetector, a two-stage amplifier circuit, and an analog-to-digital converter; The optical chopper is used to periodically modulate the weak optical signal. The modulation frequency of the optical chopper is controlled by the reference signal generated by the FPGA to achieve synchronization between the chopping frequency and the subsequent digital phase-locked demodulation reference signal. The secondary amplifier circuit includes a first-stage low-noise transimpedance amplifier and a second-stage voltage follower to convert the modulated weak current signal into a voltage signal and drive the analog-to-digital converter. The FPGA on-chip digital processing system includes a digital lock-in amplifier module and a Kalman smoothing filter module; The digital lock-in amplifier module generates an orthogonal reference sequence based on the CORDIC algorithm, performs phase-sensitive detection and low-pass filtering on the digital sampling sequence, and outputs in-phase component I and quadrature component Q; the Kalman smoothing filter module receives the in-phase component I and quadrature component Q, performs forward filtering and backward smoothing recursion based on the state equation, and outputs the amplitude and phase data after noise suppression.

2. The FPGA-based weak optical phase-locked amplification and smoothing filtering system according to claim 1, characterized in that, The first-stage low-noise transimpedance amplifier consists of a low-input bias current operational amplifier, a feedback resistor Rf, and a feedback capacitor Cf. The feedback resistor Rf is connected between the output terminal and the inverting input terminal of the low-input bias current operational amplifier, and the feedback capacitor Cf is connected in parallel with the feedback resistor Rf. The second-stage voltage follower consists of a precision operational amplifier, whose input terminal is connected to the output terminal of the first-stage low-noise transimpedance amplifier, and whose output terminal is connected to the input terminal of the analog-to-digital converter.

3. The FPGA-based weak optical phase-locked amplification and smoothing filtering system according to claim 1, characterized in that, The digital lock-in amplifier module includes: The phase accumulation unit is used to generate a phase step word based on the sampling clock frequency and the modulation frequency, perform phase accumulation, and output a phase control word; The CORDIC reference generation unit, connected to the phase accumulation unit, is used to iteratively generate a cosine reference sequence and a sine reference sequence according to the phase control word in rotation mode. The first multiplier is used to multiply the digital sampling sequence with the cosine reference sequence to obtain an in-phase mixed signal; The second multiplier is used to multiply the digital sampling sequence with the sinusoidal reference sequence to obtain an orthogonal mixing signal; A first low-pass digital filter, connected to the first multiplier, is used to filter out the second harmonic component and high-frequency noise in the in-phase mixer signal and output the in-phase component I. The second low-pass digital filter, connected to the second multiplier, is used to filter out the second harmonic component and high-frequency noise in the quadrature mixing signal and output the quadrature component Q.

4. The FPGA-based weak optical phase-locked amplification and smoothing filtering system according to claim 1, characterized in that, The Kalman smoothing filter module includes: The forward Kalman filter submodule is used to construct the observation vector using the in-phase component I and the quadrature component Q. Based on the preset state equation and observation equation, the state variables are estimated by forward recursion to obtain the forward filtered state estimate and its covariance matrix at each sampling time. The storage submodule is used to cache the forward filter state estimate, the state prediction, and their corresponding covariance matrix. The backward smoothing recursion submodule is used to read the forward filtering state estimate and covariance matrix after the data block of the preset length has been processed, calculate the smoothing gain, and recursively generate the smoothed state estimate sequence in reverse time order. The amplitude and phase calculation submodule is used to calculate and output noise-suppressed amplitude and phase data based on the in-phase and quadrature estimation components in the smoothed state estimation sequence.

5. The FPGA-based weak optical phase-locked amplification and smoothing filtering system according to any one of claims 1 to 4, characterized in that, The FPGA is equipped with a host computer communication interface, which is used to send the amplitude and phase data output by the Kalman smoothing filter module to an external device via a bus.

6. A method for weak optical phase-locked amplification and smoothing filtering based on the FPGA-based weak optical phase-locked amplification and smoothing filtering system according to any one of claims 1 to 5, characterized in that, Includes the following steps: S1: The weak light signal incident on the photodetector is periodically modulated by an optical chopper. The modulation frequency of the optical chopper is controlled by a reference signal generated by the FPGA to ensure that the chopping frequency is synchronized with the reference signal of the subsequent digital phase-locked demodulation, so that the photodetector outputs a weak photocurrent signal corresponding to the modulation frequency. The weak photocurrent signal is converted into a voltage signal by a first-stage low-noise transimpedance amplifier, and after impedance transformation and load isolation by a second-stage voltage follower, it is sampled by an analog-to-digital converter to obtain a digital sampling sequence. S2: In the FPGA, a phase step word is generated based on the sampling clock frequency and modulation frequency, and a phase control word is obtained by phase accumulation; the CORDIC algorithm is used to generate a cosine reference sequence and a sine reference sequence with the same frequency as the modulation frequency based on the phase control word; the digital sampling sequence is multiplied by the cosine reference sequence and the sine reference sequence respectively to obtain an in-phase mixer signal and a quadrature mixer signal, and after being low-pass digitally filtered, the in-phase component I and the quadrature component Q are output; S3: Construct an observation vector using the in-phase component I and the quadrature component Q, and establish a linear state-space model using the in-phase component state and the quadrature component state as state variables; perform recursive estimation of the state variables through forward Kalman filtering, and cache the forward filtered state estimate, state prediction, filter covariance matrix, and prediction covariance matrix at each sampling time; after the data block of the preset length is processed, perform backward smoothing recursion based on the cached data to obtain the smoothed in-phase estimation component and quadrature estimation component; S4: Calculate the amplitude and phase of the measured signal based on the smoothed in-phase and quadrature estimation components, and output the amplitude detection result and phase detection result after noise suppression.

7. The method for weak optical phase-locked amplification and smoothing filtering according to claim 6, characterized in that, The phase step word is calculated according to the following formula: ， in, For modulation frequency, Where B is the sampling frequency, and B is the bit width of the phase accumulator, with a value ranging from 24 to 48 bits.

8. The method for weak optical phase-locked amplification and smoothing filtering according to claim 6, characterized in that, The state equation of the linear state-space model is expressed as follows: ， The observation equation is expressed as: , in, , , and All are identity matrices.

9. The method for weak optical phase-locked amplification and smoothing filtering according to claim 6, characterized in that, The backward smoothing recursion employs a fixed interval smoothing algorithm, using the forward filter state estimate at the last sampling time N. and filter covariance matrix Using this as an initial value, the smoothing gain is calculated in reverse time order: ， And update the smoothed state estimate: .

10. The method for weak optical phase-locked amplification and smoothing filtering according to any one of claims 6 to 9, characterized in that, The amplitude is calculated according to the formula The phase is calculated according to the formula Calculation, where and These are the smoothed in-phase and orthogonal estimation components, respectively.

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