A fault injection test circuit and test device

Abstract

This invention discloses a fault injection test circuit and test device. The test circuit includes: a first controlled unit, a second controlled unit, a third controlled unit, a load unit, and a fault input / output signal acquisition unit. The first controlled unit is used to control the on / off state of the first controlled unit according to a programmable signal. The on / off state of the first controlled unit controls the on / off state of the second controlled unit. Different combinations of the on / off states of the first and second controlled units correspond to different fault injection test items. The third controlled unit is used to control the on / off state of the third controlled unit according to a programmable signal. The on / off state of the third controlled unit is used to configure the load unit to a specified load level. The second controlled unit is configured to connect to the pins of the device under test. The fault input / output signal acquisition unit is used to acquire the input and output status signals at specified locations in the fault injection test circuit.

Description

Technical Field

[0001] The embodiments of the present invention relate to automated testing technology, and more particularly to a fault injection test circuit and test device. Background Technology

[0002] Fault injection testing is a testing method used to evaluate the reliability and stability of a system. It involves intentionally introducing faults into the system and observing the system's response and behavior to determine its performance and reliability under various fault conditions. Fault injection testing can verify whether the system can continue to operate normally or automatically recover to a normal state in the face of various fault conditions. Through this test, the system's fault tolerance capability can be determined, that is, its ability to continue providing services when a fault occurs.

[0003] Currently, fault injection testing is mainly performed through integrated fault injection cabinets. This approach requires customization of hardware resource channels according to the controller under test, and has the following disadvantages:

[0004] The process is lengthy and costly; the number of high-current channels is limited, making it impossible for all channels to have the capability for high-current testing; a custom-designed load box is required, and the load type for each channel is fixed, requiring customization for each project, making it unsuitable for cross-project use, resulting in poor flexibility and increased space consumption; manual testing is required, using special wiring harnesses to perform short-circuit or open-circuit operations on fault injection scenarios, leading to low testing efficiency and safety hazards. Summary of the Invention

[0005] The present invention provides a fault injection test circuit and test device to solve at least one problem existing in the prior art.

[0006] This invention provides a fault injection test circuit, comprising:

[0007] The system comprises a first controlled unit, a second controlled unit, a third controlled unit, a load unit, and a fault input / output signal acquisition unit.

[0008] The first controlled unit is used to realize the on / off state according to the program control signal. The on / off state of the first controlled unit is used to control the on / off state of the second controlled unit. Different combinations of the on / off state of the first controlled unit and the on / off state of the second controlled unit correspond to different fault injection test items.

[0009] The third controlled unit is used to switch on and off according to the program control signal, and the switching on and off of the third controlled unit is used to configure the load unit to a specified load level;

[0010] Configure the second controlled unit to connect to the pins of the device under test;

[0011] The fault input / output signal acquisition unit is used to acquire the input and output status signals at a specified location in the fault injection test circuit.

[0012] Optionally, a first test channel branch is included, and the fault injection test items supported by the first test channel branch include: IA input control test.

[0013] Optionally, the first test channel branch includes: a first resistor, a second resistor, a third resistor, a first switch, a second switch, a third switch, a first relay, and a first interface;

[0014] The first power supply terminal is grounded through a voltage divider circuit composed of the first resistor and the second resistor, and the first terminal of the third resistor is grounded.

[0015] The first end of the first interface is connected to the first end of the first switch and the first end of the second switch, respectively;

[0016] The second end of the first switch is used to connect to the connection point of the first resistor and the second resistor, or to the second end of the three-phase resistor;

[0017] The second power supply terminal is connected to the first terminal of the third switch;

[0018] The coil terminal, common contact, normally closed contact, and normally open contact of the first relay are respectively connected to the second terminal of the third switch, the second terminal of the second switch, the first power supply terminal, and the ground terminal;

[0019] The second end of the first interface is connected to the second power supply end.

[0020] The first switch, the second switch, and the third switch are included in the first controlled unit, and the first relay is included in the second controlled unit.

[0021] Optionally, a second test channel branch is included, and the fault injection test items supported by the second test channel branch include: short circuit fault test and open circuit fault test.

[0022] Optionally, the second test channel branch includes a first test module, which includes: a fourth switch, a fifth switch, a sixth switch, a second relay, a third relay, a first load module, and a second interface;

[0023] The second power supply terminal is connected to the first terminals of the fifth switch and the sixth switch, respectively;

[0024] The coil terminal, common contact, and normally open contact of the second relay are respectively connected to the second terminal of the fifth switch, the first terminal of the second interface, and the ground terminal;

[0025] The coil terminal, common contact, and normally open contact of the third relay are respectively connected to the second terminal of the sixth switch, the first terminal of the second interface, and the first power supply terminal;

[0026] The first end of the second interface is also connected to the first load module through the fourth switch, and the second end of the second interface is connected to the second power supply terminal.

[0027] The fourth, fifth, and sixth switches are included in the first controlled unit, the second and third relays are included in the second controlled unit, and the first load module is included in the load unit.

[0028] Optionally, the second test channel branch further includes a second test module, which includes:

[0029] Seventh switch, eighth switch, ninth switch, tenth switch, fourth relay, fifth relay, sixth relay, second load module, third interface;

[0030] The second power supply terminal is connected to the first terminals of the seventh switch, the eighth switch, and the tenth switch, respectively;

[0031] The coil terminal, common contact, and normally open contact of the fourth relay are respectively connected to the second terminal of the seventh switch, the first terminal of the third interface, and the first power supply terminal;

[0032] The coil terminal, common contact, and normally open contact of the fifth relay are respectively connected to the second terminal of the eighth switch, the first terminal of the third interface, and the ground terminal;

[0033] The coil terminal, common contact, normally closed contact, and normally open contact of the sixth relay are respectively connected to the second terminal of the tenth switch, the first terminal of the ninth switch, the first power supply terminal, and the ground terminal;

[0034] The first end of the third interface is also connected to the second load module and the second end of the ninth switch, and the second end of the third interface is connected to the second power supply terminal;

[0035] The seventh, eighth, ninth, and tenth switches are included in the first controlled unit, the fourth, fifth, and sixth relays are included in the second controlled unit, and the second load module is included in the load unit.

[0036] Optionally, the fault input / output signal acquisition unit includes a current acquisition module, a resistance acquisition module, and a drive feedback acquisition module;

[0037] The current acquisition module is used for acquiring current signals at specified signal sampling points, the resistance acquisition module is used for acquiring resistance signals at specified sampling points, and the drive feedback acquisition module is used for acquiring input and output signals of specified pins of the device under test.

[0038] Optionally, the first and third controlled units are programmable relays, and the second controlled unit is an electromagnetic relay.

[0039] Optionally, the fault injection test circuit is used for DTC fault injection testing.

[0040] Secondly, embodiments of the present invention also provide a testing apparatus, including any of the fault injection test circuits described in the embodiments of the present invention.

[0041] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention proposes a fault injection test circuit, which includes a first controlled unit, a second controlled unit, a third controlled unit, a load unit, and a fault input / output signal acquisition unit. The first controlled unit is configured to be controlled on and off by a programmable signal. The second controlled unit, the pins of the device under test, and the load unit can form a fault injection test loop. The on / off state of the first controlled unit controls the on / off state of the second controlled unit, thereby achieving isolation between the programmable signal and the second controlled unit. Furthermore, by selecting the appropriate second controlled unit, it is made capable of supporting high-current testing, enabling each test channel (branch) of the fault injection test circuit to support high-current testing. In this solution, the fault injection test circuit itself includes a load unit. The load unit is used to simulate various devices or load conditions connected to the system under test in actual operation. The load unit can include multiple load types. The on / off state of the third controlled unit is configured to switch between different types of loads in the load unit. This allows one or more resistive loads to be used according to actual test needs during fault injection testing, thereby meeting the test requirements of the system under test for load characteristics. In this solution, both the first and third controlled units are configured to be programmable, which enables the fault injection test circuit to automatically complete the specified fault injection test items, avoiding the problems of low test efficiency and safety hazards caused by manual testing. Attached Figure Description

[0042] Figure 1 This is a block diagram of the fault injection test circuit structure in the embodiment;

[0043] Figure 2 This is the electrical schematic diagram of the fault injection test circuit in the embodiment. Detailed Implementation

[0044] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0045] Example 1

[0046] Figure 1 This is a block diagram of the fault injection test circuit in the embodiment, for reference. Figure 1 The fault injection test circuit includes:

[0047] The system comprises a first controlled unit 100, a second controlled unit 200, a third controlled unit 300, a load unit 400, and a fault input / output signal acquisition unit 500.

[0048] The first controlled unit 100 is used to realize the on / off state according to the program control signal. The on / off state of the first controlled unit 100 is used to control the on / off state of the second controlled unit 200. Different combinations of the on / off state of the first controlled unit 200 and the on / off state of the second controlled unit 200 correspond to different fault injection test items.

[0049] The third controlled unit 300 is used to switch on and off according to the program control signal. The switching on and off of the third controlled unit 300 is used to configure the load unit 400 to a specified load level.

[0050] Configure the second controlled unit 200 to connect to pin 1 of the device under test;

[0051] The fault input / output signal acquisition unit 500 is used to acquire the input and output status signals at a specified location in the fault injection test circuit.

[0052] For example, in this solution, the first controlled unit 100 and the third controlled unit 300 are configured to be controlled by a programmable signal. The programmable signal refers to a signal generated by program control. The programmable signal can be used to simulate various input signals (such as sensor output signals, control command signals, etc.) to test the system's response under different conditions.

[0053] In this solution, the programmable control signals can be generated by a signal generator or a programmable controller. These signal generation devices can be configured to generate specified programmable control signals according to preset programs and parameters.

[0054] For example, in this scheme, the programmable control signal is mainly used to realize the on / off control of the first controlled unit 100 and the third controlled unit 300. The programmable control signal can be a pulse signal or a square wave signal with certain timing characteristics.

[0055] For example, in this solution, the first controlled unit 100 is configured for driving control of the second controlled unit 200, wherein the first controlled unit 100 can be a solid-state relay, an optocoupler relay, an analog switch, etc.

[0056] In this scheme, the second controlled unit 200 is configured to handle large currents (greater than 50A). The second controlled unit 200 can be a solid-state relay, an electromagnetic relay, etc.

[0057] For example, in this solution, the first controlled unit 100 may include multiple switches, and the second controlled unit 200 may include multiple relays;

[0058] One switch can be configured to control one relay. Depending on the test requirements, the on / off state of a pair of switches and relays can correspond to two different fault injection test items.

[0059] Depending on the testing requirements, fault injection test items can also involve the use of multiple pairs of switches and relays. In this case, the on / off states of different pairs of switches and relays can correspond to different fault injection test items.

[0060] For example, in this solution, the first controlled unit 100 includes a switch and the second controlled unit 200 uses an electromagnetic relay to illustrate the control process of a switch on a relay.

[0061] When the first controlled unit 100 receives the program control signal, the first controlled unit 100 will take corresponding actions. These actions will trigger the generation of current in the coil of the second controlled unit 200, thereby generating a magnetic field. This magnetic field will attract the designated contact in the electromagnetic relay to close or open, thereby realizing the on / off control of the second controlled unit 200.

[0062] For example, in this solution, the second controlled unit 200, the pin 1 of the device under test, and the load unit 400 can form a fault injection test circuit. Since the second controlled unit 200 is selected as a relay that supports large current, and the control of the second controlled unit 200 is achieved by the first controlled unit 100 controlling the control of the second controlled unit 200, the programmable signal is isolated from the second controlled unit 200. Therefore, the fault injection test circuit can support fault injection test items with large current.

[0063] For example, in this solution, the load unit 400 is used to simulate the various devices or loads connected to the system under test in actual operation. By using the load unit 400, during fault injection testing, faults such as short circuits, open circuits, or overloads can be introduced to determine whether the fault detection and protection mechanisms of the system under test are effective.

[0064] In this solution, the load unit 400 may include various load types, such as resistive loads, inductive loads, capacitive loads, mixed loads (loads composed of components such as resistors, inductors and capacitors), sensors, etc.

[0065] In this solution, the load unit 400 may include several load levels. Taking a resistive load as an example, the load unit 400 may include a variety of resistive loads with different resistance values. One or more resistive loads are used when performing fault injection testing to meet the test requirements of the system under test for load characteristics.

[0066] In this scheme, the on / off state of the third controlled unit 300 is configured to switch between different types of loads in the load unit 400, or to switch between different values ​​of the same type of load. Specifically, for the programmable control signal of the third controlled unit 300, a signal generation device can be configured to calculate the corresponding load value based on the rated current corresponding to the fault injection test item, and then generate the corresponding programmable control signal for selecting the corresponding load based on the load configured in the load unit 400, thereby realizing automatic and accurate load adjustment and improving test efficiency and accuracy.

[0067] For example, in this solution, the fault input / output signal acquisition unit 500 is used to acquire test signals at a specified location in the fault injection test circuit when performing fault injection testing, so that the cause of the fault test abnormality or the location of the fault abnormality can be determined by the acquired test signals.

[0068] In this solution, the fault input / output signal acquisition unit 500 can be configured to acquire one or more of current signals, voltage signals, and drive signals;

[0069] By collecting current data at different locations, the magnitude and changes in current within the circuit can be monitored in real time. This helps determine whether the circuit is functioning correctly. For example, an abnormally high current in a certain section may indicate a short circuit, overload, or other fault in that section; conversely, a low current may suggest an open circuit or the failure of some components.

[0070] By collecting resistance data, the actual resistance value can be measured, which can help troubleshoot problems. For example, if the resistance value of a certain part increases or decreases abnormally, it may mean that there is a short circuit, open circuit, or poor contact in that part. By measuring the resistance at different locations, the fault range can be gradually narrowed down, and the fault point can be finally determined.

[0071] Drive signals can be voltage, current, power, and other signals from the drive system. Monitoring these parameters can help determine the location and type of fault. When an anomaly occurs during fault injection testing, analyzing changes in the feedback data can help deduce possible causes of the fault. For example, if the current feedback suddenly drops to zero, it may indicate an open circuit in a component of the drive circuit; if the voltage feedback rises abnormally, it may indicate a short circuit fault.

[0072] This embodiment proposes a fault injection test circuit, which includes a first controlled unit, a second controlled unit, a third controlled unit, a load unit, and a fault input / output signal acquisition unit. The first controlled unit is configured to be controlled on and off via a programmable signal. The second controlled unit, the pins of the device under test (DUT), and the load unit form a fault injection test loop. The on / off state of the first controlled unit controls the on / off state of the second controlled unit, thereby achieving isolation between the programmable signal and the second controlled unit. Furthermore, by selecting the appropriate second controlled unit, it is designed to support high-current testing, enabling each test channel (branch) of the fault injection test circuit to support high-current testing. In this solution, the fault injection... The test circuit itself includes a load unit, which simulates various devices or loads connected to the system under test during actual operation. The load unit can include multiple load types. The switching of the third controlled unit is used to switch between different types of loads in the load unit. This allows for the use of one or more resistive loads according to actual test needs during fault injection testing, thereby meeting the test requirements of the system under test for load characteristics. In this scheme, both the first and third controlled units are configured to be programmable, enabling the fault injection test circuit to automatically complete the specified fault injection test items, avoiding the problems of low test efficiency and safety hazards caused by manual testing.

[0073] exist Figure 1 Based on the scheme shown, the fault injection test circuit includes a first test channel branch, and the fault injection test items supported by the first test channel branch include: IA input control test.

[0074] For example, in this scheme, the IA input (analog input) control test is mainly to verify the system's ability to process specific input signals. By inputting current signals of different amplitudes, frequencies, and waveforms into the system, the system's response is observed to determine whether the system can accurately amplify, process, and output these signals.

[0075] This test helps detect faults and anomalies in the system, evaluating its performance and reliability when analog inputs are abnormal (such as signal distortion, out-of-range errors, noise interference, etc.). By injecting various fault modes, such as input signal short circuits, open circuits, and noise interference, the system's response can be observed to determine whether the system can correctly detect and handle these faults.

[0076] Figure 2 This is the electrical schematic diagram of the fault injection test circuit in the embodiment, for reference. Figure 2 In one possible implementation, the first test channel branch includes: a first resistor R11, a second resistor R12, a third resistor R13, a first switch K2, a second switch K1, a third switch K4, a first relay R1, and a first interface IA;

[0077] The first power supply terminal VBAT1 is grounded through a voltage divider circuit consisting of the first resistor R11 and the second resistor R12, and the first terminal of the third resistor R13 is grounded.

[0078] The first terminal of the first interface IA is connected to the first terminal of the first switch K2 and the second switch #K1 respectively;

[0079] The second end of the first switch K2 is used to connect to the connection point of the first resistor R11 and the second resistor R12, or to the second end of the three-phase resistor R13.

[0080] The second power supply terminal VBAT2 is connected to the first terminal of the third switch K4;

[0081] The coil terminals, common contact, normally closed contact, and normally open contact of the first relay R1 are respectively connected to the second terminal of the third switch K4, the second terminal of the second switch #K1, the first power supply terminal VBAT1, and the ground terminal;

[0082] The second end of the first interface IA is connected to the second power supply terminal VBAT2.

[0083] In this scheme, the first switch K2, the second switch K1, and the third switch K4 are included in the first controlled unit, and the first relay R1 is included in the second controlled unit.

[0084] For example, in this solution, the first power supply terminal VBAT1 is used as the load power supply terminal to supply power to the load, and the second power supply terminal VBAT2 is used as the relay power supply terminal to supply power to the relay.

[0085] For example, in this solution, the first interface IA is configured to include relays K_J1-1 and K_J2-1, and the pins of the device under test (DUT) are connected to the first interface IA via a 2-in-2-out terminal block.

[0086] For example, in this solution, the energization of the coil of the first relay R1 is controlled by the (programmable) control of the third switch K4;

[0087] In this scheme, the resistance values ​​of the first resistor R11, the second resistor R12, and the third resistor R13 are set to 1kΩ, 330Ω, and 2kΩ, respectively. The first switch K2, the second switch #K1, the first resistor R11, the second resistor R12, and the third resistor R13 are set to implement the 3V input test and the 2kΩ analog ground test in the IA input control test.

[0088] For example, in this solution, the generation process of the programmable signals for the first switch K2 and the second switch #K1 is not limited, and can be freely set according to the fault injection test process;

[0089] For example, by controlling the second switch #K1 to close and controlling the first switch K2 to connect with the third resistor R13, a 2kΩ test of the analog ground can be achieved.

[0090] By controlling the closing of the second switch #K1 and the third switch K4, and controlling the connection between the first switch K2 and the first resistor R11, a 3V input test can be achieved.

[0091] Based on any of the aforementioned schemes, in one possible implementation scheme, the fault injection test circuit further includes a second test channel branch, and the fault injection test items supported by the second test channel branch include: short circuit fault test and open circuit fault test.

[0092] For example, in this solution, short-circuit fault testing and open-circuit fault testing can specifically include short-circuit to power supply fault injection testing, short-circuit to ground fault injection testing, and open-circuit fault testing for a pin of a device under test (DUT).

[0093] refer to Figure 2 Based on any of the aforementioned solutions, in one possible implementation, the second test channel branch includes a first test module, which includes:

[0094] Fourth switch #K2, fifth switch K6, sixth switch K5, second relay R3, third relay R2, first load module, second interface Hbri_1;

[0095] The second power supply terminal VBAT2 is connected to the first terminals of the fifth switch K6 and the sixth switch K5, respectively;

[0096] The coil terminal, common contact, and normally open contact of the second relay R3 are respectively connected to the second terminal of the fifth switch K6, the first terminal of the second interface Hbri_1, and the ground terminal;

[0097] The coil terminal, common contact, and normally open contact of the third relay R2 are respectively connected to the second terminal of the sixth switch K5, the first terminal of the second interface Hbri_1, and the first power supply terminal VBAT1;

[0098] The fourth switch #K2, the fifth switch K6, and the sixth switch K5 are included in the first controlled unit, the second relay R3 and the third relay R2 are included in the second controlled unit, and the first load module is included in the load unit.

[0099] For example, in this solution, the first load module may include 2Ω, 40Ω, 10kΩ, 1kΩ, 330Ω resistors, Sensor1, Sensor2, and controllable switches #K3, K10, K11, K12, K13, K14, K15, and K5;

[0100] Among them, the 2Ω, 40Ω, 10kΩ, 1kΩ, and 330Ω resistors, Sensor1, and Sensor2 are connected in series with controllable switches #K3, K10, K11, K12, K13, K14, and K15 respectively. The series-connected branches are connected in parallel to form a controllable load network, namely the first load module.

[0101] Among them, controllable switches #K3, K10, K11, K12, K13, K14, and K5 are included in the third controlled unit. It is set that by programmable control of the fourth switch #K2 and controllable switches #K3, K10, K11, K12, K13, K14, and K5, a specified load (such as a 2Ω resistor, sensor Sensor1, etc.) can be selected to complete the fault injection test.

[0102] For example, the fourth switch #K2 is connected in series between the load and the DUT. When the DUT is normally connected to the load, an open-circuit fault injection test can be achieved by controlling the fourth switch #K2 to open. Alternatively, an open-circuit fault injection test can be achieved by controlling the disconnection of a designated switch such as K10 connected in series in the load branch.

[0103] For example, in this solution, the second interface Hbri_1 is configured to include relays #KJX-N and K_J1-x, and the pins of the device under test (DUT) are connected to the second interface Hbri_1 via a 2-in-2-out terminal block.

[0104] For example, in this solution, the energization of the coil of the second relay R3 is controlled by the (programmable) control of the fifth switch K6, and the energization of the coil of the third relay R2 is controlled by the (programmable) control of the sixth switch K5.

[0105] In this scheme, the second relay R3 is configured for short-circuit to ground fault injection test, and the third relay R2 is configured for short-circuit to power supply fault injection test. Furthermore, by programmably controlling the fifth switch K6 and the sixth switch K5, the fault injection test can also be switched from short-circuit to ground to short-circuit to power supply.

[0106] In this scheme, the generation process of the programmable signals for the fifth switch K6 and the sixth switch K5 is not limited, and can be freely set according to the fault injection test process.

[0107] For example, closing the fifth switch K6 can enable a short-circuit to ground fault injection test, and closing the sixth switch K5 can enable a short-circuit to power supply fault injection test.

[0108] refer to Figure 2 Based on any of the aforementioned solutions, in one possible implementation, the second test channel branch further includes a second test module, which includes:

[0109] Seventh switch K7, eighth switch K8, ninth switch #K4, tenth switch K9, fourth relay R4, fifth relay R5, sixth relay R6, second load module, third interface Hbri_2;

[0110] The second power supply terminal VBAT2 is connected to the first terminals of the seventh switch K7, the eighth switch K8, and the tenth switch K9, respectively.

[0111] The coil terminals, common contacts, and normally open contacts of the fourth relay R4 are connected to the second terminal of the seventh switch K7, the first terminal of the third interface Hbri_2, and the first power supply terminal VBAT1, respectively.

[0112] The coil terminals, common contact, and normally open contact of the fifth relay R5 are connected to the second terminal of the eighth switch K8, the first terminal of the third interface Hbri_2, and the ground terminal, respectively.

[0113] The coil terminals, common contact, normally closed contact, and normally open contact of the sixth relay R6 are respectively connected to the second terminal of the tenth switch K9, the first terminal of the ninth switch #K4, the first power supply terminal VBAT1, and the ground terminal;

[0114] The first end of the third interface Hbri_2 is also connected to the second load module and the second end of the ninth switch #K4, and the second end of the third interface Hbri_2 is connected to the second power supply terminal VBAT2.

[0115] In this scheme, the seventh switch K7, the eighth switch K8, the ninth switch #K4, and the tenth switch K9 are included in the first controlled unit, the fourth relay R4, the fifth relay R5, and the sixth relay R6 are included in the second controlled unit, and the second load module is included in the load unit.

[0116] For example, in this solution, the second load module can be the same as the first load module. The second load module may include 2Ω, 40Ω, 10kΩ, 1kΩ, 330Ω resistors, Sensor1, Sensor2, and controllable switches #K3, K10, K11, K12, K13, K14, K15, and K5.

[0117] By controlling the ninth switch #K4 and controllable switches #K3, K10, K11, K12, K13, K14, K15, and K5, a specified load (such as a 2Ω resistor, sensor Sensor1, etc.) can be selected to complete the fault injection test.

[0118] For example, in this solution, the third interface Hbri_2 is configured to include relays K_Jx-n and K_J1-x, and the pins of the device under test (DUT) are connected to the third interface Hbri_2 via a 2-in-2-out terminal block.

[0119] For example, in this solution, the energization of the coil of the fourth relay R4 is controlled by the (programmable) control of the seventh switch K7, the energization of the coil of the fifth relay R5 is controlled by the (programmable) control of the eighth switch K8, and the energization of the coil of the sixth relay R6 is controlled by the (programmable) control of the tenth switch K9.

[0120] In this scheme, the fifth relay R5 is configured for short-circuit to ground fault injection test, and the fourth relay R4 is configured for short-circuit to power supply fault injection test. In addition, the fourth relay R4, the fifth relay R5 and the sixth relay R6 can be used together to simulate specified fault conditions.

[0121] For example, the fourth relay R4 and the fifth relay R5 can simulate short-circuit faults at different locations, and the sixth relay R6 can be used to control the timing and sequence of fault injection, or as a backup fault simulation element to increase the coverage of the test.

[0122] In this scheme, the generation process of the programmable signals for the seventh switch K7, the eighth switch K8 and the tenth switch K9 is not limited, and can be freely set according to the fault injection test process.

[0123] For example, controlling the fifth switch K6 to close can realize short-circuit to ground fault injection test, and controlling the sixth switch K5 to close can realize short-circuit to power supply fault injection test;

[0124] By controlling the closing of designated switches connected in series in the load branch, such as the ninth switch #K4 and K10, and by controlling the closing of the tenth switch K9, a load-to-ground fault injection test can be achieved; by controlling the opening of the tenth switch K9, a load-to-power supply fault injection test can be achieved.

[0125] When the DUT is normally connected to the load, an open-circuit fault injection test can be performed by controlling the disconnection of a specified switch, such as K10, which is connected in series in the load branch.

[0126] Based on any of the aforementioned schemes, in one possible implementation scheme, the fault input / output signal acquisition unit is configured to include a current acquisition module, a resistance acquisition module, and a drive feedback acquisition module;

[0127] The current acquisition module is used to acquire current signals at specified signal sampling points, the resistance acquisition module is used to acquire resistance signals at specified sampling points, and the drive feedback acquisition module is used to acquire input and output signals from specified pins of the device under test.

[0128] Based on any of the aforementioned schemes, in one possible implementation scheme, the first controlled unit and the third controlled unit are configured to use programmable relays, and the second controlled unit is configured to use electromagnetic relays.

[0129] Based on any of the aforementioned schemes, in one possible implementation, a fault injection test circuit is configured for DTC (Diagnostic Trouble Code) fault injection testing.

[0130] refer to Figure 2 Based on any of the aforementioned solutions, in one possible implementation, the fault injection test circuit includes:

[0131] First resistor R11, second resistor R12, third resistor R13, first switch K2, second switch #K1, third switch K4, first relay R1, first interface IA;

[0132] Fourth switch #K2, fifth switch K6, sixth switch K5, second relay R3, third relay R2, load module, second interface Hbri_1;

[0133] Seventh switch K7, eighth switch K8, ninth switch #K4, tenth switch K9, fourth relay R4, fifth relay R5, sixth relay R6, load module, third interface Hbri_2;

[0134] The load module includes 2Ω, 40Ω, 10kΩ, 1kΩ, and 330Ω resistors, Sensor1, Sensor2, and controllable switches #K3, K10, K11, K12, K13, K14, and K5;

[0135] It also includes switch K1, and the first power supply terminal VBAT1 is connected to the pin of the device under test (DUT) through switch K1;

[0136] It also includes an 8-channel current acquisition module, an 8-channel resistance acquisition module, a DAM-LEDControl module, and a drive feedback acquisition module;

[0137] The current acquisition is connected to the current sampling point in the fault injection test circuit, the resistance acquisition is connected to the resistance sampling point in the fault injection test circuit, and the drive feedback acquisition is connected to the second test channel branch through switch K16 and to the third test channel branch through switch K17.

[0138] For example, in this solution, the connection method of each device is the same as the content recorded in the aforementioned corresponding solution, and the specific details will not be described in detail.

[0139] Based on the aforementioned corresponding solutions, in this solution, KL15 control testing can be achieved based on switch K1;

[0140] Based on the first test channel branch, 3V input test and 2kΩ to analog ground test can be realized in IA input control test;

[0141] Based on the second test channel branch, single-channel PIN short-circuit to power supply, short-circuit to ground, and open-circuit fault injection tests can be realized, as well as normal drive load switching (2Ω, 40Ω, 330Ω, 1kΩ, 10kΩ) to power supply, to ground, and loop tests, and normal drive sensor (height sensor - Sensor1, acceleration sensor - Sensor2) tests can be realized.

[0142] Based on the second test channel branch, multiple PIN short-circuit to power supply, short-circuit to ground, open circuit, and loop short-circuit fault injection tests can also be realized.

[0143] In this solution, DAM-LED Control can be configured to detect light-emitting diodes (LEDs). When performing specified fault injection tests (such as short circuit, open circuit, etc.), DAM-LED Control is configured to detect whether the LED's response meets expectations, thereby determining whether the protection mechanism is effective. Specifically, in this solution, DAM-LED Control can be configured to implement fault line diagnosis for lamps with PWM input.

[0144] In this solution, the drive feedback acquisition (module) can be used to acquire PWM (Pulse Width Modulation) signals and AI (Analog Input) signals, thereby enabling the monitoring of the PWM or AI signals to realize the input and output status of the PIN of the device under test during the fault injection test.

[0145] In this solution, the components used in the fault injection test circuit can all be commercially available electronic modules. Based on this fault injection test circuit, the fault injection cabinet has a short cycle (<30 days) and low cost (<120,000 RMB). Using the fault injection test circuit proposed in this solution, fully automated testing can be achieved in the fault injection test scenarios of body domain controllers such as BCM (Body Control Module) and ZCU (Zone Control Unit). Fault injection and fault code reading of all DTCs can be achieved within 3 hours.

[0146] Example 2

[0147] This embodiment proposes a testing device, including any of the fault injection test circuits described in Embodiment 1. The implementation process and beneficial effects of the test circuit are the same as the corresponding content described in Embodiment 1, and the specific details will not be repeated.

[0148] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A fault injection test circuit, characterized in that, include: The system comprises a first controlled unit, a second controlled unit, a third controlled unit, a load unit, and a fault input / output signal acquisition unit. The first controlled unit is used to realize the on / off state according to the program control signal. The on / off state of the first controlled unit is used to control the on / off state of the second controlled unit. Different combinations of the on / off state of the first controlled unit and the on / off state of the second controlled unit correspond to different fault injection test items. The third controlled unit is used to switch on and off according to the program control signal, and the switching on and off of the third controlled unit is used to configure the load unit to a specified load level; Configure the second controlled unit to connect to the pins of the device under test; The fault input / output signal acquisition unit is used to acquire the input and output status signals at a specified location in the fault injection test circuit.

2. The fault injection test circuit as described in claim 1, characterized in that, The first test channel branch is configured to support fault injection test items including: IA input control test.

3. The fault injection test circuit as described in claim 2, characterized in that, The first test channel branch includes: a first resistor, a second resistor, a third resistor, a first switch, a second switch, a third switch, a first relay, and a first interface; The first power supply terminal is grounded through a voltage divider circuit composed of the first resistor and the second resistor, and the first terminal of the third resistor is grounded. The first end of the first interface is connected to the first end of the first switch and the first end of the second switch, respectively; The second end of the first switch is used to connect to the connection point of the first resistor and the second resistor, or to the second end of the three-phase resistor; The second power supply terminal is connected to the first terminal of the third switch; The coil terminal, common contact, normally closed contact, and normally open contact of the first relay are respectively connected to the second terminal of the third switch, the second terminal of the second switch, the first power supply terminal, and the ground terminal; The second end of the first interface is connected to the second power supply end; The first switch, the second switch, and the third switch are included in the first controlled unit, and the first relay is included in the second controlled unit.

4. The fault injection test circuit as described in any one of claims 1 or 2, characterized in that, It also includes a second test channel branch, and the fault injection test items supported by the second test channel branch include: short circuit fault test and open circuit fault test.

5. The fault injection test circuit as described in any one of claims 1 to 4, characterized in that, The second test channel branch includes a first test module, which includes: Fourth switch, fifth switch, sixth switch, second relay, third relay, first load module, second interface; The second power supply terminal is connected to the first terminal of the fifth switch and the sixth switch, respectively; The coil terminal, common contact, and normally open contact of the second relay are respectively connected to the second terminal of the fifth switch, the first terminal of the second interface, and the ground terminal; The coil terminal, common contact, and normally open contact of the third relay are respectively connected to the second terminal of the sixth switch, the first terminal of the second interface, and the first power supply terminal; the first terminal of the second interface is also connected to the first load module through the fourth switch, and the second terminal of the second interface is connected to the second power supply terminal; The fourth, fifth, and sixth switches are included in the first controlled unit, the second and third relays are included in the second controlled unit, and the first load module is included in the load unit.

6. The fault injection test circuit as described in claim 4, characterized in that, The second test channel branch also includes a second test module, which includes: Seventh switch, eighth switch, ninth switch, tenth switch, fourth relay, fifth relay, sixth relay, second load module, third interface; The second power supply terminal is connected to the first terminals of the seventh switch, the eighth switch, and the tenth switch, respectively; The coil terminal, common contact, and normally open contact of the fourth relay are respectively connected to the second terminal of the seventh switch, the first terminal of the third interface, and the first power supply terminal; The coil terminal, common contact, and normally open contact of the fifth relay are respectively connected to the second terminal of the eighth switch, the first terminal of the third interface, and the ground terminal; The coil terminal, common contact, normally closed contact, and normally open contact of the sixth relay are respectively connected to the second terminal of the tenth switch, the first terminal of the ninth switch, the first power supply terminal, and the ground terminal; The first end of the third interface is also connected to the second load module and the second end of the ninth switch, and the second end of the third interface is connected to the second power supply terminal; The seventh, eighth, ninth, and tenth switches are included in the first controlled unit, the fourth, fifth, and sixth relays are included in the second controlled unit, and the second load module is included in the load unit.

7. The fault injection test circuit as described in any one of claims 1 to 6, characterized in that, The fault input / output signal acquisition unit includes a current acquisition module, a resistance acquisition module, and a drive feedback acquisition module; The current acquisition module is used for acquiring current signals at specified signal sampling points, the resistance acquisition module is used for acquiring resistance signals at specified sampling points, and the drive feedback acquisition module is used for acquiring input and output signals of specified pins of the device under test.

8. The fault injection test circuit as described in any one of claims 1 to 6, characterized in that, The first and third controlled units use programmable relays, while the second controlled unit uses an electromagnetic relay.

9. The fault injection test circuit as described in claim 1, characterized in that, The fault injection test circuit is used for DTC fault injection testing.

10. A testing apparatus, characterized in that, Includes the fault injection test circuit as described in any one of claims 1 to 9.

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