Testing Method and System for Primary and Secondary Integrated Pole-Mounted Circuit Breakers

Abstract

This invention relates to the field of power distribution network equipment testing technology, and discloses a testing method and system for primary and secondary integrated pole-mounted circuit breakers. The method includes: establishing an electrical connection and communication link between the testing system and the circuit breaker and completing clock calibration; applying an excitation signal to the primary circuit based on a unified synchronization timing sequence, and calculating a first quantitative index to evaluate the primary and secondary coordinated time performance; applying a simulated disturbance signal to the secondary circuit in parallel, and calculating a second quantitative index to evaluate sampling accuracy and anti-interference capability; issuing instructions to an intelligent control terminal to verify the effectiveness of control logic and protection logic; performing time-series alignment and fusion of multi-dimensional testing data, and calculating a third quantitative index to evaluate the overall health status of the equipment; and generating a testing report carrying a timing traceability code. This invention can accurately quantify the primary and secondary coordinated time performance and locate abnormal links, while simultaneously achieving parallel and realistic evaluation of the secondary circuit performance under strong electromagnetic interference conditions.

Description

Technical Field

[0001] This invention relates to the field of power distribution network equipment testing technology, specifically to a testing method and system for primary and secondary integrated pole-mounted circuit breakers. Background Technology

[0002] The integrated primary and secondary pole-mounted circuit breaker is a key device in the distribution network, integrating primary equipment (circuit breaker, current / voltage sensor) with a secondary intelligent control unit (FTU), realizing the integration of electrical quantity acquisition, protection control, and remote communication. With the improvement of the automation level of the distribution network, higher requirements are placed on the comprehensive performance testing of this type of equipment, including primary and secondary coordination performance, sampling accuracy, and anti-interference capability.

[0003] Currently, traditional testing methods often separate primary and secondary equipment testing. For example, primary-side mechanical characteristic testing mainly focuses on parameters such as the circuit breaker's inherent opening time and closing bounce; while secondary-side testing separately assesses the protection device's setting accuracy and operating logic. However, existing technologies suffer from the following two most prominent technical problems: First, the coordination time performance between primary and secondary components cannot be accurately quantified and located. Traditional detection methods lack a unified, high-precision timing benchmark, making it difficult to simultaneously capture the fault initiation time, protection message reception time, and the actual disconnection time of the main contacts. This results in the inability to accurately quantify the total coordination delay throughout the entire process from fault occurrence to protection judgment and mechanical action, and further makes it impossible to effectively distinguish whether the delay anomaly originates from protection logic judgment (secondary side) or mechanical action jamming (primary side), thus restricting the accurate evaluation of the dynamic coordination performance of primary and secondary integrated equipment and the location of fault roots.

[0004] Secondly, the interference of a strong primary electromagnetic field on the secondary sampling circuit cannot be realistically simulated and quantitatively evaluated during testing. In actual operation, a strong electromagnetic field is generated when a large current flows through the primary circuit, which may interfere with the built-in electronic sensors and the secondary sampling circuit, leading to sampling deviations or data jitter. However, traditional discrete testing methods cannot simultaneously perform accuracy verification and anti-interference capability assessment of the secondary sampling circuit during the primary high-current output period, making it difficult to expose hidden defects such as poor shielding grounding and analog-to-digital converter (ADC) drift. At the same time, existing methods also lack indicators that can quantitatively evaluate the sampling stability of the secondary circuit under electromagnetic interference environments, resulting in a disconnect between the test results and the actual operating conditions of the equipment.

[0005] In summary, existing detection technologies struggle to achieve high-precision timing synchronization, parallel collaborative excitation, and multi-dimensional performance fusion evaluation within a deeply integrated primary and secondary architecture. There is an urgent need for a detection method and system that can unify the detection of the collaborative time performance and sampling anti-interference capability of primary and secondary integrated pole-mounted circuit breakers. Summary of the Invention

[0006] The purpose of this invention is to provide a detection method and system for primary and secondary integrated pole-mounted circuit breakers, thereby solving the aforementioned technical problems.

[0007] A method for detecting a primary and secondary integrated pole-mounted circuit breaker, the method comprising the following steps: S1. Establish an electrical connection and communication link between the detection system and the primary and secondary integrated pole-mounted circuit breaker to complete the timing clock calibration of multiple devices; S2. Based on the unified synchronous timing, a detection excitation signal is applied to the primary circuit, the electrical parameters and mechanical characteristic parameters of the primary circuit are collected synchronously, and the first quantitative index for evaluating the coordination time performance between electrical quantities and mechanical quantities in the primary circuit is calculated. S3. In parallel with the primary circuit detection timing, a simulated power grid disturbance signal is applied to the secondary sampling circuit to collect the sampling data of the secondary circuit and calculate the second quantitative index used to evaluate the sampling accuracy deviation and anti-interference capability of the secondary circuit. S4. Send control commands and protection trigger commands to the intelligent control terminal, collect the terminal's response parameters, and verify the validity of the terminal's control logic and protection logic. S5. The data collected in S2, S3 and S4 are time-series aligned and fused to construct a multi-dimensional feature vector, and a third quantitative indicator for evaluating the overall health status of the equipment is calculated based on the information fusion theory. S6. Integrate test data and diagnostic results to generate a test report carrying a unique time-series traceability code.

[0008] As a further description of the technical solution of the present invention, the first quantitative index in S2 is the time synchronization deviation index. The method of obtaining it is as follows: Record the fault initiation time using a globally unified time base. Protect message reception time Main contact breaking time The total delay of the first and second coordinated actions is calculated using the following formula. Decompose it into protection judgment delay and the inherent operating delay of the circuit breaker ; The mathematical model for the time synchronization deviation index is constructed as follows: ; In the formula, The delay is set to protect the set value. This is the standard value for the inherent opening time of the circuit breaker. and This is the allowable deviation threshold; when If the time is less than 1, the coordination time is considered acceptable; otherwise, it is considered unacceptable, and the out-of-tolerance link is identified as an abnormal protection delay or mechanical jamming.

[0009] As a further description of the technical solution of the present invention, the fault initiation time Protect message reception time Main contact breaking time The capture employs an FPGA-based multi-source event unified timestamp capture circuit, with a time synchronization error between channels ≤ ±10μs, and utilizes pre-measured hardware channel delays. Compensation will be provided. ,in, The actual time of the event after compensation. To capture the original timestamp captured by the capture circuit, The inherent hardware transmission delay of the i-th signal channel, =0,1,2, which are channel numbers, corresponding to different event types.

[0010] As a further description of the technical solution of the present invention, the second quantization index in S3 includes sampling accuracy deviation and anti-interference stability index. The sampling accuracy deviation is obtained by applying multiple levels of standard signals to the primary side and reading the sampled values ​​reported by the intelligent control terminal, and is calculated using the following formula: ,in, The current value obtained by sampling the device under test is read from the FTU through the secondary communication interface; The standard current value is the known current precisely output from the primary side of the detection system. This is due to sampling accuracy deviation; Calculate the sampling accuracy deviation for each gear position. If the sampling accuracy deviation for any gear position exceeds the limit, the sampling accuracy is deemed unqualified.

[0011] As a further description of the technical solution of the present invention, the second quantization index in S3 includes sampling accuracy deviation and anti-interference stability index, wherein the anti-interference stability index is calculated by the following formula: ,in, The standard deviation of the sensor sampling values ​​during a single high-current output period. The average of the sampled values; As an anti-interference stability index, when If the threshold is exceeded, the anti-interference performance is deemed unqualified.

[0012] As a further description of the technical solution of the present invention, the third quantification index in S5 is based on the fusion state index of information entropy, and its specific calculation process is as follows: The primary mechanical and electrical data, secondary sampling and verification data, and intelligent terminal operation data collected by S2, S3, and S4 are time-series aligned and fused to construct a system containing... , , and Including eigenvectors ; For feature vectors Each component in Calculate its probability density that deviates from the normal distribution. The normal distribution is determined based on historical test data of the same model of equipment or the factory standard. Constructing a fusion state index The computational model is expressed as follows: ; when Below the corresponding threshold The system determines that the overall health status of the equipment requires maintenance and outputs the corresponding characteristic components. The contribution ranking is used for fault location.

[0013] As a further description of the technical solution of the present invention, the fusion state index Corresponding threshold Calculate dynamically using the following formula: ,in, The average of the same model of historical health equipment value, Its standard deviation, This is the preset sensitivity coefficient.

[0014] As a further description of the technical solution of the present invention, in step S1, the multi-device timing clock calibration adopts the GPS or IEEE 1588 PTP protocol to ensure that the clock deviation between each module of the detection system and the intelligent control terminal of the circuit breaker under test is ≤±1μs. In steps S2 and S4, the primary circuit detection and the intelligent terminal linkage detection are executed in parallel under unified timing control, realizing real-time collaborative testing of primary high current excitation and secondary protection logic response. In step S4, the protection action message is received using the IEC 61850 GOOSE protocol, and the detection system records a hardware timestamp via the FPGA when receiving Ethernet frames at the physical layer, ensuring the protection action time is accurate. It is not affected by network protocol stack latency jitter.

[0015] A primary and secondary integrated pole-mounted circuit breaker detection system includes: One-time programmable fault simulation source module: used to output gradient detection excitation signal and simulate steady-state / dynamic disturbance electrical signal of power grid to the primary main circuit of the circuit breaker; Secondary digital simulation and communication module: Supports multiple industrial communication protocols for bidirectional data interaction with the circuit breaker intelligent control terminal, and has hardware timestamp recording function; Multimodal synchronous acquisition module: includes a high-speed analog signal acquisition unit, a digital signal isolation input unit and a mechanical characteristic sensor interface. All acquisition channels share the same time base and are used to synchronously acquire various detection data in steps S2, S3 and S4. Fusion Detection Control and Evaluation Module: Used to control the detection process from S1 to S6, performing timing alignment fusion, deviation calculation, fault classification and location, and comprehensive performance rating; Human-computer interaction and report generation module: used to generate standardized test reports carrying unique time-series traceability codes.

[0016] The beneficial effects of this invention are: 1. This invention utilizes an FPGA-based multi-source event unified timestamp capture circuit, combined with a high-precision clock synchronization protocol, to synchronously capture the fault initiation time, protection message reception time, and actual main contact disconnection time with microsecond-level precision. Furthermore, by pre-measuring and compensating for the inherent hardware delays of each signal channel, the relative error of the key event timestamps is ensured to be extremely small. Based on this, the invention decomposes the total delay from fault occurrence to circuit breaker disconnection into two parts: protection judgment delay and inherent mechanical action delay. These are compared with the protection setting value and the mechanical tripping standard value, respectively, to construct a time synchronization deviation index. This index directly reflects the qualification of the primary and secondary coordinated actions: when the index is below a set threshold, it is considered qualified; otherwise, based on the contribution of each deviation, it accurately locates whether the out-of-tolerance element originates from an abnormal protection delay on the secondary side or from mechanical jamming on the primary side. This method effectively solves the technical problem that traditional detection methods cannot quantitatively evaluate the primary and secondary coordinated performance and cannot distinguish the root cause of faults, providing a reliable basis for the objective evaluation of the degree of primary and secondary integration of circuit breakers.

[0017] 2. This invention executes primary circuit high-current detection and secondary sampling circuit verification in parallel under unified timing control. During the continuous output of the primary high current, the sampling accuracy and anti-interference stability of the secondary circuit are simultaneously verified. On the one hand, by applying standard current signals at multiple levels to the primary side and reading the sampling values ​​reported by the intelligent control terminal, the sampling accuracy deviation is calculated to achieve full-range sampling error verification. On the other hand, during the primary high-current output, the fluctuation of the sensor's sampling values ​​is continuously monitored to calculate the anti-interference stability index, which is used to quantitatively evaluate the sensor's sampling stability under strong electromagnetic interference. This parallel detection design can realistically simulate the interference conditions of the electromagnetic field generated by the primary high current on the built-in electronic sensor, effectively exposing hidden defects such as poor shielding grounding and analog-to-digital converter drift that cannot be detected by traditional discrete testing methods, filling the gap in the quantitative evaluation of the secondary circuit's anti-interference capability in existing detection technologies. Attached Figure Description

[0018] The invention will now be further described with reference to the accompanying drawings.

[0019] Figure 1 This is a partial flowchart of the detection method for primary and secondary integrated pole-mounted circuit breakers provided by the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Please see Figure 1 As shown, a detection method for a primary and secondary integrated pole-mounted circuit breaker includes the following steps: S1. Establish an electrical connection and communication link between the detection system and the primary and secondary integrated pole-mounted circuit breaker to complete the timing clock calibration of multiple devices; S2. Based on the unified synchronous timing, a detection excitation signal is applied to the primary circuit, the electrical parameters and mechanical characteristic parameters of the primary circuit are collected synchronously, and the first quantitative index for evaluating the coordination time performance between electrical quantities and mechanical quantities in the primary circuit is calculated. The first quantitative indicator in S2 is the time synchronization deviation index. The method of obtaining it is as follows: Record the fault initiation time using a globally unified time base. Protect message reception time Main contact breaking time The total delay of the first and second coordinated actions is calculated using the following formula. Decompose it into protection judgment delay and the inherent operating delay of the circuit breaker ; The mathematical model for the time synchronization deviation index is constructed as follows: ; In the formula, The delay is set to protect the set value. This is the standard value for the inherent opening time of the circuit breaker. and This is the allowable deviation threshold; when If the time is less than 1, the coordination time is considered acceptable; otherwise, it is considered unacceptable, and the out-of-tolerance link is identified as an abnormal protection delay or mechanical jamming.

[0022] The fault start time Protect message reception time Main contact breaking time The capture employs an FPGA-based multi-source event unified timestamp capture circuit, with a time synchronization error between channels ≤ ±10μs, and utilizes pre-measured hardware channel delays. Compensation will be provided. ,in, The actual time of the event after compensation. To capture the original timestamp captured by the capture circuit, The inherent hardware transmission delay of the i-th signal channel, =0,1,2, which are channel numbers, corresponding to different event types.

[0023] The core purpose of the primary circuit synchronization performance test in step S2 above is to quantitatively evaluate the time coordination performance of the circuit breaker from the occurrence of a fault to the actual disconnection of the main contacts after receiving a protection trip command. Specifically, this includes: Protection judgment delay Whether it matches the set value; inherent operating delay of the circuit breaker Does it conform to mechanical design standards; total delay of primary and secondary coordination Does it meet the system reliability requirements?

[0024] Three key moments record the fault initiation time Protect message reception time Main contact breaking time The capture method is as follows: time (Time of fault onset) Data acquisition channel: primary side current transformer output → high-speed comparator (threshold set to 1.2 times the rated current, i.e. 756A) Triggering condition: When the instantaneous current value exceeds the threshold, the comparator outputs a rising edge pulse; FPGA Action: Capture the rising edge, record the current global timer count value, and mark it as... ; time (Time when the trip message was sent) Acquisition Channel: MII interface of Ethernet PHY chip → RX_DV signal Triggering condition: When the FTU under test sends a GOOSE trip message, the PHY chip pulls the RX_DV signal high; FPGA Action: Capture the rising edge of RX_DV and record the timestamp. And associate the timestamp with the message ID of the message; time (The moment the main contact breaks) Data acquisition channel: Circuit breaker auxiliary contact → Optocoupler isolation → Schmitt trigger profiler → FPGA digital input pin; Triggering condition: The auxiliary contact changes from a closed state to an open state (falling edge or rising edge depends on the wiring definition); FPGA Action: Capture contact shift edge and record timestamp ; Because the three signal paths have different hardware delays (comparator delay approximately 200ns, optocoupler delay approximately 5μs), the system measures the inherent delay of each channel using an internal calibration signal during initialization. And compensate according to the following formula: After compensation, the relative error between the three timestamps can be controlled within ±10μs.

[0025] Through the above technical solution, based on a unified high-precision timing reference, a preset fault current waveform is applied to the main circuit of the circuit breaker through a programmable fault simulation source. At the same time, a multi-source event unified timestamp capture circuit based on FPGA synchronously records three key moments—the fault initiation moment (…). Triggered by current exceeding threshold), GOOSE trip message reception time ( Triggered by the rising edge of the RX_DV signal at the PHY chip MII interface and the actual breaking time of the main contact ( (Triggered by auxiliary contact displacement), and a high-precision timestamp is obtained after hardware delay compensation. Based on this, the protection judgment delay is calculated. and the inherent operating delay of the circuit breaker Further introduce the time synchronization deviation index A quantitative evaluation of the time performance of primary and secondary coordination is performed. When... If the value is less than 1, the coordination performance is deemed qualified; otherwise, the out-of-tolerance link is located based on the contribution of each deviation, indicating abnormal protection delay or mechanical jamming, thereby achieving time coordination assessment of the entire process from fault occurrence to contact disconnection.

[0026] S3. In parallel with the primary circuit detection timing, a simulated power grid disturbance signal is applied to the secondary sampling circuit to collect the sampling data of the secondary circuit and calculate the second quantitative index used to evaluate the sampling accuracy deviation and anti-interference capability of the secondary circuit. The second quantization index in S3 includes sampling accuracy deviation and anti-interference stability index. The sampling accuracy deviation is obtained by applying multiple levels of standard signals to the primary side and reading the sampled values ​​reported by the intelligent control terminal, and is calculated according to the following formula: ,in, The current value obtained by sampling the device under test is read from the FTU through the secondary communication interface; The standard current value is the known current precisely output from the primary side of the detection system. This is due to sampling accuracy deviation; Calculate the sampling accuracy deviation for each gear position. If the sampling accuracy deviation for any gear position exceeds the limit, the sampling accuracy is deemed unqualified.

[0027] The second quantification index in S3 includes sampling accuracy deviation and anti-interference stability index, wherein the anti-interference stability index is calculated according to the following formula: ,in, The standard deviation of the sensor sampling values ​​during a single high-current output period. The average of the sampled values; As an anti-interference stability index, when If the threshold is exceeded, the anti-interference performance is deemed unqualified.

[0028] The core purpose of the above step S3, secondary circuit linkage verification and testing, is to quantitatively evaluate the measurement accuracy and stability of the built-in electronic sensor (CT / PT) under normal operating conditions and strong electromagnetic interference environments. Specifically, this includes: Does the sampling accuracy deviation (ratio difference, angle difference) meet the 0.5S or Class 1 accuracy requirement? Anti-interference stability Is it within the permitted range?

[0029] S3 and S2 execute in parallel under unified timing control, meaning that while a large current is being output, the accuracy of the secondary sampling circuit is being verified. The physical significance of this design is to simulate the interference of the electromagnetic field generated by the strong current under real-world operating conditions on the secondary electronic sensor, which is something that traditional discrete testing cannot achieve.

[0030] Through the above technical solution, the high-current output in step S2 is executed in parallel. A programmable fault simulation source applies simulated grid steady-state and dynamic disturbance signals to the secondary sampling circuit, simultaneously acquiring secondary voltage, current, and power sampling data, as well as remote signaling and telemetry status quantities. The detection includes two core dimensions: first, sampling accuracy deviation verification. Multiple standard current / voltage signals (10%In, 20%In, 50%In, 100%In, 120%In) are applied to the primary side. Sensor sampling values ​​reported by the intelligent control terminal are read through the secondary communication interface, and the ratio difference is calculated using the following formula. The sampling accuracy is deemed unqualified if the angle difference exceeds the limit at any setting; secondly, the anti-interference performance is verified by continuously monitoring the fluctuation of the sensor's sampled values ​​during a single high-current output (≥2s) and calculating the anti-interference stability index. ( The standard deviation of the sensor sampling values ​​during a single high-current output period. (mean of the sampled values), when If the interference exceeds a preset threshold (preferably 0.5%), the anti-interference performance is deemed unqualified. This parallel testing design can realistically simulate the interference conditions of a strong electromagnetic field on a secondary electronic sensor, effectively discovering hidden defects such as poor shielding grounding and ADC drift that cannot be exposed by traditional discrete testing.

[0031] S4. Send control commands and protection trigger commands to the intelligent control terminal, collect the terminal's response parameters, and verify the validity of the terminal's control logic and protection logic. In step S4 above, the intelligent terminal (FTU / intelligent control terminal) is the brain of the primary and secondary integrated circuit breaker, responsible for: real-time acquisition of voltage and current data and protection logic judgment; receiving remote commands and executing opening and closing operations; recording fault events and communicating with the master station.

[0032] The core purpose of S4 is to quantify and verify the accuracy, timeliness, and data integrity of the intelligent terminal's response after receiving various instructions / fault signals, and to ensure the effectiveness of its control and protection logic.

[0033] S5. The data collected in S2, S3 and S4 are time-series aligned and fused to construct a multi-dimensional feature vector, and a third quantitative indicator for evaluating the overall health status of the equipment is calculated based on the information fusion theory. The third quantitative indicator in S5 is based on the fusion state index of information entropy, and its specific calculation process is as follows: The primary mechanical and electrical data, secondary sampling and verification data, and intelligent terminal operation data collected by S2, S3, and S4 are time-series aligned and fused to construct a system containing... , , and Including eigenvectors ; For feature vectors Each component in Calculate its probability density that deviates from the normal distribution. The normal distribution is determined based on historical test data of the same model of equipment or the factory standard. Constructing a fusion state index The computational model is expressed as follows: ; For each feature parameter It is necessary to know the probability distribution of its health status. This invention provides the following three methods for determination: Method A (Batch Statistical Method): Conduct a full inspection test on no fewer than 30 healthy circuit breakers of the same model, and statistically analyze the mean values ​​of each characteristic. and standard deviation .

[0034] Method B (Standard Conversion Method): Based on the tolerance range specified in the manufacturer's standard, assuming a normal distribution, the tolerance half-width is taken as 3. , reverse reasoning ; Method C (Longitudinal Self-Comparison Method): Based on the previous N (N≥3) historical test data of the device, calculate its own historical mean and standard deviation for trend monitoring.

[0035] Then according to the formula Calculate the probability density that deviates from the normal distribution. .

[0036] when Below the corresponding threshold The system determines that the overall health status of the equipment requires maintenance and outputs the corresponding characteristic components. The contribution ranking is used for fault location.

[0037] The fusion state index Corresponding threshold Calculate dynamically using the following formula: ,in, The average of the same model of historical health equipment value, Its standard deviation, This is the preset sensitivity coefficient.

[0038] S2, S3, and S4 tested the circuit breaker from three dimensions: primary mechanical and electrical aspects, secondary sampling accuracy and anti-interference, and intelligent terminal control logic, respectively. However, passing a single dimension does not guarantee the overall reliability of the equipment: each indicator may barely pass, but multiple indicators may be in a critical state simultaneously, resulting in a high overall risk of failure. There may also be inherent correlations between different indicators (e.g., decreased sensor accuracy may lead to deviations in protection delay calculations). Therefore, a fusion evaluation method that can integrate multiple heterogeneous indicators is needed.

[0039] The core purpose of S5 is to perform time-series alignment and feature fusion of multi-source, multi-dimensional, and heterogeneous data collected by S2, S3, and S4, calculate the overall health status index of the equipment through information entropy theory, and output interpretable fault location results.

[0040] The above technical solution integrates the primary mechanical and electrical data, secondary sampling and verification data, and intelligent terminal operation data collected in steps S2, S3, and S4 through time-series alignment and fusion, constructing a system that includes protection judgment delay. Mechanical motion delay Synchronization Deviation Index Maximum ratio difference Anti-interference stability An eight-dimensional feature vector F is generated, including instruction response delay, protection delay deviation, and event log integrity. Based on this, the fusion state index is calculated using information entropy theory. ,in For the first The probability density of a feature parameter deviating from its normal distribution (the normal distribution can be determined through batch statistics, standard conversion, or longitudinal self-comparison). This is achieved through dynamic thresholding. ( For the same model of historical health equipment value, Its standard deviation, A comprehensive judgment is made based on the sensitivity coefficient: when ≥ When healthy, -A≤H< Attention is being paid attention to, H < -A indicates a maintenance-required state, where A is the anti-interference stability threshold. The method also outputs a ranking of the contribution of each feature to accurately pinpoint the fault dimension. This approach can identify the overall risk accumulated when multiple indicators are simultaneously in a critical state, achieving a leap from single-item compliance judgment to overall health assessment.

[0041] S6. Integrate test data and diagnostic results to generate a test report carrying a unique time-series traceability code.

[0042] In step S1, the multi-device timing clock calibration adopts the GPS or IEEE 1588 PTP protocol to ensure that the clock deviation between each module of the detection system and the intelligent control terminal of the circuit breaker under test is ≤±1μs. In steps S2 and S4, the primary circuit detection and the intelligent terminal linkage detection are executed in parallel under unified timing control, realizing real-time collaborative testing of primary high current excitation and secondary protection logic response. In step S4, the protection action message is received using the IEC 61850 GOOSE protocol, and the detection system records a hardware timestamp via the FPGA when receiving Ethernet frames at the physical layer, ensuring the protection action time is accurate. It is not affected by network protocol stack latency jitter.

[0043] A primary and secondary integrated pole-mounted circuit breaker detection system includes: One-time programmable fault simulation source module: used to output gradient detection excitation signal and simulate steady-state / dynamic disturbance electrical signal of power grid to the primary main circuit of the circuit breaker; Secondary digital simulation and communication module: Supports multiple industrial communication protocols for bidirectional data interaction with the circuit breaker intelligent control terminal, and has hardware timestamp recording function; Multimodal synchronous acquisition module: includes a high-speed analog signal acquisition unit, a digital signal isolation input unit and a mechanical characteristic sensor interface. All acquisition channels share the same time base and are used to synchronously acquire various detection data in steps S2, S3 and S4. Fusion Detection Control and Evaluation Module: Used to control the detection process from S1 to S6, performing timing alignment fusion, deviation calculation, fault classification and location, and comprehensive performance rating; Human-computer interaction and report generation module: used to generate standardized test reports carrying unique time-series traceability codes.

[0044] In summary, the working principle of this invention is as follows: First, through S1 device docking and timing initialization, an electrical connection and bidirectional communication link are established between the detection system and the primary main circuit of the circuit breaker, the secondary sampling interface, and the intelligent control terminal. Multi-device microsecond-level clock synchronization is achieved using GPS or the IEEE 1588 PTP protocol, laying the foundation for subsequent high-precision timing measurements. S2 primary circuit synchronization performance detection is based on a unified timing reference. A preset fault current waveform is applied to the primary main circuit, and the fault start time is synchronously recorded by the FPGA multi-source event capture circuit. GOOSE trip message reception time and the moment when the main contact breaks After hardware delay compensation, the protection judgment delay is calculated. Delay of mechanical motion And introduce a time synchronization deviation index Quantitative evaluation of primary and secondary circuit coordination performance. S3 secondary circuit linkage verification and testing is executed in parallel with S2, simultaneously performing sampling accuracy verification (multi-level standard signal ratio calculation) and anti-interference performance verification (calculating anti-interference stability index, realistically simulating strong electromagnetic field interference conditions on built-in electronic sensors) during primary high current output. S4 intelligent terminal linkage function testing comprehensively verifies the effectiveness of terminal control and protection logic by issuing remote opening and closing commands, overload and short-circuit protection trigger commands, collecting command response delay, protection action accuracy, and fault event record completeness. S5 multi-time-series data fusion diagnosis aligns the time sequence of electrical, mechanical, communication, and sensor data collected from S2-S4, constructs an eight-dimensional feature vector, and calculates the fusion state index based on information entropy theory. And through dynamic thresholds The method performs a health status classification and outputs a ranking of the contributions of each feature to achieve precise localization. Finally, S6 generates a standardized detection report with a unique temporal traceability code, completing the fully automated operation. This method integrates primary physical action, secondary signal response, and terminal control logic into a unified temporal framework, achieving a technological leap from single-indicator qualification judgment to overall health status fusion assessment, significantly improving detection efficiency and fault identification capabilities.

[0045] The formulas in this application (including but not limited to the time synchronization deviation index) Anti-interference stability index The fusion state index H and its related sub-items are calculated using numerical methods after dimensionless normalization of each physical quantity. Their specific functional forms and parameter configurations are obtained through extensive measured data collection and software simulation and regression fitting, aiming to approximate the dynamic relationships under real-world operating conditions. Various thresholds mentioned in this paper (such as the allowable deviation threshold, the anti-interference stability judgment threshold A, and the sensitivity coefficient in the dynamic threshold of the fusion state index) The values ​​(etc.) and weighting coefficients are optimal empirical values ​​or preferred examples determined based on typical operating conditions and historical statistical results. In practical applications, the specific form of the above formulas and the specific values ​​of each empirical parameter can be adaptively adjusted and set by those skilled in the art according to the model of the tested equipment, operating environment, accuracy level requirements, or business needs. Such adjustments do not depart from the essential technical content of this invention and still fall within the protection scope of this invention.

[0046] The foregoing has provided a detailed description of one embodiment of the present invention, but this description is merely a preferred embodiment and should not be construed as limiting the scope of the invention. All equivalent variations and modifications made within the scope of the claims of this invention should still fall within the patent coverage of this invention.

Claims

1. A method for detecting a primary and secondary integrated pole-mounted circuit breaker, characterized in that, The method includes the following steps: S1. Establish an electrical connection and communication link between the detection system and the primary and secondary integrated pole-mounted circuit breaker to complete the timing clock calibration of multiple devices; S2. Based on the unified synchronous timing, a detection excitation signal is applied to the primary circuit, the electrical parameters and mechanical characteristic parameters of the primary circuit are collected synchronously, and the first quantitative index for evaluating the coordination time performance between electrical quantities and mechanical quantities in the primary circuit is calculated. S3. In parallel with the primary circuit detection timing, apply a simulated power grid disturbance signal to the secondary sampling circuit, collect the sampling data of the secondary circuit, and calculate the second quantitative index used to evaluate the sampling accuracy deviation and anti-interference capability of the secondary circuit. S4. Send control commands and protection trigger commands to the intelligent control terminal, collect the terminal's response parameters, and verify the validity of the terminal's control logic and protection logic. S5. The data collected in S2, S3 and S4 are time-series aligned and fused to construct a multi-dimensional feature vector, and a third quantitative indicator for evaluating the overall health status of the equipment is calculated based on the information fusion theory. S6. Integrate test data and diagnostic results to generate a test report carrying a unique time-series traceability code.

2. The detection method for a primary and secondary integrated pole-mounted circuit breaker according to claim 1, characterized in that, The first quantitative indicator in S2 is the time synchronization deviation index. The method of obtaining it is as follows: Record the fault initiation time using a globally unified time base. Protect message reception time Main contact breaking time The total delay of the first and second coordinated actions is calculated using the following formula. Decompose it into protection judgment delay and the inherent operating delay of the circuit breaker ; The mathematical model for the time synchronization deviation index is constructed as follows: ； In the formula, The delay is set to protect the set value. This is the standard value for the inherent opening time of the circuit breaker. and This is the allowable deviation threshold; when If the time is less than 1, the coordination time is considered acceptable; otherwise, it is considered unacceptable, and the out-of-tolerance link is identified as an abnormal protection delay or mechanical jamming.

3. The detection method for a primary and secondary integrated pole-mounted circuit breaker according to claim 2, characterized in that, The fault start time Protect message reception time Main contact breaking time The capture employs an FPGA-based multi-source event unified timestamp capture circuit, with a time synchronization error between channels ≤ ±10μs, and utilizes pre-measured hardware channel delays. Provide compensation: ,in, The actual time of the event after compensation. To capture the original timestamp captured by the capture circuit, The inherent hardware transmission delay of the i-th signal channel, =0,1,2, which are channel numbers, corresponding to different event types.

4. The detection method for a primary and secondary integrated pole-mounted circuit breaker according to claim 1, characterized in that, The second quantization index in S3 includes sampling accuracy deviation and anti-interference stability index. The sampling accuracy deviation is obtained by applying multiple levels of standard signals to the primary side and reading the sampled values ​​reported by the intelligent control terminal, and is calculated according to the following formula: ,in, The current value obtained by sampling the device under test is read from the FTU through the secondary communication interface; The standard current value is the known current precisely output from the primary side of the detection system. This is due to sampling accuracy deviation; Calculate the sampling accuracy deviation for each gear position. If the sampling accuracy deviation for any gear position exceeds the limit, the sampling accuracy is deemed unqualified.

5. The detection method for a primary and secondary integrated pole-mounted circuit breaker according to claim 4, characterized in that, The second quantification index in S3 includes sampling accuracy deviation and anti-interference stability index, wherein the anti-interference stability index is calculated according to the following formula: ,in, The standard deviation of the sensor sampling values ​​during a single high-current output period. The average of the sampled values; As an anti-interference stability index, when If the threshold is exceeded, the anti-interference performance is deemed unqualified.

6. The detection method for a primary and secondary integrated pole-mounted circuit breaker according to claim 1, characterized in that, The third quantitative indicator in S5 is based on the fusion state index of information entropy, and its specific calculation process is as follows: The primary mechanical and electrical data, secondary sampling and verification data, and intelligent terminal operation data collected by S2, S3, and S4 are time-series aligned and fused to construct a system containing... , , and Including eigenvectors ; For feature vectors Each component in Calculate its probability density that deviates from the normal distribution. The normal distribution is determined based on historical test data of the same model of equipment or the factory standard. Constructing a fusion state index The computational model is expressed as follows: ; when Below the corresponding threshold The system determines that the overall health status of the equipment requires maintenance and outputs the corresponding characteristic components. The contribution ranking is used for fault location.

7. The detection method for a primary and secondary integrated pole-mounted circuit breaker according to claim 6, characterized in that, The fusion state index Corresponding threshold Calculate dynamically using the following formula: ,in, The average of the same model of historical health equipment value, Its standard deviation, This is the preset sensitivity coefficient.

8. The detection method for a primary and secondary integrated pole-mounted circuit breaker according to claim 1, characterized in that, In step S1, the multi-device timing clock calibration adopts the GPS or IEEE 1588 PTP protocol to ensure that the clock deviation between each module of the detection system and the intelligent control terminal of the circuit breaker under test is ≤±1μs. In steps S2 and S4, the primary circuit detection and the intelligent terminal linkage detection are executed in parallel under unified timing control, realizing real-time collaborative testing of primary high current excitation and secondary protection logic response. In step S4, the protection action message is received using the IEC 61850 GOOSE protocol, and the detection system records a hardware timestamp via the FPGA when receiving Ethernet frames at the physical layer, ensuring the protection action time is accurate. It is not affected by network protocol stack latency jitter.

9. A primary and secondary fusion pole-mounted circuit breaker detection system for implementing the method of any one of claims 1 to 8, characterized in that, include: One-time programmable fault simulation source module: used to output gradient detection excitation signal and simulate steady-state / dynamic disturbance electrical signal of power grid to the primary main circuit of the circuit breaker; Secondary digital simulation and communication module: Supports multiple industrial communication protocols for bidirectional data interaction with the circuit breaker intelligent control terminal, and has hardware timestamp recording function; Multimodal synchronous acquisition module: includes a high-speed analog signal acquisition unit, a digital signal isolation input unit and a mechanical characteristic sensor interface. All acquisition channels share the same time base and are used to synchronously acquire various detection data in steps S2, S3 and S4. Fusion Detection Control and Evaluation Module: Used to control the detection process from S1 to S6, performing timing alignment fusion, deviation calculation, fault classification and location, and comprehensive performance rating; Human-computer interaction and report generation module: used to generate standardized test reports carrying unique time-series traceability codes.

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