Perovskite solar cell testing methods

Abstract

This invention relates to the field of perovskite solar cell technology and discloses a testing method for perovskite solar cells. The method includes: applying DC background illumination from a global large-area light source; applying a DC bias step sequence to the source measurement unit; executing an ion relaxation waiting process during the initial stage of the voltage plateau period, experiencing a preset relaxation time; the controller driving the light-emitting unit to send a sinusoidal light intensity modulation signal with mutually non-harmonic frequencies; the test system extracting phase parameters and calculating a phase difference sequence; calculating the partial derivative matrix elements of the phase difference with respect to the DC bias to locate the target frequency domain component; and calculating the series resistance and parallel resistance based on the target frequency domain component. This invention eliminates double-layer capacitance time lag interference through a preset relaxation time, suppresses frequency domain crosstalk through non-harmonic frequency modulation, and identifies partial derivative matrix elements below a preset threshold to locate the pure ohmic connection state, thereby eliminating nonlinear ion capacitance interference and calculating the measured values, reflecting the internal connection and isolation state.

Description

Technical Field

[0001] This invention relates to the field of perovskite battery technology, specifically to a perovskite battery testing method. Background Technology

[0002] Perovskite solar cell modules consist of multiple sub-cells connected in series. When evaluating the performance of a perovskite solar cell module, it is necessary to measure the series resistance and parallel resistance between adjacent sub-cells to determine the connection resistance and isolation state of the sub-cells.

[0003] In conventional impedance measurements or local perturbation tests, it is necessary to change the DC bias voltage applied across the perovskite solar cell module. Perovskite materials have soft lattice properties, and changes in the DC bias voltage induce ion migration within the module. These ions redistribute under the influence of an electric field, forming an electric double-layer capacitance. This ion redistribution process has a time lag, leading to a nonlinear capacitive response and causing a shift in the current signal in the measurement loop. Simultaneously, when modulating the light intensity of adjacent sub-cells to extract AC response signals, existing techniques struggle to independently decouple the response data of adjacent regions within the mixed transmission channel. Due to the nonlinear response characteristics of the material, local modulation signals easily generate and overlap high-order harmonics in the frequency domain, causing spectral leakage and harmonic crosstalk, resulting in distortion of the extracted phase parameters and amplitude data. Because of the superposition of nonlinear ion capacitance interference and frequency domain signal crosstalk, conventional testing methods cannot locate the pure ohmic connection state from the mixed electrical response, nor can they isolate the impedance crosstalk caused by the capacitive effect, leading to deviations in the final calculated series and parallel resistance measurements from the actual connection state.

[0004] Therefore, this invention proposes a perovskite solar cell testing method to address the shortcomings of existing technologies. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a perovskite battery testing method that solves the problem of nonlinear ionic capacitance interference caused by DC bias changes and frequency domain crosstalk of local modulation signals, which leads to deviations in the measured values ​​of series and parallel resistances from the connection state.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] The first aspect of this invention provides a perovskite solar cell testing method. This method is based on a testing system and a perovskite solar cell module, wherein the testing system is connected to the total output terminal of the perovskite solar cell module, and the perovskite solar cell module includes multiple sub-cells connected in series. The perovskite solar cell testing method includes the following steps: S1. A global large-area light source applies a constant intensity DC background illumination to multiple sub-cells; the source measurement unit applies a DC bias step sequence to the total output terminal, the DC bias step sequence having multiple consecutive voltage plateau periods; the controller drives the first light-emitting unit to send a first sinusoidal light intensity modulation signal with a first modulation frequency to the first target sub-cell to inject a first AC photocurrent, and simultaneously drives the second light-emitting unit to send a second sinusoidal light intensity modulation signal with a second modulation frequency to the second target sub-cell to inject a second AC photocurrent, the first modulation frequency and the second modulation frequency being non-harmonic frequencies of each other; the data acquisition card performs timing sampling on the total output terminal to obtain the total current timing signal; S2. At the beginning of the voltage plateau period, the test system executes the ion relaxation waiting process. The controller keeps the light-emitting diode array in the off state for a preset relaxation time. The preset relaxation time matches the time parameter when the ion distribution state inside the perovskite cell module reaches a steady state. When the preset relaxation time ends, the controller sends a synchronous trigger command to the first light-emitting unit and the second light-emitting unit, driving the first light-emitting unit to send a first sinusoidal light intensity modulation signal and synchronously driving the second light-emitting unit to send a second sinusoidal light intensity modulation signal. S3. The data acquisition card records the current change data at the total output terminal to form a total current time-series signal. The test system performs a fast Fourier transform on the total current time-series signal, converting it to the frequency domain and decomposing it into frequency domain component data. The test system extracts the first complex current response at the position corresponding to the first modulation frequency, and analyzes to obtain the first phase parameter and the amplitude of the first complex current response. The test system extracts the second complex current response at the position corresponding to the second modulation frequency, and analyzes to obtain the second phase parameter and the amplitude of the second complex current response. S4. The test system extracts the values ​​of the first phase parameter and the second phase parameter, calculates the mathematical difference between the first phase parameter and the second phase parameter to form the phase difference value, integrates all phase difference values ​​corresponding to different DC bias voltages to generate a phase difference value sequence, and calculates the partial derivative of the phase difference value with respect to the DC bias voltage to form the partial derivative matrix elements. S5. The test system compares the absolute values ​​of the partial derivative matrix elements with a preset threshold to find partial derivative matrix elements whose absolute values ​​are lower than the preset threshold, and extracts the corresponding frequency domain data to define them as target frequency domain components. The test system combines the first complex current response amplitude and the second complex current response amplitude corresponding to the target frequency domain components with the equivalent external impedance to calculate the series resistance between the first target sub-battery and the second target sub-battery. The test system combines the voltage step between adjacent DC biases with the change in the amplitude of the first complex current response to calculate the parallel resistance between the first target sub-battery and the second target sub-battery.

[0008] A second aspect of the present invention provides a testing system for performing the perovskite solar cell testing method provided in the first aspect of the present invention. The testing system includes: A global large-area light source applies constant intensity DC background illumination to multiple sub-cells; A light-emitting diode array, comprising a first light-emitting unit aligned with a first target sub-cell and a second light-emitting unit aligned with a second target sub-cell; The source measurement unit is connected to the total output terminal and applies a DC bias step sequence to the total output terminal. The data acquisition card is connected to the total output terminal and performs timing sampling at the total output terminal to acquire the total current timing signal. The control module connects the global large-area light source, the LED array, the source measurement unit and the data acquisition card. At the beginning of the voltage plateau period, the control module executes the ion relaxation waiting process, sends a shutdown command to the LED array, and after a preset relaxation time, the control module sends a synchronous trigger command to the LED array at the end of the preset relaxation time to drive the first light-emitting unit to send the first sinusoidal light intensity modulation signal and synchronously drive the second light-emitting unit to send the second sinusoidal light intensity modulation signal. The signal acquisition module connects to the data acquisition card to receive the current change signal from the total output terminal and outputs the total current timing signal. The signal transformation module performs a fast Fourier transform on the total current time-series signal to convert it to the frequency domain space to extract the first complex current response and the second complex current response, separates the real part data and the imaginary part data, and calculates the first phase parameter, the amplitude of the first complex current response, the second phase parameter, and the amplitude of the second complex current response. The data parsing module calculates the mathematical difference between the first phase parameter and the second phase parameter to generate a phase difference sequence, calculates the partial derivative of the phase difference with respect to the DC bias to generate partial derivative matrix elements, and compares the absolute value of the partial derivative matrix elements with a preset threshold to filter out partial derivative matrix elements whose absolute value is lower than the preset threshold to locate the target frequency domain component. The impedance calculation module receives the amplitude of the first complex current response, the amplitude of the second complex current response, and the voltage step, and calculates the series resistance and parallel resistance between the first target sub-cell and the second target sub-cell.

[0009] This invention introduces a preset relaxation time and a dual-frequency non-harmonic modulation mechanism into the testing process. When a change in DC bias causes a change in the steady-state electric field inside the perovskite solar cell module, the process of redistribution of perovskite material ions to form an electric double-layer capacitor has a time lag. The preset relaxation time matches the time parameter for the ion distribution state to reach a steady state, avoiding interference from the dynamic capacitance response generated during ion migration. Simultaneously, the first and second modulation frequencies are non-harmonic frequencies, suppressing spectral leakage and crosstalk between the first and second complex current responses in the frequency domain. The testing system performs partial derivative operations on the phase difference sequence to generate partial derivative matrix elements, searching for partial derivative matrix elements with absolute values ​​below a preset threshold. This locates the pure ohmic connection state that eliminates nonlinear ion capacitance interference, reduces impedance crosstalk from the capacitance effect, extracts the target frequency domain component corresponding to the pure resistance characteristic, and then calculates the series and parallel resistances based on the target frequency domain components, reflecting the internal connection resistance state and the sub-cell isolation state.

[0010] This invention provides a testing method for perovskite solar cells. It has the following beneficial effects: 1. This invention maintains the LED array in a pre-set relaxation time by performing an ion relaxation waiting process at the beginning of the voltage plateau period. The pre-set relaxation time matches the time parameter for the ion distribution state inside the perovskite solar cell module to reach a steady state, eliminating the time lag interference caused by changes in DC bias voltage in the double-layer capacitance process, and avoiding the impact of nonlinear capacitance response on the accuracy of current measurement.

[0011] 2. This invention drives a first light-emitting unit to send a first sinusoidal light intensity modulation signal with a first modulation frequency, and simultaneously drives a second light-emitting unit to send a second sinusoidal light intensity modulation signal with a second modulation frequency. The first and second modulation frequencies are set to be harmonic frequencies. This setting of harmonic frequencies avoids overlap between the fundamental frequency signal and harmonics, suppresses spectral leakage and harmonic crosstalk in the frequency domain between the first and second complex current responses, and ensures the accuracy of independently extracting the first and second phase parameters from the frequency domain component data.

[0012] 3. This invention generates a phase difference sequence by calculating the mathematical difference between the first and second phase parameters, and generates partial derivative matrix elements by combining the partial derivatives calculated with DC bias. The testing system compares the absolute values ​​of the partial derivative matrix elements with a preset threshold to find partial derivative matrix elements below the preset threshold to locate the target frequency domain component, locate the pure ohmic connection state to eliminate nonlinear ionic capacitor interference, reduce impedance crosstalk caused by capacitor effect, and calculate the series resistance and parallel resistance based on the target frequency domain component to reflect the internal connection resistance state and the sub-cell isolation blocking state. Attached Figure Description

[0013] Figure 1 This is a flowchart of the method of the present invention; Figure 2 This is a system framework diagram of the present invention; Figure 3 The graph shows a comparison of the series resistance obtained by the conventional method and the method of the present invention under different DC bias voltages in a specific application embodiment of the present invention. Detailed Implementation

[0014] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0015] See attached document Figure 1 This invention provides a testing method for perovskite solar cells. This method is based on a testing system and a perovskite solar cell module, wherein the testing system is connected to the total output terminal of the perovskite solar cell module. The perovskite solar cell module includes multiple sub-cells connected in series. The perovskite solar cell testing method includes the following steps: S1. As a preferred embodiment, the testing system includes a global large-area light source positioned on the light-receiving surface of the perovskite solar cell module. In operation, the global large-area light source applies a constant-intensity DC background illumination to the multiple sub-cells within the perovskite solar cell module. This DC background illumination is used to excite photogenerated carriers in the multiple sub-cells. This DC background illumination reduces the dynamic bulk resistance of the multiple sub-cells, thereby facilitating the construction of a low-impedance transport channel within the perovskite solar cell module after the dynamic bulk resistance is reduced. It should be noted that the emission wavelength of the global large-area light source is preferably a broad-spectrum light source covering the absorption bandgap of the perovskite solar cell module (e.g., an AM1.5G standard solar spectrum simulation light source) to ensure uniform excitation of photogenerated carriers within the perovskite active layer.

[0016] For the internal circuit structure of a global large-area light source, those skilled in the art can use a constant current source driving circuit. The constant current source driving circuit is a well-known technology in this field and will not be described in detail here.

[0017] In addition, the testing system includes a light-emitting diode (LED) array, which comprises multiple independent light-emitting units, each aligned with one of the multiple sub-cells within the perovskite solar cell module. In actual operation, the testing system controls the LED array to be superimposed on the illumination path of a global large-area light source for local perturbation testing. At this time, the global large-area light source is in normally-on mode, continuously providing DC background illumination, and the illumination range covers the total area of ​​the perovskite solar cell module. In this embodiment, the wavelength of the narrowband monochromatic light emitted by the LED array also needs to be set to be smaller than the cutoff wavelength corresponding to the bandgap of the perovskite material, so that the optical signal can be converted into an electrical signal response.

[0018] For spatial mechanical alignment devices for light-emitting diode arrays, those skilled in the art can use multi-axis moving platforms for position adjustment. Multi-axis moving platform control is a well-known technology in the field and will not be described in detail here.

[0019] To control the electrical boundaries, the test system also includes a source measurement unit. The source measurement unit is connected to the total output terminal and applies a bias voltage to it. This allows the test system to acquire the current data from the total output terminal through the source measurement unit. It should be noted that the DC background illumination provided by the global large-area light source maintains the sub-cells in the non-test area (i.e., the sub-cell area not receiving light intensity modulation from the light-emitting unit) in a low dynamic volume resistance state. This low dynamic volume resistance state helps avoid attenuation of the local test current signal in the transmission link of the non-test area, thus enabling the test system to acquire end-side signals based on the transmission channel.

[0020] See attached document Figure 1 To acquire end-side signals, the test system includes a controller connected to an LED array. The LED array comprises a first light-emitting unit and a second light-emitting unit. The first light-emitting unit is aligned with a first target sub-cell inside the perovskite solar cell assembly. The second light-emitting unit is aligned with a second target sub-cell inside the perovskite solar cell assembly. The first and second target sub-cells are positioned adjacent to each other. In the physical topology, the first target sub-cell is closer to the total output terminal than the second target sub-cell is.

[0021] During modulation, the controller drives the first light-emitting unit to send a first sinusoidal light intensity modulation signal, which has a first modulation frequency; simultaneously, the controller drives the second light-emitting unit to send a second sinusoidal light intensity modulation signal, which has a second modulation frequency. To avoid signal overlap, the first modulation frequency and the second modulation frequency are mutually harmonic frequencies. This setting of mutually harmonic frequencies can, to a certain extent, prevent the fundamental frequency signal from overlapping with the harmonics of the other, even when the material exhibits nonlinear response generating high-order harmonics, thereby suppressing harmonic crosstalk between the first and second sinusoidal light intensity modulation signals in the frequency domain. Specifically, the relationship between the harmonic frequencies satisfies the following determination formula: ; In the formula, Represents the first modulation frequency; Represents positive integers; This represents the second modulation frequency. In specific test scenarios, based on the perovskite carrier mobility characteristics, and The value range is set between hundreds of hertz and tens of kilohertz. In this embodiment, the first sinusoidal light intensity modulation signal and the second sinusoidal light intensity modulation signal are transmitted synchronously within the same time period and superimposed on the optical path illuminated by the DC background. The first light-emitting unit injects a first AC photocurrent into the first target sub-cell. The second light-emitting unit injects a second AC photocurrent into the second target sub-cell. The first and second AC photocurrents then flow into the transmission channel.

[0022] For the arbitrary waveform generation module of the controller and the constant current driving module of the first light-emitting unit and the second light-emitting unit, those skilled in the art can use field-programmable gate arrays and high-frequency constant current source chips. Field-programmable gate arrays and high-frequency constant current source chips are well-known technologies in this field and will not be described in detail here.

[0023] See attached document Figure 1 The first and second AC photocurrents flow into the transmission channel and converge at the total output terminal. To achieve this, the test system connects the source measurement unit to the total output terminal. The source measurement unit applies a DC bias step sequence to the total output terminal. Since the DC bias step sequence has multiple consecutive voltage plateau periods, and the source measurement unit maintains a constant DC voltage during these plateau periods, it establishes stable electrical boundary conditions for the transmission channel. Simultaneously, the test system connects a data acquisition card to the total output terminal, connecting the data acquisition card in series with the measurement circuit of the total output terminal. The data acquisition card performs total current timing sampling at the total output terminal, acquiring a total current timing signal with frequency domain characteristics of the first and second modulation frequencies.

[0024] To ensure timing consistency, the test system establishes a synchronous trigger link connecting the controller, the source measurement unit, and the data acquisition card. In the workflow, the controller sends a voltage step command to the source measurement unit and simultaneously sends a sampling start command to the data acquisition card, thereby triggering the data acquisition card to perform total current timing sampling during the voltage plateau period.

[0025] For the terminal connection structure of the source measurement unit and the signal conversion module of the data acquisition card, those skilled in the art can use a four-wire Kelvin fixture and an analog-to-digital converter chip. The four-wire Kelvin fixture and the analog-to-digital converter chip are well-known technologies in this field and will not be described in detail here.

[0026] See attached document Figure 1 S2. During the process of the data acquisition card performing total current timing sampling within consecutive voltage plateau periods, specifically, when the source measurement unit receives a voltage step command and applies a DC bias step sequence to the total output terminal, the test system executes an ion relaxation waiting process at the beginning of each voltage plateau period. During this stage, the controller keeps the LED array in the off state, i.e., stops driving the first and second LED units, causing them to stop sending the first and second sinusoidal light intensity modulation signals; only the global large-area light source remains in normally-on mode and continuously provides DC background illumination. At this time, the test system experiences a preset relaxation time.

[0027] Changing the voltage amplitude of the DC bias step sequence in the source measurement unit induces ion migration within the perovskite solar cell module. Due to the unique soft lattice properties of perovskite materials, the redistribution of ions under the influence of an electric field and the formation of an electric double-layer capacitance exhibit a time lag, leading to a nonlinear capacitive response. Therefore, a preset relaxation time is used to match the time parameter required for the ion distribution state within the perovskite solar cell module to reach a steady state. The specific value of the preset relaxation time can be calibrated by pre-recording the dark current decay curve after a voltage step and taking the time required for the current to decay to a stable baseline. When the preset relaxation time ends, the ion distribution state within the perovskite solar cell module reaches a steady state, and the test system can execute the signal extraction process after the ion distribution state reaches a steady state.

[0028] See attached document Figure 1 During the subsequent signal extraction process of the test system, the controller resumes driving the LED array at the end of the voltage plateau period. The controller sends a synchronization trigger command to the first and second LED units, instructing them to start simultaneously. Then, the controller drives the first LED unit to send a first sinusoidal light intensity modulation signal and simultaneously drives the second LED unit to send a second sinusoidal light intensity modulation signal.

[0029] The first light-emitting unit projects a first sinusoidal light intensity modulation signal onto the first target sub-cell. Simultaneously, the second light-emitting unit projects a second sinusoidal light intensity modulation signal onto the second target sub-cell. The light intensity amplitude projected by the first light-emitting unit is equal to the light intensity amplitude projected by the second light-emitting unit. The first sinusoidal light intensity modulation signal has a first modulation frequency, and the second sinusoidal light intensity modulation signal has a second modulation frequency. The first modulation frequency and the second modulation frequency are harmonic frequencies. The first target sub-cell generates a first alternating current photocurrent under the excitation of the first sinusoidal light intensity modulation signal. The second target sub-cell generates a second alternating current photocurrent under the excitation of the second sinusoidal light intensity modulation signal. The harmonic frequencies ensure that the first and second alternating current photocurrents remain independent in the frequency domain.

[0030] The path traversed by the first AC photocurrent in the transmission channel is shorter than that traversed by the second AC photocurrent. The test system sets the state where the amplitude of the first complex current response is greater than that of the second complex current response as the normal measurement condition. If the amplitude of the first complex current response is detected to be less than or equal to that of the second complex current response, the test system determines that the target sub-cell has an internal short circuit and outputs an abnormality flag, while skipping the subsequent impedance calculation process. The light intensity amplitudes of both the first and second sinusoidal light intensity modulation signals are set to be less than the light intensity amplitude of the DC background illumination. The micro-perturbation optical path superposition mode can maintain the first and second target sub-cells in a low dynamic volume resistance state. After the first and second AC photocurrents merge into the transmission channel, they are mixed and then transmitted to the total output terminal for the data acquisition card to perform timing sampling.

[0031] See attached document Figure 1 S3. The data acquisition card performs timing sampling at the total output terminal. Specifically, based on the received sampling start command, the data acquisition card has a preset sampling frequency. In order to satisfy the Nyquist sampling theorem, the preset sampling frequency is greater than the value of the first modulation frequency and the preset sampling frequency is greater than the value of the second modulation frequency. The data acquisition card records the current change data at the total output terminal. The current change data constitutes the total current timing signal, which is represented as time domain data.

[0032] Subsequently, the test system performs a Fast Fourier Transform on the total current timing signal. The Fast Fourier Transform converts the total current timing signal to the frequency domain space. The total current timing signal is decomposed into frequency domain component data in the frequency domain space. The test system then searches for the positions corresponding to the first modulation frequency and the second modulation frequency in the frequency domain component data.

[0033] Subsequently, the test system extracts the first complex current response at the position corresponding to the first modulation frequency, and extracts the second complex current response at the position corresponding to the second modulation frequency. Since the first and second modulation frequencies are non-harmonic frequencies, their non-harmonicity suppresses spectral leakage and crosstalk between the first and second complex current responses in the frequency domain.

[0034] Furthermore, the test system analyzes the first complex current response to obtain the first phase parameter and the first complex current response amplitude, and simultaneously analyzes the second complex current response to obtain the second phase parameter and the second complex current response amplitude. The test system stores the first phase parameter, the first complex current response amplitude, the second phase parameter, and the second complex current response amplitude in memory.

[0035] See attached document Figure 1 S4. The test system reads the first and second phase parameters stored in the memory module and processes them. The test system extracts the value of the first phase parameter. The test system extracts the value of the second phase parameter and then calculates the mathematical difference between the first and second phase parameters. This mathematical difference constitutes the phase difference value. The test system calculates the phase difference value according to the following formula: ; In the formula, Represents the phase difference value; Represents the first phase parameter; This represents the second phase parameter.

[0036] Because the source measurement unit applies a DC bias step sequence to the total output, the test system experiences multiple voltage plateau periods through this sequence. Within each plateau period, the test system repeatedly executes the total current timing sampling process, the fast Fourier transform process, and the frequency domain signal extraction process. Thus, the test system acquires all phase difference values ​​corresponding to different DC biases and integrates them to generate a phase difference value sequence. Each element in the phase difference value sequence is essentially associated with each voltage plateau period in the DC bias step sequence.

[0037] To analyze the capacitance effect, the test system calculates the partial derivative of the phase difference with respect to the DC bias. The results of the partial derivative calculation form the elements of the partial derivative matrix. The test system establishes a two-dimensional data matrix to store the elements of the partial derivative matrix and calculates the elements of the partial derivative matrix according to the following formula: ; In the formula, Elements representing partial derivative matrices; Represents the phase difference value; This represents DC bias.

[0038] For numerical differentiation of data matrices, those skilled in the art can use the central difference algorithm, which is a well-known technology in the field and will not be described in detail here.

[0039] See attached document Figure 1 S5. After acquiring the elements of the partial derivative matrix, the test system filters these elements. The test system sets a preset threshold representing the numerical limit approaching zero. This preset threshold can be calibrated based on the test system's background noise and measurement accuracy, for example, a value of 0.001 rad / V. The test system compares the absolute values ​​of the partial derivative matrix elements with the preset threshold and finds partial derivative matrix elements whose absolute values ​​are lower than the preset threshold.

[0040] If the absolute value of the partial derivative matrix element is lower than a preset threshold, it indicates that the phase response is independent of the DC bias change. Since the DC bias change can cause nonlinear ionic capacitance interference within the perovskite solar cell module, leading to a phase response shift, the partial derivative matrix element with an absolute value lower than the preset threshold actually corresponds to a state where nonlinear ionic capacitance interference is eliminated. This state becomes a pure ohmic connection state, reflecting the pure resistive characteristics between the first and second target sub-cells, thereby reducing impedance crosstalk caused by the capacitance effect. At this time, the test system extracts the frequency domain data corresponding to this state, defines it as the target frequency domain component, and stores it in memory for impedance analysis.

[0041] See attached document Figure 1 The test system performs impedance analysis based on the target frequency domain components and reads the data corresponding to the target frequency domain components. The test system extracts the amplitude of the first complex current response and the amplitude of the second complex current response, and the frequency domain positions of the target frequency domain components corresponding to the amplitudes of the first and second complex current responses are determined.

[0042] The testing system calculates the series resistance between the first and second target sub-cells by combining the amplitudes of the first and second complex current responses. This series resistance reflects the ohmic loss from laser scribing. The testing system calculates the series resistance using the following formula: ; In the formula, Represents series resistance; Represents the equivalent external impedance; This represents the amplitude of the first complex current response; This represents the amplitude of the second complex current response.

[0043] In this embodiment, the equivalent external impedance represents the sum of the known inherent hardware resistance and the parasitic impedance of the transmission channel in the measurement loop of the test system. The equivalent external impedance, combined with the ratio of the amplitude of the first complex current response to the amplitude of the second complex current response, constructs an electrical shunt model based on the node current attenuation ratio. This electrical shunt model maps the resistance parameters of the external measurement loop to the resistance parameters of the internal sub-cell sections. The specific value of the equivalent external impedance is obtained by performing a reference calibration before testing the test system by connecting a standard short-circuit device.

[0044] Simultaneously, the test system extracts the voltage step between adjacent DC biases and the amplitude of the first complex current response during the previous voltage plateau. Under a pure ohmic connection state excluding nonlinear ionic capacitor interference, the DC bias step alters the steady-state electric field within the perovskite solar cell module. This change in the steady-state electric field modulates the recombination probability of charge carriers within the sub-cell. This change in recombination probability leads to a corresponding change in the amplitude of the AC photocurrent. The response gradient of the AC photocurrent amplitude to the DC bias step effectively maps to the current-blocking state of the parallel leakage channel in the sub-cell. Based on this mapping, the test system calculates the parallel resistance between the first and second target sub-cells by combining the voltage step and the change in the amplitude of the first complex current response. The parallel resistance reflects the internal isolation performance. The test system calculates the parallel resistance using the following formula: ; In the formula, Represents parallel resistors; Represents the voltage step; This represents the amplitude of the first complex current response; This represents the amplitude of the first complex current response during the previous voltage plateau period. As a preferred method, the test system checks the absolute value of the denominator for a minimum before performing the division operation. If the absolute value is less than the system's set tolerance threshold, it is determined that no substantial change in current response has occurred under the current voltage step, and the test system skips the division operation and directly outputs a preset high-impedance flag.

[0045] The testing system stores the series and parallel resistance values ​​in its memory, and then outputs these values ​​to a display terminal. The series resistance value assesses the internal connection resistance state, while the parallel resistance value assesses the isolation and blocking state of the sub-cell. This completes the quantitative analysis process of local connection performance parameters.

[0046] For the interface rendering logic of the display terminal, those skilled in the art can use a graphics processing chip combined with a driver. The interface graphics rendering driver is a well-known technology in this field and will not be described in detail here.

[0047] See attached document Figure 2After the test system completes the quantitative analysis of local connection performance parameters, a control module is established. This control module connects the global large-area light source, the LED array, the source measurement unit, and the data acquisition card, establishing a hardware interlocked communication link. The control module sends a normally-on command to the global large-area light source, maintaining its normally-on operating mode and continuously providing DC background illumination. Simultaneously, the control module sends a voltage generation command to the source measurement unit, driving it to apply a DC bias step sequence to the total output terminal.

[0048] At the beginning of the voltage plateau period corresponding to the DC bias step sequence, the control module executes the ion relaxation waiting process and sends a shutdown command to the LED array, keeping the LED array in a shutdown state, causing the first light-emitting unit to stop transmitting the first sinusoidal light intensity modulation signal. The second light-emitting unit stops transmitting the second sinusoidal light intensity modulation signal.

[0049] When the preset relaxation time ends, the control module sends a synchronous trigger command to the LED array, driving the first light-emitting unit to send the first sinusoidal light intensity modulation signal, and simultaneously driving the second light-emitting unit to send the second sinusoidal light intensity modulation signal. It also sends a sampling start command to the data acquisition card, enabling the data acquisition card to perform timing sampling at the total output terminal. In this way, the control module realizes the hardware cascade scheduling of light source driving and data acquisition.

[0050] For the underlying communication bus architecture of the control module, those skilled in the art can use the industrial local area network standard to implement it. The underlying communication of industrial local area networks is a well-known technology in this field, and will not be described in detail here.

[0051] See attached document Figure 2 The system implements hardware-level interlocking scheduling of light source driving and data acquisition based on the control module. The test system establishes a signal acquisition module and a signal conversion module. The signal acquisition module is connected to the data acquisition card, which enables the data acquisition card to receive the current change signal from the total output terminal and perform analog-to-digital conversion according to the preset sampling frequency. Then, it outputs the total current timing signal, which is represented as a time-domain data stream.

[0052] Next, the signal transformation module receives the total current timing signal and performs a Fast Fourier Transform (FFT) on it. This FFT converts the time-domain data stream to the frequency-domain space, resulting in frequency-domain component data. During processing, the signal transformation module locates the first modulation frequency in the frequency-domain component data and extracts the first complex current response at the corresponding position. Similarly, the signal transformation module locates the second modulation frequency in the frequency-domain component data and extracts the second complex current response at the corresponding position.

[0053] The signal conversion module processes the first complex current response, separating its real and imaginary parts to calculate the first phase parameter and amplitude. Similarly, the signal conversion module processes the second complex current response, separating its real and imaginary parts and calculating the second phase parameter and amplitude. Finally, the signal conversion module transmits the first phase parameter, the first complex current response amplitude, the second phase parameter, and the second complex current response amplitude to the memory module for secure and persistent storage.

[0054] For the caching logic of time-domain data streams, those skilled in the art can use the direct memory access mechanism, which is a well-known technology in the field and will not be described in detail here.

[0055] See attached document Figure 2 After the memory module stores the first phase parameter, the first complex current response amplitude, the second phase parameter, and the second complex current response amplitude, the test system establishes a data parsing module. The data parsing module reads the first phase parameter and the second phase parameter from the memory module, calculates the mathematical difference between the first phase parameter and the second phase parameter to generate a phase difference value, then integrates the phase difference values ​​corresponding to different DC bias voltages to generate a phase difference value sequence, and then calculates the partial derivative of the phase difference value with respect to the DC bias voltage to generate the elements of the partial derivative matrix.

[0056] The data parsing module compares the absolute values ​​of the partial derivative matrix elements with a preset threshold. It then filters partial derivative matrix elements with absolute values ​​below the preset threshold to locate the target frequency domain component corresponding to each element. This target frequency domain component reflects the pure ohmic connection state. Based on this, the data parsing module reads the first and second complex current response amplitudes corresponding to the target frequency domain component.

[0057] As a closed-loop operation, the test system establishes an impedance calculation module. This module receives the amplitudes of the first and second complex current responses and the voltage step, calculates the series resistance between the first and second target sub-cells using the equivalent external impedance, and calculates the parallel resistance between the first and second target sub-cells using the voltage step. Subsequently, the calculated series and parallel resistance values ​​are transmitted to the display terminal, driving the display terminal to output the series and parallel resistance values.

[0058] For the floating-point arithmetic unit of the data parsing module, those skilled in the art can use a digital signal processor to implement it. Digital signal processing is a well-known technology in this field and will not be described in detail here.

[0059] Specific application examples: In this embodiment, the test object is a perovskite solar cell module containing multiple series-connected sub-cells. The purpose of the test is to accurately measure the series resistance (reflecting the ohmic loss of the laser scribing) and parallel resistance (reflecting the internal isolation performance) between adjacent first and second target sub-cells, and to overcome the nonlinear ionic capacitance interference commonly found in perovskite materials.

[0060] The testing system turns on a global large-area light source to apply a constant intensity DC background illumination to the entire perovskite solar cell module in order to excite photogenerated carriers and maintain the sub-cells in a low dynamic bulk resistance state.

[0061] The controller sets the first modulation frequency to =1200 Hz, the second modulation frequency is =1750 Hz (the two satisfy the relationship of being non-harmonic frequencies of each other), and drive the light-emitting diode array. The first light-emitting unit sends a first sinusoidal light intensity modulation signal to align with the first target sub-cell, and the second light-emitting unit sends a second sinusoidal light intensity modulation signal to align with the second target sub-cell.

[0062] The source measurement unit applies a DC bias step sequence from 0V to 1.2V in 0.1V increments to the total output. At the beginning of each voltage plateau, the system undergoes a preset relaxation time of approximately 5 seconds to allow internal ion redistribution to reach a steady state.

[0063] The data acquisition card performs total current timing sampling to acquire the total current timing signal. Then, it is converted to the frequency domain through a fast Fourier transform to extract the first complex current response and the second complex current response, thereby obtaining the amplitude of the first complex current response, the amplitude of the second complex current response, the first phase parameter, and the second phase parameter.

[0064] The experimental verification and effect comparison are as follows: To verify the effectiveness of the present invention, a comparative experiment was designed between the traditional single-frequency impedance measurement method (without preset relaxation time and dual-frequency decoupling) and the method of the present invention. The experiment focused on the extraction effect of series resistance as a function of DC bias voltage.

[0065] The method of this invention generates a phase difference sequence by calculating the difference between a first phase parameter and a second phase parameter, and then calculates the elements of its partial derivative matrix with respect to DC bias. A preset threshold is set to 0.001 rad / V. Test system comparisons show that when the DC bias reaches 0.8V or higher, the absolute values ​​of the partial derivative matrix elements are lower than the preset threshold. Based on this, the system determines that nonlinear ionic capacitor interference is eliminated in this state, achieving a pure ohmic connection state. The system then extracts this frequency domain data as the target frequency domain component and uses the formula to calculate a high-precision series resistance.

[0066] See attached document Figure 3 , attached Figure 3 Traditional methods (solid lines marked with triangles) fail to eliminate nonlinear ionic capacitance interference, resulting in an inflated series resistance in the low-voltage region. Furthermore, the resistance fluctuates nonlinearly with DC bias, failing to accurately isolate the true ohmic loss of laser scribing. The method of this invention (dashed lines marked with circles) successfully calculates the partial derivative matrix elements by applying a DC bias step sequence with a preset relaxation time and combining it with the suppression of dual-frequency harmonics. When the bias reaches 0.8V, the system accurately locates the target frequency component (pure ohmic connection state), at which point the series resistance calculated based on the amplitudes of the first and second complex current responses stabilizes at approximately 12.1Ω. This result eliminates impedance crosstalk caused by capacitance effects and stably reflects the connection state.

Claims

1. A test method for perovskite solar cells, characterized in that, Includes the following steps: A DC bias step sequence is applied to the perovskite solar cell module, and a first sinusoidal light intensity modulation signal and a second sinusoidal light intensity modulation signal are applied to the perovskite solar cell module respectively, and the total current timing signal generated by superimposing the first sinusoidal light intensity modulation signal and the second sinusoidal light intensity modulation signal is obtained; Extract the voltage step between adjacent DC biases in the DC bias ladder sequence to obtain the equivalent external impedance; Perform a fast Fourier transform on the total current timing signal to extract and parse the first phase parameter, the first complex current response amplitude, the second phase parameter, and the second complex current response amplitude. Calculate the mathematical difference between the first phase parameter and the second phase parameter to generate a phase difference value, and calculate the partial derivative of the phase difference value with respect to the DC bias voltage for different DC bias voltages to generate partial derivative matrix elements; By comparing the absolute values ​​of the partial derivative matrix elements with a preset threshold, the partial derivative matrix elements with absolute values ​​lower than the preset threshold are extracted to locate the target frequency domain components. The series resistance and parallel resistance are calculated by combining the first complex current response amplitude, the second complex current response amplitude, the equivalent external impedance, and the voltage step value corresponding to the target frequency domain components, thus completing the perovskite solar cell test.

2. The perovskite solar cell testing method according to claim 1, characterized in that, The steps for obtaining the total current timing signal specifically include: A constant intensity DC background illumination is applied to the multiple sub-cells included in the perovskite solar cell module using a global large-area light source. The first light-emitting unit sends the first sinusoidal light intensity modulation signal to the first target sub-cell, and the second light-emitting unit sends the second sinusoidal light intensity modulation signal to the second target sub-cell; The DC bias ladder sequence with a continuous voltage plateau period is applied to the total output terminal using the source measurement unit, and the total current timing signal is obtained by performing total current timing sampling during the voltage plateau period using the data acquisition card.

3. The perovskite solar cell testing method according to claim 2, characterized in that, The steps for performing total current timing sampling during the voltage plateau period specifically include: An ion relaxation waiting process is executed at the beginning of each voltage plateau period to keep the first light-emitting unit and the second light-emitting unit in a closed state for a preset relaxation time. After the preset relaxation time ends and the ion distribution state inside the perovskite solar cell module reaches a steady state, a synchronous trigger command is sent to drive the first light-emitting unit and the second light-emitting unit to start simultaneously.

4. The perovskite solar cell testing method according to claim 1, characterized in that, The steps for extracting and parsing the first phase parameter, the first complex current response amplitude, the second phase parameter, and the second complex current response amplitude specifically include: Perform a Fast Fourier Transform on the total current time-series signal to decompose the total current time-series signal into frequency domain component data in the frequency domain space; The first sinusoidal light intensity modulation signal has a first modulation frequency, and the second sinusoidal light intensity modulation signal has a second modulation frequency; the positions corresponding to the first modulation frequency and the positions corresponding to the second modulation frequency are found in the frequency domain component data, and the first modulation frequency and the second modulation frequency are non-harmonic frequencies of each other; The first complex current response is extracted and analyzed at the position corresponding to the first modulation frequency to obtain the first phase parameter and the amplitude of the first complex current response. The second complex current response is extracted and analyzed at the position corresponding to the second modulation frequency to obtain the second phase parameter and the amplitude of the second complex current response.

5. The perovskite solar cell testing method according to claim 2, characterized in that, The first target sub-cell is located closer to the total output terminal in the physical topology than the second target sub-cell is located from the total output terminal. After extracting and parsing the first phase parameter, the first complex current response amplitude, the second phase parameter, and the second complex current response amplitude, the process further includes: The state where the amplitude of the first complex current response is greater than the amplitude of the second complex current response is set as the normal measurement condition; If the amplitude of the first complex current response is detected to be less than or equal to the amplitude of the second complex current response, it is determined that the perovskite solar cell module has an internal short circuit and an abnormality flag is output, skipping the subsequent impedance calculation process.

6. The perovskite solar cell testing method according to claim 2, characterized in that, The steps for generating the elements of the partial derivative matrix specifically include: Based on the continuous voltage plateau period of the DC bias ladder sequence, all phase difference values ​​corresponding to different DC biases are obtained and integrated to generate a phase difference value sequence. The partial derivatives of the phase difference values ​​in the phase difference sequence with respect to the DC bias voltage are calculated to form the elements of the partial derivative matrix, and a two-dimensional data matrix is ​​established to store the elements of the partial derivative matrix.

7. The perovskite solar cell testing method according to claim 1, characterized in that, The step of extracting the partial derivative matrix elements whose absolute values ​​are below the preset threshold to locate the target frequency domain component specifically includes: Find the partial derivative matrix elements whose absolute values ​​are lower than the preset threshold, and set the state corresponding to the partial derivative matrix elements whose absolute values ​​are lower than the preset threshold to a pure ohmic connection state that eliminates nonlinear ion capacitor interference. The frequency domain data corresponding to the pure ohmic connection state is extracted and defined as the target frequency domain component.

8. The perovskite solar cell testing method according to claim 2, characterized in that, The specific steps for calculating the series resistance include: An electrical shunt model based on the node current decay ratio is constructed by combining the ratio of the amplitude of the first complex current response to the amplitude of the second complex current response. The series resistance between the first target sub-cell and the second target sub-cell is calculated by combining the equivalent external impedance and the electrical shunt model.

9. The perovskite solar cell testing method according to claim 2, characterized in that, The specific steps for calculating the parallel resistance include: Extract the first complex current response amplitude of the preceding voltage plateau period in the continuous voltage plateau periods; The parallel resistance between the first target sub-cell and the second target sub-cell is calculated by combining the voltage step and the change in the amplitude of the first complex current response.

10. A perovskite solar cell testing system, characterized in that, The method for performing the perovskite solar cell testing method according to any one of claims 1-9 includes: The control module is used to apply a first sinusoidal light intensity modulation signal and a second sinusoidal light intensity modulation signal to the perovskite solar cell module respectively, and to acquire the total current timing signal generated by superimposing the first sinusoidal light intensity modulation signal and the second sinusoidal light intensity modulation signal. The signal acquisition module is used to acquire the total current timing signal generated by superimposing the first sinusoidal light intensity modulation signal and the second sinusoidal light intensity modulation signal; The signal transformation module is used to perform a fast Fourier transform on the total current time-series signal, extract and parse the first phase parameter, the first complex current response amplitude, the second phase parameter and the second complex current response amplitude; The data parsing module is used to calculate the mathematical difference between the first phase parameter and the second phase parameter to generate a phase difference value, calculate the partial derivative of the phase difference value with respect to the DC bias voltage for different DC bias voltages to generate partial derivative matrix elements, compare the absolute value of the partial derivative matrix elements with a preset threshold, and extract the partial derivative matrix elements whose absolute value is lower than the preset threshold to locate the target frequency domain component. The impedance calculation module is used to extract the voltage step between adjacent DC biases in the DC bias step sequence, obtain the equivalent external impedance, and calculate the series resistance and parallel resistance by combining the first complex current response amplitude, the second complex current response amplitude, the equivalent external impedance and the voltage step corresponding to the target frequency domain component, thereby completing the perovskite cell test.

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