A SiC photonic crystal device and its fabrication method

Abstract

This invention discloses a SiC photonic crystal device and its fabrication method, belonging to the field of optoelectronic devices. The invention first forms an injection window on a first mask layer, then performs controlled ion implantation and annealing activation on an N-type SiC substrate to form a PN-type conversion layer, achieving flexible tunability of the PN type. Next, a second mask layer is fabricated on the substrate after removing the first mask layer, and a periodic SiC photonic crystal structure is formed through etching. This invention employs vertical LPCVD combined with ICP electron beam etching, resulting in high fabrication efficiency and low cost. It enables bidirectional controllable PN-type conversion and precise control of photonic crystal structure parameters, leading to excellent device optical performance suitable for applications such as optical waveguides, optical switches, and optical modulators.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic devices, and in particular to a method for efficient fabrication and flexible optical control. Background Technology

[0002] As optoelectronic technology develops towards high voltage, high frequency, and extreme operating conditions, high-performance SiC photonic crystals have become the core research and development direction for optoelectronic devices. They combine the advantages of SiC materials, such as wide bandgap and high thermal stability, with the optical field modulation characteristics of photonic crystals, and have irreplaceable application value in devices such as optical waveguides, optical switches, and optical modulators.

[0003] Current methods for fabricating SiC photonic crystals still suffer from numerous technical limitations. Traditional processes such as metal-organic chemical vapor deposition (MOCVD) and ion implantation suffer from slow deposition rates, low fabrication efficiency, high equipment maintenance frequency, and high process costs. Fabrication methods such as chemical etching and high-temperature sintering are only suitable for metal oxide photonic crystals such as ZnO and SnO2, making it difficult to achieve large-scale, reproducible fabrication of SiC photonic crystals. Furthermore, existing technologies produce SiC photonic crystals with a fixed PN type, which cannot be flexibly adjusted according to device application requirements. This significantly limits the flexibility of optical field manipulation and device adaptability. Additionally, due to their narrow bandgap, poor thermal stability, and poor radiation resistance, Si photonic crystals are prone to performance degradation under special environments such as high temperatures and high radiation, failing to meet the application requirements of high-end optoelectronic devices.

[0004] The closest existing technology is the Chinese invention patent CN118915198B, "A Method for Preparing an Adjustable PN-Type SiC Photonic Crystal." This patent uses a wet etching process combined with high-temperature annealing to prepare SiC photonic crystals. Although it can achieve the formation of basic photonic crystal structures, it has the following drawbacks: First, the preparation efficiency is low, the wet etching rate is slow, and it cannot be mass-produced on a large scale; second, the PN type of the photonic crystal is not adjustable, and it can only prepare a single type of SiC photonic crystal, resulting in poor adaptability; third, the optical bandgap tuning range is narrow, which limits the improvement of device optical performance.

[0005] In summary, developing a SiC photonic crystal device with high fabrication efficiency, low cost, and flexible PN type and its fabrication method has become an urgent technical problem to be solved in the field of optoelectronic devices. Summary of the Invention

[0006] This invention addresses the shortcomings of existing technologies by providing a highly efficient and flexibly optically modulated SiC device and its fabrication method. This enables large-scale and rapid fabrication of SiC photonic crystals, while also achieving flexible tunability of the PN type of the photonic crystal, improving the optical performance and application adaptability of the device. Furthermore, the fabrication process is simple and cost-controllable, providing technical support for the subsequent research and development and application of SiC photonic crystal optoelectronic devices.

[0007] A method for fabricating a SiC photonic crystal device includes the following steps: Step S1: Form a first mask layer (2) on the surface of the N-type SiC substrate (1); Step S2: The first mask layer (2) is homogenized (3), at least one injection window (4) is formed by photolithography, and the injection window (4) is etched to expose the preset injection area of ​​the N-type SiC substrate (1); Step S3: Ion implantation and activation are performed on the preset implantation region of the N-type SiC substrate (1) through the implantation window (4) to form a PN-type conversion layer (6) on the surface of the N-type SiC substrate (1), thereby forming a PN junction with the N-type SiC substrate (1); Step S4: Remove the first mask layer (2); Step S5: Form a second mask layer (5) on the surface of the N-type SiC substrate (1) and the PN-type conversion layer (6) after completing step S4. Step S6: The second mask layer (5) is patterned to form an etching window corresponding to the preset photonic crystal structure; Step S7: Using the patterned second mask layer (5) as a mask, the N-type SiC substrate (1) is etched to form a periodic SiC photonic crystal structure (7) on the surface of the N-type SiC substrate (1). Step S8: Remove the remaining second mask layer (5) to obtain the SiC photonic crystal device.

[0008] Furthermore, the conductivity type of the ion implanted in step S3 is opposite to that of the N-type SiC substrate (1). By controlling the dose, energy and implantation area of ​​the implanted ions, the conductivity type, doping concentration and distribution area of ​​the PN-type conversion layer (6) can be controlled and adjusted, thereby obtaining N-type, P-type or PN junction type photonic crystal devices.

[0009] Further, the first mask layer (2) in step S1 and / or the second mask layer (5) in step S5 are SiO2 layers grown by vertical low-pressure chemical vapor deposition process; wherein, the thickness of the first SiO2 mask layer (2) is 1-2 μm, and the thickness of the second mask layer (5) is the same as that of the first mask layer.

[0010] Furthermore, the graphical processing described in step S2 and / or step S6 specifically includes: Positive photoresist is coated on the surface of the mask layer (3), and a photolithographic window (4) is formed by exposure and development processes. The mask layer is selectively etched along the photolithography window (4) using an inductively coupled plasma electron beam etching process to form the injection window or the etching window; Remove residual positive photoresist (3).

[0011] Further, the ion implantation in step S3 specifically involves: implanting Al ions at an implantation temperature of 400℃-500℃ and an implantation dose of 1×10⁻⁶. 15 cm -12 The injected energy is 100keV; the activation process is specifically: activation at 1300℃-1500℃ for 1-2 hours in an argon atmosphere.

[0012] Furthermore, the removal of the first mask layer (2) in step S4 and / or the removal of the second mask layer (5) in step S8 are performed using a composite process, which includes sequential dry etching and buffer oxide etching wet immersion.

[0013] The present invention also provides a SiC photonic crystal device, comprising: An N-type SiC substrate (1); A PN-type conversion layer (6) is formed on a designated area of ​​the surface of the N-type SiC substrate (1) by ion implantation and activation treatment, and forms a PN junction with the N-type SiC substrate (1); A periodic SiC photonic crystal structure (7) is formed on the surface of the N-type SiC substrate (1) by an etching process.

[0014] Furthermore, the conductivity type of the PN-type conversion layer (6) is opposite to that of the N-type SiC substrate (1), and its doping concentration and distribution area are determined by the dose, energy and implantation area of ​​ion implantation; the PN-type conversion layer (6) is a P-type region formed by implanting Al ions, which forms a PN junction with the N-type SiC substrate (1).

[0015] Furthermore, the period, depth, and duty cycle of the periodic SiC photonic crystal structure (7) are determined by the parameters of the etching process to achieve the preset photonic bandgap characteristics.

[0016] Furthermore, the resistivity of the N-type SiC substrate (1) is 0.01~0.05Ω·cm; the periodic SiC photonic crystal structure (7) is an array of holes or columnar structures with a period of 500nm and an etching depth of 300nm.

[0017] Compared with the prior art, the present invention has the following advantages and beneficial effects: PN type is flexible and adjustable: By controlling the injection dose, depth and area of ​​Al ions, bidirectional controllable conversion between N type and P type can be achieved. The PN type and substrate concentration of the photonic crystal can be freely adjusted according to the application requirements of the device, which greatly improves the device's scene adaptability and the flexibility of light field control.

[0018] High preparation efficiency and large-scale mass production capability: The process combines ICP electron beam etching with vertical LPCVD, which has a fast preparation rate. Furthermore, the size and specifications of the photonic crystal can be controlled according to requirements through laser cutting, enabling large-scale and repeatable preparation and solving the technical problem that traditional processes cannot achieve mass production.

[0019] Low preparation cost and controllable process: It abandons expensive processes such as MOCVD and adopts ICP etching, ion implantation and other process equipment with low maintenance cost. Moreover, the parameters of each process step are controllable and no complicated post-processing is required, which greatly reduces the preparation cost.

[0020] Controllable structure and excellent optical performance: Photonic crystals are periodic array structures, and the period and size can be precisely controlled through photolithography, which can achieve tunable optical band gaps. Furthermore, based on the wide band gap characteristics of SiC materials, the SiC photonic crystals prepared subsequently have even wider photonic band gaps, which have significant advantages in optical modulation and photonic transmission.

[0021] High process transferability: The process verification was completed using an N-type Si substrate, and the fabrication process can be directly transferred to the fabrication of photonic crystals on SiC substrates, laying a solid process foundation for the subsequent large-scale fabrication of SiC photonic crystals. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure after the preparation of the first SiO2 mask layer 2 and the first photolithography and etching.

[0023] Figure 2 This is a schematic diagram of the fabrication of the second SiO2 mask layer 5 and the structure after the second photolithography.

[0024] Figure 3 Simulation results of PN-type conversion after Al ion implantation into an N-type SiC substrate.

[0025] Figure 4 This is a basic structural diagram of a SiC photonic crystal. Detailed Implementation

[0026] The specific implementation of the present invention will be further described below with reference to the accompanying drawings and embodiments. However, the implementation and protection of the present invention are not limited thereto. It should be noted that any processes or process parameters that are not described in particular below are those that can be implemented by those skilled in the art with reference to the prior art.

[0027] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and method steps have been omitted so as not to obscure the description of this application with unnecessary detail.

[0028] It should be understood that, when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof. References such as "one embodiment" or "some embodiments" described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and their variations all mean "including but not limited to," unless otherwise specifically emphasized. The following related parameters are not intended to limit the implementation of the technical solutions of the present invention, but are used as examples.

[0029] As one embodiment, a method for fabricating SiC devices with high efficiency and flexible optical control includes the following steps: S1: Substrate pretreatment and preparation of the first mask layer An N-type SiC substrate 1 was selected as the substrate, and its surface was cleaned and polished to remove surface impurities and oxide layers. A first SiO2 mask layer 2 with a thickness of 2 μm was grown on the surface of the N-type SiC substrate 1 by vertical low-pressure chemical vapor deposition (LPCVD) to complete the mask preparation before ion implantation.

[0030] S2: First photolithography process for forming Positive photoresist 3 is spin-coated on the surface of the first SiO2 mask layer 2, and exposure and development are performed using photolithography to form a photolithography window 4 with a preset pattern, thus obtaining the area to be etched for ion implantation. The photolithography window 4 is distributed in an array, and the spacing can be adjusted according to the PN type conversion requirements.

[0031] S3: First Etching and Mask Forming Using inductively coupled plasma (ICP) electron beam etching, the first SiO2 mask layer 2, which is not covered by positive photoresist 3, is selectively etched. After etching, acid washing is used to remove the residual positive photoresist 3 on the surface, forming a first SiO2 mask structure with an array of implantation windows on the surface of the N-type SiC substrate 1, providing a precise channel for ion implantation.

[0032] S4: Ion Implantation and PN Type Conversion An ion implanter is used to implant Al ions into an N-type SiC substrate 1 at high temperature through an implantation window. After implantation, a high-temperature activation treatment is performed to cause the N-type SiC in the implanted region to undergo inversion and form a P-type region, namely the PN-type conversion layer 6, thus achieving a controllable conversion from N-type to P-type. By adjusting the implantation dose, implantation depth, and implantation region of Al ions, the PN-type conversion can be precisely controlled, and the reverse conversion from P-type to N-type can be achieved as needed, completing the core process of tunable PN-type. Simulation verification clearly shows a significant PN-type conversion effect.

[0033] S5: First mask layer removal A composite process combining dry etching and buffered oxide etching (BOE) wet immersion was used to completely remove the first SiO2 mask layer 2 deposited on the surface of the N-type SiC substrate 1, while retaining the complete composite structure of the PN-type conversion layer 6 and the N-type SiC substrate 1.

[0034] S6: Preparation of the second mask layer On the surface of the N-type SiC substrate 1 after the PN-type conversion is completed, a second SiO2 mask layer 5 with a thickness of 1 μm is grown again by vertical LPCVD process. This mask layer serves as a mask layer for the photonic crystal etching process, preparing for the subsequent fabrication of periodic photonic crystal structures.

[0035] S7: Second photolithography process for forming Positive photoresist 3 is spin-coated onto the surface of the second SiO2 mask layer 5, and then exposed and developed again using photolithography to form a photolithography window 4 with a preset period and size, thus obtaining the area to be etched for photonic crystal etching. The area to be etched is a periodic array structure that matches the design requirements of the photonic crystal.

[0036] S8: Second Etching and Photonic Crystal Forming Using ICP etching, the second SiO2 mask layer 5, which is not covered by the positive photoresist 3, is selectively etched. Then, the remaining second SiO2 mask layer 5 is used as a mask to etch the N-type Si substrate 1. After etching, the residual photoresist and the second SiO2 mask layer 5 are removed, and a periodic Si photonic crystal structure 7 is formed on the surface of the N-type Si substrate 1, thus completing the device fabrication. This structure provides process verification and structural reference for the subsequent fabrication of SiC photonic crystals.

[0037] As one embodiment, the following examples, in conjunction with specific parameters, provide further illustration. Example 1: A method for fabricating SiC devices with high efficiency and flexible optical control, the specific steps of which are as follows: Select a resistivity of 0.01Ω The N-type SiC substrate 1 was ultrasonically cleaned with acetone, anhydrous ethanol and deionized water for 10 min, 10 min and 15 min respectively. After being dried with nitrogen, the surface was polished to remove the surface oxide layer. A 2 μm thick first SiO2 mask layer (2) was grown on the surface of an N-type SiC substrate (1) using a vertical LPCVD process at a temperature of 700℃ and a pressure of 100 Pa, with a growth rate of 5 nm / min; the resulting structure is as follows. Figure 1 As shown, from bottom to top, they are: N-type Si substrate 1, 2μm first SiO2 mask layer 2; Positive photoresist 3 was spin-coated onto the surface of the first SiO2 mask layer 2 at a spin speed of 3000 r / min for 30 s. The pre-baking temperature was 90℃ for 90 s. Photolithography was then applied with an exposure dose of 100 mJ / cm² and a development time of 60 s to form an array of photolithographic windows 4 with a window spacing of 1 cm. Figure 1 As shown, from bottom to top, the layers are: N-type SiC substrate 1, 2μm first SiO2 mask layer 2, positive photoresist 3, and photolithography window 4. The first SiO2 mask layer 2, which was not covered by photoresist, was etched using ICP electron beam etching at a power of 500W for 300s. After etching, the layer was acid-washed with a 1:1 sulfuric acid-hydrogen peroxide mixture for 10min to remove residual photoresist and form the injection window. The resulting structure is shown below. Figure 1 As shown, from bottom to top, the sequence is: N-type SiC substrate 1, implantation window 4, which ultimately forms a mesa pattern with a spacing of 1 cm. Al ions were implanted using an ion implanter at an implantation temperature of 500℃ and an implantation dose of 1×10⁻⁶. 20 cm -3 The injection energy was 100 keV, followed by high-temperature activation in an argon atmosphere at 1500℃ for 1 hour, achieving N-type to P-type conversion. In this embodiment, precise control of the PN-type conversion was achieved by adjusting the Al ion injection dose, injection depth, and injection region. Simulation verification clearly showed a significant PN-type conversion effect, as shown in the simulation results. Figure 3 As shown in the figure, the N-type to P-type conversion effect in the Al ion implantation region is clearly displayed. The mask structure after removing residual positive photoresist is as follows. Figure 1As shown, from bottom to top, they are: N-type SiC substrate 1, P-type implantation region, i.e., PN-type conversion layer 6; First, the first SiO2 mask layer (2) is etched using a dry etching process at a rate of 10 nm / min. Then, the first SiO2 mask layer (2) is completely removed by BOE wet immersion for 20 min. A second SiO2 mask layer (5) with a thickness of 2 μm was grown again using a vertical LPCVD process at a temperature of 650℃ and a pressure of 120 Pa, with a growth rate of 4 nm / min. The resulting structure is as follows: Figure 2 As shown, from bottom to top, the layers are: N-type SiC substrate 1, PN-type conversion layer 6, and 2μm second SiO2 mask layer 5.

[0038] Positive photoresist 3 is spin-coated onto the surface of the second SiO2 mask layer 5, and then exposed and developed again using photolithography to form a periodic array of photolithographic windows 4 with a window period of 500 nm, thus obtaining the area to be etched for photonic crystal etching. The structure formed at this time is as follows: Figure 2 As shown, from bottom to top, the layers are: N-type SiC substrate 1, PN-type conversion layer 6, 2μm second SiO2 mask layer 5, positive photoresist 3, and photolithography window 4. The second SiO2 mask layer (5) and the underlying N-type SiC substrate (1) were etched using ICP electron beam etching. The etching power was 600W and the etching depth was 300nm. After etching, the residual photoresist and the second SiO2 mask layer (5) were removed to obtain a periodic SiC photonic crystal structure (7), thus completing the device fabrication. The final device structure is shown below. Figure 4 As shown, from bottom to top, the structure consists of: an N-type SiC substrate 1, a PN-type conversion layer 6, and a periodic SiC photonic crystal structure (7). This structure provides process verification and structural reference for the subsequent fabrication of SiC photonic crystals.

[0039] Example 2: A method for fabricating SiC devices with high efficiency and flexible optical control, the specific steps of which are as follows: Select a resistivity of 0.05Ω The N-type SiC substrate 1 was ultrasonically cleaned with acetone, anhydrous ethanol and deionized water for 10 min, 10 min and 15 min respectively. After being dried with nitrogen, the surface was polished to remove the surface oxide layer. A 1 μm thick first SiO2 mask layer (2) was grown on the surface of an N-type SiC substrate (1) using a vertical LPCVD process at a temperature of 700℃ and a pressure of 100 Pa, with a growth rate of 5 nm / min; the resulting structure is as follows. Figure 1As shown, from bottom to top, they are: N-type Si substrate 1, 1μm first SiO2 mask layer 2; Positive photoresist 3 was spin-coated onto the surface of the first SiO2 mask layer 2 at a spin speed of 2000 r / min for 30 s. The pre-baking temperature was 105℃ for 60 s. Photolithography was then applied with an exposure dose of 100 mJ / cm² and a development time of 50 s to form an array of photolithographic windows 4 with a window spacing of 1 cm. Figure 1 As shown, from bottom to top, the layers are: N-type SiC substrate 1, 1μm first SiO2 mask layer 2, positive photoresist 3, and photolithography window 4. The first SiO2 mask layer 2, which was not covered by photoresist, was etched using ICP electron beam etching at a power of 500W for 300s. After etching, the layer was acid-washed with a 1:1 sulfuric acid-hydrogen peroxide mixture for 10min to remove residual photoresist and form the injection window. The resulting structure is shown below. Figure 1 As shown, from bottom to top, the sequence is: N-type SiC substrate 1, implantation window 4, which ultimately forms a mesa pattern with a spacing of 1 cm. Al ions were implanted using an ion implanter at an implantation temperature of 500℃ and an implantation dose of 1×10⁻⁶. 20 cm -3 The injection energy was 100 keV, followed by high-temperature activation in an argon atmosphere at 1300℃ for 1.5 hours, achieving N-type to P-type conversion. In this embodiment, precise control of the PN-type conversion was achieved by adjusting the Al ion injection dose, injection depth, and injection region. Simulation verification clearly showed a significant PN-type conversion effect, as shown in the simulation results. Figure 3 As shown in the figure, the N-type to P-type conversion effect in the Al ion implantation region is clearly displayed. The mask structure after removing residual positive photoresist is as follows. Figure 1 As shown, from bottom to top, they are: N-type SiC substrate 1, P-type implantation region, i.e., PN-type conversion layer 6; First, the first SiO2 mask layer (2) is etched using a dry etching process at a rate of 10 nm / min. Then, the first SiO2 mask layer (2) is completely removed by BOE wet immersion for 20 min. A second SiO2 mask layer (5) with a thickness of 1 μm was grown again using a vertical LPCVD process at a temperature of 650℃ and a pressure of 120 Pa, with a growth rate of 4 nm / min. The resulting structure is as follows: Figure 2 As shown, from bottom to top, the layers are: N-type SiC substrate 1, PN-type conversion layer 6, and 1μm second SiO2 mask layer 5.

[0040] Positive photoresist 3 is spin-coated onto the surface of the second SiO2 mask layer 5, and then exposed and developed again using photolithography to form a periodic array of photolithographic windows 4 with a window period of 500 nm, thus obtaining the area to be etched for photonic crystal etching. The structure formed at this time is as follows: Figure 2 As shown, from bottom to top, the layers are: N-type SiC substrate 1, PN-type conversion layer 6, 1μm second SiO2 mask layer 5, positive photoresist 3, and photolithography window 4. The second SiO2 mask layer (5) and the underlying N-type SiC substrate (1) were etched using ICP electron beam etching. The etching power was 600W and the etching depth was 300nm. After etching, the residual photoresist and the second SiO2 mask layer (5) were removed to obtain a periodic SiC photonic crystal structure (7), thus completing the device fabrication. The final device structure is shown below. Figure 4 As shown, from bottom to top, the structure consists of: an N-type SiC substrate 1, a PN-type conversion layer 6, and a periodic SiC photonic crystal structure (7). This structure provides process verification and structural reference for the subsequent fabrication of SiC photonic crystals.

[0041] The above embodiments are merely preferred examples of the present invention and do not constitute any limitation on the present invention. Obviously, those skilled in the art, after understanding the content and principles of the present invention, can make various modifications and changes in form and detail according to the method of the present invention without departing from the principles and scope of the present invention. However, these modifications and changes based on the present invention are still within the protection scope of the claims of the present invention.

Claims

1. A method for fabricating a SiC photonic crystal device, characterized in that, Includes the following steps: Step S1: Form a first mask layer (2) on the surface of the N-type SiC substrate (1); Step S2: The first mask layer (2) is homogenized (3), at least one injection window (4) is formed by photolithography, and the injection window (4) is etched to expose the preset injection area of ​​the N-type SiC substrate (1); Step S3: Ion implantation and activation are performed on the preset implantation region of the N-type SiC substrate (1) through the implantation window (4) to form a PN-type conversion layer (6) on the surface of the N-type SiC substrate (1), thereby forming a PN junction with the N-type SiC substrate (1); Step S4: Remove the first mask layer (2); Step S5: Form a second mask layer (5) on the surface of the N-type SiC substrate (1) and the PN-type conversion layer (6) after completing step S4. Step S6: The second mask layer (5) is patterned to form an etching window corresponding to the preset photonic crystal structure; Step S7: Using the patterned second mask layer (5) as a mask, the N-type SiC substrate (1) is etched to form a periodic SiC photonic crystal structure (7) on the surface of the N-type SiC substrate (1). Step S8: Remove the remaining second mask layer (5) to obtain the SiC photonic crystal device.

2. The preparation method according to claim 1, characterized in that, The conductivity type of the ion implanted in step S3 is opposite to that of the N-type SiC substrate (1). By controlling the dose, energy and implantation area of ​​the implanted ions, the conductivity type, doping concentration and distribution area of ​​the PN-type conversion layer (6) can be controlled and adjusted, thereby obtaining N-type, P-type or PN junction type photonic crystal devices.

3. The preparation method according to claim 1 or 2, characterized in that, In step S1, the first mask layer (2) and / or in step S5, the second mask layer (5) are SiO2 layers grown by vertical low-pressure chemical vapor deposition process; wherein, the thickness of the first mask layer (2) is 1-2 μm and the thickness of the second mask layer (5) is 1-2 μm.

4. The preparation method according to claim 1, characterized in that, The graphical processing described in step S2 and / or step S6 specifically includes: Positive photoresist is coated on the surface of the mask layer (3), and a photolithographic window (4) is formed by exposure and development processes. The mask layer is selectively etched along the photolithography window (4) using an inductively coupled plasma electron beam etching process to form the injection window or the etching window; Remove residual positive photoresist (3).

5. The preparation method according to claim 1, characterized in that, The ion implantation in step S3 specifically involves: implanting Al ions at an implantation temperature of 400℃-500℃ and an implantation dose of 2×10⁻⁶. 20 cm -3 The injected energy is 100keV; the activation process is specifically: activation for 1-2 hours at 1000℃-1300℃ in an argon atmosphere.

6. The preparation method according to claim 1, characterized in that, The removal of the first mask layer (2) in step S4 and / or the removal of the second mask layer (5) in step S8 are performed using a composite process, which includes sequential dry etching and buffer oxide etching wet immersion.

7. A SiC photonic crystal device, characterized in that, include: N-type SiC substrate (1); A PN-type conversion layer (6) is formed on a designated area of ​​the surface of the N-type SiC substrate (1) by ion implantation and activation treatment, and forms a PN junction with the N-type SiC substrate (1); A periodic SiC photonic crystal structure (7) is formed on the surface of the N-type SiC substrate (1) by an etching process.

8. The SiC photonic crystal device according to claim 7, characterized in that, The conductivity type of the PN-type conversion layer (6) is opposite to that of the N-type SiC substrate (1). Its doping concentration and distribution area are determined by the dose, energy and implantation area of ​​ion implantation. The PN-type conversion layer (6) is a P-type region formed by implanting Al ions, which forms a PN junction with the N-type SiC substrate (1).

9. The SiC photonic crystal device according to claim 7, characterized in that, The period, depth and duty cycle of the periodic SiC photonic crystal structure (7) are determined by the parameters of the etching process to achieve the preset photonic bandgap characteristics.

10. The SiC photonic crystal device according to any one of claims 7-9, characterized in that, The resistivity of the N-type SiC substrate (1) is 0.01~0.05Ω·cm; the periodic SiC photonic crystal structure (7) is an array of holes or columnar structures with a period of 500nm and an etching depth of 300nm.

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