A large-scale all-optical matrix multiplication chip and waveguide decoupling architecture

Abstract

This invention relates to the field of silicon-based integrated photonics and all-optical matrix computing chip technology. It discloses a large-scale all-optical matrix multiplication chip and a waveguide decoupling architecture, comprising: an optical input port configured to receive an input optical signal containing multiple wavelength components; and a signal loading array coupled to the optical input port and configured to load first matrix data onto different wavelength components or different spatial channels of the input optical signal, generating a modulated optical signal carrying matrix elements. This invention employs micro-ring low-voltage modulation combined with passive waveguide summation, resulting in lower size and power consumption compared to MZI chips, and easier large-scale integration. Unlike the all-micro-ring scheme, the computational entity is unaffected by temperature drift, eliminating the need for temperature control and wavelength locking components. Through waveguide refractive index design, PIN absorption, and coherent compensation, multi-level optical domain crosstalk suppression solves the problem of excessive crosstalk in traditional cross-matrix large-scale computation. Back-end differential detection noise reduction and a modular decoupling architecture provide excellent adaptability.

Description

Technical Field

[0001] This invention relates to the field of silicon-based integrated photonics and all-optical matrix computing chip technology, specifically a large-scale all-optical matrix multiplication chip and waveguide decoupling architecture. Background Technology

[0002] All-optical matrix multiplication chips are core devices in the field of photonic computing and are widely used in fields such as artificial intelligence, image processing and scientific computing. They achieve low-power, high-throughput matrix operations through optical domain parallel computing.

[0003] Existing all-optical matrix multiplication chips mainly use Mach-Zehnder interferometer (MZI) arrays or microring resonator arrays as basic computing units. MZI arrays achieve weight loading by adjusting the phase difference of the interferometer arms through thermo-optic or electro-optic effects, but suffer from problems such as large device size, high power consumption, and difficulties in large-scale integration. While microring resonator arrays are smaller in size, their resonant wavelengths are temperature-sensitive, requiring complex wavelength locking systems.

[0004] In recent years, all-optical computing architectures based on cross-switching matrices have attracted attention. This architecture achieves multiplication through the coupling structure at the intersection of the input row waveguide and the output column waveguide, and the summation is naturally completed in the column waveguide, which has the advantages of simple structure and passive summation. However, existing cross-switching matrix schemes have the following technical problems: evanescent wave coupling at the intersection introduces severe residual crosstalk, and the superposition of leakage light from adjacent unselected intersections seriously interferes with the calculation results; as the matrix size increases (e.g., 16×16 and above), crosstalk increases exponentially, leading to a sharp decrease in calculation accuracy; there is a lack of effective on-chip crosstalk suppression mechanisms, and traditional electrical domain post-compensation methods cannot fundamentally solve the crosstalk problem in the optical domain. Therefore, we propose a large-scale all-optical matrix multiplication chip and waveguide decoupling architecture to solve the above-mentioned problems. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a large-scale all-optical matrix multiplication chip and waveguide decoupling architecture, which solves the problems of large size and high power consumption of existing MZI arrays, the need for temperature control and frequency locking circuits for micro-ring arrays, the surge in crosstalk of traditional cross-coupled chips as the matrix expands, the inability to eliminate optical crosstalk by electrical compensation alone, and the degradation of calculation accuracy.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a large-scale all-optical matrix multiplication chip, comprising:

[0007] The optical input port is configured to receive an input optical signal containing multiple wavelength components;

[0008] A signal loading array is coupled to the optical input port and configured to load the first matrix data onto different wavelength components or different spatial channels of the input optical signal to generate a modulated optical signal carrying matrix elements.

[0009] The core of the cross-switch matrix includes multiple input row waveguides and multiple output column waveguides. The input row waveguides and the output column waveguides interact optically without physical contact at the intersection through an evanescent wave coupling structure.

[0010] In this process, each intersection point modulates the optical transmission power by adjusting the evanescent wave coupling efficiency to perform matrix element multiplication of the modulated optical signal, and the output column waveguide achieves summation of the coupled signals from different input row waveguides through passive superposition of optical power; and

[0011] A waveguide decoupling network, connected to the output of the cross-switch matrix core, is configured to suppress and eliminate residual coupling crosstalk between the input row waveguide and the output column waveguide, and output a weighted summation optical signal.

[0012] Preferably, the evanescent wave coupling structure includes:

[0013] A first tapered coupling region located on one side of the input row waveguide; a second tapered coupling region located on one side of the output column waveguide;

[0014] The first conical coupling region and the second conical coupling region are spatially isolated, have no physical contact, and extend in parallel for a coupling length of 0.5μm to 5μm, with a vertical spacing of 50nm to 300nm. The directional coupling of optical power is achieved through the spacing and the coupling length.

[0015] Preferably, the waveguide decoupling network includes:

[0016] Multiple reverse-biased PIN structures are integrated at the input end of each of the output column waveguides; wherein the reverse-biased PIN structures are configured to generate a free carrier absorption effect under a reverse bias voltage of 1V to 3V, so that the leakage stray light attenuation is not less than 10dB.

[0017] Preferably, the signal loading array includes:

[0018] A set of micro-ring modulators arranged in parallel, each micro-ring modulator corresponding to a specific wavelength channel; wherein, the micro-ring modulator adjusts its own resonant wavelength by an electrical tuning voltage of 0V to 2V to perform weight writing of the first matrix data and optical signal modulation.

[0019] Preferably, in the core of the cross-switch matrix, the input row waveguide and the output column waveguide are composed of silicon waveguide layers of different thicknesses, such that the effective refractive index difference between the two is not less than 0.2, so as to suppress crosstalk caused by phase mismatch from a structural perspective.

[0020] Preferably, it further includes: a set of balanced photodetectors connected to the output of the waveguide decoupling network, configured to convert the weighted summed optical signal into a current signal and eliminate common-mode noise through differential detection.

[0021] Preferably, the waveguide decoupling network includes a crosstalk compensation waveguide arranged on the output side of the cross switch matrix core, including a waveguide segment loaded with a preset attenuation coefficient of 0.1dB to 20dB, for canceling leakage light from adjacent unselected cross points in the optical domain.

[0022] Preferably, the crosstalk compensation waveguide comprises:

[0023] An optical beam splitter is used to split the original output optical signal into a main signal path and a crosstalk compensation path.

[0024] An adjustable optical attenuator is located on the crosstalk compensation path, and its attenuation value is adjustable from 0.5dB to 15dB.

[0025] An optical beam combiner is used to optically coherently superimpose the attenuated light on the crosstalk compensation path with the main signal light on the signal path.

[0026] This invention provides a decoupling architecture for reducing waveguide crosstalk in large-scale photonic computing chips, comprising:

[0027] The input port is used to receive optical signals carrying crosstalk components from multiple output waveguides;

[0028] An absorption decoupling unit, connected to the input port, is configured to provide first-stage crosstalk suppression through the free carrier absorption effect, so that the crosstalk attenuation is not less than 10dB.

[0029] An interferometric decoupling unit, connected to the output of the absorptive decoupling unit, is configured to provide a second-stage crosstalk suppression through optical coherence superposition.

[0030] The absorptive decoupling unit and the interferometric decoupling unit are cascaded together to form a dual-mode crosstalk suppression link.

[0031] Preferably, the absorption decoupling unit includes multiple reverse-biased PIN structures, and the interference decoupling unit includes an optical beam splitter, an adjustable optical attenuator, an adjustable optical phase shifter, and an optical beam combiner connected in sequence.

[0032] Beneficial effects

[0033] This invention provides a large-scale all-optical matrix multiplication chip and a waveguide decoupling architecture. Compared with existing technologies, it has the following advantages:

[0034] This large-scale all-optical matrix multiplication chip and waveguide decoupling architecture replaces a large number of interference units with micro-ring modulation combined with passive waveguide summation. The micro-rings only require 0-2V low-voltage modulation, resulting in a compact device layout and significantly reduced chip area and overall power consumption. This solves the problems of large size, high power consumption, and difficulty in large-scale integration of MZI devices. Compared with the all-micro-ring array scheme, this invention only uses micro-rings to load signals at the input end, and matrix operations are achieved by evanescent wave coupling. The core computing unit is not affected by the temperature drift of the resonant wavelength, eliminating the need for a supporting temperature control and wavelength locking system, simplifying peripheral circuits, and reducing hardware costs.

[0035] Compared to traditional cross-coupled matrices, this invention suppresses waveguide crosstalk from multiple dimensions. The row and column waveguides employ a differentiated thickness design with a refractive index difference of not less than 0.2, which structurally suppresses phase mismatch crosstalk. The input end of the column waveguide integrates a reverse PIN structure, which achieves ≥10dB stray light attenuation through free carrier absorption. The residual leakage light is then coherently canceled by the compensated waveguide, resulting in noise reduction throughout the optical domain. This overcomes the drawbacks of increased crosstalk exponent, deteriorated accuracy, and the inability of electrical compensation alone to fundamentally address the issue in large matrices.

[0036] The output is equipped with a balanced photodetector, which uses differential detection to eliminate common-mode noise and further improve computational accuracy. Passive optical power superposition achieves column summation, eliminating the need for active summing devices. The matching two-stage decoupling architecture can be used modularly and independently, and can be integrated on-chip or externally connected to modify existing photonic chips, thus broadening the product's applicability. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the overall architecture of the large-scale all-optical matrix multiplication chip of the present invention;

[0038] Figure 2 This is a schematic diagram of the evanescent wave coupling structure of the core of the cross-switch matrix of the present invention;

[0039] Figure 3 This is a schematic diagram of the dual-mode crosstalk suppression link structure of the present invention. Detailed Implementation

[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] like Figure 1-3 As shown:

[0042] A large-scale all-optical matrix multiplication chip comprises, from optical input to photoelectric output, five core components along the optical path: an optical input port, a signal loading array, a cross-switch matrix core, a waveguide decoupling network, and a balanced photodetector. The optical input port receives multiple multi-wavelength composite input optical signals. The signal loading array is optically coupled to the optical input port, modulating the data of the first matrix to be computed onto different wavelength channels or spatial channels of the input light, outputting a modulated optical signal carrying matrix weight information. The modulated optical signal is fed into the cross-switch matrix core to perform point-to-point multiplication of matrix elements and summation of column-direction passive optical power. The output of the cross-switch matrix core is connected to the waveguide decoupling network, which eliminates crosstalk stray light caused by residual evanescent coupling between row and column waveguides in the optical domain. The output of the waveguide decoupling network is connected to the balanced photodetector to complete the optical-to-electrical signal conversion and filter out common-mode noise, finally outputting an electrical signal carrying the complete matrix multiplication and addition results.

[0043] The optical input port adopts an on-chip grating coupler or end-face coupled waveguide structure to support multi-wavelength WDM multiplexed optical input, and is compatible with multi-wavelength parallel incidence of broadband light sources, realizing parallel feeding of multi-channel input light into the internal optical path of the chip.

[0044] The signal loading array consists of multi-channel parallel-arranged micro-ring modulators, with each micro-ring modulator uniquely corresponding to an independent wavelength channel. The micro-ring modulators use a low-voltage tuning voltage of 0V-2V to change the effective refractive index of the ring waveguide, fine-tuning their own resonant wavelength. The first matrix data weighting is written based on the strength of the resonant coupling, achieving amplitude modulation of the input optical signal. Compared to traditional MZI high-voltage modulation, this scheme features lower micro-ring modulation drive voltage, lower power consumption per device, and higher array integration density. Since each micro-ring is responsible for single-wavelength modulation, the temperature drift effect of a single wavelength channel is confined to its independent channel, reducing the overall temperature control difficulty of the entire array.

[0045] The core of the cross-switch matrix consists of multiple parallel input row waveguides and multiple vertically staggered output column waveguides. The row waveguides and column waveguides intersect in space but have no physical contact. At each spatial intersection point, a conical evanescent wave coupling structure is set as an independent matrix multiplication unit.

[0046] The evanescent wave coupling structure includes a first tapered coupling region located on the sidewall of the input row waveguide and a second tapered coupling region located on the sidewall of the output column waveguide. The two tapered coupling regions are spatially isolated without physical contact, with parallel extension coupling lengths of 0.5μm-5μm. The vertical spacing between the two waveguide layers is controlled between 50nm-300nm. The directional coupling efficiency of the evanescent wave power is changed by adjusting the coupling length of the tapered regions and the vertical spacing between the layers. The magnitude of the coupled light power corresponds to the matrix multiplication weight coefficient, and the optical domain matrix element multiplication operation is completed at a single intersection point. The uncoupled remaining light continues to propagate along the original row waveguide to the next intersection point.

[0047] The passive summation mechanism involves the same output column waveguide collecting the optical power input from all input row waveguides in the same row through the intersection point. Relying on the natural superposition of optical power within the waveguide, the summation of multi-channel multiplication results in the column direction is achieved passively, thus natively completing matrix multiplication and addition operations and eliminating the need for a large number of active summation devices.

[0048] The refractive index difference is used to resist basic crosstalk. The input row waveguide and the output column waveguide are made of silicon-based waveguide layers of different thicknesses. The effective refractive index difference between the two waveguide materials is ≥0.2. By relying on refractive index mismatch, unintentional evanescent coupling caused by phase matching at non-target points is suppressed, and the original crosstalk substrate is reduced from the waveguide material structure level.

[0049] The waveguide decoupling network is integrated at the front end of all output column waveguides, serving as an intermediate stage between the cross matrix and the photodetector. It employs a two-stage architecture of absorption-based crosstalk suppression and coherent compensation-based crosstalk cancellation to eliminate residual leakage stray light in the optical domain, which is the core improvement of this invention in suppressing crosstalk.

[0050] First stage, reverse PIN free carrier absorption decoupling unit (claim 3): Each output column waveguide input terminal integrates a reverse bias PIN semiconductor structure. After applying a 1V-3V reverse bias voltage to the PIN, the free carrier absorption effect of the silicon material is excited, and stray light is efficiently absorbed by free carriers, achieving leakage stray light attenuation ≥10dB and absorbing most of the broad spectrum random leakage crosstalk light.

[0051] The second stage is a coherent crosstalk compensation waveguide (claims 7 and 8): The crosstalk compensation waveguide is integrated at the rear end of the PIN absorption unit and includes an optical beam splitter, an adjustable optical attenuator, and an optical beam combiner; the optical beam splitter splits the output light after the first stage of absorption into a main signal path and a crosstalk compensation path; the compensation path is equipped with an adjustable optical attenuator with an attenuation coefficient adjustable in the range of 0.5dB-15dB and a preset compensation attenuation of 0.1dB-20dB; the attenuated compensation light is coherently superimposed with the main optical path signal light through the optical beam combiner, and the principle of anti-phase cancellation is used to eliminate the remaining coherent leakage crosstalk at adjacent intersections. The two stages work together to achieve all-dimensional stray light suppression.

[0052] Multiple sets of balanced photodetectors correspond one-to-one with each decoupled output optical path, converting the weighted summed optical signal into a differential current signal; relying on the differential detection structure to cancel the common-mode noise introduced by the chip optical path and back-end circuit, the signal-to-noise ratio of the sampled output signal is further improved.

[0053] This invention provides a decoupling architecture for reducing waveguide crosstalk in large-scale photonic computing chips. This decoupling architecture is an independent modular device that can be monolithically integrated or externally mounted at the output end of various cross-coupled photonic matrix chips. It includes cascaded input ports, absorption decoupling units, and interference decoupling units. The absorption unit and the interference unit form a two-stage crosstalk suppression link in two modes.

[0054] Input port, multi-channel optical waveguide interface, receives multi-channel output optical signals carrying residual crosstalk components;

[0055] The absorption decoupling unit integrates multiple sets of reverse bias PIN semiconductor structures. It relies on the external reverse voltage to excite free carrier absorption to achieve the first stage of broad-spectrum crosstalk attenuation, with a single-channel crosstalk suppression amplitude of ≥10dB.

[0056] The interferometric decoupling unit, in a single channel, consists of an optical beam splitter, an adjustable optical attenuator, an adjustable optical phase shifter, and an optical beam combiner connected in sequence. After beam splitting, one path serves as the main signal, while the other path undergoes attenuation and phase modulation to generate anti-phase compensation light. Finally, the beams are combined to coherently cancel out coherent residual crosstalk, achieving two-stage precise crosstalk compensation.

[0057] Example 1

[0058] The 32×32 all-optical matrix multiplication chip uses a 4-channel WDM broadband light source at its optical input port. The signal loading array is equipped with 32 parallel micro-ring modulators, with a single micro-ring modulation voltage of 0-1.8V to achieve matrix A-weighted modulation. The cross-matrix uses 32 input row waveguides and 32 output column waveguides, with a 2μm coupling length at the cross-point cone region, a 120nm vertical spacing between waveguide layers, and a 0.25 refractive index difference between the row and column waveguides. Each column waveguide is reverse biased at 2V at the front-end PIN, achieving 13dB stray light attenuation through free carrier absorption. The rear-end compensation waveguide attenuator is set with 3dB compensation attenuation, coherently canceling the remaining crosstalk. The end uses silicon-based balanced PD differential sampling to achieve all-optical parallel multiplication of the 32×32 matrix, with overall crosstalk below -25dB.

[0059] Example 2

[0060] An independent waveguide decoupling architecture module is used to fabricate an 8-channel independent decoupling chip with a front-end PIN reverse voltage of 2.5V and a first-stage crosstalk attenuation of 15dB. The interference unit has an adjustable attenuation range of 1-12dB, and is paired with an adjustable phase shifter to achieve precise phase matching. The module can be connected to the output of existing commercial cross-coupled photonic chips to improve the crosstalk defects of existing equipment.

[0061] This solution replaces a large number of interference units with micro-ring modulation combined with passive waveguide summation. The micro-rings only require 0-2V low-voltage modulation, resulting in a compact device arrangement and significantly reduced chip area and overall power consumption. This solves the problems of large size, high power consumption, and difficulty in large-scale integration of MZI devices. Compared with the all-micro-ring array solution, this invention only uses micro-rings to load signals at the input end, and matrix operations are achieved by evanescent wave coupling. The core computing unit is not affected by the temperature drift of the resonant wavelength, eliminating the need for a supporting temperature control and wavelength locking system, simplifying the peripheral circuitry, and reducing hardware costs.

[0062] Compared to traditional cross-coupled matrices, this invention suppresses waveguide crosstalk from multiple dimensions. The row and column waveguides employ a differentiated thickness design with a refractive index difference of not less than 0.2, which structurally suppresses phase mismatch crosstalk. The input end of the column waveguide integrates a reverse PIN structure, which achieves ≥10dB stray light attenuation through free carrier absorption. The residual leakage light is then coherently canceled by the compensated waveguide, resulting in noise reduction throughout the optical domain. This overcomes the drawbacks of increased crosstalk exponent, deteriorated accuracy, and the inability of electrical compensation alone to fundamentally address the issue in large matrices.

[0063] The output is equipped with a balanced photodetector, which uses differential detection to eliminate common-mode noise and further improve computational accuracy. Passive optical power superposition achieves column summation, eliminating the need for active summing devices. The matching two-stage decoupling architecture can be used modularly and independently, and can be integrated on-chip or externally connected to modify existing photonic chips, thus broadening the product's applicability.

[0064] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A large-scale all-optical matrix multiplication chip, characterized in that: include: The optical input port is configured to receive an input optical signal containing multiple wavelength components; A signal loading array is coupled to the optical input port and configured to load the first matrix data onto different wavelength components or different spatial channels of the input optical signal to generate a modulated optical signal carrying matrix elements. The core of the cross-switch matrix includes multiple input row waveguides and multiple output column waveguides. The input row waveguides and the output column waveguides interact optically without physical contact at the intersection through an evanescent wave coupling structure. In this process, each intersection point changes the optical transmission power by adjusting the evanescent wave coupling efficiency to complete the matrix element multiplication operation of the modulated optical signal, and the output column waveguide achieves the summation operation of the coupled signals of different input row waveguides through the passive superposition of optical power. as well as A waveguide decoupling network, connected to the output of the cross-switch matrix core, is configured to suppress and eliminate residual coupling crosstalk between the input row waveguide and the output column waveguide, and output a weighted summation optical signal.

2. The large-scale all-optical matrix multiplication chip according to claim 1, characterized in that: The evanescent wave coupling structure includes: A first tapered coupling region located on one side of the input row waveguide; a second tapered coupling region located on one side of the output column waveguide; The first conical coupling region and the second conical coupling region are spatially isolated, have no physical contact, and extend in parallel for a coupling length of 0.5μm to 5μm, with a vertical spacing of 50nm to 300nm. The directional coupling of optical power is achieved through the spacing and the coupling length.

3. The large-scale all-optical matrix multiplication chip according to claim 1, characterized in that: The waveguide decoupling network includes: Multiple reverse-biased PIN structures are integrated at the input end of each of the output column waveguides; wherein the reverse-biased PIN structures are configured to generate a free carrier absorption effect under a reverse bias voltage of 1V to 3V, so that the leakage stray light attenuation is not less than 10dB.

4. The large-scale all-optical matrix multiplication chip according to claim 1, characterized in that: The signal loading array includes: A set of micro-ring modulators arranged in parallel, each micro-ring modulator corresponding to a specific wavelength channel; wherein, the micro-ring modulator adjusts its own resonant wavelength by an electrical tuning voltage of 0V to 2V to perform weight writing of the first matrix data and optical signal modulation.

5. The large-scale all-optical matrix multiplication chip according to claim 1, characterized in that: In the core of the cross-switch matrix, the input row waveguide and the output column waveguide are composed of silicon waveguide layers of different thicknesses, so that the effective refractive index difference between the two is not less than 0.2, in order to suppress crosstalk caused by phase mismatch from a structural perspective.

6. The large-scale all-optical matrix multiplication chip according to claim 1, characterized in that: Also includes: A set of balanced photodetectors is connected to the output of the waveguide decoupling network and configured to convert the weighted summed optical signal into a current signal and eliminate common-mode noise through differential detection.

7. The large-scale all-optical matrix multiplication chip according to claim 1, characterized in that: The waveguide decoupling network includes a crosstalk compensation waveguide arranged on the output side of the cross switch matrix core. The crosstalk compensation waveguide includes a waveguide segment loaded with a preset attenuation coefficient of 0.1dB to 20dB to cancel leakage light from adjacent unselected cross points in the optical domain.

8. The large-scale all-optical matrix multiplication chip according to claim 7, characterized in that: The crosstalk compensation waveguide includes: An optical beam splitter is used to split the original output optical signal into a main signal path and a crosstalk compensation path. An adjustable optical attenuator is located on the crosstalk compensation path, and its attenuation value is adjustable from 0.5dB to 15dB. An optical beam combiner is used to optically coherently superimpose the attenuated light on the crosstalk compensation path with the main signal light on the signal path.

9. A decoupling architecture for reducing waveguide crosstalk in large-scale photonic computing chips, characterized in that, include: The input port is used to receive optical signals carrying crosstalk components from multiple output waveguides; An absorption decoupling unit, connected to the input port, is configured to provide first-stage crosstalk suppression through the free carrier absorption effect, so that the crosstalk attenuation is not less than 10dB. An interferometric decoupling unit, connected to the output of the absorptive decoupling unit, is configured to provide a second-stage crosstalk suppression through optical coherence superposition. The absorptive decoupling unit and the interferometric decoupling unit are cascaded together to form a dual-mode crosstalk suppression link.

10. The decoupling architecture according to claim 9, characterized in that, The absorption decoupling unit includes multiple reverse-biased PIN structures, and the interference decoupling unit includes an optical beam splitter, an adjustable optical attenuator, an adjustable optical phase shifter, and an optical beam combiner connected in sequence.

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