Display panel and display device

Abstract

This application discloses a display panel and display device, belonging to the field of display technology. The first spacer is arranged to overlap with the first sub-pixel with high light transmittance, thereby reducing the light emission area of ​​the first sub-pixel, improving the abnormal color edge phenomenon in the display detail position, and enhancing the display sharpness of text edges and the naturalness of color transition.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] An RGBX display panel refers to a panel that adds an X sub-pixel to the traditional RGB three sub-pixels. The X sub-pixel can be a white sub-pixel, a yellow sub-pixel, an orange sub-pixel, etc., to adjust the white balance, while also improving the light transmittance of the display and reducing the power consumption of the display panel.

[0003] However, in areas displaying details, such as text edges, the introduction of X subpixels can easily lead to abrupt color transitions and produce a color edge phenomenon in the X subpixel color, affecting the display effect.

[0004] Therefore, how to improve the abnormal color edge phenomenon in the display details has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] This application provides a display panel and a display device to at least partially solve the above-mentioned technical problems.

[0006] To achieve the above objectives, according to a first aspect of this application, a display panel is provided, comprising a plurality of pixel units, the display panel comprising a first substrate and a second substrate disposed opposite to each other and a plurality of first spacers located between the first substrate and the second substrate; The pixel unit includes a first sub-pixel and a second sub-pixel, wherein the emission color of the second sub-pixel is any one of red, green and blue, and the transmittance of the first sub-pixel is greater than the transmittance of the second sub-pixel. Wherein, the orthographic projection of the first spacer on the first substrate at least partially overlaps with the orthographic projection of the first sub-pixel on the first substrate.

[0007] Optionally, the pixel unit includes four sub-pixels, namely the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel; the first sub-pixel emits white light, and the second, third, and fourth sub-pixels emit red, green, and blue light, respectively; wherein the orthographic projection of the first spacer on the first substrate is separate from the orthographic projections of the second, third, and fourth sub-pixels on the first substrate.

[0008] Optionally, a plurality of pixel units are arranged in an array along a first direction and a second direction, the first direction intersecting the second direction; wherein, four sub-pixels in a pixel unit are arranged along the first direction, the four sub-pixels in two adjacent pixel units along the first direction are arranged in the same order, and the two first sub-pixels in two adjacent pixel units along the second direction are staggered.

[0009] Optionally, the emission colors of two adjacent sub-pixels along the second direction are different.

[0010] Optionally, the first sub-pixels and the fourth sub-pixels of the plurality of pixel units are arranged alternately along the second direction.

[0011] Optionally, the first spacer is disposed at the end of the first sub-pixel along the second direction.

[0012] Optionally, along the first direction, a second sub-pixel or a third sub-pixel is provided between the first sub-pixel and the fourth sub-pixel.

[0013] Optionally, a plurality of pixel units are arranged in an array along a first direction and a second direction, the first direction intersecting the second direction; wherein, four sub-pixels in a pixel unit are arranged in an array along the first direction and the second direction, and the first sub-pixel and the fourth sub-pixel of a plurality of pixel units are arranged alternately along the second direction.

[0014] Optionally, the light emission colors of two adjacent sub-pixels of two adjacent pixel units along the first direction are the same.

[0015] Optionally, the display panel includes a plurality of driving transistors, which are electrically connected to the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel, respectively; wherein the plurality of driving transistors are disposed on one side of the first sub-pixel and on one side of the fourth sub-pixel.

[0016] Optionally, the display panel includes a source / drain layer and a pixel electrode, wherein the pixel electrode is electrically connected to the source / drain layer through a first via; wherein the orthographic projection of the first via on the first substrate is outside the orthographic projection of the first spacer on the first substrate.

[0017] Optionally, the display panel further includes a common electrode and a connecting electrode, wherein the common electrode is disposed opposite to the pixel electrode; and the connecting electrode overlaps the surface of the common electrode.

[0018] Optionally, the display panel further includes a plurality of second spacers located between the first substrate and the second substrate; the orthographic projection of the second spacers on the first substrate at least partially overlaps with the orthographic projection of the first sub-pixel on the first substrate; wherein the height of the first spacers is less than the height of the second spacers.

[0019] Optionally, the density of the first spacer is greater than the density of the second spacer.

[0020] According to a second aspect of this application, a display device is provided, comprising a display panel as described in any of the above.

[0021] In the display panel of this application embodiment, by using the above technical solution, the first spacer is arranged to overlap with the first sub-pixel with high light transmittance, thereby reducing the light emission area of ​​the first sub-pixel, improving the abnormal color edge phenomenon in the display detail position, and enhancing the display sharpness of the text edge and the naturalness of the color transition.

[0022] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0025] Figure 1 This is a schematic diagram of the overall structure of the display panel provided in an exemplary embodiment of this disclosure; Figure 2 This is a schematic diagram of the structure of the first substrate of the display panel provided in an exemplary embodiment of this disclosure; Figure 3 This is a schematic diagram of a first pixel arrangement of a display panel provided in an exemplary embodiment of this disclosure; Figure 4 This is a schematic diagram of a second pixel arrangement of a display panel provided in an exemplary embodiment of this disclosure; Figure 5 This is a schematic diagram of a third pixel arrangement of a display panel provided in an exemplary embodiment of this disclosure; Figure 6 This is a schematic diagram of a fourth pixel arrangement of a display panel provided in an exemplary embodiment of this disclosure; Figure 7 This is a schematic diagram of a fifth pixel arrangement of a display panel provided in an exemplary embodiment of this disclosure; Figure 8 This is a schematic diagram of the overall structure of the display device provided in an exemplary embodiment of this disclosure.

[0026] Explanation of reference numerals in the attached figures: 10. Display panel; 11. First substrate; 12. Second substrate; 13. Gate line; 14. Data line; 20. Pixel unit; 21. First sub-pixel; 22. Second sub-pixel; 23. Third sub-pixel; 24. Fourth sub-pixel; 31. First spacer; 32. Second spacer; 41. First driving thin-film transistor; 42. Second driving thin-film transistor; 43. Third driving thin-film transistor; 44. Fourth driving thin-film transistor; 50. Substrate; 51. Gate layer; 52. First insulating layer; 53. Active layer; 54. Source / drain layer; 55. First passivation layer; 56. Planarization layer; 57. Common electrode; 58. Connecting electrode; 59. Second passivation layer; 60. Pixel electrode; 601. First pixel electrode; 602. Second pixel electrode; 603. Third pixel electrode; 604. Fourth pixel electrode; 61. First via; 62. Second via; 100. Display device; 110. Device body. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0028] According to the first aspect of this application, referring to Figures 1 to 7 This disclosure provides a display panel 10, including a plurality of pixel units 20. The display panel 10 includes a first substrate 11 and a second substrate 12 disposed opposite to each other, and a plurality of first spacers 31 located between the first substrate 11 and the second substrate 12. The pixel unit 20 includes a first sub-pixel 21 and a second sub-pixel 22. The emission color of the second sub-pixel 22 is any one of red, green and blue. The light transmittance of the first sub-pixel 21 is greater than that of the second sub-pixel 22. The orthographic projection of the first spacer 31 on the first substrate 11 at least partially overlaps with the orthographic projection of the first sub-pixel 21 on the first substrate 11.

[0029] The first spacer 31 can stably support the thickness of the display panel 10, maintain the overall flatness of the panel structure, and avoid substrate deformation and uneven thickness during panel bonding, encapsulation and use, thus ensuring the overall display stability of the panel; the first sub-pixel 21 has high light transmittance, which improves the overall light transmittance of the panel and reduces the overall power consumption of the panel. Compared with the pure RGB display panel 10, it has lower energy consumption at the same display brightness.

[0030] The light transmittance of the first sub-pixel 21 is greater than that of the second sub-pixel 22. The color of the first sub-pixel 21 can be white, yellow, orange, etc. For ease of explanation, the following will take the first sub-pixel 21 as white as an example. It can be understood that other colors such as yellow and orange have the same or similar effects.

[0031] In the prior art, all areas of the white sub-pixel can transmit light and emit light, but the white light overflows severely in the detailed areas, resulting in white edges. This application uses the first spacer 31 to block part of the light-emitting area of ​​the white first sub-pixel 21, thereby reducing the light intensity of the white light, reducing the effective light-emitting and light-emitting area of ​​the white sub-pixel, suppressing the excessive overflow of white light at detailed positions such as text edges and image detail boundaries, and weakening the white edge phenomenon.

[0032] For ease of understanding and description, the first sub-pixel 21 emits white light and is a white sub-pixel, denoted by the symbol W in the attached diagram; the second sub-pixel 22 emits red light and is a red sub-pixel, denoted by the symbol R in the attached diagram; the third sub-pixel 23 emits green light and is a green sub-pixel, denoted by the symbol G in the attached diagram; and the fourth sub-pixel 24 emits blue light and is a blue sub-pixel, denoted by the symbol B in the attached diagram.

[0033] Specifically, the first substrate 11 can be an array substrate, and the second substrate 12 can be a color filter substrate, with a liquid crystal layer disposed between the first substrate 11 and the second substrate 12. The color filter substrate can be provided with multiple color resists to correspond to sub-pixels of different colors. It can be understood that the brightness of the light source corresponding to a sub-pixel is N1, the brightness of the emitted light from the sub-pixel is N2, and the transmittance of the sub-pixel refers to the ratio of N2 / N1. For example, if the backlight brightness corresponding to a blue sub-pixel is 5000 nits, and the brightness of the light emitted from the blue sub-pixel onto the display panel is 1000 nits, then the transmittance of the blue sub-pixel is 20%. The transmittance of the sub-pixel can be adjusted by adjusting the dye concentration in the color resist; the lower the dye concentration, the lower the color saturation and the higher the transmittance.

[0034] In some embodiments, please refer to the following for details. Figure 3 , Figure 4 , Figure 6 , Figure 7The pixel unit 20 includes four sub-pixels, namely the first sub-pixel 21, the second sub-pixel 22, the third sub-pixel 23, and the fourth sub-pixel 24; the first sub-pixel 21 emits white light, and the second sub-pixel 22, the third sub-pixel 23, and the fourth sub-pixel 24 emit red, green, and blue light, respectively; wherein, the orthographic projection of the first spacer 31 on the first substrate 11 is separated from the orthographic projections of the second sub-pixel 22, the third sub-pixel 23, and the fourth sub-pixel 24 on the first substrate 11.

[0035] The first sub-pixel 21 has a higher light transmittance than the second sub-pixel 22. Similarly, the first sub-pixel 21 has a higher light transmittance than the third sub-pixel 23 and the fourth sub-pixel 24. This is beneficial for adjusting the white balance and improving the overall light transmittance of the display panel. When the first sub-pixel 21 emits white light, its light transmittance can reach over 80%. The RGBW four-pixel color matching system not only relies on the white sub-pixel to achieve the advantages of high light transmittance and low energy consumption, but also ensures the panel's complete color display capability through the red, green, and blue primary color sub-pixels, thus balancing energy-saving characteristics and high-definition color display effects. The orthographic projection of the first spacer 31 on the first substrate 11 is separated from the orthographic projections of the second sub-pixel 22, the third sub-pixel 23, and the fourth sub-pixel 24 on the first substrate 11. That is, the orthographic projection of the first spacer 31 on the first substrate 11... The first spacer 31 does not overlap with the orthographic projections of the second sub-pixel 22, the third sub-pixel 23, and the fourth sub-pixel 24 on the first substrate 11. It does not encroach on the aperture ratio of the second sub-pixel 22, the third sub-pixel 23, and the fourth sub-pixel 24, thus avoiding the first spacer 31 from obstructing the red, green, and blue sub-pixels. It can completely preserve the entire effective light-emitting area of ​​the red, green, and blue sub-pixels, ensuring normal light emission of the three primary colors and avoiding problems such as darker colors, color gamut loss, and color distortion caused by obstructed light emission from the red, green, and blue sub-pixels, thus ensuring the color reproduction accuracy of the image. It achieves differentiated control by specifically constraining the light emission of white sub-pixels without affecting color display, precisely focusing on improving white edges without obstructing the light emission of colored sub-pixels, ensuring the color saturation and color accuracy of the color display, and effectively improving the naturalness of color transitions in detail areas.

[0036] In some embodiments, please refer to the following for details. Figure 4 Multiple pixel units 20 are arranged in an array along a first direction and a second direction, the first direction and the second direction intersect; wherein, four sub-pixels in the pixel unit 20 are arranged along the first direction, the four sub-pixels in two adjacent pixel units 20 along the first direction are arranged in the same order, and the two first sub-pixels 21 in two adjacent pixel units 20 along the second direction are staggered.

[0037] It is understandable that the first direction is the extension direction of the X-axis, and the second direction is the extension direction of the Y-axis. That is, the first direction is the horizontal direction of the display panel, and the second direction is the vertical direction of the display panel.

[0038] The unified horizontal pixel arrangement rule of the four sub-pixels simplifies the panel pixel layout design and manufacturing process, reduces the difficulty of production processes, and improves product yield. The staggered arrangement of white sub-pixels in the second direction improves the drawbacks of vertically aligned white sub-pixels. Vertical alignment leads to the vertical concentration and superposition of white light, resulting in severe white light accumulation in detail areas and more prominent white edges and whitening issues. The vertically staggered arrangement of white sub-pixels can disperse the light distribution of white sub-pixels, reduce local concentrated white light overflow, and make white light evenly dispersed within the panel, further weakening the white edge problem at the detail edges. At the same time, the staggered arrangement can optimize the light mixing effect of the entire panel, making the color transition softer and more natural, and improving the overall image detail.

[0039] For details, please refer to Figure 4 In the first direction, the four sub-pixels in two adjacent pixel units 20 are arranged in the same order; in the second direction, the four sub-pixels in two adjacent pixel units 20 are arranged in different orders. For example, multiple pixel units 20 are arranged in an array along the first and second directions, with multiple pixel units 20 arranged in the first direction forming a pixel row, and multiple pixel rows arranged in the second direction. Figure 4 The pixel unit 20 has three pixel rows. In the top pixel row, the four sub-pixels of the pixel unit 20 are arranged in the order of WRGB. In the middle pixel row, the four sub-pixels of the pixel unit 20 are arranged in the order of BGWR. In the bottom pixel row, the four sub-pixels of the pixel unit 20 are arranged in the order of WRGB. In the second direction, the sub-pixels of the multiple pixel units are aligned one-to-one.

[0040] For details, please refer to Figure 4 The pixel units 20 are aligned in the second direction.

[0041] Specifically, the two first sub-pixels 21 in two adjacent pixel units 20 along the second direction are staggered. That is, in two adjacent pixel units 20 along the second direction, the first sub-pixel 21 in one pixel unit 20 corresponds to a sub-pixel in the other pixel unit 20 that is not the first sub-pixel 21 in the second direction, but any one of the second sub-pixel 22, the third sub-pixel 23, or the fourth sub-pixel 24. In two adjacent pixel units 20 in the second direction, one pixel unit 20 is designated as the first pixel unit and the other pixel unit 20 as the second pixel unit. The first sub-pixel 21 in the first pixel unit corresponds to the adjacent sub-pixel in the second pixel unit in the second direction, for example, the fourth sub-pixel 24. In the second pixel unit, the fourth sub-pixel 24 and the first sub-pixel 21 can be adjacent, or a sub-pixel (e.g., the second sub-pixel 22 or the third sub-pixel 23) can be set between the fourth sub-pixel 24 and the first sub-pixel 21, or two sub-pixels (e.g., the second sub-pixel 22 and the third sub-pixel 23) can be set between the fourth sub-pixel 24 and the first sub-pixel 21. For details, please refer to [link to relevant documentation]. Figure 4 A sub-pixel can also be set between the fourth sub-pixel 24 and the first sub-pixel 21, which can be the second sub-pixel 22 or the third sub-pixel 23.

[0042] In some embodiments, please refer to the following for details. Figure 4 The light emitted by two adjacent sub-pixels along the second direction is different. The vertical arrangement of adjacent sub-pixels of different colors can achieve cross-mixing of different colored light in the vertical direction, avoiding the accumulation of monochromatic light and color banding caused by the vertical continuous arrangement of pixels of the same color; the vertical staggered distribution of white sub-pixels and colored sub-pixels can further dilute the concentration of white light, suppress the vertical overflow and accumulation of white light, and help improve the white edges of details; the staggered arrangement of different colors can improve the uniformity of color mixing between pixels, making the transition between light and dark and the color gradient effect of the image smoother, improving the problems of vertical display stripes and harsh colors, and improving the overall delicacy and visual experience of the image.

[0043] In some embodiments, please refer to the following for details. Figure 4Along the second direction, the first sub-pixels 21 and the fourth sub-pixels 24 of the plurality of pixel units 20 are arranged alternately. The first sub-pixels 21 and the fourth sub-pixels 24 are aligned and alternately arranged along the second direction, realizing a precise vertical alternation of white sub-pixels and blue sub-pixels, forming a regular white and blue pixel interlacing structure. Blue is one of the three basic primary colors, with clear color rendering and wide color gamut coverage. Its alternation with white pixels can effectively neutralize the bright whitening effect of white light, avoiding the problem of overexposure of details and white edge enhancement caused by the concentrated distribution of white pixels. The human eye has low sensitivity to blue, and the alternation of blue and white can reduce vertical brightness abrupt changes, making the transition between light and dark in the image smoother and more natural.

[0044] In some embodiments, please refer to the following for details. Figure 4 Along the first direction, a second sub-pixel 22 or a third sub-pixel 23 is provided between the first sub-pixel 21 and the fourth sub-pixel 24. A red or green sub-pixel is introduced into the horizontal spacing between the white and blue sub-pixels. Red and green sub-pixels are two colors with high visual sensitivity to the human eye. Their insertion enables multi-layered color transitions of white, red / green, blue, and green / red, reducing the harsh color contrast and edge whitening issues caused by direct horizontal and vertical adjacency of white and blue. Through the buffering transition of highly sensitive color pixels, the edge color connection of text and fine patterns becomes smoother, further eliminating white edge traces, enhancing the color depth of the image, and optimizing the high-definition display effect.

[0045] In some embodiments, please refer to the following for details. Figure 4 The orthographic projection of the first spacer 31 on the first substrate 11 at least partially overlaps with the orthographic projection of the first sub-pixel 21 on the first substrate 11. The first spacer 31 is disposed at the end of the first sub-pixel 21 along the second direction. The first sub-pixel 21 and the fourth sub-pixel 24 are aligned and alternately arranged along the second direction. If the first spacer 31 may be slightly offset due to process deviation, the first spacer 31 is closest to the edge of the fourth sub-pixel 24 and may be offset into the pixel opening of the fourth sub-pixel 24. The fourth sub-pixel 24 is a blue sub-pixel. The human eye has low sensitivity to blue. Therefore, even if the first spacer 31 is slightly offset into the pixel opening of the blue sub-pixel, the impact on the overall display brightness and color perception is smaller than if it were offset into the pixel opening of the red or green sub-pixel.

[0046] Specifically, the first spacer 31 is disposed at one or both ends of the first sub-pixel 21 along the second direction, and can be configured according to actual support requirements.

[0047] In some embodiments, please refer to the following for details. Figure 6 , Figure 7 The plurality of pixel units 20 are arranged in an array along a first direction and a second direction, the first direction and the second direction intersecting; wherein, four sub-pixels in the pixel unit 20 are arranged in an array along the first direction and the second direction, and the first sub-pixel 21 and the fourth sub-pixel 24 of the plurality of pixel units 20 are alternately arranged along the second direction.

[0048] The four sub-pixels in a pixel unit 20 are arranged in a 2*2 array, forming a regular matrix pixel distribution. Compared to a unidirectional arrangement, the pixel distribution is more uniform and regular, and the entire pixel unit 20 is closer to a square, which helps to improve the jagged edges of detailed images and enhance image sharpness and geometric accuracy. Building upon the matrix arrangement, the white light dispersion optimization effect is continued. The regularly staggered arrangement pattern reduces continuous white light, avoids the accumulation of local white light across the entire screen, and reduces the problem of local white edges.

[0049] In some embodiments, please refer to the following for details. Figure 7 The light emission color of two adjacent sub-pixels of two adjacent pixel units 20 along the first direction is the same. The adjacent arrangement of sub-pixels of the same color has a more significant effect on suppressing color crosstalk, which can effectively reduce the corresponding light-blocking width between adjacent sub-pixels, improve the pixel aperture ratio and panel light transmittance, and strengthen the core advantages of RGBW panel in low power consumption and high light transmittance.

[0050] In some embodiments, please refer to the following for details. Figure 5 The display panel 10 includes multiple driving transistors, which are electrically connected to the first sub-pixel 21, the second sub-pixel 22, the third sub-pixel 23, and the fourth sub-pixel 24, respectively. The driving transistors are located on one side of the first sub-pixel 21 and on one side of the fourth sub-pixel 24. Since the human eye is far more sensitive to red and green light than to white and blue light, this design avoids the driving transistors blocking or occupying the light-emitting areas of the red and green sub-pixels, maximizing the effective light-emitting area of ​​the red and green sub-pixels. This enhances the overall visual brightness of the image while maintaining the energy-saving advantages of the RGBW panel.

[0051] Specifically, the driving transistor is disposed on one side of the first sub-pixel 21 in the second direction or the first direction and on one side of the fourth sub-pixel 24 in the second direction or the first direction. Preferably, please refer to Figure 5The driving transistor is located on one side of the first sub-pixel 21 in the second direction and on one side of the fourth sub-pixel 24 in the second direction, which is beneficial to the layout regularity; specifically, the driving transistor is located on the same side of the first sub-pixel 21 in the second direction and on the same side of the fourth sub-pixel 24 in the second direction, which further facilitates the design of a regular layout.

[0052] For details, please refer to Figure 5 The plurality of driving transistors includes a first driving thin-film transistor 41, a second driving thin-film transistor 42, a third driving thin-film transistor 43, and a fourth driving thin-film transistor 44. The first driving thin-film transistor 41 is electrically connected to the first sub-pixel 21, the second driving thin-film transistor 42 is electrically connected to the second sub-pixel 22, the third driving thin-film transistor 43 is electrically connected to the third sub-pixel 23, and the fourth driving thin-film transistor 44 is electrically connected to the fourth sub-pixel 24. The first driving thin-film transistor 41 and the second driving thin-film transistor 42 are located on one side of the first sub-pixel 21, and the third driving thin-film transistor 43 and the fourth driving thin-film transistor 44 are located on one side of the fourth sub-pixel 24; or, the first driving thin-film transistor 41 and the third driving thin-film transistor 43 are located on one side of the first sub-pixel 21, and the second driving thin-film transistor 42 and the fourth driving thin-film transistor 44 are located on one side of the fourth sub-pixel 24. Following the principle of avoiding the light-emitting areas of red and green sub-pixels, an adaptation scheme can be flexibly selected according to the panel pixel layout and manufacturing process, resulting in stronger process compatibility.

[0053] For details, please refer to Figure 5 The first driving thin-film transistor 41 and the second driving thin-film transistor 42 are disposed on one side of the first sub-pixel 21, and the third driving thin-film transistor 43 and the fourth driving thin-film transistor 44 are disposed on one side of the fourth sub-pixel 24. The display panel includes pixel electrodes 60, which include a first pixel electrode 601, a second pixel electrode 602, a third pixel electrode 603, and a fourth pixel electrode 604. The first sub-pixel 21 is provided with the first pixel electrode 601, the second sub-pixel 22 is provided with the second pixel electrode 602, the third sub-pixel 23 is provided with the third pixel electrode 603, and the fourth sub-pixel 24 is provided with the fourth pixel electrode 604. The distance between the first pixel electrode 601 and the first driving thin-film transistor 41 is less than the distance between the first pixel electrode 601 and the second driving thin-film transistor 42, and the distance between the fourth pixel electrode 604 and the fourth driving thin-film transistor 44 is less than the distance between the fourth pixel electrode 604 and the third driving thin-film transistor 43. Alternatively, the first driving thin-film transistor 41 and the third driving thin-film transistor 43 are disposed on one side of the first sub-pixel 21, and the second driving thin-film transistor 42 and the fourth driving thin-film transistor 44 are disposed on one side of the fourth sub-pixel 24. The first sub-pixel 21 includes a first pixel electrode 601, and the fourth sub-pixel 24 includes a fourth pixel electrode 604. The distance between the first pixel electrode 601 and the first driving thin-film transistor 41 is less than the distance between the first pixel electrode 601 and the third driving thin-film transistor 43, and the distance between the fourth pixel electrode 604 and the fourth driving thin-film transistor 44 is less than the distance between the fourth pixel electrode 604 and the second driving thin-film transistor 42.

[0054] Taking the first driving thin-film transistor 41 and the second driving thin-film transistor 42 as being located on one side of the first sub-pixel 21, and the third driving thin-film transistor 43 and the fourth driving thin-film transistor 44 as being located on one side of the fourth sub-pixel 24, the first pixel electrode 601 is electrically connected to the first driving thin-film transistor 41, and the fourth pixel electrode 604 is electrically connected to the fourth driving thin-film transistor 44, ensuring the shortest signal transmission path and optimal impedance matching, thereby reducing latency and power consumption fluctuations. The second driving thin-film transistor 42 does not need to be electrically connected to the first pixel electrode 601, so a redundant distance needs to be set between the second driving thin-film transistor 42 and the first pixel electrode 601 to achieve electrical isolation and avoid parasitic capacitance interference. Similarly, a redundant distance is also maintained between the third driving thin-film transistor 43 and the fourth pixel electrode 604 to ensure that the driving transistors do not crosstalk each other at high refresh rates.

[0055] Specifically, a corresponding electrical connection conductive line is provided between the second pixel electrode and the second driving thin film transistor, and a corresponding electrical connection conductive line is provided between the third pixel electrode and the third driving thin film transistor.

[0056] For details, please refer to Figure 5 The display panel 10 further includes multiple gate lines 13 and multiple data lines 14. The gate lines 13 extend along the first direction, and the multiple gate lines 13 are spaced apart along the second direction. The data lines 14 extend along the second direction, and the multiple data lines 14 are spaced apart along the first direction. One driving transistor is electrically connected to one gate line 13 and one data line 14.

[0057] Specifically, the pixel electrode 60 is provided with an electrode slit, and the angle between the extension direction of the electrode slit and the second direction is 5° to 15°, preferably 10°. This can optimize liquid crystal orientation, reduce optical interference between pixels, optimize pixel spacing, weaken graininess, and support higher pixel density design. It can also improve the driving efficiency of the electric field on the liquid crystal, reduce the pixel operating voltage, realize low power consumption operation of the display panel, and improve the electrical stability.

[0058] Specifically, a pixel electrode corresponding to the same sub-pixel may include two symmetrical parts, which are arranged in the second direction, and the extension direction of the axis of symmetry of the two symmetrical parts is parallel to the first direction.

[0059] Specifically, the orthographic projection of the first spacer 31 on the first substrate 11 at least partially overlaps with the orthographic projection of the first sub-pixel 21 on the first substrate 11, and the orthographic projection of the first spacer 31 on the first substrate 11 at least partially overlaps with the orthographic projection of the pixel opening corresponding to the first sub-pixel 21 on the first substrate 11. That is, the orthographic projection of the first spacer 31 on the first substrate 11 at least partially overlaps with the orthographic projection of the first pixel electrode 601 corresponding to the first sub-pixel 21 on the first substrate 11.

[0060] In some embodiments, the orthographic projection of the first spacer 31 onto the first substrate 11 overlaps with the orthographic projection of the driving transistor disposed on one side of the first sub-pixel 21 onto the first substrate 11. By utilizing the overlapping layout of the projections of the first spacer 31 and the transistor, the reuse optimization of panel space is achieved. The first spacer 31 itself is a support structure and has no light-emitting function. By overlapping the transistor layout with the area of ​​the first spacer 31, ineffective space can be fully utilized without occupying additional pixel light-emitting areas, further saving panel pixel layer layout space.

[0061] In some embodiments, please refer to the following for details. Figure 2 The display panel 10 includes a source / drain layer 54 and a pixel electrode 60. The pixel electrode 60 is electrically connected to the source / drain layer 54 through a first via 61. The orthographic projection of the first via 61 onto the first substrate 11 is outside the orthographic projection of the first spacer 31 onto the first substrate 11. The source / drain layer 54 and the pixel electrode 60 are electrically connected through the first via 61, ensuring normal signal transmission of the pixel electrode. Since the film layer above the location of the first via 61 may have unevenness or other issues, the first via 61 avoids the orthographic projection area of ​​the first spacer 31. This reduces the risk of support failure of the first spacer 31 due to unevenness, improves the stable support effect of the first spacer 31, avoids defects caused by tilting of the first spacer 31, and improves the panel manufacturing yield and operational stability.

[0062] It is understandable that the first spacer 31 can be positioned to avoid the first through hole 61 by moving the first spacer 31 or adjusting the size of the first spacer 31.

[0063] In some embodiments, please refer to the following for details. Figure 2 The display panel 10 further includes a common electrode 57 and a connecting electrode 58, wherein the common electrode 57 is disposed opposite to the pixel electrode 60; and the connecting electrode 58 overlaps the surface of the common electrode 57. The common electrode 57 and the pixel electrode 60 are arranged opposite to each other to form a stable electric field driving structure; the connecting electrode 58 can electrically connect the common electrode 57 to the constant voltage line to provide a constant voltage to the common electrode 57. By eliminating the via between the connecting electrode 58 and the common electrode 57 and adopting a direct overlapping structure, the panel manufacturing process is simplified, reducing etching, drilling and other processes, reducing the complexity and cost of the production process, while avoiding structural defects, poor flatness, and signal interference caused by via fabrication, improving the stability and conductivity accuracy of the electrode connection. The via-free structure can further optimize the flatness of the panel pixel layer, reduce optical defects, and help improve the uniformity of the image display.

[0064] For details, please refer to Figure 2 The connecting electrode 58 can be directly attached to the surface of the common electrode 57, simplifying the panel manufacturing process. In some embodiments, please refer to the following for details. Figure 1 , Figure 3 , Figure 4 , Figure 6 , Figure 7 The display panel 10 further includes a plurality of second spacers 32 located between the first substrate 11 and the second substrate 12; the orthographic projection of the second spacers 32 on the first substrate 11 at least partially overlaps with the orthographic projection of the first sub-pixel 21 on the first substrate 11; wherein the height of the first spacer 31 is less than the height of the second spacer 32. It can be understood that the height refers to the dimension in the direction perpendicular to the plane where the first substrate 11 is located. By using first spacers 31 and second spacers 32 with different heights, the taller second spacers 32 can serve as the main support structure, ensuring that the overall thickness of the panel is uniform and the structure is stable, while the shorter first spacers 31 can buffer and resist external pressure and deformation when subjected to external pressure, thereby improving the mechanical strength of the display panel 10.

[0065] For details, please refer to Figure 1 , Figure 3 , Figure 4 , Figure 6 , Figure 7The density of the first spacer 31 is greater than that of the second spacer 32. The high-density arrangement of the short first spacer 31 enables fine-grained control of light blocking across the entire white sub-pixel area, resulting in more precise and delicate suppression of white edges on minute details and text edges. At the same time, it provides a stronger buffering effect when subjected to external pressure, thereby improving the mechanical strength of the display panel 10.

[0066] For details, please refer to Figure 1 , Figure 3 , Figure 4 , Figure 6 , Figure 7 The area of ​​the first spacer 31 projected onto the first substrate 11 is greater than the area of ​​the second spacer 32 projected onto the first substrate 11.

[0067] Specifically, the density of the first spacer 31 refers to the ratio of the number of first spacers 31 to the number of corresponding pixel units 20 per unit area; the density of the second spacer 32 refers to the ratio of the number of second spacers 32 to the number of corresponding pixel units 20 per unit area; the density of the first spacer 31 can be less than or equal to 50%, for example, 20% to 50%; the density of the second spacer 32 can be less than or equal to 10%, for example, 0.5% to 10%. This density range ensures both support stability and mechanical cushioning performance.

[0068] Specifically, the overlapping area of ​​the orthographic projection of the first spacer 31 on the first substrate 11 and the orthographic projection of the first sub-pixel 21 on the first substrate 11 is S1, and the area of ​​the orthographic projection of the first sub-pixel 21 on the first substrate 11 is S0. The ratio of the overlapping area of ​​the first spacer 31 on the first substrate 11 and the orthographic projection of the first sub-pixel 21 on the first substrate 11 to the area of ​​the orthographic projection of the first sub-pixel 21 on the first substrate 11 (i.e., S1 / S0) can be set between 0.3 and 0.8 according to actual needs, so as to ensure the light-blocking effectiveness and avoid the serious decrease in sub-pixel aperture ratio and serious loss of brightness due to excessive overlap.

[0069] Similarly, the ratio of the overlapping area of ​​the second spacer 32 on the first substrate 11 and the first sub-pixel 21 on the first substrate 11 to the area of ​​the first sub-pixel 21 on the first substrate 11 can be set between 0.05 and 0.1 according to actual needs.

[0070] Specifically, the second substrate 12 is provided with a plurality of color resists and light-shielding portions disposed between the color resists; it can be understood that the color resists may also be disposed on the first substrate 11.

[0071] Specifically, the orthographic projections of the first spacer 31 and the second spacer 32 on the second substrate 12 are located within the light-shielding portion.

[0072] Specifically, the orthographic projections of the first spacer 31 and the second spacer 32 onto the first substrate 11 can be polygons, circles, ellipses or other irregular shapes, etc. This is only an example and is not specifically limited.

[0073] In some embodiments, please refer to the following for details. Figure 2 The first substrate 11 includes a substrate 50, a gate layer 51 on the substrate 50, a first insulating layer 52 on the side of the gate layer 51 away from the substrate 50, an active layer 53 on the side of the first insulating layer 52 away from the substrate 50, a source-drain layer 54 on the side of the active layer 53 away from the substrate 50, a first passivation layer 55 on the side of the source-drain layer 54 away from the substrate 50, a planarization layer 56 on the side of the first passivation layer 55 away from the substrate 50, a common electrode 57 on the side of the planarization layer 56 away from the substrate 50, and a connection electrode 58 on the surface of the common electrode 57 away from the substrate 50.

[0074] For details, please refer to Figure 2 The first substrate 11 further includes a second passivation layer 59 located on the side of the common electrode 57, the connecting electrode 58 and the planarization layer 56 away from the substrate 50, and a pixel electrode 60 located on the side of the second passivation layer 59 away from the substrate 50; wherein, the second passivation layer 59 is provided with a first via 61, the first via 61 penetrating the second passivation layer 59, the planarization layer 56 and the first passivation layer 55, so that the pixel electrode 60 is electrically connected to the source and drain layers 54 through the first via 61.

[0075] For details, please refer to Figure 2 The planarization layer 56 is provided with a second through hole 62, which penetrates the planarization layer 56 and is arranged around the first through hole 61.

[0076] According to the second aspect of this disclosure, please refer to Figure 8 This disclosure also provides a display device 100, which includes any of the above-described display panels 10.

[0077] For the specific structure of the display panel 10, please refer to any of the above-described embodiments of the display panel 10 and the accompanying drawings. The display device 100 has all the beneficial effects of the above-described display panel 10, which will not be repeated here.

[0078] Understandably, please refer to the details. Figure 8The display device 100 also includes a device body 110, which is integrated with the display panel 10. The device body 110 may include a middle frame, frame adhesive, etc., which are only examples and not specific limitations.

[0079] The display device 100 can be widely used in smartphones, laptops, tablets, monitors, vehicle displays, etc. This is just an example and is not a specific limitation.

[0080] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0081] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0082] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0083] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, The display panel includes multiple pixel units and includes a first substrate and a second substrate disposed opposite to each other, as well as a plurality of first spacers located between the first substrate and the second substrate. The pixel unit includes a first sub-pixel and a second sub-pixel, wherein the emission color of the second sub-pixel is any one of red, green and blue, and the transmittance of the first sub-pixel is greater than the transmittance of the second sub-pixel. Wherein, the orthographic projection of the first spacer on the first substrate at least partially overlaps with the orthographic projection of the first sub-pixel on the first substrate.

2. The display panel according to claim 1, characterized in that, The pixel unit includes four sub-pixels, namely the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel; The first sub-pixel emits white light, and the second, third, and fourth sub-pixels emit red, green, and blue light, respectively. The orthographic projection of the first spacer on the first substrate is separated from the orthographic projections of the second sub-pixel, the third sub-pixel, and the fourth sub-pixel on the first substrate.

3. The display panel according to claim 2, characterized in that, The plurality of pixel units are arranged in an array along a first direction and a second direction, wherein the first direction intersects the second direction; Wherein, the four sub-pixels in the pixel unit are arranged along the first direction, the four sub-pixels in two adjacent pixel units along the first direction are arranged in the same order, and the two first sub-pixels in two adjacent pixel units along the second direction are arranged in a staggered manner.

4. The display panel according to claim 3, characterized in that, The emission colors of two adjacent sub-pixels along the second direction are different.

5. The display panel according to claim 3, characterized in that, Along the second direction, the first sub-pixel and the fourth sub-pixel of the plurality of pixel units are arranged alternately.

6. The display panel according to claim 5, characterized in that, The first spacer is located at the end of the first sub-pixel along the second direction.

7. The display panel according to claim 3, characterized in that, Along the first direction, a second sub-pixel or a third sub-pixel is provided between the first sub-pixel and the fourth sub-pixel.

8. The display panel according to claim 2, characterized in that, The plurality of pixel units are arranged in an array along a first direction and a second direction, wherein the first direction intersects the second direction; Wherein, the four sub-pixels in the pixel unit are arranged in an array along the first direction and the second direction, and the first sub-pixels and the fourth sub-pixels of the plurality of pixel units are arranged alternately along the second direction.

9. The display panel according to claim 8, characterized in that, The light emission colors of two adjacent sub-pixels of two adjacent pixel units along the first direction are the same.

10. The display panel according to any one of claims 2 to 9, characterized in that, The display panel includes a plurality of driving transistors, and the plurality of driving transistors are electrically connected to the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel respectively; The driving transistors are located on one side of the first sub-pixel and on one side of the fourth sub-pixel.

11. The display panel according to claim 1, characterized in that, The display panel includes a source / drain layer and a pixel electrode, and the pixel electrode is electrically connected to the source / drain layer through a first via. Wherein, the orthographic projection of the first via on the first substrate is outside the orthographic projection of the first spacer on the first substrate.

12. The display panel according to claim 11, characterized in that, The display panel further includes a common electrode and a connection electrode, wherein the common electrode is disposed opposite to the pixel electrode; The connecting electrode is attached to the surface of the common electrode.

13. The display panel according to claim 1, characterized in that, The display panel also includes a plurality of second spacers located between the first substrate and the second substrate; The orthographic projection of the second spacer onto the first substrate at least partially overlaps with the orthographic projection of the first sub-pixel onto the first substrate; The height of the first spacer is less than the height of the second spacer.

14. The display panel according to claim 13, characterized in that, The density of the first spacer is greater than the density of the second spacer.

15. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 14.

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