A parallel optimization method, device, and medium for multi-actuator cooperative control based on multi-core heterogeneity

Abstract

This invention relates to a parallel optimization method, device, and medium for multi-actuator cooperative control based on multi-core heterogeneous architecture. The method includes: a first heterogeneous multi-core kernel acquiring vehicle state, constructing a quadratic programming objective function and constraint matrix for upper-level adaptive model predictive control based on a 7-DOF dynamics model; storing the matrix and vectors in a shared space via DMA and asynchronous buffer; a second kernel constructing a parallel instruction sequence using a vector execution unit to vectorize matrix operations; this kernel building an actuator allocation model to independently and in parallel solve the control problem. The kernel monitors the computation time; if a timeout occurs, the first kernel initiates degraded control; otherwise, the original control instructions are used. Finally, the instructions are sent to the vehicle actuators to achieve lateral and longitudinal cooperative control, and the above process is executed cyclically. Compared with existing technologies, this invention has the advantages of improving the real-time solution efficiency of complex optimization problems while ensuring control accuracy and stability.

Description

Technical Field

[0001] This invention relates to the field of vehicle control, and in particular to a parallel optimization method, apparatus and medium for multi-actuator cooperative control based on multi-core heterogeneous architecture. Background Technology

[0002] As the control architecture of intelligent transportation platforms develops towards integration, drive-by-wire, and intelligence, its motion control system is gradually evolving from independent control of a single actuator to a multi-actuator collaborative control mode, such as train collaborative control and the combined control of four-wheel steering (4WS) and four-wheel drive (4WD). By collaboratively optimizing the allocation of redundant degrees of freedom of multiple actuators, the vehicle's handling stability, trajectory tracking accuracy, and tire utilization efficiency under extreme conditions can be significantly improved.

[0003] In this type of multi-actuator cooperative control system, it is usually necessary to solve constrained optimization problems in real time based on dynamic models. The objectives often include multiple objective functions such as minimizing trajectory tracking error, optimizing stability indices, and constraining actuator energy consumption. These optimization problems are characterized by high-dimensional state variables and multi-constraint coupling, resulting in a large number of matrix operations and iterative calculations in the online solution process, which places high demands on real-time computing capabilities.

[0004] However, in existing automotive embedded controllers, control algorithms are typically implemented based on scalar processing kernels. These kernels suffer from computational efficiency limitations when handling high-dimensional matrix operations and parallel iterative calculations, making it difficult to meet the real-time solution requirements under millisecond-level control cycles. Especially in multi-actuator collaborative control scenarios, as the dimensionality of control variables increases and constraints become more complex, the traditional single-core scalar computing architecture easily becomes the main bottleneck for system real-time performance. Although some new automotive chips have introduced heterogeneous multi-core architectures and dedicated vector computing units, existing chassis control algorithms still largely rely on scalar computation logic, lacking structured reconstruction tailored to the hardware's parallel characteristics. This makes it difficult for the algorithms to fully utilize the parallel computing capabilities of the vector execution units. Furthermore, data transfer and scheduling mechanisms between different computing kernels introduce additional communication latency, further limiting the improvement of the overall system control frequency. Summary of the Invention

[0005] The purpose of this invention is to provide a multi-core heterogeneous parallel optimization solution method for multi-actuator cooperative control, which enables the control optimization algorithm to be deeply matched with the vectorized execution unit, thereby improving the real-time solution efficiency of complex optimization problems while ensuring control accuracy and stability.

[0006] The objective of this invention can be achieved through the following technical solutions: A parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneous architecture includes the following steps: S1. The first processing core in the heterogeneous multi-core processor is used to collect vehicle motion state information, and an optimization control problem is constructed based on the 7-DOF vehicle dynamics model. The optimization control problem includes the upper-level adaptive model predictive control quadratic programming objective function and constraint matrix. S2. Through the direct memory access mechanism and asynchronous buffering strategy, the first processing kernel uploads the Hessian matrix and gradient vector calculated by S1 to the shared memory space, and the second processing kernel reads the Hessian matrix and gradient vector from the shared memory space. S3. In the second processing kernel, a parallel computation instruction sequence for the optimization control problem is constructed based on the vector execution unit, and the matrix operation of the optimization control problem is mapped into a vectorized computation process. S4. In the second processing kernel, a wheel-end actuator allocation model is established based on the target additional yaw moment. Without the participation of the first processing kernel, the vector execution unit of S3 uses a vectorized calculation process to jointly solve the optimization control problem and the target additional yaw moment and the vehicle's longitudinal driving force requirements, and obtains the driving torque allocation results of the four wheel-end actuators and the four wheel rotation angles as control commands. S5. The timing monitoring mechanism inside the second processing kernel determines whether the execution time of solving the optimization control problem and the target additional yaw moment and the vehicle's longitudinal driving force requirements exceeds a preset threshold. If so, the first processing kernel triggers a degradation control strategy to replace the control command output by the second processing kernel, and the final control command is obtained. Otherwise, the driving torque distribution results of the four wheel-end actuators and the four wheel angles are used as the final control command. S6. Send the final control command to the vehicle actuator for coordinated lateral and longitudinal control of the vehicle, and return to S1.

[0007] Furthermore, the specific steps of S2 are as follows: The first processing kernel uploads the Hessian matrix and gradient vector calculated by S1 to the shared memory space. Through the direct memory access mechanism, the Hessian matrix and gradient vector calculated by S1 are transformed into a contiguous storage structure that matches the width of the vector calculation unit of the second processing kernel. Through the asynchronous buffering strategy, the contiguous storage structure is written into the buffer corresponding to the current control cycle. Then, the second processing kernel obtains the calculated Hessian matrix and gradient vector from the buffer in the shared memory area.

[0008] Furthermore, the shared storage space includes two sets of buffers. and The switching of the buffer satisfies: , in Indicates the current control cycle. This indicates the data buffer that is enabled in the current cycle.

[0009] Furthermore, when the first processing kernel uploads the Hessian matrix and gradient vector calculated by S1 to the shared memory space, and the second processing kernel retrieves the calculated Hessian matrix and gradient vector from the buffer in the shared memory area, the following conditions are met: in, And represents the buffer used by the second processing kernel for computation in the current cycle. This indicates a buffer where the first processing kernel is transferring data to the second processing kernel.

[0010] Furthermore, the constraint optimization problem corresponding to the target additional yaw moment and the vehicle's longitudinal driving force requirement is as follows: in, For regularization weights, the vehicle's longitudinal driving force requirement The target has an additional yaw moment. , This is the allocation matrix formed by the vehicle centroids.

[0011] Furthermore, the constraints corresponding to the target additional yaw moment and the vehicle's longitudinal driving force requirements include tire adhesion constraints and actuator output constraints.

[0012] Furthermore, the constraint optimization problem corresponding to the target additional yaw moment and the vehicle's longitudinal driving force requirement is as follows: in, For regularization weights, the vehicle's longitudinal driving force requirement The target has an additional yaw moment. , This is the allocation matrix formed by the vehicle centroids.

[0013] Furthermore, the tire adhesion constraint and the actuator output constraint are as follows: in, This represents the driving torque at the i-th wheel end. These respectively represent left front, right front, left rear, and right rear; and These represent the minimum and maximum values ​​of the driving torque at the wheel end, respectively.

[0014] In another aspect, the present invention proposes a parallel optimization device for multi-core heterogeneous multi-executor cooperative control, comprising a memory and one or more processors, wherein the memory stores executable code, and the one or more processors execute the executable code for the above-mentioned parallel optimization method for multi-core heterogeneous multi-executor cooperative control.

[0015] In another aspect, the present invention provides a computer-readable storage medium having a program stored thereon, which, when executed by a processor, implements the above-described parallel optimization method for multi-executor cooperative control based on multi-core heterogeneous architecture.

[0016] Compared with the prior art, the present invention has the following beneficial effects: This invention fully utilizes the parallel computing capabilities of heterogeneous multi-core and vector computing units to achieve efficient real-time solution of multi-actuator cooperative control optimization problems, significantly reducing computational latency and improving the response speed and stability of vehicle lateral and longitudinal cooperative control under complex working conditions. The first processing kernel is used to complete vehicle state acquisition and optimization problem construction. The second processing kernel, based on vectorized data layout and parallel computing instructions, accelerates the solution of the optimization problem and performs joint allocation of target additional yaw moment and wheel-end drive moment within the same processing kernel. Through direct memory access and asynchronous buffering mechanism, efficient cross-core data transmission and computation data decoupling are achieved. The scheme of dual-buffer switching logic and read-write buffer isolation enables asynchronous and uninterrupted writing of the latest Hessian matrix and gradient vector to the idle buffer of the next cycle, without waiting for the second kernel to complete the current cycle's solution calculation. The second kernel can continuously read the dedicated computation buffer that has been fully written in the previous cycle and has no data update operation to perform vectorized matrix operations. This eliminates the synchronous waiting delay during cross-core data interaction, avoids the interruption of optimization solution due to incomplete data transmission within the control cycle, and prevents the expected data to be transmitted in the new cycle from overwriting the computation data currently being used in the current cycle, which would cause matrix parameter disorder. This improves the accuracy and operational reliability of multi-actuator lateral and longitudinal collaborative control. At the same time, combined with solution timeout monitoring and degradation control strategies, the system's operational reliability is improved. Attached Figure Description

[0017] Figure 1 System architecture diagram; Figure 2 This is a schematic diagram of the vehicle dynamics model; Figure 3 This is a timing diagram for asynchronous buffer switching; Figure 4 This is a schematic diagram of vectorized data rearrangement; Figure 5 A flowchart of the collaborative control system; Figure 6 State machine for timeout monitoring and degradation strategy; Figure 7 Simulation results for a double lane-switching operation at 80 km / h; Figure 8 The simulation results are for a 100km / h double lane change operation. Figure 9 The simulation results are for a serpentine driving condition at 80 km / h. Figure 10 The simulation results are for a 100km / h serpentine driving condition. Figure 11 The time required for parallel computation. Detailed Implementation

[0018] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. These embodiments are based on the technical solution of the present invention and provide detailed implementation methods and specific operating procedures. However, the scope of protection of the present invention is not limited to the following embodiments.

[0019] This invention discloses a parallel optimization solution system and method for multi-actuator cooperative control based on a multi-core heterogeneous architecture. Taking a four-wheel steering and four-wheel drive system as an example, the specific steps are described. This method addresses multi-actuator coupled control scenarios such as four-wheel steering and four-wheel drive, structurally reconstructing the model predictive control optimization problem under multi-degree-of-freedom dynamic constraints of the vehicle and mapping it to a heterogeneous processing kernel with vector execution units to achieve parallel solution.

[0020] The first processing kernel is used to complete vehicle state acquisition and optimization problem construction. The second processing kernel accelerates the solution of the optimization problem based on vectorized data layout and parallel computing instructions, and completes the joint allocation of target additional yaw moment and wheel-end drive moment within the same processing kernel. Through direct memory access and asynchronous buffering mechanism, efficient cross-core data transmission and computation data decoupling are achieved. At the same time, the system reliability is improved by combining solution timeout monitoring and degradation control strategies.

[0021] Compared with existing technologies, this invention makes full use of the parallel computing capabilities of heterogeneous multi-core and vector computing units to achieve efficient real-time solution of multi-actuator cooperative control optimization problems, significantly reduce computational latency, and improve the response speed and stability of vehicle lateral and longitudinal cooperative control under complex working conditions.

[0022] In this invention, Figure 1The system architecture diagram shows that the system includes a first processing kernel, a shared storage area, and a second processing kernel. The first processing kernel collects the vehicle's current state information, establishes a 7-DOF dynamics model, and constructs a multi-objective optimization problem encompassing vehicle path tracking and stability. It also introduces adaptive weights based on the current vehicle state to dynamically adjust the priorities of the multi-objectives, and finally encapsulates the data into a matrix. The optimization problem data constructed by the first processing kernel is moved to the shared storage area via DMA. The shared storage area uses an asynchronous buffer mode; when the first processing kernel moves data to buffer A, the second processing kernel reads data from buffer B, and vice versa. Simultaneously, the second processing kernel mirrors the solved state and control commands in the data interaction area for monitoring by the first kernel. The second processing kernel contains a vector execution unit that solves the optimization problem constructed by the first processing kernel, obtaining the four-wheel steering angles and additional yaw moment. The yaw moment is then distributed to the four wheels, and the execution command is finally output.

[0023] Figure 2 This is a schematic diagram of the vehicle's dynamics model, including seven degrees of freedom: lateral, longitudinal, yaw, and rotation of the four wheels. The vehicle can independently control the steering angle and driving torque of each of the four wheels.

[0024] Figure 3 The asynchronous buffer switching timing diagram shows that the first processing kernel sequentially builds the model and optimizes the data at each time step, and writes them to Buffer A and Buffer B in the shared memory area through DMA loop. The second processing kernel uses the data in Buffer A and Buffer B in a loop to perform calculations and output control instructions.

[0025] Figure 4 This diagram illustrates the vectorized data rearrangement. The optimization variables for the upper-level optimization problem are the four-wheel steering angles and the additional yaw moment. The constraints include the center of gravity sideslip angle constraint, yaw rate constraint, steering angle physical constraint, and control increment constraint. The vector execution unit performs parallel calculations on the five upper-level optimization variables and simultaneously solves for the four-wheel torque based on the calculated additional yaw moment. Finally, it outputs the four-wheel steering angles and four-wheel torque control values.

[0026] Figure 5 The flowchart for the cooperative control system is as follows: First, vehicle state acquisition and model linearization are performed. Second, DMA is used for data transfer between buffer switching modes. Third, vectorized parallel solution is performed. Fourth, joint allocation of drive and yaw torques is performed, while monitoring for timeouts. If no timeout occurs, the optimal control value is updated; if a timeout occurs, degraded control logic is triggered. Finally, the execution command is sent. Figure 6The state machine is for timeout monitoring and degradation strategy. If the calculation is detected to be completed normally in the normal state, the instruction output will continue in the normal state. If the calculation time is detected to be greater than the set threshold, the state will enter the degradation mode and extract the historical valid instruction output. If the calculation is detected to be completed normally for multiple consecutive cycles in the degradation mode, the state will return to the normal state and output instructions.

[0027] The specific steps of this invention include: S1. The first processing core in the heterogeneous multi-core processor is used to collect vehicle motion state information, and based on the 7-DOF vehicle dynamics model, the upper-level adaptive model predictive control quadratic programming objective function and constraint matrix are constructed.

[0028] S2. Through the direct memory access (DMA) mechanism and asynchronous buffering strategy, the relevant data constructed in S1 is transferred from the storage space of the first processing kernel to the storage area of ​​the second processing kernel, and the data organization and layout adjustment adapted to the computing needs of the second processing kernel are completed during the transfer process.

[0029] S3. In the second processing kernel, a parallel computing instruction sequence for optimization control problems is constructed based on the vector execution unit. The matrix operations in model predictive control or quadratic programming problems are mapped into a vectorized computing process, realizing the parallel execution of state updates, objective function calculations and constraint determination.

[0030] S4. In the second processing kernel, a wheel-end actuator allocation model is established based on the target additional yaw moment. Without the participation of the first processing kernel, the target additional yaw moment and the vehicle longitudinal driving force requirement are jointly solved by the same vector execution unit to directly obtain the driving torque allocation results of the four wheel-end actuators, so that the optimization solution and actuator allocation are completed continuously in the same processing kernel.

[0031] S5. The execution time of the optimization solution process is monitored in real time through the timed monitoring mechanism inside the second processing kernel. When the execution time exceeds the preset threshold, the first processing kernel triggers a degradation control strategy to replace the control instructions output by the second processing kernel.

[0032] S6. The four-wheel steering control quantity and wheel-end driving torque output by the second processing kernel are directly sent to the vehicle actuator for lateral and longitudinal coordinated control of the vehicle, and the above steps are repeated in the next control cycle.

[0033] Figure 1 This is a system architecture diagram. Figure 5 This is a flowchart of a collaborative control system.

[0034] S1. The first processing core in the heterogeneous multi-core processor is used to collect vehicle motion state information, and based on the 7-DOF vehicle dynamics model, the upper-level adaptive model predictive control quadratic programming objective function and constraint matrix are constructed.

[0035] The first processing core in a heterogeneous multi-core processor is used to collect vehicle operating status information, including vehicle speed, yaw rate and pose, and a prediction model is built based on the vehicle dynamics model. Figure 2 This is a schematic diagram of the vehicle dynamics model.

[0036] The vehicle dynamics model is a multi-degree-of-freedom model that includes longitudinal, lateral, yaw, and wheel rotation dynamics. It is used to describe the dynamic characteristics of the vehicle under the current operating state. The vehicle kinematic model expression is as follows. in, Indicates the vehicle's sideslip angle. Indicates the mass of the vehicle. Indicates the longitudinal speed of the vehicle. This represents the longitudinal force of the tire. This indicates the lateral force of the tire. Indicates the turning angle of the vehicle's four wheels. This indicates the yaw rate of the vehicle. This represents the vehicle's moment of inertia. This indicates the distance from the vehicle's center of gravity to the front axle. This indicates the distance from the vehicle's center of gravity to the rear axle. This indicates an additional yaw moment.

[0037] The longitudinal and lateral forces of the tire are calculated using the tire magic formula: in As the peak factor, For shape factor, Stiffness factor For curvature factor, These parameters represent the vertical offset and are obtained from actual vehicle calibration tests. The tire slip angle is expressed by the following formula: in The lateral speed of a vehicle is expressed by the following formula: The slip ratio of a tire is calculated using the following formula: in This indicates the angular velocity of the tire. This indicates the tire's actual speed. Calculated using the following formula, in , This indicates the front and rear track width of the vehicle.

[0038] The tire rotational dynamics model expression is as follows: in This represents the moment of inertia of the tire. This indicates the driving torque of each wheel. This indicates the vertical load on the wheel. Indicates the wheel radius. This represents the rolling resistance coefficient of the tire. The formula for calculating the vertical load of a tire is as follows: The path tracing model is represented as follows: in Indicates longitudinal displacement. Indicates lateral displacement. Indicates the vehicle's heading angle.

[0039] The first processing kernel linearizes the dynamic model based on the current operating point and discretizes the continuous-time model to obtain the state transition matrix and related parameters of the predicted model for subsequent optimization. Based on the requirements of path tracking and vehicle stability control, an optimization objective function including control inputs and state variables is constructed, and corresponding constraints are set to form a standard expression of the optimization problem. The state variables are... The input variable is That is, the four-wheel steering angle and the target additional yaw torque. The optimization objectives are to minimize the sideslip angle, yaw rate, path tracking error, and input increment. Constraints include sideslip angle and yaw rate constraints while ensuring vehicle stability, rotation angle constraints of the physical actuators, and input increment constraints to ensure control smoothness. The optimization problem is described as follows: The first processing kernel adaptively adjusts and optimizes parameters based on the vehicle's operating state. When it detects that the vehicle is approaching the stability boundary, it increases the control weights related to yaw stability to achieve a stability-first control strategy. The expression is as follows: in Indicates the initial weights. Represents the proportionality coefficient. This indicates the maximum permissible yaw rate.

[0040] Based on this, the optimization problem corresponding to model predictive control can be expressed as: in and These are the Hessian matrix and the gradient vector, respectively, calculated as follows: in and This is the weight matrix for the state variables and input variables. This is the current state. and These represent the reference state and reference input, respectively. This represents the cumulative disturbance and the linearized residual.

[0041] S2. Through the direct memory access (DMA) mechanism and asynchronous buffering strategy, the relevant data constructed in S1 is transferred from the storage space of the first processing kernel to the storage area of ​​the second processing kernel, and the data organization and layout adjustment adapted to the computing needs of the second processing kernel are completed during the transfer process.

[0042] To improve data processing efficiency in heterogeneous processing architectures, a shared memory region is constructed between the first and second processing cores, and at least two sets of buffers are set up. and This buffer is used to alternately store data from different control cycles. To achieve pipelined data processing between different control cycles, the buffer switching must satisfy the following: , in Indicates the current control cycle. This indicates the data buffer used in the current cycle, and the DMA write buffer and the second processing kernel read buffer satisfy... This allows the data transmission process to be executed in parallel with the optimization solution process. Figure 3 This is a timing diagram for asynchronous buffer switching.

[0043] During data transfer, DMA is used to rearrange the data storage layout, so that the data originally stored in scalar or row-major order can be sorted out. This is converted into a contiguous storage structure that matches the width of the vector computation unit of the second processing kernel. This transforms the data, originally stored in scalar or row-major order, into a contiguous storage structure that matches the storage access characteristics of the second processing kernel, thereby improving the efficiency of continuous data loading. For prediction step size data in model predictive control, the state variables corresponding to multiple prediction steps are arranged consecutively according to the state dimension: This is to improve the continuity of storage and access efficiency of forecast data.

[0044] Data buffer switching between different control cycles is achieved through buffer status flags, DMA completion interrupts, or inter-core synchronization signals. This allows the second processing kernel to directly access the updated buffer data corresponding to the next control cycle without waiting for synchronization scheduling by the first processing kernel. The buffer status satisfies the following conditions: , And switch states according to the control cycle: , This enables unobstructed, pipelined execution of the data transfer and optimization processes.

[0045] S3. In the second processing kernel, a parallel computing instruction sequence for optimization control problems is constructed based on the vector execution unit. The matrix operations in model predictive control or quadratic programming problems are mapped into a vectorized computing process, realizing the parallel execution of state updates, objective function calculations and constraint determination. Figure 4 This is a schematic diagram of vectorized data rearrangement.

[0046] In the second processing kernel, the control variables corresponding to the four wheel-end actuators are used as fixed parallel computing dimensions, and the steering control quantities of the four wheel ends and the target additional yaw moment are used as a unified control vector. The control quantities and their constraints are mapped to the same computing width of the vector execution unit, thereby realizing the synchronous calculation and collaborative solution of the control variables of multiple actuators.

[0047] Based on a predefined matrix operation structure, the quadratic form calculation, gradient calculation, and constraint residual evaluation process in the objective function are transformed into a sequence of vector multiplication and addition operations and parallel reduction operations. The prediction step size dimension is expanded in parallel using the SIMD method, and the state prediction update and cost function evaluation in the iterative solution process are completed within a single control cycle.

[0048] Through the iterative solution process, the optimal solution vector of the control variables is obtained synchronously within a single control cycle. The optimal solution vector includes four wheel-end steering control quantities and the target additional yaw moment.

[0049] After the optimization solution is completed, the optimal solution vector is directly output to the input interface of the subsequent control execution module or allocation module, and the data is transferred through the local bus inside the second processing kernel to avoid cross-kernel communication.

[0050] S4. In the second processing kernel, a wheel-end actuator allocation model is established based on the target additional yaw moment. Without the involvement of the first processing kernel, the target additional yaw moment and the vehicle's longitudinal driving force requirement are jointly solved through the same vector execution unit, directly obtaining the driving torque allocation results for the four wheel-end actuators. This allows the optimization solution and actuator allocation to be completed continuously within the same processing kernel. The calculation in the second kernel has two parts. The first part solves the optimization problem constructed by the first kernel, obtaining the four-wheel steering angle and the target additional yaw torque. This target additional yaw torque is not transmitted back to the first kernel but is directly given to the torque allocation calculation module in the second kernel. Combined with the vehicle's longitudinal driving force requirement, the four-wheel torque is calculated. The final output control commands are four-wheel steering and four-wheel torque.

[0051] Within the second processing kernel, the control vector is defined as follows: Vehicle longitudinal drive force requirements Adding yaw moment to the target Mapping to assign constraint equations to the actuator: , in, This is the distribution matrix formed by the vehicle's center of gravity, used to describe the mapping relationship between wheel-end driving torque and the vehicle's longitudinal and yaw moments. Target additional yaw moment. To obtain the target additional yaw moment by solving the quadratic programming objective function.

[0052] The wheel-end driving torque must meet the following constraints, including tire adhesion constraints and actuator output constraints: Under the above constraints, the wheel-end actuator allocation problem is transformed into a constraint optimization problem: , in, The regularization weight is used to balance the optimality of torque distribution with the smoothness of actuator output.

[0053] In the second processing kernel, the above optimization problem is transformed into a parallel computing structure that matches the vector execution unit. The driving torque of the four wheel ends is solved synchronously through analytical decomposition or low-dimensional iterative update, so that error calculation, gradient update and constraint correction are completed in vectorized form in each iteration.

[0054] After a finite number of iterations or by satisfying the convergence criterion, the optimal solution for the wheel-end driving torque is obtained: After completing the solution, the second processing kernel directly outputs the driving torque distribution results of the four wheel-end actuators and encapsulates them synchronously with the four-wheel steering control quantities to form a unified set of execution control instructions. The set of execution control instructions is sent directly to the vehicle actuators through the local communication channel of the second processing kernel to achieve coordinated control of wheel-end drive and steering.

[0055] S5. The execution time of the optimization solution process is monitored in real time through the timed monitoring mechanism inside the second processing kernel. When the execution time exceeds the preset threshold, the first processing kernel triggers a degradation control strategy to replace the control instructions output by the second processing kernel. Figure 6 This is a state machine for timeout monitoring and degradation strategies.

[0056] During the optimization process performed by the second processing kernel, after completing the optimization calculation for the current control cycle, the second processing kernel sends a solution status signal to the first processing kernel to indicate whether the optimization solution for the current control cycle is complete. At the same time, it also sends the control instructions output in this cycle through the shared memory space.

[0057] The first processing kernel starts a hardware timing mechanism based on a preset control cycle to monitor the reception time of the solution status signal. Let the optimization solution execution time be... The preset time threshold is When the following conditions are met: If the second processing kernel fails to complete the optimization solution within the current control cycle, the first processing kernel will trigger a degradation control strategy to replace the control instructions output by the second processing kernel.

[0058] Degradation control strategies include hold control based on historical valid control commands, whose historical commands can be represented in zero-order hold form: Alternatively, a safety control strategy based on preset rules can be used to ensure that the vehicle maintains basic driving stability even when the optimization solution times out.

[0059] To achieve unified management of control modes, the first processing kernel sets the control mode flag. Used to indicate the current source of control: , in This indicates that the second processing kernel is used to optimize the control output. This indicates that the degradation control strategy is in effect, and its switching relationship is defined as follows: , During the process of reverting from degraded control to optimized control, a back-cut criterion is introduced: when continuous Each control cycle satisfies When this happens, the system automatically reverts to the optimized control mode, i.e.: During control command switching, to avoid abrupt changes in control output, the control commands are optimized. With degradation control command The weighted fusion process is performed to obtain the final execution control instructions. : in, Adjustments are made based on the control mode switching state or time to achieve a smooth transition.

[0060] S6. The four-wheel steering control quantity and wheel-end driving torque output by the second processing kernel are directly sent to the vehicle actuator for lateral and longitudinal coordinated control of the vehicle, and the above steps are repeated in the next control cycle.

[0061] The second processing core synchronously sends control commands to the four-wheel steering actuators and drive motor control units via a dedicated real-time communication bus to ensure that each actuator completes command updates within the same control cycle.

[0062] Sensors collect vehicle motion status information in real time and transmit it back to the first processing kernel to update the prediction model and optimization parameters for the next control cycle, thereby forming closed-loop control.

[0063] Taking the control of a four-wheel drive vehicle as an example, the simulation results are as follows: Figures 7 to 11 As shown, Figure 7 This section compares the results of adaptive weighting and fixed weighting under the double lane change condition at a speed of 80 km / h. Figure 8 This section compares the results of adaptive weighting and fixed weighting under a double lane-change driving condition at a speed of 100 km / h. Figure 9 This section compares the results of adaptive weighting and fixed weighting under a serpentine driving condition at a speed of 80 km / h. Figure 10 This represents a comparison of adaptive weight and fixed weight results under a serpentine driving condition at a speed of 100km / h, including data on vehicle yaw rate, center of gravity sideslip angle, path tracking effect, additional yaw moment, front wheel steering angle, and rear wheel steering angle. Figure 11 This indicates the solution time for parallel computing. Simulation results demonstrate the effectiveness of the proposed method, which achieves millisecond-level fast solutions while ensuring vehicle stability and path tracking accuracy.

[0064] The present invention also provides a corresponding Figure 1The device, at the hardware level, includes a processor, internal bus, network interface, memory, and non-volatile memory, and may also include other hardware required for business operations. The processor reads the corresponding computer program from the non-volatile memory into memory and then runs it to achieve the above. Figure 1 The data acquisition method described above. Of course, in addition to software implementation, this invention does not exclude other implementation methods, such as logic devices or a combination of hardware and software, etc. That is to say, the execution subject of the following processing flow is not limited to each logic unit, but can also be hardware or logic devices.

[0065] Improvements in a technology can be clearly distinguished as either hardware improvements (e.g., improvements to the circuit structure of diodes, transistors, switches, etc.) or software improvements (improvements to the methodology). However, with technological advancements, many improvements to the methodology can now be considered direct improvements to the hardware circuit structure. Designers almost always obtain the corresponding hardware circuit structure by programming the improved methodology into the hardware circuit. Therefore, it cannot be said that an improvement in methodology cannot be implemented using hardware physical modules. For example, a Programmable Logic Device (PLD) (such as a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logic function is determined by the user programming the device. Designers can program and "integrate" a digital system onto a PLD themselves, without needing chip manufacturers to design and manufacture dedicated integrated circuit chips. Furthermore, nowadays, instead of manually manufacturing integrated circuit chips, this programming is mostly implemented using "logic compiler" software. Similar to the software compiler used in program development, the original code before compilation must also be written in a specific programming language, called a Hardware Description Language (HDL). There are many HDLs, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, and RHDL (Ruby Hardware Description Language). Currently, the most commonly used are VHDL (Very-High-Speed ​​Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should also understand that by simply performing some logic programming on the method flow using one of these hardware description languages ​​and programming it into an integrated circuit, the hardware circuit implementing the logical method flow can be easily obtained.

[0066] The controller can be implemented in any suitable manner. For example, it can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicon Labs C8051F320. A memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art will also recognize that, in addition to implementing the controller in purely computer-readable program code form, the same functionality can be achieved by logically programming the method steps to make the controller take the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, such a controller can be considered a hardware component, and the means included therein for implementing various functions can also be considered as structures within the hardware component. Alternatively, the means for implementing various functions can be considered as both software modules implementing the method and structures within the hardware component.

[0067] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, a computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0068] For ease of description, the above apparatus is described by dividing it into various functional units. Of course, in implementing this invention, the functions of each unit can be implemented in one or more software and / or hardware components.

[0069] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0070] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0071] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0072] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0073] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0074] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0075] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0076] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneous architecture, characterized in that, The method includes the following steps: S1. The first processing core in the heterogeneous multi-core processor is used to collect vehicle motion state information, and an optimization control problem is constructed based on the 7-DOF vehicle dynamics model. The optimization control problem includes the upper-level adaptive model predictive control quadratic programming objective function and constraint matrix. S2. Through the direct memory access mechanism and asynchronous buffering strategy, the first processing kernel uploads the Hessian matrix and gradient vector calculated by S1 to the shared memory space, and the second processing kernel reads the Hessian matrix and gradient vector from the shared memory space. S3. In the second processing kernel, a parallel computation instruction sequence for the optimization control problem is constructed based on the vector execution unit, and the matrix operation of the optimization control problem is mapped into a vectorized computation process. S4. In the second processing kernel, a wheel-end actuator allocation model is established based on the target additional yaw moment. Without the participation of the first processing kernel, the vector execution unit of S3 uses a vectorized calculation process to jointly solve the optimization control problem and the target additional yaw moment and the vehicle's longitudinal driving force requirements, and obtains the driving torque allocation results of the four wheel-end actuators and the four wheel rotation angles as control commands. S5. The timing monitoring mechanism inside the second processing kernel determines whether the execution time of the process of solving the optimization control problem and the target additional yaw moment and the vehicle longitudinal driving force requirement exceeds the preset threshold. If so, the first processing kernel triggers the degradation control strategy to replace the control command output by the second processing kernel, and the final control command is obtained. Conversely, the driving torque distribution results of the four wheel-end actuators and the four wheel rotation angles are used as the final control commands; S6. Send the final control command to the vehicle actuator for coordinated lateral and longitudinal control of the vehicle, and return to S1.

2. The parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneous architecture according to claim 1, characterized in that, The specific steps of S2 are as follows: The first processing kernel uploads the Hessian matrix and gradient vector calculated by S1 to the shared memory space. Through the direct memory access mechanism, the Hessian matrix and gradient vector calculated by S1 are transformed into a contiguous storage structure that matches the width of the vector calculation unit of the second processing kernel. Through the asynchronous buffering strategy, the contiguous storage structure is written into the buffer corresponding to the current control cycle. Then, the second processing kernel obtains the calculated Hessian matrix and gradient vector from the buffer in the shared memory area.

3. The parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneity according to claim 2, characterized in that, The shared storage space includes two sets of buffers. and The switching of the buffer satisfies: ， in Indicates the current control cycle. This indicates the data buffer that is enabled in the current cycle.

4. The parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneity according to claim 3, characterized in that, When the first processing kernel uploads the Hessian matrix and gradient vector calculated by S1 to the shared memory space, and the second processing kernel retrieves the calculated Hessian matrix and gradient vector from the buffer in the shared memory area, the following conditions are met: in, And represents the buffer used by the second processing kernel for computation in the current cycle. This indicates a buffer where the first processing kernel is transferring data to the second processing kernel.

5. The parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneity according to claim 1, characterized in that, The constraint optimization problem corresponding to the target additional yaw moment and the vehicle's longitudinal driving force requirement is as follows: in, For regularization weights, the vehicle's longitudinal driving force requirement The target has an additional yaw moment. , This is the allocation matrix formed by the vehicle centroids.

6. The parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneity according to claim 1, characterized in that, The constraints corresponding to the target additional yaw moment and the vehicle's longitudinal driving force requirements include tire adhesion constraints and actuator output constraints.

7. The parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneity according to claim 6, characterized in that, The tire adhesion constraint and actuator output constraint are as follows: in, This represents the driving torque at the i-th wheel end. These respectively represent left front, right front, left rear, and right rear; and These represent the minimum and maximum values ​​of the driving torque at the wheel end, respectively.

8. The parallel optimization method for multi-actuator cooperative control based on multi-core heterogeneity according to claim 1, characterized in that, The specific steps to trigger the degradation control strategy to replace the control instructions output by the second processing kernel are as follows: Set the control command as a history command and execute it. , This indicates the control command from the previous control cycle. The control command for the current control cycle.

9. A parallel optimization device for multi-actuator cooperative control based on multi-core heterogeneity, characterized in that, The method includes a memory and one or more processors, wherein the memory stores executable code, and the one or more processors execute the executable code to implement the parallel optimization method for multi-core heterogeneous multi-executor cooperative control based on any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, It stores a program that, when executed by a processor, implements the parallel optimization method for multi-core heterogeneous multi-executor cooperative control as described in any one of claims 1-8.

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