Thermal load control method and circuit for ultra-low temperature multi-bit superconducting signal processing system

Abstract

This invention discloses a thermal load control method and circuit for a cryogenic multi-bit superconducting signal processing system, belonging to the field of cryogenic superconducting electronics technology. The invention obtains the thermal load increment of the gate operation instruction to be executed and the current cumulative thermal load value of the target processing unit, compares the sum of the two with a preset thermal load threshold, and performs hardware-level decision-making. After execution, the thermal load is accumulated, achieving real-time closed-loop control of the thermal load. This invention is equipped with atomic rollback and lifetime overflow lock defense mechanisms. The entire process can be implemented through pure hardware circuitry, without the need for a central processing unit, digital signal processor, or software program. This reduces control latency, avoids operational instability caused by system thermal accumulation, and improves the operational stability, safety, and reliability of the cryogenic superconducting signal processing system. It is suitable for cryogenic operating scenarios of 100 milliklvin and below.

Description

Technical Field

[0001] This invention belongs to the field of ultra-low temperature superconducting electronics technology, specifically relating to a thermal load control method and circuit for an ultra-low temperature multi-bit superconducting signal processing system.

[0002] Terminology Definition 1. Extremely low temperature environment: In this application, it refers to a working environment with an ambient temperature not exceeding 100 millikelvin; 2. Gate operation instructions: In this application, these refer to the basic instructions used to control the superconducting processing unit to perform corresponding signal processing operations; 3. Hardware-level adjudication: In this application, it refers to the judgment and control of the legality of instructions implemented through pure hardware circuits without the intervention of software programs; 4. One-time programmable fuse: In this application, it refers to a hardware storage unit that can only be programmed and fixed once, and whose parameters cannot be modified during operation after the program is fixed; 5. Heat load increment: In this application, it refers to the change in heat load generated by the corresponding superconducting processing unit during the execution of a single door operation command; 6. Shadow Register: In this application, it refers to a hardware storage unit set up in conjunction with the heat load counter to temporarily store the cumulative heat load reference value; 7. Atomic rollback: In this application, it refers to the hardware operation that restores the accumulated heat load value to the baseline value before the sequence execution when the execution of a multi-gate operation instruction sequence is abnormal; 8. Permanent Overflow Lockout: In this application, it refers to a hardware defense mechanism that permanently blocks the execution of instructions by a processing unit after the number of thermal load overflows reaches a preset value. Background Technology

[0003] The ultra-low temperature multi-bit superconducting signal processing system operates in an ultra-low temperature environment at the milliKelvin level. The heat load generated during system operation directly affects the effective working time and operational stability of the superconducting processing unit. When the accumulated heat load exceeds a reasonable range, it will lead to a decrease in the system's signal processing accuracy, instability in its working state, or even damage to the hardware unit.

[0004] In existing technologies, thermal load control for such systems is mostly implemented in software. This involves a central processing unit (CPU) collecting system temperature data, running control algorithms, and then issuing control commands. However, this approach has several limitations: First, software control inherently suffers from latency, failing to achieve picosecond-level real-time response and making it unsuitable for the high-speed operation requirements of superconducting signal processing systems. Second, software programs are susceptible to external interference, posing a risk of instability in extremely low-temperature environments, resulting in insufficient control reliability. Third, existing control schemes often rely on post-execution thermal load statistics, failing to anticipate accumulated thermal load risks and leading to thermal load exceeding limits, thus hindering long-term system stability. Fourth, there is a lack of hardware-level defense mechanisms for abnormal scenarios; abnormal sequence execution or frequent thermal overflows can easily cause irreversible system damage. Summary of the Invention

[0005] 4.1 Purpose of the Invention To address the problems of high software control latency, slow response speed, inability to predict thermal load risks in advance, insufficient control reliability, and lack of anomaly defense mechanisms in existing technologies, this invention provides a thermal load control method and circuit for an ultra-low temperature multi-bit superconducting signal processing system implemented entirely in hardware. This method achieves real-time closed-loop control of thermal load, and is equipped with atomic rollback and lifetime overflow lockout defense mechanisms to reduce control latency, avoid system instability caused by thermal accumulation, and improve the stability, safety, and reliability of system operation.

[0006] 4.2 Technical Solution To achieve the above-mentioned objectives, the present invention adopts the following technical solution: A method for thermal load control of an ultra-low temperature multi-bit superconducting signal processing system includes the following steps: Step 1: Obtain the heat load increment corresponding to the door operation command to be executed; Step 2: Obtain the current cumulative heat load value of the target processing unit corresponding to the door operation command; Step 3: Compare the sum of the current cumulative heat load value and the heat load increment with a preset heat load threshold. Step 4: Execute hardware-level decision based on the comparison results: If the sum does not exceed the preset heat load threshold, execute the gate operation instruction; if the sum exceeds the preset heat load threshold, terminate the execution of the gate operation instruction. After the operation command in step five is executed, the corresponding heat load increment is added to the cumulative heat load value of the target processing unit.

[0007] Furthermore, the cumulative heat load value undergoes continuous natural decay according to a preset time constant, simulating the natural heat dissipation process of the superconducting processing unit, so that the cumulative heat load value closely matches the actual heat load state of the system.

[0008] Furthermore, before executing the multi-gate operation instruction sequence, the current cumulative heat load value of the target processing unit is saved to the shadow register; if any gate operation instruction in the instruction sequence fails to pass the adjudication, the cumulative heat load value is rolled back to the value saved in the shadow register to avoid heat load statistics errors caused by abnormal sequence execution.

[0009] Furthermore, if the cumulative heat load value of a single processing unit exceeds the preset threshold a preset number of times, the processing unit will be triggered to perform a lifetime overflow lock. After locking, all gate operation instructions of the processing unit will be blocked to avoid hardware damage caused by frequent heat overflow.

[0010] Furthermore, the entire process of the method is implemented through pure hardware circuitry, without relying on a central processing unit, digital signal processor, or software program execution, thus eliminating the inherent delay of software control.

[0011] Furthermore, the heat load increment is pre-stored in a non-volatile memory, and the corresponding value is directly retrieved according to the type of gate operation instruction, without the need for real-time calculation, thus improving the response speed.

[0012] A thermal load control circuit for an ultra-low temperature multi-bit superconducting signal processing system includes a thermal load calculation unit, a comparison and decision unit, a thermal load counting unit, and an instruction execution control unit. The input terminal of the heat load calculation unit is connected to the gate operation command to be executed, and the output terminal is connected to the first input terminal of the comparison and decision unit. The output of the heat load counting unit is connected to the second input of the comparison and decision unit, and is used to output the current cumulative heat load value of the target processing unit. The third input terminal of the comparison and decision unit is connected to a preset heat load threshold, and the output terminal is connected to the control terminal of the instruction execution control unit. The input terminal of the instruction execution control unit is connected to the door operation instruction to be executed, and the output terminal is connected to the instruction execution terminal of the target processing unit and the accumulation input terminal of the heat load counting unit, respectively.

[0013] Furthermore, the preset heat load threshold, time constant, and number of lockouts are all fixed once by a one-time programmable fuse and cannot be modified during operation, thereby improving the system's anti-interference capability and control security.

[0014] Furthermore, the heat load counting unit includes multiple independent counters, each counter corresponding one-to-one with a superconducting processing unit, enabling independent statistics and control of the heat load of each processing unit; the shadow register is set up in conjunction with the corresponding counter to store the heat load reference value before the sequence execution.

[0015] A cryogenic multi-bit superconducting signal processing system includes at least two parallel superconducting processing units and the aforementioned thermal load control circuit, wherein the thermal load control circuit is electrically connected to each superconducting processing unit.

[0016] Furthermore, the thermal load control circuit supports parallel decision-making and parallel control of multi-channel gate operation commands, adapting to the parallel operation requirements of multiple processing units.

[0017] Furthermore, the system does not contain a processor capable of executing software programs throughout the entire process; all control logic is implemented through a hardware state machine, ensuring operational stability in extremely low temperature environments.

[0018] 4.3 Beneficial Effects 1. The present invention adopts control logic that pre-calculates the total heat load before execution, which can predict the risk of heat load accumulation after the execution of the door operation command in advance, avoid the situation of heat load exceeding the standard from the source, solve the problem that the statistics after execution in the prior art cannot prevent and control in advance, and improve the working stability of the system.

[0019] 2. The present invention introduces an atomic rollback mechanism, which can roll back the heat load count value to the baseline value before the sequence execution when an abnormality occurs in the execution of a multi-gate operation instruction sequence, thereby avoiding heat load statistics errors caused by sequence interruption and ensuring the accuracy of heat load management.

[0020] 3. The present invention introduces a lifetime overflow lock mechanism, which can permanently block the instruction execution of a processing unit when the processing unit frequently experiences thermal overflow. This avoids irreversible damage to the superconducting processing unit caused by frequent thermal overflow at the hardware level, and greatly improves the hardware security and service life of the system.

[0021] 4. The entire process of this invention can be implemented through pure hardware circuits without the need for a central processing unit, digital signal processor, or software program. This eliminates the inherent delay of software control and enables real-time response at the nanosecond to picosecond level, meeting the high-speed operation requirements of cryogenic superconducting signal processing systems.

[0022] 5. This invention solidifies the control logic through a hardware state machine. The core parameters can be solidified through a one-time programmable fuse and cannot be modified during operation, which improves the system's anti-interference ability and control reliability. It can work stably in extremely low temperature environments of 100 milliklvin and below.

[0023] 6. This invention, through the natural decay mechanism of the accumulated heat load value, can closely match the actual natural heat dissipation process of the superconducting processing unit, improve the accuracy of heat load statistics, make the control logic more in line with the actual operating state of the system, and optimize the control effect.

[0024] 7. This invention, through multi-channel parallel decision-making and parallel control design, can adapt to the parallel operation requirements of multiple processing units, has a wide range of applications and strong compatibility. Detailed Implementation

[0025] The present invention will be further described in detail below with reference to the embodiments.

[0026] The thermal load control method and circuit for ultra-low temperature multi-bit superconducting signal processing system provided in this embodiment are applied to an 8-channel parallel superconducting signal processing system with an operating temperature of 100 milliklvin. The system contains 8 parallel superconducting processing units, each of which corresponds to an independent thermal load statistics and control channel.

[0027] Specific implementation process 1. Pre-configuration stage: The heat load increments corresponding to various gate operation commands are pre-calibrated, and the calibrated heat load increment values ​​are stored in non-volatile memory. Simultaneously, a preset heat load threshold, the natural decay time constant of the accumulated heat load value, and the preset number of lifetime overflow lockouts are fixed using a one-time programmable fuse. In this embodiment, the preset heat load threshold is calibrated based on the maximum allowable heat load of the superconducting processing unit, the natural decay time constant is calibrated based on the system's natural heat dissipation characteristics, and the preset number of lockouts is set to 10.

[0028] 2. Execution flow of heat load control method during operation: Step 1: The heat load calculation unit receives the gate operation instruction to be executed, parses the instruction type and the corresponding target superconducting processing unit, retrieves the heat load increment corresponding to the gate operation instruction from the non-volatile memory, and outputs it to the comparison and decision unit. Step 2: The independent counter in the heat load counting unit corresponding to the target superconducting processing unit outputs the current cumulative heat load value to the comparison and decision unit; Step 3: The comparison and adjudication unit calculates the sum of the current cumulative heat load value and the heat load increment, compares the calculated sum with the preset heat load threshold for curing, and outputs the comparison result to the instruction execution control unit. Step 4: The instruction execution control unit performs hardware-level decision-making based on the comparison results: if the sum does not exceed the preset heat load threshold, the gate operation instruction is sent to the instruction execution terminal of the target superconducting processing unit to precisely control it to perform the corresponding operation; if the sum exceeds the preset heat load threshold, the execution process of the gate operation instruction is terminated, no execution instruction is sent to the target superconducting processing unit, and the number of heat overflows of the processing unit is accumulated. After the operation command in step five is executed, the command execution control unit sends the corresponding heat load increment to the heat load counting unit, which adds it to the cumulative heat load value of the corresponding independent counter. During operation, each independent counter in the heat load counting unit continuously decays the cumulative heat load value according to the solidified time constant, simulating the natural heat dissipation process of the superconducting processing unit, so that the cumulative heat load value matches the actual heat load state of the system in real time. When executing a sequence of multiple operation instructions, the current cumulative heat load value of the target processing unit is saved to the corresponding shadow register before the sequence is executed. If any gate operation instruction in the sequence fails to pass the adjudication, the execution of the entire sequence is immediately terminated, and the cumulative heat load value is rolled back to the base value saved in the shadow register to avoid heat load statistics errors caused by partial execution of the sequence. When the cumulative number of thermal overflows of a single processing unit reaches the preset number of 10, a lifetime overflow lock is immediately triggered on the processing unit. At the hardware level, all gate operation instructions of the processing unit are permanently blocked. The lock can only be released by reprogramming the fuse, thus avoiding frequent overheating damage to the hardware.

[0029] 3. Specific connection and operation process of the heat load control circuit: In this embodiment, the heat load calculation unit is implemented using a hardware addressing circuit. The input end is connected to the system instruction bus, and the output end is connected to the first input end of the comparison and decision unit. It can quickly address and retrieve the corresponding heat load increment according to the type of gate operation instruction. The heat load counting unit is implemented using 8 sets of 32-bit independent hardware counters. Each set of counters corresponds one-to-one with a superconducting processing unit. Each set of counters is equipped with a 32-bit shadow register. The output of the counters is connected to the second input of the comparison and decision unit. The current cumulative heat load value of the corresponding target processing unit can be selected and output according to the instruction. The comparison and decision unit is implemented by cascading a hardware adder and a numerical comparator. The two inputs of the adder are respectively connected to the heat load increment and the current cumulative heat load value. The output of the adder is connected to the first input of the numerical comparator. The second input of the numerical comparator is connected to the preset heat load threshold of the one-time programmable fuse. The output of the numerical comparator is connected to the control terminal of the instruction execution control unit. The instruction execution control unit is implemented using a hardware state machine. Its input terminal is connected to the system instruction bus, its first output terminal is connected to the instruction execution terminal of each superconducting processing unit, and its second output terminal is connected to the accumulation input terminal of the heat load counting unit. Based on the output result of the comparison and decision unit, it can control the release and termination of instructions, and simultaneously complete the accumulation, rollback and locking control of heat load.

[0030] In this embodiment, the entire process of thermal load control is implemented through pure hardware circuits without the intervention of software programs. The control response delay does not exceed 10 nanoseconds, which can effectively avoid system heat accumulation and ensure the long-term stable operation of the 8-channel superconducting signal processing system in an extremely low temperature environment of 100 milliklvin.

[0031] In this embodiment, the retrieval of the heat load increment can be implemented in two alternative ways: the first is a non-volatile memory pre-store lookup table method, and the second is a hardware multiplier real-time calculation method based on instruction operation parameters. Both methods are within the protection scope of this invention.

[0032] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A thermal load control method for an ultra-low temperature multi-bit superconducting signal processing system, characterized in that, Includes the following steps: Step 1: Obtain the heat load increment corresponding to the door operation command to be executed; Step 2: Obtain the current cumulative heat load value of the target processing unit corresponding to the door operation command; Step 3: Compare the sum of the current cumulative heat load value and the heat load increment with a preset heat load threshold. Step 4: Execute hardware-level decision based on the comparison results: If the sum does not exceed the preset heat load threshold, execute the gate operation command; If the total exceeds the preset heat load threshold, the execution of the door operation command will be terminated; After the operation command in step five is executed, the corresponding heat load increment is added to the cumulative heat load value of the target processing unit.

2. A thermal load control circuit for an ultra-low temperature multi-bit superconducting signal processing system, characterized in that, It includes a heat load calculation unit, a comparison and decision unit, a heat load counting unit, and an instruction execution control unit; The input terminal of the heat load calculation unit is connected to the gate operation command to be executed, and the output terminal is connected to the first input terminal of the comparison and decision unit. The output of the heat load counting unit is connected to the second input of the comparison and decision unit, and is used to output the current cumulative heat load value of the target processing unit. The third input terminal of the comparison and decision unit is connected to a preset heat load threshold, and the output terminal is connected to the control terminal of the instruction execution control unit. The input terminal of the instruction execution control unit is connected to the door operation instruction to be executed, and the output terminal is connected to the instruction execution terminal of the target processing unit and the accumulation input terminal of the heat load counting unit, respectively.

3. A cryogenic multi-bit superconducting signal processing system, characterized in that, It includes at least two parallel superconducting processing units and a heat load control circuit as described in claim 2, wherein the heat load control circuit is electrically connected to each superconducting processing unit.

4. The heat load control method according to claim 1, characterized in that, The cumulative heat load value undergoes continuous natural decay according to a preset time constant.

5. The heat load control method according to claim 1, characterized in that, Before executing a multi-gate operation instruction sequence, the current cumulative heat load value of the target processing unit is saved to the shadow register; if any gate operation instruction in the instruction sequence fails to pass the adjudication, the cumulative heat load value is rolled back to the value saved in the shadow register.

6. The heat load control method according to claim 1, characterized in that, If the cumulative heat load value of a single processing unit exceeds the preset threshold a certain number of times, the preset number of lockouts will be triggered, and the lifetime overflow lock of the processing unit will be triggered. After the lockout, all door operation commands of the processing unit will be blocked.

7. The heat load control method according to claim 1, characterized in that, The method is implemented entirely through hardware circuitry, without relying on a central processing unit, digital signal processor, or software program execution; the thermal load increment is pre-stored in non-volatile memory, and the corresponding value is directly retrieved according to the type of gate operation instruction.

8. The heat load control circuit according to claim 2, characterized in that, The preset heat load threshold, time constant, and number of locks are all fixed once by a one-time programmable fuse and cannot be modified during operation; the heat load counting unit contains multiple independent counters, each counter corresponding to a superconducting processing unit one-to-one, and the shadow register is set up in conjunction with the corresponding counter.

9. The cryogenic multi-bit superconducting signal processing system according to claim 3, characterized in that, The heat load control circuit supports parallel decision-making and parallel control of multi-channel gate operation commands.

10. The cryogenic multi-bit superconducting signal processing system according to claim 3, characterized in that, The system does not contain a processor that can execute software programs; all control logic is implemented through a hardware state machine.