A method for improving the redundancy of excitation CPU in a blast furnace blower
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-29
- Publication Date
- 2026-08-14
AI Technical Summary
[0004]然而,现有励磁控制系统普遍采用单中央处理单元的运行架构,缺乏必要的硬件冗余备份机制,在面临现场电磁干扰、供电波动或软件偶发异常时,极易发生中央处理器故障停机
1.极高的系统可靠性与稳定性。本发明通过将原有的单中央处理单元架构升级为第二系列双中央处理单元冗余架构,从核心处理层面上消除了单点故障风险。双中央处理单元通过光纤实时同步,确保了在任何时刻都存在一个完整的、处于运行态的备份单元,配合硬件看门狗与软件自诊断机制,能够对死机、程序异常等常见故障进行瞬时响应与自动切换。同时,多个直流电源模块的并联运行提供了电源层面的多重保障,即使在损失部分电源模块的极端情况下,系统仍能维持正常逻辑控制,显著提升了高炉鼓风机励磁系统的长周期稳定运行能力。
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Figure CN122569137A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the technical field of metallurgical air supply system, specifically relating to an improvement method for redundancy of excitation CPU in blast furnace blowers. Background Technology
[0002] In the modern metallurgical industry, the blast furnace blower, as the core air supply equipment for blast furnace ironmaking, directly determines the output efficiency and production safety of the smelting operation through its continuous and stable operation. The excitation control system, as the key drive core for the synchronous motor, is responsible for regulating the motor's excitation current to maintain system voltage balance and reactive power stability, and is the technological cornerstone for ensuring the long-term, highly reliable operation of the blast furnace blower. With the continuous improvement of the automation requirements of metallurgical processes, the real-time monitoring capabilities, fault warning mechanisms, and logic processing stability of the excitation system have become key concerns in the field of industrial automation.
[0003] Among these, excitation control schemes based on programmable logic controllers (PLCs) are currently the mainstream technology. These schemes utilize high-performance processing units to collect and perform logical operations on various operating parameters of the excitation circuit in real time, thereby achieving precise excitation adjustment algorithms. To ensure reliable execution of control commands, the system needs to possess extremely high anti-interference capabilities and fast response characteristics, ensuring the integrity and determinism of the control logic even in complex industrial scenarios.
[0004] However, existing excitation control systems generally employ a single central processing unit (CPU) architecture, lacking necessary hardware redundancy and backup mechanisms. This makes them highly susceptible to CPU failure and shutdown when faced with on-site electromagnetic interference, power supply fluctuations, or occasional software anomalies. Furthermore, traditional system redundancy upgrade schemes typically involve large-scale hardware architecture reconfiguration, leading to incompatibility between existing input / output modules and communication components, significantly increasing the company's transformation costs and debugging difficulty. In addition, due to the lack of deep redundancy automatic switching logic and independent power supply branch design in the control loop, the failure of a single control node can easily cause excitation interruption, triggering blower protection tripping, resulting in blast furnace production interruption and causing serious economic losses and safety risks.
[0005] Therefore, a method for improving the redundancy of the excitation CPU in a blast furnace blower is desired. Summary of the Invention
[0006] The purpose of this invention is to provide an improved method for redundancy of excitation CPU in blast furnace blowers, which can effectively solve the problems mentioned in the background art.
[0007] The specific technical solution adopted by this invention is as follows: A method for improving redundancy in the excitation processor of a blast furnace blower includes the following steps: Utilizing the existing input / output modules and communication links, the original analog input modules, digital input modules, analog output modules, digital output modules, and industrial Ethernet communication modules corresponding to the first series of programmable logic controllers are retained. The original input / output modules are then connected to the newly built communication backbone via a bus adapter unit. The bus adapter unit is configured as a distributed interface module, which integrates a protocol conversion chip to capture the original first series backplane bus signals and convert them into redundant fieldbus communication protocols. The central processing unit architecture has been upgraded and physically deployed. The first series of central processing units that run on a single machine have been removed and replaced with a second series of dual central processing units with hardware redundancy. The second series of dual central processing units includes a physically independent master processing unit and a slave processing unit. The two processing units exchange data at high speed through a dedicated synchronous fiber optic link to ensure that the internal register status, timer value, current counter value and logic operation result are kept synchronized in each scan cycle through direct memory access technology. A multi-level redundant power supply system is constructed, which configures two completely independent external power inputs for the second series dual central processing unit. The automatic switching between the two power supplies is realized through a power management module with an integrated static switching switch. A parallel redundant architecture is constructed for the internal DC bus, which uses multiple preset DC power modules with the same rated power to operate in parallel. Power is supplied to the control system through a current sharing bus. The output of each preset DC power module is connected in series with a physical isolation component to prevent reverse current. Communication topology reorganization and link fault tolerance design utilize redundant communication interface modules to establish multiple communication paths between the second series dual central processing unit and the reused module. When the system detects a cyclic redundancy check error or timeout counter overflow in the main communication link, the communication driver triggers a link jump instruction to redirect the data stream to the backup communication link. The redundant control logic is developed and deployed without disturbance. The excitation regulation algorithm logic runs completely identically in the second series of dual central processing units. A heartbeat detection mechanism is established to monitor the operating status of the main processing unit. When a hardware failure or program lock-up is detected in the main processing unit, the control is transferred to the slave processing unit within a preset operation cycle, and the excitation setpoint, feedback value and internal integral term of the regulator are smoothly transitioned.
[0008] Preferably, the process of utilizing the existing input / output modules and communication links includes evaluating the wiring inside the existing excitation cabinet: using an insulation resistance tester to test the insulation of signal cables and power cables to determine whether the cable insulation layer has aging or leakage risks; using a signal generator and oscilloscope to evaluate the signal integrity of the existing analog transmission link, measuring the signal attenuation rate, noise interference level, and impedance matching parameters during transmission; for physical connection cables whose service life exceeds a preset service life threshold, or cables whose test results show a decline in electrical performance, a mandatory replacement operation is performed, using high-temperature shielded cables with shielding performance and anti-aging characteristics to replace them, ensuring that the original first series of input / output modules have the predetermined expected service life in the new redundant system environment, and that the signal sampling accuracy is maintained within the preset accuracy range.
[0009] Preferably, the distributed interface module is physically configured with dual communication ports, which are respectively connected to two independent station addresses of the second series dual central processing units through independent physical media. At the data link layer, the distributed interface module supports bidirectional heartbeat detection and automatic path switching logic. When a data packet is lost, a verification error occurs, or a physical disconnection occurs in the link corresponding to one of the communication ports, the logic control unit inside the module performs a data flow switching operation to redirect the data flow to another backup port, thereby achieving link redundancy at the underlying module level and ensuring that the motor stator voltage, rotor current, frequency, and feedback commands from the actuator collected by the field sensors are transmitted to the central processing unit in real time. In addition, the logic mapping table inside the distributed interface module is reconstructed, remapping the original input / output address space into a continuous memory area for the second series dual central processing units to read.
[0010] Preferably, during the data synchronization process of the second series dual central processing units, the synchronization fiber optic link adopts a dual-ring network structure, the synchronization frequency of the second series dual central processing units is set to a preset frequency, and each pair of synchronization data packets includes redundant check bits and high-precision timestamps; when the slave processing unit receives data, it verifies the authenticity and timing integrity of the data packets through a built-in decryption coprocessor; after the master processing unit completes the logical operation of the current scan cycle, it pushes the calculation results to the mirror storage area of the slave processing unit in real time; if the system detects that data verification inconsistencies or timestamp alignment failures occur in multiple consecutive cycles, the system automatically triggers a high-level alarm and enters a fault diagnosis mode, locking the output of the current master processing unit.
[0011] Preferably, during the upgrade and physical deployment of the central processing unit architecture, the main processing unit and the slave processing unit are respectively installed on independent aluminum alloy racks, and the physical distance between the two racks is maintained above a preset safe distance. Spatial isolation reduces the probability of simultaneous failure of both units due to overheating or mechanical vibration caused by local circuit short circuits. Each rack is equipped with an independent redundant cooling fan group, which integrates a speed monitoring sensor. When the fan speed is lower than a preset speed threshold, the system sends a warning signal to the maintenance terminal through the communication interface. In addition, the bottom of the rack is equipped with anti-vibration rubber pads to absorb low-frequency vibrations generated by the external environment and ensure the physical stability of the solder joints inside the processor. The outer layer of each processing unit rack is wrapped with a shield made of high-permeability permalloy, and the shield has honeycomb-shaped heat dissipation holes to shield conducted and radiated electromagnetic interference within a preset frequency range.
[0012] Preferably, in the construction of the multi-level redundant power supply system, of the two completely independent external power inputs, the first power source is taken from the power supply bus of the power distribution room, and the second power source is taken from the plant's independent uninterruptible power supply system. Before entering the control system, the two power sources pass through multi-level overvoltage protection devices and electromagnetic filtering devices to filter out harmonic interference and surge voltage, ensuring that the waveform distortion rate of the input power is lower than a preset threshold. The preset DC power module adopts a hot-swappable structure, and the physical isolation component for preventing reverse current is a high-speed diode connected in series at the module output terminal. The rated current of the high-speed diode and the rated output current of the power module meet a preset proportional relationship to ensure that when a single power module experiences an internal short-circuit fault, the fault current does not flow back, maintaining the stability of the DC bus voltage. The uninterruptible power supply system calculates the equivalent internal resistance of the battery pack in real time through periodic weak discharge tests, and sends a replacement notification when the equivalent internal resistance rises to a preset failure threshold.
[0013] Preferably, the current sharing bus achieves load distribution through a dynamic impedance balancing circuit. Under normal operating conditions, each preset DC power module shares the load current of the control system according to its internal impedance characteristics. When any power module fails and exits operation, the remaining power modules redistribute the load through dynamic impedance compensation logic. The real-time output voltage of the current sharing bus is determined by a linear combination of the number of currently online power modules, the no-load output voltage and output current of each power module, and the corresponding dynamic compensation equivalent impedance. The system ensures that the voltage fluctuation range of the current sharing bus is less than a preset voltage fluctuation threshold by adjusting the dynamic compensation equivalent impedance. At the same time, the system performs real-time spectrum analysis on the voltage ripple of the current sharing bus, monitors the AC component on the current sharing bus, and if the ripple amplitude of the power module switching frequency and its harmonics exceeds the preset ripple threshold, the system locates the power module with degraded performance and outputs a maintenance prompt.
[0014] Preferably, in the process of communication topology reconfiguration and link fault tolerance design, the communication backbone is laid using shielded twisted-pair cables, and the outer layer of the cables is covered with an anti-electromagnetic interference metal mesh tube. The metal mesh tube is grounded at the point of entry into the cabinet, and the grounding resistance is less than or equal to a preset resistance threshold. The communication link adopts a ring network redundancy protocol, constructing a closed-loop network between redundant communication interface modules. When a physical break occurs at any point in the loop, the network topology is reconfigured. The communication cables are laid using layered isolation racks to maintain the physical distance between communication cables and power cables above a preset distance threshold. For cables passing through high-temperature areas, pneumatic cooling jackets are added to force-cool the cables using compressed air. The communication interface modules are scheduled according to the priority of data packets, marking excitation command and fault protection signals as the highest priority, enjoying a defined transmission bandwidth, and marking system logs and environmental monitoring data as low priority.
[0015] Preferably, during the development and seamless switching deployment of the redundant control logic, the switching logic includes two parts: software self-diagnosis and hardware watchdog. The software self-diagnosis module monitors the task stack occupancy, available memory space, and cycle scan time of the central processing unit in real time. When the scan time exceeds a preset scan time threshold, it actively initiates a master-slave switching command. The hardware watchdog operates independently of the processor core and monitors the system clock through periodic physical level toggle signals. Once it detects a clock stall or abnormal toggle frequency, the hardware watchdog forcibly transfers control to the slave processing unit in hot standby mode. In addition, the system analyzes the historical trends of processor computing load, core temperature, and communication error counter through fault pre-judgment logic to identify the precursor characteristics of processor failure and perform preventive switching before the processor fails and shuts down.
[0016] Preferably, the smooth transition processing is implemented by running a smooth transition algorithm. At the moment of switching, the slave processing unit reads a snapshot of the parameters of the master processing unit in the last normal cycle before failure. The excitation voltage control output after switching is jointly determined by the excitation deviation value, proportional gain, integral gain, integral time constant, and smoothing compensation term, wherein the smoothing compensation term is used to compensate for the calculation deviation generated at the moment of master-slave switching. The slave processing unit selects preset proportional-integral-derivative parameters to take over based on the load mutation rate at the moment of switching. The control program also includes a virtual actuator model, which simulates the mechanical characteristics and electromagnetic response of the actuator during switching to provide continuous feedback flow to the regulator. If both central processing units fail simultaneously, the system's built-in hardware logic gate array forces the output of a preset safe excitation current value to keep the motor running in the minimum excitation state.
[0017] The technical effects achieved by this invention are as follows: 1. Extremely high system reliability and stability. This invention upgrades the original single central processing unit architecture to a second-series dual central processing unit redundant architecture, eliminating the risk of single-point failure at the core processing level. The dual central processing units are synchronized in real time via optical fiber, ensuring that a complete, operational backup unit is always present. Combined with a hardware watchdog and software self-diagnostic mechanisms, it can provide instantaneous response and automatic switching to common faults such as system crashes and program anomalies. Simultaneously, the parallel operation of multiple DC power supply modules provides multiple layers of protection at the power supply level. Even in the extreme case of losing some power supply modules, the system can still maintain normal logic control, significantly improving the long-term stable operation capability of the blast furnace blower excitation system.
[0018] 2. Excellent economic efficiency and compatibility with existing systems. This invention fully utilizes the existing first-series input / output modules and communication hardware, avoiding the high costs and large-scale hot work and wiring operations associated with replacing all hardware. Through the application of distributed interface modules and bus adaptation technology, seamless collaboration between legacy modules and advanced central processing units is achieved. This method not only reduces hardware investment for enterprises but also significantly shortens the transformation period and reduces debugging difficulty, providing a cost-effective solution for metallurgical enterprises to upgrade their existing equipment.
[0019] 3. Multi-layered power supply fault tolerance and anti-interference capability. This invention constructs a full-link redundancy system from external AC input to internal DC output. The automatic switching scheme of two independent AC power supplies solves the instability problem on the power supply side; the internal multi-power supply parallel architecture, combined with current sharing technology and reverse current protection, ensures the absolute stability of the control bus voltage. Addressing the complex electromagnetic environment of metallurgical sites, this invention employs shielding enhancement, physical isolation, and specific grounding processes to effectively suppress conducted and radiated interference, ensuring the purity and accuracy of the control signals.
[0020] 4. Disturbance-free control switching and high-precision adjustment. This invention achieves deep redundancy switching optimization at the software level. Through real-time mirroring and smoothing algorithm processing of the regulator's internal parameters, it ensures that the excitation output current will not experience a sudden change sufficient to cause motor oscillation during master-slave switching. The switching process is completed in an extremely short time, almost imperceptible to the blast furnace blower. This not only ensures the safe operation of the synchronous motor but also guarantees the stability of the blast furnace blast pressure, providing solid technical support for the continuity of the blast furnace smelting process.
[0021] 5. Enhanced monitoring, early warning, and maintenance convenience. With an integrated human-machine interface and a detailed log system, maintenance personnel can intuitively monitor the operating status of each component within the system. The hot-swappable power module design allows for fault replacement without system downtime, further improving equipment maintainability. The system's automatic inspection and fault early warning functions enable a shift from reactive to preventative maintenance, providing crucial data and an operational platform for ensuring safe production management on industrial production lines. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the core principle framework for the development of redundant control logic and the deployment of disturbance-free switching in this invention. Detailed Implementation
[0023] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0024] Example 1 In the upgrade process of the blast furnace blower excitation control system, the blast furnace blower excitation CPU redundancy improvement method described in this invention constructs a highly reliable control platform through efficient reuse of existing hardware resources and redundancy modification of the core processing unit. The method specifically includes the following steps: In the aforementioned method for improving the redundancy of the excitation CPU in a blast furnace blower, step 1 involves utilizing existing input / output modules and communication links: retaining the original analog input modules, digital input modules, analog output modules, digital output modules, and industrial Ethernet communication modules corresponding to the first series of programmable logic controllers. In specific implementation, a comprehensive technical assessment of the existing internal wiring of the excitation cabinet is first conducted. This process includes using an insulation resistance tester to test the insulation of all signal and power cables, ensuring that the cable insulation layer is free from aging, damage, or leakage risks. Simultaneously, a signal generator and oscilloscope are used to assess the signal integrity of the existing analog transmission link, measuring the signal attenuation rate, noise interference level, and impedance matching during transmission. For physical connection cables that have exceeded the preset service life threshold (e.g., 10 years) or whose electrical performance has deteriorated according to test results, mandatory replacement shall be carried out, and high-temperature shielded cables with higher shielding performance and anti-aging ability shall be selected to ensure that the original first series input and output modules have the predetermined expected service life (e.g., extended by more than 15 years) in the new system environment, and the sampling accuracy is maintained within the preset accuracy range (e.g., error less than 0.1%).
[0025] Furthermore, the existing module is mounted onto the newly built communication backbone via a specific bus adapter unit. This bus adapter unit is configured as a distributed interface module, integrating a protocol conversion ASIC chip. This distributed interface module can capture the original first-series backplane bus signals and convert them into communication protocols compatible with the second-series dual central processing units (e.g., converting the original parallel bus protocol to a redundant fieldbus protocol or real-time industrial Ethernet protocol). The distributed interface module is physically configured with dual communication ports, each connected to an independent station address of the dual central processing units via an independent physical medium. At the data link layer, the module supports bidirectional heartbeat detection and automatic path switching logic. When a data packet is lost, a checksum error occurs, or a physical disconnection occurs on the link corresponding to one of the communication ports, the module's internal logic control unit switches the data stream to another backup port within microseconds, thereby achieving link redundancy at the underlying module level. This ensures that the motor stator voltage, rotor current, frequency, and feedback commands from various actuators collected by field sensors can be transmitted to the central processing unit in real time and accurately.
[0026] In the method for improving the redundancy of the excitation CPU in the blast furnace blower, step 2, the upgrade and physical deployment of the central processing unit architecture, involves removing the first series of single-machine central processing units and replacing them with a second series of dual central processing units that possess hardware redundancy. The dual central processing units include a master processing unit and a slave processing unit. The two units are physically independent but highly coordinated at the logical level. The two units exchange data at high speed via a dedicated synchronous optical fiber. The optical fiber link uses a dual-ring network structure with gigabit-level bandwidth, ensuring absolute synchronization of internal register states, timer values, counter current values, and intermediate results of logical operations within each scan cycle. Specifically, the synchronization frequency of the second series of dual central processing units is set to a preset frequency (e.g., synchronizing once every 10 milliseconds), and each pair of synchronization data packets includes a redundancy check bit (CRC) and a high-precision timestamp. After completing the logical operation of the current scan cycle, the master processing unit uses DMA (Direct Memory Access) technology to push the calculation results to the mirror storage area of the slave processing unit in real time. If data verification inconsistencies or timestamp alignment failures occur in multiple consecutive cycles (such as three consecutive scan cycles), the system will automatically trigger a high-level alarm and enter fault diagnosis mode, locking the output of the current main processing unit until control is taken over from the processing unit.
[0027] In terms of physical deployment, the main processing unit and the slave processing unit are each mounted on independent aluminum alloy racks. The physical distance between the two racks is maintained above a preset safe distance (e.g., a physical interval of no less than 300 mm). This spatial isolation design aims to reduce the probability of simultaneous failure of both units due to overheating caused by local circuit short circuits or mechanical vibrations. Each rack is equipped with an independent redundant cooling fan assembly powered by 24V DC. The cooling fan assembly integrates a speed monitoring sensor. When the fan speed falls below a preset speed threshold, the system sends a warning signal to the maintenance terminal via the communication interface. In addition, anti-vibration rubber pads are installed at the bottom of the racks to effectively absorb low-frequency vibrations generated by the operation of large motors in the blast furnace area, ensuring the physical stability of the precision solder joints inside the processor.
[0028] In the aforementioned method for improving the redundancy of the excitation CPU in the blast furnace blower, step 3, the construction of a multi-level redundant power supply system, involves configuring two completely independent external power inputs for the second series dual central processing unit. The first power source comes from the 380V power bus in the distribution room where the excitation cabinet is located, and is stepped down and filtered by a transformer. The second power source comes from the plant's independent uninterruptible power supply (UPS) system, which has its own battery bank. Before entering the system, both power sources must pass through multi-level overvoltage protection devices (SPDs) and electromagnetic filters. These devices are specifically designed to filter out harmonic interference and surge voltages generated by frequent starts or heavy-load operation of large motors in the blast furnace area, ensuring that the waveform distortion rate of the input power supply is below a preset threshold. Automatic and seamless switching between the two power sources is achieved through a power management module. This module uses a static switching switch (STS) with a switching time of less than 5 milliseconds, ensuring that the control system does not detect voltage interruptions during main grid fluctuations or power outages.
[0029] A parallel redundant architecture is constructed for the internal DC bus. This architecture uses four pre-set DC power supply modules with the same rated power, operating in parallel. Each DC power supply module is hot-swappable, allowing for replacement without system shutdown. A high-speed diode is connected in series at the output of each module to prevent reverse current. The rated current of the diode and the rated output current of the power supply module meet a preset ratio (e.g., 2:1). This physical isolation mechanism ensures that when a single power supply module experiences an internal short-circuit fault, the fault current will not flow back to the DC bus, thus preventing a drop in the DC voltage of the entire control system.
[0030] The current sharing bus achieves load distribution through a dynamic impedance balancing circuit. Under normal operating conditions, each power module shares the load current of the entire control system equally according to its internal impedance characteristics. When any power module fails and exits operation, the remaining three power modules redistribute the load proportionally within 10 milliseconds through dynamic impedance compensation logic. The voltage fluctuation characteristics of the current sharing bus satisfy the following relationship:
[0031] Among them, V bus This represents the real-time output voltage of the current sharing bus, where m represents the number of power modules currently operating online, and V. j I represents the no-load output voltage of the j-th power module. j Req,j represents the output current of the j-th power module, and Req,j represents the dynamic compensation equivalent impedance corresponding to the j-th module. By adjusting Req,j, the system ensures that the voltage fluctuation range is less than the preset voltage fluctuation threshold (e.g., no more than 1% of the rated value), effectively preventing the control system from restarting the processor or interrupting communication due to voltage transients.
[0032] In the aforementioned method for improving the redundancy of the blast furnace blower excitation CPU, step 4, communication topology reorganization and link fault-tolerant design, utilizes redundant communication interface modules to establish multiple communication paths between the dual central processing units and the reused first series of modules. The main communication channel is laid using high-quality shielded twisted-pair cable. The cable's outer layer not only has an aluminum foil shielding layer but is also additionally covered with a dense anti-electromagnetic interference metal mesh. This metal mesh is grounded 360 degrees at its entry point into the cabinet, requiring a grounding resistance of less than or equal to 4 ohms to effectively resist the strong alternating magnetic field generated by the high-current bus in the metallurgical environment. When an anomaly occurs in the main communication link during system operation (such as continuous CRC check errors, timeout counter overflow, etc.), the redundant communication driver immediately triggers a link jump instruction, redirecting the data frame to the backup communication link. The communication switching delay is strictly controlled within a preset switching time threshold (e.g., 20 milliseconds). This threshold is lower than the control loop response cycle of the blast furnace blower excitation system, ensuring the continuity of fieldbus data transmission and limiting the communication packet loss rate to below 0.01%.
[0033] In the aforementioned method for improving the redundancy of the excitation CPU in a blast furnace blower, step 5, redundancy control logic development and seamless switching deployment, involves running identical excitation regulation algorithm logic in both central processing units, encompassing multiple modes such as constant current control, constant power factor control, and constant magnetic angle control. To ensure that the master-slave switching process does not negatively impact the operation of the blast furnace blower, a deep seamless switching mechanism is established. The switching logic comprises two parts: software self-diagnosis and a hardware watchdog. The software self-diagnosis module monitors the task stack occupancy, available memory space, and loop scan time of the central processing unit in real time. When the scan time exceeds a preset scan time threshold (e.g., 50 milliseconds) due to program logic dead loops or resource contention, a master-slave switch is initiated proactively. The hardware watchdog operates independently of the processor core, monitoring the system clock through periodic physical level toggling signals. Once a clock stall or abnormal toggling frequency is detected, the hardware watchdog immediately pulls high the reset pin of the control bus, forcibly transferring control to the slave processing unit in hot standby mode.
[0034] The core of the seamless switching process is to smooth the key parameters in the excitation control algorithm. This includes real-time mirroring of the excitation current setpoint, transformer feedback value, and the internal integral term of the proportional-integral-derivative (PID) controller. At the moment of switching, the processing unit reads a snapshot of the data from the last normal cycle before the failure from the main processing unit and employs a smooth transition algorithm. The smooth transition algorithm satisfies the following expression:
[0035] Where u(t) is the excitation voltage control output after switching, e(t) is the excitation deviation value, and K p Proportional gain, integral gain, T i Δsmooth(t) is the integral time constant. Δsmooth(t) is the smoothing compensation term, used to compensate for the sudden change caused by inconsistent calculation step sizes during master-slave switching. Through this algorithm, the control output jump value at the moment of switching is limited to within a preset jump threshold (e.g., not exceeding 2% of the rated output), effectively preventing synchronous motor loss of synchronization, oscillation, or protection tripping caused by sudden changes in excitation current.
[0036] In practical applications, the above method is also equipped with a real-time visual monitoring system. An industrial-grade human-machine interface (HMI) terminal is installed on the excitation cabinet door panel, displaying in real-time health status scores of the master and slave central processing units, independent load currents of the four power supply modules, real-time bandwidth utilization of the communication link, and electromagnetic interference levels via a graphical interface. The system's built-in large-capacity storage module can record up to 50,000 system event logs, including the triggering reasons for each master-slave switch, the switch time, and parameter comparisons before and after, providing detailed data support for subsequent equipment maintenance and fault analysis.
[0037] Furthermore, this method integrates a periodic automatic detection function. During planned equipment maintenance, operators can initiate a "master-slave forced switchover drill" mode via the HMI terminal. In this mode, the system simulates a main processing unit failure under control, verifying the takeover speed and logical correctness of the backup link and backup CPU. Key performance indicators such as current fluctuations and communication delays during the drill are automatically backed up to external storage, generating a technical evaluation report. For the high-temperature conditions in metallurgical sites, the system monitors the operating environment of the dual central processing units in real time using temperature sensors distributed in key locations within the cabinet. When the ambient temperature inside the cabinet exceeds 45 degrees Celsius, the system automatically activates the enhanced air-cooling system; if it exceeds the preset alarm temperature threshold of 55 degrees Celsius, an environmental anomaly alarm is sent to the remote control room, prompting personnel to intervene on-site, thereby ensuring that the control system always operates within the optimal temperature range.
[0038] Example 2 Based on the blast furnace blower excitation CPU redundancy improvement method described in Example 1, this example further refines the hardware reinforcement and data synchronization strategy in extreme industrial environments to meet the almost stringent stability requirements of the blower system for extra-large blast furnaces (such as those with a volume greater than 5000 cubic meters).
[0039] In the reuse process of step 1, this embodiment employs a conductivity-enhanced contact repair process to address the physical contact performance of the backplane of the original first series of input / output modules. Before remounting the module to the distributed interface module, all backplane gold finger areas are precisely cleaned and coated with a 3-micron-thick layer of antioxidant conductive polymer. This measure aims to reduce micro-friction corrosion caused by long-term operation, decrease contact resistance, and ensure that signal waveforms are not distorted under high-frequency communication in redundant systems. The internal logic mapping table of the distributed interface module is optimized, remapping the original I / O addressing space into a contiguous memory region, greatly improving the read efficiency of the redundant CPU for the reused module.
[0040] In step 2, regarding the data synchronization mechanism for the dual central processing units, this embodiment employs a time-series verification protocol based on asymmetric encryption. In the fiber optic synchronization link, each data packet sent by the master processing unit contains not only register values but also a dynamic verification sequence generated by a hardware random number generator. When the slave processing unit receives data, it quickly verifies the authenticity and timing integrity of the data packet through its built-in decryption coprocessor. This mechanism effectively defends against illegal bit-flipping errors caused by strong electromagnetic pulses in the field. The synchronization frequency is increased to the 2-millisecond level, meaning a master-slave full data mirror is performed every 2 milliseconds. The throughput of synchronization data is automatically adjusted according to the dynamic characteristics of the excitation system. During transient processes such as motor startup, grid connection, or severe load fluctuations, the system automatically increases the synchronization priority to ensure that the standby unit is always in the operating state closest to the master unit.
[0041] In terms of physical deployment, this embodiment features enhanced electromagnetic shielding for the racks. Each processing unit rack is encased in a shield made of high-permeability permalloy alloy. This shield is designed with honeycomb-shaped heat dissipation holes, ensuring effective heat dissipation while effectively shielding conducted and radiated electromagnetic interference in the frequency range of 100kHz to 1GHz. This design is particularly suitable for scenarios where high-power frequency converters or high-frequency heating equipment are deployed near the blast furnace area.
[0042] In the power supply design of step 3, this embodiment introduces real-time monitoring technology for battery internal resistance. The UPS system connected to the power management module calculates the equivalent internal resistance of the battery pack in real time through periodic weak discharge tests. When the internal resistance rises to a preset failure threshold, the system immediately sends a replacement notification to the HMI terminal to prevent the UPS system from failing to provide sufficient starting current during a power outage. The four parallel-operating DC power modules employ an intelligent load switching strategy. In low-power operation, the system controls one module to enter a sleep state, periodically rotating the online operating time of each module to balance the losses of the electrolytic capacitors inside each module, thereby improving the mean time between failures (MTBF) of the entire power system.
[0043] In step 4, the communication link employs a ring redundancy protocol (MRP). By constructing a closed-loop fiber optic network between redundant communication interface modules, the network topology is automatically reconstructed within 10 milliseconds when a physical break occurs at any point in the loop. Layered isolation racks are used for the laying of communication cables, maintaining a physical distance of at least 500 mm between communication cables and power cables. For cables passing through high-temperature zones, pneumatic cooling jackets are added, utilizing compressed air from the blast furnace area for forced cooling of the cables, ensuring that the physical parameters of the communication medium do not deteriorate due to high temperatures.
[0044] In the logic control of step 5, this embodiment adds a fault pre-judgment logic based on a predictive model. By performing big data analysis on the historical trends of the main processing unit's computational load, core temperature, and communication error counter, the system can identify precursory features of processor failure. For example, when an abnormal upward trend in the main processing unit's core temperature is detected under constant load, the system will proactively trigger a controlled master-slave switch before the processor actually overheats and shuts down. This preventative switching mechanism further reduces the operational risk of the excitation system. Simultaneously, the disturbance-free switching algorithm incorporates dynamic compensation for the excitation system's frequency response. Based on the real-time speed of the synchronous motor, the damping coefficient of the smoothing compensation term is adjusted to ensure that the stator current fluctuation amplitude is controlled within 0.5% during the switching process.
[0045] Furthermore, this embodiment also developed a dedicated logical isolation firewall for the special operating conditions of the blast furnace blower. This firewall is deployed between the distributed interface module and the main communication channel, performing validity checks on all instructions sent to the actuator. If a fault in the main processing unit causes it to issue an illogical excitation command (such as exceeding 1.5 times the motor's rated current), the firewall will intercept the command and immediately force a switch to the slave processing unit. The slave processing unit will then recalculate and issue the correct control command based on a redundancy algorithm, ensuring the motor's operational safety at the command level.
[0046] Example 3 This embodiment focuses on the in-depth optimization of the software architecture and the realization of system self-healing capability in the improved method for redundancy of the excitation CPU of the blast furnace blower. Based on the hardware architecture of Embodiments 1 and 2, this embodiment further enhances the robustness of the redundant system through customized configuration of the embedded real-time operating system kernel.
[0047] For the analog input module reused in step 1, this embodiment introduces a multi-stage digital filtering algorithm at the software layer. For the acquired blast furnace blower rotor voltage signal, the system first performs median filtering to remove pulse spike interference, and then uses a Butterworth low-pass filter to remove high-frequency noise. To compensate for the time lag caused by digital filtering, the system employs a phase feedforward compensation logic to ensure that the analog value obtained by the central processing unit is highly consistent with the physical true value in phase, thereby improving the dynamic response accuracy of the excitation regulator.
[0048] In the dual-CPU interaction design of step 2, this embodiment implements a task-level load-sharing mechanism. The main processing unit is responsible for the core excitation algorithm, sequential logic control, and closed-loop regulation tasks, while the slave processing unit, while maintaining a hot standby state, undertakes non-core tasks such as system diagnostics, historical data packaging, communication traffic analysis, and environmental parameter monitoring. The two units exchange task execution status through a shared memory area. Once the main processing unit experiences task overload, the slave processing unit can dynamically take over some non-critical logic, releasing the computing resources of the main processing unit and ensuring that the execution cycle fluctuation of the core control loop is less than 50 microseconds.
[0049] In the power monitoring logic of step 3, the system adds real-time spectrum analysis of the DC bus voltage ripple. By monitoring the AC component on the current-sharing bus through a high-precision data acquisition module, if an abnormal increase in ripple amplitude is detected at a specific frequency (such as the power module switching frequency and its harmonics), the system automatically locates the power module with degraded performance and accurately displays the module number requiring maintenance on the HMI interface. This condition-monitoring-based maintenance method effectively prevents the entire DC system from exceeding ripple limits due to the failure of a single capacitor, thus affecting the accuracy of analog signal acquisition.
[0050] In the communication link management of step 4, this embodiment introduces the concept of Software-Defined Networking (SDN). The communication interface module can intelligently schedule data packets based on their priority. Excitation command and fault protection signals are marked as the highest priority and enjoy dedicated deterministic transmission bandwidth; while system logs and environmental monitoring data are marked as low priority and are automatically avoided when the link is busy. When interference occurs on the main communication link, causing bandwidth reduction, the system automatically compresses the transmission frequency of low-priority data, prioritizing the real-time interaction of critical control data, thereby maintaining the basic operation of the motor even when the physical link is damaged.
[0051] In the control logic of step 5, this embodiment redundancy is applied to the parameter self-tuning logic of the PID controller. During system operation, the main processing unit calculates the load inertia and electromagnetic parameter changes of the motor in real time and updates the PID parameters. These parameters are synchronized to the slave processing unit in real time. When redundancy switching is triggered, the slave processing unit selects the optimal set of PID parameters to take over based on the load mutation rate instantaneously before the switch. To further improve the effect of seamless switching, this embodiment adds a virtual actuator model to the control program. During the switching process, this model simulates the mechanical characteristics and electromagnetic response of the actuator, providing a continuous feedback flow to the controller, so that the internal algorithm of the slave processing unit has completed the pre-adaptation to the current operating condition before completely taking over the physical actuator.
[0052] To address the extremely high safety requirements of metallurgical enterprises, this embodiment also provides an emergency protection mechanism based on logic locking. In the extremely rare event of simultaneous failure of both central processing units, the system's built-in hardware gate array (FPGA) will force the output of a preset, safe excitation current value, keeping the motor operating at minimum excitation, thus buying valuable time for operators to manually shut down the machine or urgently switch to the backup control system. This multi-level redundant architecture truly achieves "full failure protection" for the blast furnace blower control system under any complex operating conditions.
[0053] At the system's visual management level, this embodiment developed a web-based remote diagnostic platform. Through an encrypted industrial gateway, maintenance personnel can view various operational indicators of the redundant system in real time from the control room or even via mobile terminals within the plant. The platform integrates a Root Cause Analysis (RCA) engine. When a master-slave switch occurs, the system automatically extracts all key data from 10 seconds before the switch to 30 seconds after the switch, and automatically determines whether the problem is hardware failure, communication interference, or software anomaly through logic tree analysis, significantly shortening the time for troubleshooting and system recovery.
[0054] Through the detailed description of the above embodiments, the blast furnace blower excitation CPU redundancy improvement method of the present invention, without changing the original physical structure of the excitation power circuit, achieves full-link redundancy from power supply, data acquisition, logic operation to instruction output through logic reconstruction and hardware reinforcement of the control core. This method significantly increases the system's mean time between failures (MTBF) from the original first preset time to a second preset time (e.g., more than 3 times), greatly reducing the probability of unplanned downtime of the blast furnace blower due to excitation control failure, and providing solid technical support for safe production and cost reduction and efficiency improvement in metallurgical enterprises.
[0055] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.
Claims
1. A method for improving redundancy in the excitation processor of a blast furnace blower, characterized in that, Includes the following steps: Utilizing the existing input / output modules and communication links, the original analog input modules, digital input modules, analog output modules, digital output modules, and industrial Ethernet communication modules corresponding to the first series of programmable logic controllers are retained. The original input / output modules are then connected to the newly built communication backbone via a bus adapter unit. The bus adapter unit is configured as a distributed interface module, which integrates a protocol conversion chip to capture the original first series backplane bus signals and convert them into redundant fieldbus communication protocols. The central processing unit architecture has been upgraded and physically deployed. The first series of central processing units that run on a single machine have been removed and replaced with a second series of dual central processing units with hardware redundancy. The second series of dual central processing units includes a physically independent master processing unit and a slave processing unit. The two processing units exchange data at high speed through a dedicated synchronous fiber optic link to ensure that the internal register status, timer value, current counter value and logic operation result are kept synchronized in each scan cycle through direct memory access technology. A multi-level redundant power supply system is constructed, which configures two completely independent external power inputs for the second series dual central processing unit. The automatic switching between the two power supplies is realized through a power management module with an integrated static switching switch. A parallel redundant architecture is constructed for the internal DC bus, which uses multiple preset DC power modules with the same rated power to operate in parallel. Power is supplied to the control system through a current sharing bus. The output of each preset DC power module is connected in series with a physical isolation component to prevent reverse current. Communication topology reorganization and link fault tolerance design utilize redundant communication interface modules to establish multiple communication paths between the second series dual central processing unit and the reused module. When the system detects a cyclic redundancy check error or timeout counter overflow in the main communication link, the communication driver triggers a link jump instruction to redirect the data stream to the backup communication link. The redundant control logic is developed and deployed without disturbance. The excitation regulation algorithm logic runs completely identically in the second series of dual central processing units. A heartbeat detection mechanism is established to monitor the operating status of the main processing unit. When a hardware failure or program lock-up is detected in the main processing unit, the control is transferred to the slave processing unit within a preset operation cycle, and the excitation setpoint, feedback value and internal integral term of the regulator are smoothly transitioned.
2. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, The process of utilizing the existing input / output modules and communication links includes evaluating the wiring inside the existing excitation cabinet: using an insulation resistance tester to test the insulation of signal cables and power cables to determine whether the cable insulation layer is aging or has a risk of leakage; using a signal generator and oscilloscope to evaluate the signal integrity of the existing analog transmission link, measuring the signal attenuation rate, noise interference level and impedance matching parameters during transmission. For physical connection cables that have exceeded the preset service life threshold, or cables whose electrical performance has deteriorated as shown by the test results, a mandatory replacement operation is performed. High-temperature shielded cables with shielding performance and anti-aging properties are selected for replacement to ensure that the original first series input and output modules have the predetermined expected service life in the new redundant system environment, and that the signal sampling accuracy is maintained within the preset accuracy range.
3. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, The distributed interface module is physically configured with dual communication ports, which are connected to two independent station addresses of the second series dual central processing units via independent physical media. At the data link layer, the distributed interface module supports bidirectional heartbeat detection and automatic path switching logic. When a data packet is lost, a verification error occurs, or a physical disconnection occurs in the link corresponding to one of the communication ports, the logic control unit inside the module performs a data flow switching operation, directing the data flow to another backup port. This achieves link redundancy at the underlying module level, ensuring that the motor stator voltage, rotor current, frequency, and feedback commands from the actuators collected by the field sensors are transmitted to the central processing unit in real time. In addition, the logic mapping table inside the distributed interface module is reconstructed, remapping the original input / output address space into a continuous memory area for the second series dual central processing units to read.
4. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, During the data synchronization process of the second series dual central processing units, the synchronization fiber optic link adopts a dual-ring network structure. The synchronization frequency of the second series dual central processing units is set to a preset frequency. Each pair of synchronization data packets includes redundant check bits and a high-precision timestamp. When the slave processing unit receives data, it verifies the authenticity and timing integrity of the data packets through a built-in decryption coprocessor. After the master processing unit completes the logical operation of the current scan cycle, it pushes the calculation result to the mirror storage area of the slave processing unit in real time. If the system detects that data verification inconsistencies or timestamp alignment failures occur in multiple consecutive cycles, the system automatically triggers a high-level alarm and enters a fault diagnosis mode, locking the output of the current master processing unit.
5. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, During the upgrade and physical deployment of the central processing unit architecture, the main processing unit and the slave processing unit are respectively installed on independent aluminum alloy racks. The physical distance between the two racks is maintained above a preset safe distance. Spatial isolation reduces the probability of simultaneous failure of both units due to overheating or mechanical vibration caused by local circuit short circuits. Each rack is equipped with an independent redundant cooling fan group, which integrates a speed monitoring sensor. When the fan speed is lower than a preset speed threshold, the system sends a warning signal to the maintenance terminal through the communication interface. In addition, the bottom of the rack is equipped with anti-vibration rubber pads to absorb low-frequency vibrations generated by the external environment and ensure the physical stability of the solder joints inside the processor. The outer layer of each processing unit rack is wrapped with a shield made of high-permeability permalloy. The shield has honeycomb-shaped heat dissipation holes to shield conducted and radiated electromagnetic interference within a preset frequency range.
6. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, In the construction of the multi-level redundant power supply system, the first power source is taken from the power supply bus of the power distribution room, and the second power source is taken from the plant's independent uninterruptible power supply system. Before entering the control system, the two power sources pass through multi-level overvoltage protection devices and electromagnetic filtering devices to filter out harmonic interference and surge voltage, ensuring that the waveform distortion rate of the input power is lower than a preset threshold. The preset DC power module adopts a hot-swappable structure, and the physical isolation component to prevent reverse current is a high-speed diode connected in series at the module output. The rated current of the high-speed diode and the rated output current of the power module meet a preset ratio to ensure that when a single power module experiences an internal short-circuit fault, the fault current does not flow back, maintaining the stability of the DC bus voltage. The uninterruptible power supply system calculates the equivalent internal resistance of the battery pack in real time through periodic weak discharge tests, and sends a replacement notification when the equivalent internal resistance rises to a preset failure threshold.
7. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, The current sharing bus achieves load distribution through a dynamic impedance balancing circuit. Under normal operating conditions, each preset DC power module shares the load current of the control system according to its internal impedance characteristics. When any power module fails and exits operation, the remaining power modules redistribute the load through dynamic impedance compensation logic. The real-time output voltage of the current sharing bus is determined by a linear combination of the number of currently online power modules, the no-load output voltage and output current of each power module, and the corresponding dynamic compensation equivalent impedance. The system ensures that the voltage fluctuation range of the current sharing bus is less than the preset voltage fluctuation threshold by adjusting the dynamic compensation equivalent impedance. At the same time, the system performs real-time spectrum analysis on the voltage ripple of the current sharing bus, monitors the AC component on the current sharing bus, and if the ripple amplitude of the power module switching frequency and its harmonics exceeds the preset ripple threshold, the system locates the power module with degraded performance and outputs a maintenance prompt.
8. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, In the process of communication topology reconfiguration and link fault tolerance design, the main communication channel is laid with shielded twisted-pair cable, and the outer layer of the cable is covered with an anti-electromagnetic interference metal mesh tube. The metal mesh tube is grounded at the point of entry into the cabinet, and the grounding resistance is less than or equal to a preset resistance threshold. The communication link adopts a ring network redundancy protocol, and a closed-loop network is constructed between redundant communication interface modules. When a physical break occurs at any point in the loop, the network topology is reconfigured. The communication cable is laid with a layered isolation frame to keep the physical distance between the communication cable and the power cable above a preset distance threshold. For cables passing through high-temperature areas, a pneumatic cooling jacket is added to force-cool the cable using compressed air. The communication interface module schedules data packets according to their priority, marking excitation command and fault protection signal as the highest priority and giving them a defined transmission bandwidth, while marking system logs and environmental monitoring data as low priority.
9. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, During the development and seamless switching deployment of the redundant control logic, the switching logic comprises two parts: software self-diagnosis and hardware watchdog. The software self-diagnosis module monitors the task stack occupancy, available memory space, and cycle scan time of the central processing unit in real time. When the scan time exceeds a preset scan time threshold, it actively initiates a master-slave switching command. The hardware watchdog operates independently of the processor core and monitors the system clock through periodic physical level toggling signals. Once it detects clock stagnation or abnormal toggling frequency, the hardware watchdog forcibly transfers control to the slave processing unit in hot standby mode. In addition, the system analyzes the historical trends of processor computing load, core temperature, and communication error counters through fault pre-judgment logic to identify the precursory characteristics of processor failure and perform preventative switching before the processor fails and shuts down.
10. The method for improving redundancy of the excitation processor of a blast furnace blower according to claim 1, characterized in that, The smooth transition process is achieved by running a smooth transition algorithm. At the moment of switching, the slave processing unit reads a snapshot of the parameters of the master processing unit in the last normal cycle before failure. The excitation voltage control output after switching is jointly determined by the excitation deviation value, proportional gain, integral gain, integral time constant, and smoothing compensation term, wherein the smoothing compensation term is used to compensate for the calculation deviation generated at the moment of master-slave switching. The slave processing unit selects preset proportional-integral-derivative parameters to take over based on the load mutation rate at the moment of switching. The control program also includes a virtual actuator model, which simulates the mechanical characteristics and electromagnetic response of the actuator during switching to provide continuous feedback flow to the regulator. If both central processing units fail simultaneously, the system's built-in hardware logic gate array forces the output of a preset safe excitation current value to keep the motor running in a minimum excitation state.