A CPU-free, pure hardware motion coordination and arbitration circuit

Abstract

This invention discloses a pure hardware motion coordination and arbitration circuit that does not require a central processing unit (CPU), relating to the field of multi-axis motion control technology. It includes at least two motion command input interfaces, a hardware motion coordination logic circuit, and at least two motion command output interfaces. The hardware motion coordination logic circuit, without CPU instruction intervention, coordinates and processes multiple target motion commands according to preset, fixed coordination rules, generating coordinated motion commands for the corresponding actuators. All circuit modules are implemented using pure hardware logic circuits, with no executable programs, firmware, or programmable logic code involved in internal control throughout its entire lifecycle. This invention effectively eliminates the dependence on CPUs and motion control algorithms, achieving software-free multi-axis motion coordination and arbitration. It features high synchronization, high reliability, and low power consumption, and can be widely adapted to multi-actuator motion control scenarios such as legged robots, humanoid robots, industrial robotic arms, and intelligent vehicles.

Description

Technical Field

[0001] This invention relates to the field of multi-axis motion control technology, and in particular to a pure hardware motion coordination and arbitration circuit that does not require a central processing unit. It is applicable to multi-actuator motion control scenarios such as hexapod bionic robots, six-axis industrial robotic arms, full-size bipedal humanoid robots, intelligent car drive-by-wire chassis, flagship smartphone multi-camera collaborative systems, and large-scale computing center equipment cluster control. Background Technology

[0002] In the field of multi-axis motion control, especially in scenarios such as robotics and intelligent equipment, the cooperative control of multiple actuators has always been a core technical challenge. Current technologies generally employ a "high-performance central processing unit / motion controller + motion control algorithm" approach for multi-axis motion coordination and arbitration. This involves the processor running software algorithms for robot kinematics, trajectory planning, and conflict arbitration to generate cooperative control instructions for each actuator. This traditional architecture suffers from the following insurmountable technical drawbacks: 1. Insufficient multi-axis synchronization accuracy and high response latency: The execution of motion control algorithms relies on the serial operation of the processor, which involves instruction cycle overhead, interrupt latency, and operating system scheduling latency. The multi-axis synchronization accuracy is generally above the microsecond level, making it difficult to achieve precise synchronization at the nanosecond level. This makes it difficult to meet the control requirements of extreme scenarios such as bipedal walking of humanoid robots and linkage of high-speed robotic arms.

[0003] 2. High risk of software failure: The motion coordination logic relies on software programs, which have inherent risks such as code vulnerabilities, program crashes, and algorithm deadlocks. In industrial production, human-computer interaction and other scenarios, a single software failure may lead to robot loss of control, equipment damage or even personal injury.

[0004] 3. Lack of emergency safety backup capability and insufficient operational reliability: In traditional software motion control architecture, the main controller crash or algorithm failure will directly lead to the complete paralysis of the entire motion system. It lacks independent hardware-level backup control capability, making it difficult to realize emergency handling of abnormal scenarios such as instability and deadlock. The reliability is difficult to meet the requirements of high-requirement scenarios.

[0005] 4. High power consumption, making it difficult to adapt to low-power scenarios: Software motion control requires a high-performance processor to run continuously online, and even in standby mode, the processor needs to be powered. This results in high power consumption, making it difficult to adapt to low-power scenarios such as battery-powered small robots and portable devices.

[0006] 5. High development and maintenance costs: Multi-axis motion control algorithms are difficult to develop and require professional motion control engineers for algorithm development, debugging and maintenance. Frequent version upgrades and bug fixes are required, resulting in high development and maintenance costs throughout the entire lifecycle.

[0007] Although some motion control schemes based on field-programmable gate arrays have emerged in the existing technology, they are all implemented using programmable logic. In essence, they still rely on programmable code generated by hardware description languages. They have not been able to effectively get rid of their dependence on programmable logic and software algorithms, nor have they achieved true hardware-based motion coordination and arbitration without a central processing unit. It is difficult to solve the above-mentioned core technical defects at the same time. Summary of the Invention

[0008] Purpose of the invention The purpose of this invention is to overcome the above-mentioned shortcomings of the prior art and provide a pure hardware motion coordination and arbitration circuit that does not require a central processing unit. All control logic is implemented by non-programmable native hardware circuits. No software, firmware, or programmable logic code participates in the internal control throughout the entire system life cycle, effectively eliminating the dependence on the central processing unit and motion control algorithms. It achieves nanosecond-level multi-axis synchronization, high reliability, low power consumption multi-actuator motion coordination and arbitration, while also possessing hardware-level emergency backup control capabilities. Technical solution

[0009] To achieve the above objectives, the present invention adopts the following technical solution: A pure hardware motion coordination and arbitration circuit without a central processing unit includes at least two motion command input interfaces, a hardware motion coordination logic circuit, and at least two motion command output interfaces. The hardware motion coordination logic circuit coordinates and processes multiple target motion commands according to preset fixed coordination rules without central processing unit instruction intervention, generating coordinated motion commands for corresponding actuators. All circuit modules are implemented by pure hardware logic circuits, and no executable program, firmware, or programmable logic code participates in the generation and execution of internal control logic throughout the entire system lifecycle.

[0010] Furthermore, the hardware motion coordination logic circuit has a built-in large-capacity hardware lookup table that stores pre-planned motion trajectory data. It can directly call the corresponding trajectory according to the mode switching instruction to generate a multi-actuator coordinated motion instruction sequence without the need for inverse kinematics software calculation.

[0011] Furthermore, the circuit has a built-in hardware priority arbitrator, which can realize hardware-level arbitration and automatic avoidance of conflicts in multiple motion commands. The priority rules are fixed once during manufacturing through circuit wiring.

[0012] Furthermore, the circuit incorporates a pure hardware multi-axis linkage coordination circuit, which can achieve nanosecond-level synchronous motion control of multiple actuators.

[0013] Furthermore, the circuit incorporates a pure hardware sensor fusion circuit and an inverted pendulum balance control circuit, enabling adaptive balance control of the device without the need for central processing unit intervention. Beneficial effects

[0014] Compared with the prior art, the present invention has the following significant and substantial beneficial effects: 1. Nanosecond-level ultra-high multi-axis synchronization accuracy: This invention uses pure hardware parallel circuits to realize motion coordination logic, without processor serial operation overhead and software scheduling delay. The multi-axis synchronization accuracy can reach within 10 nanoseconds, which is more than three orders of magnitude higher than traditional software motion control solutions. It can realize extreme control scenarios such as stable bipedal walking of humanoid robots and precise linkage of high-speed robotic arms, effectively solving the core pain point of insufficient synchronization accuracy of traditional solutions.

[0015] 2. Extremely high operational reliability, effectively avoiding software failure risks: All control logic of this invention is permanently fixed through dedicated integrated circuit wiring, without any central processing unit, microcontroller unit, field programmable gate array or other programmable devices, and without any executable code storage unit. No software or firmware is involved throughout the entire life cycle, thus avoiding software-related risks such as code vulnerabilities, program crashes, and algorithm deadlocks at the physical level. Even if the main controller completely crashes, this circuit can still achieve basic motion control and emergency backup, with a mean time between failures of over one million hours.

[0016] 3. Hardware-level emergency safety backup, enhancing safety protection capabilities: This invention incorporates hardware deadlock detection and recovery circuits, priority arbitration circuits, and balance control circuits, enabling microsecond-level emergency response in abnormal scenarios such as equipment instability, motion deadlock, and command conflicts. It requires no central processing unit intervention or manual operation, effectively avoiding safety accidents such as equipment loss of control, falls, and collisions, and is suitable for human-machine collaborative robot scenarios.

[0017] 4. Ultra-low power consumption operation: This invention is implemented through pure hardware circuits, without the need for a high-performance processor. It can dynamically shut down unnecessary circuits according to the operating status. In standby and hibernation mode, the power consumption can be as low as microwatts, which is more than 99% lower than the power consumption of traditional software motion control solutions. It is suitable for low-power scenarios such as battery-powered humanoid robots, small mobile robots, and portable smart devices.

[0018] 5. Lower development and maintenance costs: All control logic of this invention is permanently fixed through hardware circuits, eliminating the need for complex motion control algorithm development, debugging and maintenance, as well as subsequent version upgrades and vulnerability fixes. It is ready to use immediately after installation, and the total life cycle development and maintenance costs are reduced by more than 90% compared to traditional solutions, significantly lowering the technical threshold for multi-axis motion control.

[0019] 6. Strong universality and adaptability across all scenarios: The circuit and actuator of this invention are highly decoupled, and are connected to the driver and sensor only through a standard hardware interface. No modification to the main system's software or hardware is required. It can be directly adapted to all multi-actuator motion control scenarios such as industrial robotic arms, humanoid robots, legged robots, smart cars, and precision motion tables, and has strong versatility and industrial applicability. Attached Figure Description

[0020] This embodiment has no accompanying drawings, which is hereby noted. Detailed Implementation

[0021] This specific embodiment fully discloses the feasible implementation scheme of the present invention, and all contents fully cover all technical features of claims 1-10. Those skilled in the art can fully implement the present invention without creative effort by following the contents described in this specification, thus satisfying the full disclosure requirements stipulated in the relevant provisions of the Patent Law.

[0022] Core Main Implementation Example: Hexapod Bionic Robot and Six-Axis Industrial Robotic Arm This embodiment focuses on a six-legged bionic walking robot and a six-axis industrial robotic arm as core application scenarios, and is not intended to limit the scope of protection of this invention. This invention can be adapted to all multi-actuator motion control scenarios.

[0023] The pure hardware motion coordination and arbitration circuit without a central processing unit described in this embodiment is implemented using dedicated integrated circuits. All control logic is permanently fixed through hardware circuit wiring. There are no programmable processors such as central processing units, microcontrollers, or digital signal processors, and no executable code storage units. No software, firmware, or programmable logic code participates in the internal control process throughout the entire system lifecycle. The circuit can directly interface with the servo drivers, encoders, and inertial measurement units of each robot joint. It can realize the entire process of multi-joint motion coordination, conflict arbitration, gait generation, and balance control without the need for an additional motion controller. The multi-axis synchronization accuracy can reach 10 nanoseconds, and the response delay is no more than 1 microsecond, which is suitable for the multi-axis linkage and high-precision motion control requirements of robots.

[0024] The following section uses a hexapod bionic robot as the core to explain in detail the hardware implementation and workflow of the circuit: I. Hardware Implementation of Core Circuit Module In this embodiment, the hexapod bionic robot is equipped with one set of this circuit to realize the motion coordination and arbitration of 24 joints of the 6 legs, fully covering all the technical features of claims 1-10.

[0025] 1. Core Basic Circuit Module - Motion command input interface: This embodiment is equipped with 24 independent motion command input interfaces, corresponding to the hip joint, knee joint, ankle joint and foot joint of the robot's 6 legs respectively. Each interface is directly electrically connected to the command output terminal of the upper layer system to receive motion commands for the target position and target speed of the corresponding joint. The interface adopts a standard parallel bus without the participation of any protocol parsing software.

[0026] - Hardware motion coordination logic circuit: Electrically connected to each motion command input interface, it is composed of pure combinational logic gate circuits, parallel comparator arrays, and hardware timing state mechanisms. The logic function is permanently fixed during manufacturing and cannot be reconfigured. Without any central processing unit instruction intervention, it coordinates and processes 24 target motion commands according to preset solidified coordination rules to ensure that the motion timing of each joint is synchronized and there are no motion conflicts. The coordination processing logic is permanently solidified through hardware circuits and no motion control algorithm program is involved.

[0027] - Motion command output interface: This embodiment is equipped with 24 independent motion command output interfaces, which are electrically connected to the hardware motion coordination logic circuit. Each interface is directly electrically connected to the servo driver of the corresponding joint, and sends the coordinated motion commands to the corresponding joint actuators. The motors are driven directly without going through any intermediate processor.

[0028] 2. Implementation of core functional circuits - Hardware Lookup Table and Trajectory Planning Circuit: The hardware motion coordination logic circuit incorporates a large-capacity non-volatile hardware lookup table. This table stores pre-planned motion trajectory data for the hexapod robot's walking, running, turning, and stationary gait modes, including timing, position, and velocity parameters for each joint. The circuit receives mode switching commands (4-bit binary encoding) from the upper-level system. Different encoding values ​​correspond to the starting addresses of different gait modes. It automatically retrieves the corresponding motion trajectory data from the hardware lookup table to generate a coordinated motion command sequence for all 24 joints, achieving full gait motion control of the robot without the need for any central processing unit or inverse kinematics algorithms.

[0029] - Hardware Priority Arbitrator: Integrated within the hardware motion coordination logic circuit, it consists of a parallel comparator array and a delay register array. When multiple motion commands conflict (such as a conflict between a turning command and a straight-line command, or a conflict between a leg-lifting command and a landing command), it arbitrates the conflict according to preset priority rules. These priority rules are fixed during manufacturing through circuit wiring. The arbitration logic is: balance control command > obstacle avoidance command > turning command > straight-line command > attitude adjustment command. It automatically inserts microsecond-level delays or path offsets for lower-priority commands, achieving automatic avoidance of motion conflicts and ensuring stable robot movement without stuttering or loss of control.

[0030] - Hardware deadlock detection and recovery circuit: Electrically connected to the hardware motion coordination logic circuit, it consists of a pure hardware state machine, a position comparator, and a timer. It monitors the motion status of each joint in real time. When the position data fed back by the encoder is detected, if the joint has no position change for a preset time and the speed is zero but the motion command is non-zero, it is immediately determined to be a motion deadlock. It automatically sends a reset command and a reverse unloading command to the joint to release the deadlock state. No manual intervention or central processing unit is required, which effectively solves the deadlock problem caused by robot jamming and stalling.

[0031] - Pure hardware multi-axis linkage coordination circuit: As the core component of the hardware motion coordination logic circuit, it consists of a hardware frequency divider, a synchronization pulse generator, and a phase matching circuit. It can automatically decompose a macroscopic forward / turning motion command into synchronization pulse signals for 24 joints, ensuring that all joints move in coordination according to the preset timing relationship. The multi-axis synchronization accuracy can reach 10 nanoseconds, enabling the six-legged robot to walk, run, and turn smoothly without gait disorder or body sway.

[0032] 3. Implementation of extended functional circuits - Pure hardware sensor fusion circuit: Electrically connected to the hardware motion coordination logic circuit, it consists of a parallel adder, a complementary filter circuit, and a hardware state mechanism. The fusion logic is permanently fixed through the hardware circuit without central processing unit intervention. The circuit directly interfaces with the robot's inertial measurement unit, directly performing hardware complementary filtering and fusion on the raw data of three-axis angular velocity and three-axis acceleration, outputting the robot's pitch angle, roll angle, and yaw angle attitude data as feedforward inputs to the hardware motion coordination logic circuit. This allows for real-time adjustment of the motion parameters of each joint, enabling the robot to achieve adaptive balance. Even on slopes or uneven surfaces, it can automatically adjust its gait to maintain stability.

[0033] - Pure hardware inverted pendulum balancing control circuit: Electrically connected to the hardware motion coordination logic circuit, it consists of a pure hardware proportional-differential control circuit, dual comparators, and adders. The conversion logic is permanently fixed through the hardware circuit. The circuit directly receives the tilt angle and angular velocity signals from the inertial measurement unit. Through the proportional-differential control circuit, the tilt angle and angular velocity data are directly converted into differential motion commands for the left and right legs of the robot. When the robot body tilts forward, it automatically accelerates the movement of the front leg; when the robot body tilts backward, it automatically accelerates the movement of the rear leg, achieving body stability in the two-wheel balancing mode and adapting to the robot's two-wheel-six-legged composite motion mode.

[0034] - Pure hardware bionic gait oscillator: Electrically connected to the hardware motion coordination logic circuit, this Hopf oscillator circuit, constructed using digital logic gates, generates a periodic sinusoidal oscillation waveform as the robot's motion clock, providing basic rhythmic signals for each joint of the six legs. The circuit's oscillation frequency can be adjusted via hardware jumpers to correspond to different walking speeds of the robot. It generates stable bionic gait rhythms without central processor intervention or software algorithms, adapting to various motion scenarios.

[0035] II. System Workflow All control processes in this circuit are executed automatically by the hardware circuit, without any software involvement or central processing unit instruction intervention. The specific process is as follows: 1. The circuit is powered on, hardware initialization is completed, the bionic gait oscillator starts, generates basic motion rhythm, and enters standby mode; 2. The motion command input interface receives mode switching commands and target motion commands from the upper-level system and transmits them to the hardware motion coordination logic circuit; 3. According to the mode switching command, the circuit retrieves the corresponding pre-planned gait trajectory data from the hardware lookup table, and decomposes it into synchronous movement commands for each joint through the multi-axis linkage coordination circuit; 4. The hardware priority arbitrator detects motion command conflicts in real time and automatically performs arbitration and avoidance adjustments; the hardware deadlock detection circuit monitors the joint motion status in real time and automatically handles deadlock faults. 5. The sensor fusion circuit fuses inertial measurement unit data in real time to obtain the fuselage attitude, feeds it forward to the coordination logic circuit, and adjusts the gait parameters in real time to maintain the fuselage balance; 6. The coordinated motion commands are sent directly to the servo drivers of each joint through the motion command output interface to drive the robot to complete the corresponding motion; 7. After the exercise task is completed, the circuit automatically returns to standby mode, shuts down unnecessary circuits, and enters low-power mode.

[0036] Extended Example 1: Full-size humanoid robot scenario In this embodiment, the circuit is applied to the whole-body motion coordination control system of a full-size bipedal humanoid robot. It is implemented using a dedicated integrated circuit, and all control logic is purely hardware-based without any central processing unit or motion control algorithm program. It can achieve nanosecond-level synchronous coordination control of 20+ degrees of freedom joints of the robot's whole body, and is suitable for the full-scene motion control needs of humanoid robots for walking, running, turning, climbing stairs, and fall protection.

[0037] - The circuit has a built-in large-capacity hardware lookup table that stores the pre-planned full-joint motion trajectory data of the humanoid robot for walking on flat ground, going up and down stairs, running, turning, turning in place, and fall buffer protection. By switching the 4-bit binary mode, the corresponding gait trajectory can be directly called and automatically decomposed into synchronous motion commands for each joint, without the need for the main artificial intelligence system to perform complex inverse kinematic calculations. - A pure hardware bionic gait oscillator, using a Hopf oscillator built with digital logic gates, generates a stable bionic gait rhythm signal, providing a synchronous motion clock for the joints of both legs and arms. The oscillation frequency can be adjusted in real time via hardware jumpers to correspond to different walking / running speeds, without the need for software algorithm intervention. - Hardware priority arbitrator, with fixed priority rules: body balance control command > fall protection command > obstacle avoidance command > turning command > walking command > action execution command. When multiple motion commands conflict, hardware arbitration is automatically performed to prioritize body balance and safety. For example, if body instability is detected, the current action command is immediately interrupted, and balance adjustment and fall protection are executed first to effectively avoid robot fall damage. - The pure hardware sensor fusion circuit and inverted pendulum balance control circuit directly connect to the robot's inertial measurement unit. The pure hardware realizes sensor data fusion and attitude calculation, outputs the robot's pitch / roll angle data in real time, feeds it forward to the motion coordination logic, and automatically adjusts the motion parameters of the two leg joints to achieve adaptive walking on slopes and uneven surfaces, maintain the stability of the robot, and does not require the main artificial intelligence system to participate in balance control.

[0038] This circuit is highly decoupled from the robot's main artificial intelligence system. Even if the main artificial intelligence system crashes or the algorithm collapses, it can still realize the robot's basic walking, balance control and fall protection to prevent the robot from losing control and falling. At the same time, the multi-axis synchronization accuracy can reach 10 nanoseconds, which greatly improves the motion stability and smoothness of the humanoid robot.

[0039] Extended Example 2: Intelligent Vehicle Scenarios In this embodiment, the circuit is applied to the intelligent vehicle's four-wheel steering system, drive-by-wire chassis system, and active suspension system. All control logic is purely hardware-based, with no software involvement and no central processing unit intervention. The circuit can achieve coordinated control of the steering angle, suspension stiffness, and braking force of the four wheels. The hardware priority arbiter prioritizes emergency braking commands over steering commands and obstacle avoidance commands over cruise commands. The multi-axis linkage coordination circuit can achieve nanosecond-level synchronization of four-wheel steering, with a response speed more than two orders of magnitude faster than traditional automotive electronic control units. The circuit's normal operation is unaffected by vehicle main controller crashes or autonomous driving system failures. It can achieve rapid obstacle avoidance and vehicle stability control in emergency scenarios, effectively mitigating the risk of vehicle loss of control due to software failures and meeting automotive-grade high safety requirements.

Claims

1. A pure hardware motion coordination and arbitration circuit that does not require a CPU, characterized in that, include: At least two motion command input interfaces are provided for receiving target motion commands from the upper-level system for at least two different actuators. The hardware motion coordination logic circuit is electrically connected to each of the motion command input interfaces. It is used to coordinate and process each of the target motion commands according to the preset coordination rules without the intervention of the central processing unit instructions. The coordination and processing logic is permanently fixed through the hardware circuit and no motion control algorithm program is involved. At least two motion command output interfaces are electrically connected to the hardware motion coordination logic circuit, and are used to send the coordinated motion commands to the corresponding actuators respectively. All circuit modules are implemented using pure hardware logic circuits. No executable programs, firmware, or programmable logic code are involved in the generation and execution of internal control logic throughout the entire system lifecycle.

2. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, The hardware motion coordination logic circuit includes a hardware lookup table, which stores at least one pre-planned motion trajectory data. The hardware motion coordination logic circuit is used to receive mode switching instructions from the upper-level system and retrieve corresponding motion trajectory data from the hardware lookup table according to the mode switching instructions to generate a coordinated motion instruction sequence for each actuator.

3. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 2, characterized in that, The pre-planned motion trajectory data includes at least one of gait trajectory data, running trajectory data, turning trajectory data, and grasping trajectory data; The mode switching instruction is a multi-bit binary code. Different code values ​​correspond to the starting address of different motion trajectory data. The address mapping relationship is fixed once during manufacturing.

4. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, The hardware motion coordination logic circuit includes a hardware priority arbitrator, which consists of a parallel comparator and a delay register array. When multiple target motion commands conflict, the arbitrator arbitrates according to a preset priority rule and automatically inserts a small delay or path offset for the low-priority command to achieve the avoidance instinct.

5. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, It also includes a hardware deadlock detection and recovery circuit, which is electrically connected to the hardware motion coordination logic circuit. It is used to monitor the motion state of each actuator through a pure hardware state machine, and when it detects that the actuator has no position change for a preset time or the speed is zero but the command is non-zero, it determines that it is deadlocked and automatically sends a reset command or a reverse unloading command to the actuator.

6. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, It also includes a pure hardware multi-axis linkage coordination circuit, which, as part of the hardware motion coordination logic circuit, is used to automatically decompose a macroscopic motion command into synchronous pulse signals of multiple actuators, ensuring that multiple actuators move in coordination according to a preset timing relationship.

7. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, It also includes a pure hardware sensor fusion circuit, which is electrically connected to the hardware motion coordination logic circuit. The fusion logic is permanently fixed through the hardware circuit without CPU intervention. It is used to directly fuse the raw data of the three-axis angular velocity and three-axis acceleration of the inertial measurement unit without the intervention of the central processing unit instructions, and use the fused attitude angle data as the feedforward input of the hardware motion coordination logic circuit to realize the balance instinct of the device.

8. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, It also includes a pure hardware inverted pendulum balance control circuit, which is electrically connected to the hardware motion coordination logic circuit. The conversion logic is permanently fixed through the hardware circuit. It is used to receive the tilt angle signal and angular velocity signal from the inertial measurement unit, and directly convert the tilt angle signal and angular velocity signal into differential speed commands for the left and right wheels of the wheeled device through the pure hardware proportional-derivative control circuit to maintain balance.

9. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, It also includes a pure hardware bionic gait oscillator, electrically connected to the hardware motion coordination logic circuit, for providing basic rhythmic signals to each leg joint of the foot-type device; The pure hardware bionic gait oscillator uses a Hopf oscillator or relaxation oscillator constructed from nonlinear analog circuits or digital logic gates to generate a periodic oscillation waveform as the motion clock of the device.

10. The CPU-free pure hardware motion coordination and arbitration circuit according to claim 1, characterized in that, The preset coordination rules are fixed once during manufacturing through circuit wiring, resistor voltage division ratio, or hardware lookup table, and cannot be modified by software or programmable logic throughout the entire system lifecycle.