Voltage generation circuit, control method and chip

Abstract

This invention discloses a voltage generation circuit, control method, and chip. The circuit includes a first charge pump, an amplification unit, a second charge pump, and a linear regulator. The first charge pump generates a first output voltage based on the power supply voltage; the amplification unit is powered by the power supply voltage and generates a second output voltage; the second charge pump generates a third output voltage based on the second output voltage; the switching transistor of the linear regulator is powered by the first output voltage, and the amplifier of the linear regulator is powered by the third output voltage. The amplifier of the linear regulator controls the switching transistor based on a reference voltage. According to the voltage generation circuit, control method, and chip of this invention, the amplification unit provides a second output voltage that follows the change of the power supply voltage to a target value; the second charge pump boosts the second output voltage to generate the third output voltage; and the third output voltage powers the amplifier of the linear regulator, thereby enabling the amplifier to output sufficient voltage to control the switching transistor to turn on.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, specifically relating to a voltage generation circuit, control method, and chip. Background Technology

[0002] Due to external environmental constraints and topology simplification considerations, current chip systems often integrate charge pump circuits to ensure normal system operation. However, common boost charge pumps multiply the output voltage; for example, in a 2.7V-5.5V power supply system, the charge pump output will reach 5V-10V. This high voltage not only introduces system jitter but also challenges the voltage withstand capability of internal components. Existing solutions use LDOs to step down the voltage within the charge pump circuit, but this requires high-voltage transistors to ensure system reliability, increasing chip cost and design complexity.

[0003] The information disclosed in this background section is intended only to enhance the understanding of the overall background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a voltage generation circuit, control method, and chip that can output a stable higher voltage within a lower power supply range, provide a certain driving capability, and avoid high-voltage circuits, thereby reducing design and manufacturing costs.

[0005] To achieve the above objectives, a specific embodiment of the present invention provides the following technical solution: a voltage generating circuit, comprising:

[0006] A first charge pump is used to generate a first output voltage based on the power supply voltage;

[0007] The amplification unit is powered by the power supply voltage and generates a second output voltage based on the input reference voltage;

[0008] A second charge pump is used to generate a third output voltage based on a second output voltage; and

[0009] A linear regulator, wherein the switching transistor of the linear regulator is connected to a first charge pump to be powered by a first output voltage, the amplifier of the linear regulator is connected to a second charge pump to be powered by a third output voltage, and the amplifier of the linear regulator controls the switching transistor to turn on and off based on a reference voltage.

[0010] In one or more embodiments of the present invention, the amplification unit includes an operational amplifier and a first feedback unit. The operational amplifier is powered by a power supply voltage. The first input terminal of the operational amplifier is used to receive a reference voltage. The second input terminal of the operational amplifier is connected to the first feedback unit. The first feedback unit is connected to the output terminal of the operational amplifier. The first feedback unit generates a feedback voltage based on the output voltage of the operational amplifier to provide to the second input terminal of the operational amplifier.

[0011] In one or more embodiments of the present invention, the first feedback unit includes a first resistor and a second resistor, a first end of the first resistor is connected to the output terminal of the operational amplifier, a second end of the first resistor is connected to the first end of the second resistor and the second input terminal of the operational amplifier, and a second end of the second resistor is connected to a reference voltage.

[0012] In one or more embodiments of the present invention, the linear regulator includes an amplifier, a switching transistor, and a second feedback unit. The amplifier is powered by a third output voltage. A first input terminal of the amplifier is used to receive a reference voltage. A second input terminal of the amplifier is connected to a second feedback unit. The output terminal of the amplifier is connected to a control terminal of the switching transistor. A first terminal of the switching transistor is connected to the second feedback unit. A second terminal of the switching transistor is connected to a first charge pump to receive a first output voltage. The second feedback unit generates a feedback voltage based on the voltage at the first terminal of the switching transistor to provide to the second input terminal of the amplifier.

[0013] In one or more embodiments of the present invention, the second feedback unit includes a third resistor and a fourth resistor. The first end of the third resistor is connected to the first end of the switching transistor to form the output terminal of the linear regulator. The second end of the third resistor is connected to the first end of the fourth resistor and the second input terminal of the amplifier. The second end of the fourth resistor is connected to the reference voltage.

[0014] In one or more embodiments of the present invention, the amplification unit is an in-phase proportional amplification unit.

[0015] In one or more embodiments of the present invention, when the power supply voltage is less than When the second output voltage is equal to the power supply voltage, when the power supply voltage is greater than... The second output voltage is equal to ,in, The two resistors in the first feedback unit provide a voltage divider to form the feedback voltage. This is the reference voltage.

[0016] The present invention also discloses a control method for a voltage generating circuit, used in the voltage generating circuit, the control method comprising:

[0017] When starting the circuit, first turn on the amplifier with the second charge pump and linear regulator; after the second charge pump and linear regulator are established, turn on the first charge pump.

[0018] When shutting down the circuit, first turn off the first charge pump, then turn off the amplifier and second charge pump of the linear regulator.

[0019] In one or more embodiments of the present invention, the amplification unit remains normally open.

[0020] The present invention also discloses a chip, characterized in that it includes the voltage generation circuit described above.

[0021] Compared with the prior art, the voltage generation circuit, control method and chip of the present invention provide a second output voltage that follows the change of the power supply voltage to the target value through an amplification unit, a third output voltage is generated by boosting the second output voltage through a second charge pump, and the third output voltage is used to power the amplifier of the linear regulator, thereby enabling the amplifier to output a sufficient voltage to control the switching transistor to turn on. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a circuit diagram of a voltage generation circuit according to an embodiment of the present invention.

[0024] Figure 2 This is a schematic diagram of the voltage at each node of the voltage generation circuit in one embodiment of the present invention.

[0025] Figure 3 This is a power-on timing diagram of a voltage generation circuit in one embodiment of the present invention. Detailed Implementation

[0026] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0027] The terms "coupled," "connected," or "linked" in the specification include both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as an electrical conduction medium, which may have parasitic inductance or capacitance. Indirect connections may also include connections made through other active or passive devices to achieve the same or similar functional purpose, such as connections through switches, follower circuits, or other circuits or components. Furthermore, in the invention, terms such as "first" and "second" are primarily used to distinguish one technical feature from another, and do not necessarily require or imply any actual relationship, quantity, or order between these technical features.

[0028] In the detailed description of this specification, reference is made to the accompanying drawings, which form a part thereof, wherein like reference numerals always denote like parts, and wherein exemplary embodiments are shown by way of example that may be implemented. It should be understood that other embodiments may be utilized, and structural or logical changes may be made, without departing from the scope of this disclosure. Therefore, the following detailed description should not be considered limiting.

[0029] The various operations in the specification may be described sequentially as multiple discrete actions or operations in a manner most conducive to understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. Various additional operations may be performed in additional embodiments and / or the described operations may be omitted.

[0030] For the purposes of this disclosure, the phrase “A and / or B” means (A), (B), or (A and B). For the purposes of this disclosure, the phrase “A, B and / or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0031] Various components and devices may be referred to or shown in the singular (e.g., “transistor”, “transistor”, “switch”, etc.) in this document, but only for the convenience of discussion, and any element referred to in the singular may include multiple such elements as taught herein.

[0032] The description uses the phrases "in one embodiment," "in other embodiments," or "in some embodiments," each of which may refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," etc., used with respect to embodiments of this disclosure are synonymous.

[0033] like Figure 1As shown, a voltage generation circuit in one embodiment of the present invention includes: a first charge pump CP1, an amplification unit, a second charge pump CP2, and a linear regulator.

[0034] The first charge pump CP1 generates a first output voltage VO based on the power supply voltage AVDD. The amplifier unit is powered by the power supply voltage AVDD and generates a second output voltage VP based on the input reference voltage VREF. The second charge pump CP2 generates a third output voltage VQ based on the second output voltage VP.

[0035] The switching transistor MT of the linear regulator is connected to the first charge pump CP1 and powered by the first output voltage VO. The amplifier A2 of the linear regulator is connected to the second charge pump CP2 and powered by the third output voltage VQ. The amplifier A2 of the linear regulator controls the switching transistor MT to turn on and off based on the reference voltage VREF.

[0036] The amplification unit is a non-inverting proportional amplification unit. In one embodiment, the amplification unit includes operational amplifier A1 and a first feedback unit. Operational amplifier A1 is powered by a power supply voltage AVDD. The first input terminal of operational amplifier A1 is used to receive a reference voltage VREF. The second input terminal of operational amplifier A1 is connected to the first feedback unit, which is connected to the output terminal of operational amplifier A1. The first feedback unit generates a feedback voltage based on the output voltage of operational amplifier A1 to provide to the second input terminal of operational amplifier A1. In one embodiment, the first input terminal of operational amplifier A1 is a positive input terminal, and the second input terminal of operational amplifier A1 is a negative input terminal. In other embodiments, the second input terminal of operational amplifier A1 is a positive input terminal, and the first input terminal of operational amplifier A1 is a negative input terminal.

[0037] The first feedback unit includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is connected to the output terminal of the operational amplifier A1. The second end of the first resistor R1 is connected to the first end of the second resistor R2 and the second input terminal of the operational amplifier A1. The second end of the second resistor R2 is connected to a reference voltage. In one embodiment, the reference voltage is ground voltage.

[0038] like Figure 1As shown, the linear regulator includes an amplifier A2, a switching transistor MT, and a second feedback unit. Amplifier A2 is powered by a third output voltage VQ. The first input terminal of amplifier A2 receives a reference voltage VREF. The second input terminal of amplifier A2 is connected to the second feedback unit. The output terminal of amplifier A2 is connected to the control terminal of the switching transistor MT. The first terminal of the switching transistor MT is connected to the second feedback unit to form the output terminal of the linear regulator. The second terminal of the switching transistor MT is connected to a first charge pump CP1 to receive a first output voltage VO. The second feedback unit generates a feedback voltage based on the voltage at the first terminal of the switching transistor MT to provide to the second input terminal of amplifier A2. The first input terminal of amplifier A2 is a positive input terminal, and the second input terminal of amplifier A2 is a negative input terminal. In one embodiment, the switching transistor MT is a native MOS transistor (N-channel). The turn-on voltage of the native MOS transistor MT can be zero or even negative, thereby ensuring that the voltage at the control terminal of the switching transistor MT and the voltage at its first terminal are equal (for example, when the voltage at the control terminal of the switching transistor MT is 5V, the voltage at the first terminal of the switching transistor MT is also 5V), allowing the first terminal of the switching transistor MT to obtain a sufficiently high voltage. The first terminal of the switching transistor MT is the source, the second terminal of the switching transistor MT is the drain, and the control terminal of the switching transistor MT is the gate. In other embodiments, the switching transistor MT can be a P-channel MOSFET, the second input terminal of amplifier A2 is the positive input terminal, and the first input terminal of amplifier A2 is the negative input terminal.

[0039] The second feedback unit includes a third resistor R3 and a fourth resistor R4. The first end of the third resistor R3 is connected to the first end of the switching transistor MT to form the output terminal of the linear regulator. The second end of the third resistor R3 is connected to the first end of the fourth resistor R4 and the second input terminal of the amplifier A2. The second end of the fourth resistor R4 is connected to the reference voltage.

[0040] The first charge pump CP1, controlled by the first clock signal CLK1, boosts the power supply voltage AVDD to generate the first output voltage VO. In one embodiment, VO = 2 * AVDD.

[0041] Combination Figure 2 As shown, during the rise of the power supply voltage AVDD, when the power supply voltage AVDD is less than When the second output voltage VP of the amplifier unit is equal to the power supply voltage AVDD, when the power supply voltage AVDD is greater than... The second output voltage VP equals ,in, The first and second resistors of the first feedback unit provide a voltage divider to form the feedback voltage. This is the reference voltage.

[0042] The second output voltage VP increases with the increase of the power supply voltage AVDD and increases to the target value. The target value is less than the power supply voltage AVDD. The second charge pump CP2 boosts the second output voltage VP to generate the third output voltage VQ based on the control of the second clock signal CLK. In one embodiment, VQ = 2*VP (without considering the turn-on voltage of the transistor in the second charge pump CP2). After the second charge pump CP2 boosts the second output voltage VP, it provides a sufficiently high power supply to the amplifier A2 through the third output voltage VQ, so that the amplifier A2 can output a sufficiently high control voltage to ensure that the control switch MT is turned on.

[0043] Ultimately, the output voltage of the linear regulator .

[0044] The present invention also discloses a control method for a voltage generation circuit, used in the above-mentioned voltage generation circuit, to ensure the reliability of the circuit, that is, to ensure that the switching transistor MT obtains a normal operating voltage (such as 5V).

[0045] like Figure 3 As shown, EN_CP is the signal to turn on the entire circuit, EN_CP2 is the enable signal for the second charge pump CP2, EN_A2 is the enable signal for amplifier A2, and EN_CP1 is the enable signal for the first charge pump CP1. The control method includes:

[0046] When the circuit is turned on (the signal for the entire circuit to be turned on arrives), the second charge pump CP2 and the linear regulator amplifier A2 are turned on first; after the second charge pump CP2 and the linear regulator are established, the first charge pump CP1 is turned on.

[0047] The time interval td1 between the turn-on of the second charge pump CP2 and the amplifier A2 of the linear regulator and the turn-on of the first charge pump CP1 is:

[0048] , The settling time of the linear regulator. This is the setup time for the second charge pump CP2. Its purpose is to wait for the amplifier A2 loop to be established, ensuring that the lower loop is capable of receiving the higher first output voltage VO provided by the first charge pump CP1 before the enable signal EN_CP1 of the first charge pump arrives, and ensuring that the maximum voltage difference seen at the four terminals of the switching transistor MT is less than 5.5V.

[0049] When the circuit is turned off (the signal for the entire circuit to be turned on ends), the first charge pump CP1 is turned off first to ensure that the voltage at the second terminal of the switching transistor MT drops first, and then the amplifier A2 of the linear regulator and the second charge pump CP2 are turned off, thereby protecting the switching transistor MT.

[0050] To improve the build-up speed of the output voltage VOUT, the amplification unit remains normally open throughout the process.

[0051] In one embodiment, a controllable internal power supply—a second output voltage VP and a third output voltage VQ—is generated to power some modules, avoiding the additional risks and costs associated with using high-voltage circuits. For example, in the power supply voltage AVDD range of 2.7-5.5V, a 5V output voltage VOUT with driving capability is required. At this time, the first charge pump CP1 generates a relatively high first output voltage VO of 5-10V. To ensure the normal operation of the switching transistor MT, a controllable second output voltage VP is generated by the amplification unit. Then, the second charge pump CP2 boosts the second output voltage VP to generate the third output voltage VQ. This ensures that amplifier A2 operates in a stable voltage range (e.g., 5.5V), that is, that amplifier A2 outputs sufficient voltage to drive the switching transistor MT. In this scheme, the high-voltage part does not affect the low-voltage part, which can effectively reduce design and manufacturing costs while improving system reliability.

[0052] The present invention also discloses a chip including the voltage generation circuit described above.

[0053] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0054] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A voltage generating circuit, characterized in that, include: A first charge pump is used to generate a first output voltage based on the power supply voltage; The amplification unit is powered by the power supply voltage and generates a second output voltage based on the input reference voltage; A second charge pump is used to generate a third output voltage based on a second output voltage; as well as A linear regulator, wherein the switching transistor of the linear regulator is connected to a first charge pump to be powered by a first output voltage, the amplifier of the linear regulator is connected to a second charge pump to be powered by a third output voltage, and the amplifier of the linear regulator controls the switching transistor to turn on and off based on a reference voltage.

2. The voltage generating circuit according to claim 1, characterized in that, The amplification unit includes an operational amplifier and a first feedback unit. The operational amplifier is powered by a power supply voltage. The first input terminal of the operational amplifier is used to receive a reference voltage. The second input terminal of the operational amplifier is connected to the first feedback unit. The first feedback unit is connected to the output terminal of the operational amplifier. The first feedback unit generates a feedback voltage based on the output voltage of the operational amplifier to provide to the second input terminal of the operational amplifier.

3. The voltage generating circuit according to claim 2, characterized in that, The first feedback unit includes a first resistor and a second resistor. The first end of the first resistor is connected to the output terminal of the operational amplifier. The second end of the first resistor is connected to the first end of the second resistor and the second input terminal of the operational amplifier. The second end of the second resistor is connected to a reference voltage.

4. The voltage generating circuit according to claim 1, characterized in that, The linear regulator includes an amplifier, a switching transistor, and a second feedback unit. The amplifier is powered by a third output voltage. The first input terminal of the amplifier is used to receive a reference voltage. The second input terminal of the amplifier is connected to the second feedback unit. The output terminal of the amplifier is connected to the control terminal of the switching transistor. The first terminal of the switching transistor is connected to the second feedback unit. The second terminal of the switching transistor is connected to a first charge pump to receive a first output voltage. The second feedback unit generates a feedback voltage based on the voltage at the first terminal of the switching transistor to provide to the second input terminal of the amplifier.

5. The voltage generating circuit according to claim 4, characterized in that, The second feedback unit includes a third resistor and a fourth resistor. The first end of the third resistor is connected to the first end of the switching transistor to form the output terminal of the linear regulator. The second end of the third resistor is connected to the first end of the fourth resistor and the second input terminal of the amplifier. The second end of the fourth resistor is connected to the reference voltage.

6. The voltage generating circuit according to claim 1, characterized in that, The amplification unit is an in-phase proportional amplification unit.

7. The voltage generating circuit according to claim 2, characterized in that, When the power supply voltage is less than When the second output voltage is equal to the power supply voltage, when the power supply voltage is greater than... The second output voltage is equal to ,in, The two resistors in the first feedback unit provide a voltage divider to form the feedback voltage. This is the reference voltage.

8. A control method for a voltage generating circuit, characterized in that, The control method for the voltage generating circuit as described in any one of claims 1 to 9 includes: When starting the circuit, first turn on the amplifier with the second charge pump and linear regulator; after the second charge pump and linear regulator are established, turn on the first charge pump. When shutting down the circuit, first turn off the first charge pump, then turn off the amplifier and second charge pump of the linear regulator.

9. The control method for the voltage generating circuit according to claim 8, characterized in that, The amplification unit remains normally open.

10. A chip, characterized in that, Includes the voltage generating circuit as described in any one of claims 1 to 7.

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