A multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW

Abstract

This invention discloses a multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW, including a multi-channel signal conditioning and synchronous acquisition unit, a DSP high-speed preprocessing main control unit, a system power management unit, and a LabVIEW host computer interactive analysis unit. The signal conditioning and acquisition unit performs analog signal conditioning and analog-to-digital conversion; the DSP main control unit utilizes DMA and a ring buffer to achieve synchronous sampling, real-time filtering, FFT preprocessing, and high-speed Ethernet transmission; the power supply unit employs independent low-noise power supply for digital and analog signals; the LabVIEW host computer adopts a multi-threaded architecture to perform wavelet noise reduction, waveform spectrum display, parameter configuration, and lossless TDMS storage and export. This invention adopts a layered architecture of DSP front-end acquisition combined with host computer analysis, offering high acquisition rate, good synchronization accuracy, and strong scalability, making it suitable for industrial vibration monitoring, power detection, and high-frequency signal acquisition scenarios in scientific research.

Description

Technical Field

[0001] This invention belongs to the field of high-speed signal acquisition and virtual instrument technology, specifically relating to a multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW. It is applicable to high-speed, high-precision, multi-channel synchronous data acquisition in various scenarios such as industrial equipment vibration monitoring, acoustic signal testing, power high-frequency parameter detection, and scientific research dynamic signal analysis. Background Technology

[0002] Existing multi-channel high-speed data acquisition systems are mainly divided into two categories. One category is based on FPGA or dedicated commercial acquisition chips. Although the acquisition rate is high, the hardware cost is expensive, the development cycle is long, the algorithm porting and function expansion are difficult, and the versatility is poor. The other category is based on ordinary microcontroller architecture. The hardware cost is low and the development is convenient, but it is limited by the main control computing performance and real-time performance, making it difficult to achieve multi-channel synchronous high-speed sampling. In high-speed transmission scenarios, data delay, packet loss, phase shift and other problems are very likely to occur.

[0003] Traditional LabVIEW acquisition systems heavily rely on NI's commercial acquisition hardware, resulting in high equipment procurement costs, low customization, and an inability to adapt to personalized acquisition scenarios. Pure hardware acquisition systems lack visual human-computer interaction interfaces, big data storage, and professional signal analysis capabilities, enabling them to only perform simple data acquisition, with subsequent data processing and debugging operations being cumbersome. Existing technologies struggle to simultaneously meet the multiple demands of high-speed real-time acquisition, multi-channel synchronous accuracy, low-cost customization, visual intelligent interaction, and high-speed lossless storage, exhibiting significant technical shortcomings. Summary of the Invention

[0004] To address the technical problems of poor multi-channel synchronization, high-speed packet loss, insufficient real-time performance, high cost, weak interactivity, and cumbersome debugging in existing technologies, this invention provides a multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW, which combines high-speed real-time hardware acquisition with intelligent analysis and interaction in software, significantly improving acquisition stability and versatility.

[0005] The objective of this invention is achieved through the following technical solution.

[0006] A multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW, the system comprising:

[0007] The multi-channel signal conditioning and synchronous acquisition unit includes multiple independent analog signal input channels, a front-end signal conditioning circuit, and a high-speed synchronous ADC acquisition circuit. It is responsible for receiving and preprocessing multiple external analog signals, amplifying weak signals through a preamplifier, filtering out high-frequency noise interference through a second-order anti-aliasing low-pass filter, and adapting the level adjustment module to the output levels of different sensors. Finally, the multi-channel synchronous ADC chip completes synchronous analog-to-digital conversion under the drive of a unified hardware clock, and outputs a high-precision digital signal.

[0008] The DSP high-speed preprocessing main control unit is responsible for receiving the digital signals output by the multi-channel signal conditioning and synchronous acquisition unit. It uses a built-in DMA controller to move the data to the ring FIFO buffer without CPU intervention, avoiding packet loss due to high-speed data transmission overflow. At the same time, it calls the built-in filtering and FFT algorithms to complete the data pre-denoising and spectrum preprocessing to optimize the accuracy of the original data. After preprocessing, it frames the data according to a custom protocol that includes packet header, channel number, timestamp, data, and CRC check bits, and uploads the data to the LabVIEW host computer through the Gigabit Ethernet module.

[0009] The system power management unit includes a low-noise linear power supply and a DC-DC conversion circuit. The low-noise linear power supply independently powers the ADC analog acquisition circuit, reducing ripple interference and ensuring acquisition accuracy. The DC-DC conversion circuit powers digital modules such as the DSP main control and Ethernet communication, achieving digital-analog power isolation and effectively reducing signal crosstalk.

[0010] The LabVIEW host computer interactive analysis unit receives data uploaded by the DSP in real time via Ethernet. Relying on a multi-threaded architecture, it completes data parsing, waveform plotting, spectrum analysis, and data storage tasks. It uses wavelet denoising algorithm to perform secondary precise optimization of the data. Users can dynamically modify the sampling rate, channel switch, gain coefficient, and filtering parameters through the host computer interface and send them to the DSP. It can adapt to different acquisition scenarios without restarting the device, and finally realizes real-time data display, abnormal alarm, high-speed TDMS storage, and multi-format data export.

[0011] The beneficial effects of the technical solution provided by this invention are as follows: This invention adopts a DSP+LabVIEW layered decoupled collaborative architecture, deploying hard real-time acquisition and pre-processing functions on the DSP side, and deploying visualization interaction, high-precision post-processing, and big data storage functions on the LabVIEW host computer side, with clear division of labor and complementary performance. Through multiple mechanisms such as hardware synchronous sampling, DMA non-interventional transmission, ring buffer to prevent packet loss, custom protocol with verification, and multi-threaded parallel processing, it completely solves the pain points of traditional systems such as poor multi-channel synchronization, high-speed distortion, and insufficient real-time performance. This invention does not rely on commercial NI acquisition hardware, has low development cost, short cycle, and strong customizability, supports multi-channel high-speed synchronous acquisition and dynamic parameter debugging, and has high data acquisition accuracy and good stability. It can be widely used in various signal acquisition scenarios such as industrial monitoring, scientific research testing, power detection, and acoustic vibration analysis. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. The present invention will be further explained with reference to the drawings. However, the embodiments in the drawings do not constitute any limitation on the present invention. For those skilled in the art, other drawings can be obtained based on the following drawings without creative effort.

[0013] Figure 1 This is a structural block diagram of a multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW provided by the present invention.

[0014] Figure 2 This is a flowchart of a multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW provided by the present invention. Detailed Implementation

[0015] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0016] like Figure 1 As shown, the present invention proposes a multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW, the system comprising:

[0017] The multi-channel signal conditioning and synchronous acquisition unit includes multiple independent analog signal input channels, a front-end signal conditioning circuit, and a high-speed synchronous ADC acquisition circuit. It is responsible for receiving and preprocessing multiple external analog signals, amplifying weak signals through a preamplifier, filtering out high-frequency noise interference through a second-order anti-aliasing low-pass filter, and adapting the level adjustment module to the output levels of different sensors. Finally, the multi-channel synchronous ADC chip completes synchronous analog-to-digital conversion under the drive of a unified hardware clock, and outputs a high-precision digital signal.

[0018] The DSP high-speed preprocessing main control unit is responsible for receiving the digital signals output by the multi-channel signal conditioning and synchronous acquisition unit. It uses a built-in DMA controller to move the data to the ring FIFO buffer without CPU intervention, avoiding packet loss due to high-speed data transmission overflow. At the same time, it calls the built-in filtering and FFT algorithms to complete the data pre-denoising and spectrum preprocessing to optimize the accuracy of the original data. After preprocessing, it frames the data according to a custom protocol that includes packet header, channel number, timestamp, data, and CRC check bits, and uploads the data to the LabVIEW host computer through the Gigabit Ethernet module.

[0019] The system power management unit includes a low-noise linear power supply and a DC-DC conversion circuit. The low-noise linear power supply independently powers the ADC analog acquisition circuit, reducing ripple interference and ensuring acquisition accuracy. The DC-DC conversion circuit powers digital modules such as the DSP main control and Ethernet communication, achieving digital-analog power isolation and effectively reducing signal crosstalk.

[0020] The LabVIEW host computer interactive analysis unit receives data uploaded by the DSP in real time via Ethernet. Relying on a multi-threaded architecture, it completes data parsing, waveform plotting, spectrum analysis, and data storage tasks. It uses wavelet denoising algorithm to perform secondary precise optimization of the data. Users can dynamically modify the sampling rate, channel switch, gain coefficient, and filtering parameters through the host computer interface and send them to the DSP. It can adapt to different acquisition scenarios without restarting the device, and finally realizes real-time data display, abnormal alarm, high-speed TDMS storage, and multi-format data export.

[0021] Example 1

[0022] like Figure 2 The diagram shows the workflow of a multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW proposed in this invention. The workflow includes...

[0023] S1. System power-on initialization.

[0024] S2. Users set sampling channels, sampling rates, sampling precision, filtering parameters and other acquisition parameters through the LabVIEW host computer, and send the configuration commands to the DSP main control unit.

[0025] S3, the multi-channel synchronous ADC, under the trigger of a unified hardware clock, synchronously samples multiple analog signals and completes analog-to-digital conversion, outputting digital acquisition signals.

[0026] The S4 and DSP receive digital signals at high speed through the DMA mechanism, store them in a ring FIFO buffer, and perform real-time filtering and FFT preprocessing to complete the initial noise reduction optimization of the data.

[0027] The S5 and DSP frame and perform CRC checks on the preprocessed data according to a custom communication protocol, and then upload the data to the LabVIEW host computer at high speed via gigabit Ethernet.

[0028] The S6 and LabVIEW host computer use multi-threaded parsing of received data, and perform secondary high-precision processing through wavelet denoising algorithm to draw multi-channel time-domain waveforms and frequency-domain spectrum diagrams in real time.

[0029] S7: The host computer stores all collected data in real time using TDMS format, synchronously monitors abnormal data states, and supports real-time parameter fine-tuning, data playback, and subsequent data export and analysis.

[0030] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW, characterized in that, The system includes: a multi-channel signal conditioning and synchronous acquisition unit, a DSP high-speed preprocessing main control unit, a system power management unit, and a LabVIEW host computer interactive analysis unit.

2. The multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW according to claim 1, characterized in that, The multi-channel signal conditioning and synchronous acquisition unit includes: Multiple independent analog signal input channels; The front-end signal conditioning circuit integrates a high-precision preamplifier, a second-order anti-aliasing low-pass filter, and a level adjustment module to amplify, reduce noise, perform anti-aliasing preprocessing, and adapt the sensor level to the original analog signal. The high-speed synchronous ADC acquisition circuit uses a multi-channel synchronous sampling chip and a unified hardware clock trigger to achieve synchronous analog-to-digital conversion of multiple analog signals.

3. The multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW according to claim 1, characterized in that, The DSP high-speed preprocessing main control unit includes: The built-in DMA controller enables high-speed data transfer from multiple channels of ADC without CPU intervention, reducing the main control's computational load and ensuring real-time acquisition. The ring FIFO buffer module buffers high-speed burst data streams, avoiding data packet loss and garbled characters during high-speed transmission from a hardware perspective. The real-time signal preprocessing module deploys FIR / IIR filtering, moving average filtering, and FFT spectrum analysis algorithms to complete the pre-noise reduction and spectrum preprocessing of the raw acquired data. The gigabit Ethernet communication module is equipped with a custom lightweight transmission protocol with timestamps and CRC checks, enabling high-speed, reliable, and traceable bidirectional data transmission between the DSP and the host computer.

4. The multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW according to claim 1, characterized in that, The system power management unit includes: Low-noise linear power supply, independently powering the ADC analog acquisition module, suppressing power supply ripple interference and ensuring acquisition accuracy; The DC-DC conversion circuit provides stable power to the DSP main controller, Ethernet communication and digital logic modules, and realizes the isolation of analog and digital power supply, effectively reducing crosstalk.

5. The multi-channel high-speed synchronous data acquisition system based on DSP and LabVIEW according to claim 1, characterized in that, The LabVIEW host computer interactive analysis unit includes: The multi-threaded processing architecture adopts a producer-consumer pattern to separate data receiving, waveform display, and data storage tasks, avoiding interface lag and data delay in high-speed data flow scenarios. The high-precision signal post-processing module deploys wavelet noise reduction algorithms, supports custom wavelet bases and multi-threshold processing modes, and achieves secondary precise noise reduction and optimization of acquired data. The visualization interaction and analysis module integrates real-time multi-channel waveform display, FFT spectrum analysis, and abnormal data alarm functions, and supports dynamic configuration of sampling rate, channel enable, gain, and filter parameters by the host computer. The high-speed storage and export module, based on the TDMS streaming lossless storage format, enables continuous storage of ultra-large capacity high-speed data and supports subsequent data playback and export of data in multiple formats.

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