Command processing method and device, chip and computer device

CN122570019BActive Publication Date: 2026-10-20SHENZHEN JAGUAR MICROSYSTEMS CO LTD
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Patent Information

Application Number
CN202611033746.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-07-13
Publication Date
2026-10-20
Estimated Expiration
2046-07-13

AI Technical Summary

Technical Problem

[0003]为了提高命令执行的效率,通常会对访问不同地址或者缓存行(cache line)的命令进行乱序调度,这样如果缓存(cache)内部存在多个不同地址的命令访问,不同地址的数量大于cache的流水线的执行时间时,同地址的命令处理性能不会下降,但是如果不同地址的命令访问较少,或者只存在1个地址的读写命令,那么延迟将急剧增加,且数量越多延迟越大,因为命令需要串行调度,例如cache流水线执行完毕需要10拍,那么每10拍才能处理一个同地址的命令,延迟会逐渐累积

Benefits of technology

[0013]上述命令处理方法、装置、芯片和计算机设备,从命令链中调度出当前命令,获得当前命令的加锁标识信息、解锁标识信息、已加锁成功标识信息、tag信息和数据地址信息,其中命令链由tag信息相同的命令组成;当加锁标识信息为第一预设值,已加锁成功标识信息为第二预设值,解锁标识信息为第三预设值,则根据当前命令的tag信息和数据地址信息访问数据存储器中的目标缓存行以完成数据读取或写入,并将目标缓存行已加锁成功的信息和数据地址信息返回给链表控制单元,否则,将当前命令输入给流水线处理单元,以执行目标缓存行的加锁或解锁以及数据处理,其中,第一预设值表示不需要对目标缓存行进行加锁,第二预设值表示对目标缓存行已加锁成功,第三预设值表示不对目标缓存行进行解锁。这种对缓存行加锁的方式,使得缓存行加锁后调度出来的命令无需经过流水线处理单元,而是直接访问数据存储器以完成数据读取或写入,以此提升命令的执行效率,提高整个系统的性能。

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Abstract

The application relates to a command processing method and device, a chip and a computer device. Locked identification information, unlocked identification information, locked success identification information, tag information and data address information of a current command are obtained; when the locked identification information is a first preset value, the locked success identification information is a second preset value, and the unlocked identification information is a third preset value, a target cache line in a data memory is accessed according to the tag information and the data address information of the current command to complete data reading or writing, and the information that the target cache line has been successfully locked and the data address information are returned to a linked list control unit. The execution efficiency of the command is improved, and the performance of the whole system is improved.
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Description

Technical Field

[0001] This application relates to the field of integrated circuit design technology, and in particular to a command processing method, apparatus, chip, and computer device. Background Technology

[0002] Various large-scale chips, such as the Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural Processing Unit (NPU), and Data Processing Unit (DPU), each have their own memory subsystems, which include multi-level caches, Double Data Rate (DDR) memory, etc. The performance and latency of the memory subsystem are crucial to each chip.

[0003] To improve command execution efficiency, commands accessing different addresses or cache lines are typically scheduled out of order. If multiple commands access different addresses within the cache, and the number of these addresses exceeds the cache pipeline's execution time, the performance of commands accessing the same address will not degrade. However, if there are few commands accessing different addresses, or only one read / write command for a single address, latency will increase dramatically, and the more commands accessed, the greater the latency. This is because commands need to be scheduled sequentially. For example, if the cache pipeline takes 10 clock cycles to complete, then only one command for the same address can be processed every 10 clock cycles, and latency will gradually accumulate. Since it cannot be guaranteed that the cache line will still be in the cache when it is continuously scheduled out, if it has been evicted, it will consume cache pipeline bandwidth and may repeatedly send read commands for the same address to DDR. In other words, when multiple read or write commands access the same address, cache access latency will increase dramatically, leading to performance degradation. Summary of the Invention

[0004] Therefore, it is necessary to provide a command processing method, apparatus, chip, and computer device that can improve system performance in response to the above-mentioned technical problems.

[0005] Firstly, this application provides a command processing method, including:

[0006] The current command is scheduled from the command chain, and the locking identifier, unlocking identifier, successful locking identifier, tag information and data address information of the current command are obtained, wherein the command chain consists of commands with the same tag information;

[0007] When the locking identifier is a first preset value, the successful locking identifier is a second preset value, and the unlocking identifier is a third preset value, the target cache line in the data storage is accessed according to the tag information and data address information of the current command to complete data reading or writing, and the information that the target cache line has been successfully locked and the data address information are returned to the linked list control unit. Otherwise, the current command is input to the pipeline processing unit to execute the locking or unlocking of the target cache line and data processing. The first preset value indicates that the target cache line does not need to be locked, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that the target cache line is not unlocked.

[0008] Secondly, this application also provides a command processing apparatus, including: a linked list control unit, a command scheduling unit, a data storage unit, and a pipelined processing unit; wherein,

[0009] The command scheduling unit is used to schedule the current command from the command chain, and obtain the locking identifier information, unlocking identifier information, successfully locked identifier information, tag information, and data address information of the current command, wherein the command chain consists of commands with the same tag information; when the locking identifier information is a first preset value, the successfully locked identifier information is a second preset value, and the unlocking identifier information is a third preset value, then the target cache line in the data storage is accessed according to the tag information and data address information of the current command to complete data reading or writing, and the information that the target cache line has been successfully locked and the data address information are returned to the linked list control unit; otherwise, the current command is input to the pipeline processing unit.

[0010] The pipeline processing unit is used to perform locking or unlocking of the target cache line and data processing, wherein the first preset value indicates that the target cache line does not need to be locked, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that the target cache line is not unlocked.

[0011] Thirdly, this application also provides a chip including the command processing device provided in the first aspect.

[0012] Fourthly, this application also provides a computer device, including the command processing device provided in the second aspect or the chip provided in the third aspect.

[0013] The aforementioned command processing method, apparatus, chip, and computer equipment schedule the current command from the command chain and obtain the current command's lock identifier, unlock identifier, successful lock identifier, tag information, and data address information. The command chain consists of commands with the same tag information. When the lock identifier is a first preset value, the successful lock identifier is a second preset value, and the unlock identifier is a third preset value, the target cache line in the data storage is accessed according to the current command's tag information and data address information to complete data reading or writing. The information indicating successful locking of the target cache line and the data address information are returned to the linked list control unit. Otherwise, the current command is input to the pipeline processing unit to execute locking or unlocking of the target cache line and data processing. The first preset value indicates that locking the target cache line is not required, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that unlocking the target cache line is not required. This method of locking cache lines allows commands scheduled after the cache line is locked to access the data storage directly to read or write data without going through the pipeline processing unit, thereby improving the execution efficiency of commands and enhancing the performance of the entire system. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a flowchart illustrating a command processing method in one embodiment;

[0016] Figure 2 This is a schematic diagram of the pipeline processing flow in one embodiment;

[0017] Figure 3 This is a schematic diagram of the tag memory storage structure in one embodiment. Figure 1 ;

[0018] Figure 4 This is a schematic diagram of the tag memory storage structure in one embodiment. Figure 2 ;

[0019] Figure 5 This is a schematic diagram of the implementation framework of the command processing method in one embodiment. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0021] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0022] In some embodiments, a command processing method is provided, such as Figure 1 As shown, the method includes the following steps:

[0023] Step 101: Schedule the current command from the command chain and obtain the current command's lock identifier, unlock identifier, successful lock identifier, tag information, and data address information.

[0024] The command chain consists of commands with the same tag information.

[0025] Optionally, the tag information can be the address accessed by the command.

[0026] Optionally, commands can be scheduled from the command chain in the order they arrive. For example, if the command chain consists of command 1, command 2, and command 3, where command 1 is received first, followed by command 2, and then command 3, then during scheduling, command 1 will be scheduled first, followed by command 2, and finally command 3.

[0027] Optionally, the commands mentioned in the embodiments of this application can be read commands or write commands.

[0028] Optionally, the linked list control unit can receive commands. Upon receiving a command, the linked list control unit can allocate a command cache unit for that command and write the command's tag information into the command cache unit. The command cache unit also stores lock flags, unlock flags, and successful lock flags, and these flags can be set according to the specific rules provided in this application embodiment. The data address information of the command can also be obtained and written into the command cache unit.

[0029] The locking flag may eventually be set to either a first preset value or a fourth preset value. The first preset value indicates that the cache line corresponding to the tag information of the corresponding command does not need to be locked, while the fourth preset value indicates that the cache line corresponding to the tag information of the corresponding command needs to be locked.

[0030] For example, the first preset value can be 0, and the fourth preset value can be 1.

[0031] The unlock flag information may ultimately be set to either the third preset value or the sixth preset value. The third preset value indicates that it is not necessary to unlock the cache line corresponding to the tag information of the corresponding command, while the sixth preset value indicates that it is necessary to unlock the cache line corresponding to the tag information of the corresponding command.

[0032] For example, the third preset value can be 0, and the sixth preset value can be 1.

[0033] The successful locking indicator may eventually be set to either the second or the fifth preset value. The second preset value indicates that the cache line corresponding to the tag information of the corresponding command has been successfully locked, while the fifth preset value indicates that the cache line corresponding to the tag information of the corresponding command has not yet been successfully locked.

[0034] For example, the second preset value can be 1, and the fifth preset value can be 0.

[0035] Optionally, after scheduling the current command from the command chain, the locking identifier, unlocking identifier, successfully locked identifier, tag information, and data address information of the current command can be obtained from the command cache unit corresponding to the current command.

[0036] Step 102: When the locking flag is the first preset value, the successful locking flag is the second preset value, and the unlocking flag is the third preset value, the target cache line in the data storage is accessed according to the tag information and data address information of the current command to complete the data reading or writing. The information that the target cache line has been successfully locked and the data address information are returned to the linked list control unit. Otherwise, the current command is input to the pipeline processing unit to perform locking or unlocking of the target cache line and data processing. The first preset value indicates that the target cache line does not need to be locked, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that the target cache line does not need to be unlocked.

[0037] Specifically, after scheduling the current command from the command chain and obtaining the current command's lock identifier, unlock identifier, successful lock identifier, tag information, and data address information, the lock identifier, unlock identifier, and successful lock identifier can be judged. If the lock identifier is a first preset value, the successful lock identifier is a second preset value, and the unlock identifier is a third preset value, it means that the target cache line corresponding to the tag information of the current command has been successfully locked, and there is no need to lock or unlock the target cache line. Then, the target cache line in the data storage can be accessed directly according to the data address information of the current command to complete the data reading or writing.

[0038] Optionally, the data address information can be represented using a set and a way. If the locking identifier is a first preset value, the successful locking identifier is a second preset value, and the unlocking identifier is a third preset value, then the cache line corresponding to the data address information of the current command in the data storage is directly accessed. For ease of explanation, this cache line is referred to as the target cache line in this embodiment.

[0039] Optionally, if the current command is a read command, the data can be read from the corresponding byte in the target cache line of the data storage according to the tag information of the current command (specifically, the Offset part in the tag information of the current command) to complete the data reading.

[0040] Optionally, if the current command is a write command, the data to be written can be written to the corresponding byte in the target cache line of the data storage according to the tag information of the current command (specifically, the Offset part in the tag information of the current command) to complete the data writing.

[0041] After completing data reading or writing, the system can return the information that the target cache line has been successfully locked and the data address information of the current command to the linked list control unit. Based on the received information that the target cache line has been successfully locked and the data address information, the linked list control unit sets and writes the relevant information for the next command with the same tag.

[0042] Optionally, after receiving the information that the target cache line has been successfully locked and the data address information, the linked list control unit can set the successfully locked identifier of the next command with the same tag to the second preset value, and write the received data address information into the command cache unit corresponding to the next command with the same tag.

[0043] If the current command does not meet the following conditions: the locking identifier is the first preset value, the successful locking identifier is the second preset value, and the unlocking identifier is the third preset value, the current command is input to the pipeline processing unit, which then performs the locking or unlocking of the target cache line and data processing.

[0044] In the above embodiments, the current command is scheduled from the command chain, and its lock identifier, unlock identifier, successful lock identifier, tag information, and data address information are obtained. The command chain consists of commands with the same tag information. When the lock identifier is a first preset value, the successful lock identifier is a second preset value, and the unlock identifier is a third preset value, the target cache line in the data storage is accessed according to the tag information and data address information of the current command to complete data reading or writing. The information that the target cache line has been successfully locked and the data address information are returned to the linked list control unit. Otherwise, the current command is input to the pipeline processing unit to perform locking or unlocking of the target cache line and data processing. The first preset value indicates that locking the target cache line is not required, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that unlocking the target cache line is not required. This method of locking the cache line allows commands scheduled after locking the cache line to directly access the data storage to complete data reading or writing without going through the pipeline processing unit, thereby improving the execution efficiency of the command and improving the performance of the entire system.

[0045] In some embodiments, when the locking identifier information of the current command is a fourth preset value, the locking success identifier information is a fifth preset value, and the unlocking identifier information is a third preset value, the current command is input to the pipeline processing unit. The pipeline processing unit locks the target cache line and returns the locking success information to the linked list control unit, so that the linked list control unit updates the locking success identifier information of the next command according to the locking success information.

[0046] Specifically, after scheduling the current command from the command chain and obtaining the current command's lock identifier, unlock identifier, successful lock identifier, tag information, and data address information, the lock identifier, unlock identifier, and successful lock identifier can be judged. If the lock identifier is the fourth preset value, the successful lock identifier is the fifth preset value, and the unlock identifier is the third preset value, it means that the target cache line corresponding to the tag information of the current command has not been successfully locked and needs to be locked. If the target cache line does not need to be unlocked, the current command is input to the pipeline processing unit.

[0047] Upon receiving the current command, the pipeline processing unit executes the current command according to the pipeline processing flow and locks the target cache line corresponding to the tag information of the current command.

[0048] like Figure 2 As shown, three scenarios are provided for executing read and write commands according to the pipeline processing flow:

[0049] In the first scenario, the current command input to the pipeline processing unit is a write command. The pipeline processing unit reads TAG MEM (TP RAM) at time P0, waits for data to be read at times P1-P2, and performs a cache hit check at time P3 when the read data is valid. If the data is missing and a clean line is ejected or an invalid line exists, TAG MEM is updated directly at time P4, and the data in the write command is written to DATA MEM.

[0050] In the second scenario, the current command input to the pipeline processing unit is a write command. The pipeline processing unit reads TAG MEM (TP RAM) at time P0, waits to read data at times P1-P2, and when the read data is valid at time P3, it performs a cache hit check. If the data is missing, it removes the dirty line. At time P4, it updates TAG MEM and reads DATA MEM. At time P5, it waits to read the old data and writes the data in the write command to DATA MEM. At time P6, it waits to read the old data, and at time P7, the read data is valid and written to DDR.

[0051] In the third scenario, the current command input to the pipeline processing unit is a read command. The pipeline processing unit reads TAG MEM (TP RAM) at time P0, waits to read data at times P1-P2, and performs a cache hit check at time P3 when the read data is valid. If a cache hit occurs, TAG MEM is updated at time P4, and DATA MEM is read. The pipeline processing unit waits to read the hit data at times P5-P6, and performs a cache hit check at time P7 when the read data is valid.

[0052] It should be noted that, in addition to the three scenarios mentioned above, there are also cases such as write command hits and read command misses. The pipeline processing flow in these cases is similar to existing technologies and will not be elaborated upon here. Furthermore, the execution of read and write commands according to the pipeline processing flow involves updating the TAG MEM, which is also similar to existing technologies and will not be elaborated upon here.

[0053] See Figure 3 As shown, Figure 3The storage structure is a tag memory (TAG_MEM) with 4 sets and 2 ways, serving as a general cache. Figure 3 As can be seen, in this storage structure, only the address tag, valid bit (vld), and dirty bit (dirty) are stored. To achieve locking and unlocking of cache lines, this application proposes an improved cache tag memory (TAG_MEM) storage structure, such as... Figure 4 As shown, under this storage structure, compared to Figure 3 The storage structure shown includes an additional 1 bit of cache line lock information (lock). When a cache line needs to be locked, the lock in the tag memory (TAG_MEM) for that cache line is set to 1; when a cache line needs to be unlocked, the lock in the tag memory (TAG_MEM) for that cache line is set to 0. Cache lines with lock set to 1 cannot be replaced, while cache lines with lock set to 0 can be replaced. The initial value of lock can be 0.

[0054] As described above, the current command's locking flag is the fourth preset value, the successfully locked flag is the fifth preset value, and the unlock flag is the third preset value. This indicates that the target cache line corresponding to the current command's tag information was not successfully locked and needs to be locked, but not unlocked. See below for further details. Figure 4 As shown, the lock in the target cache line in the tag memory (TAG_MEM) can be set to 1 to lock the target cache line.

[0055] After the pipeline processing unit completes the locking of the target cache line, it can return the information that the lock has been successfully acquired to the linked list control unit. After receiving the information that the lock has been successfully acquired, the linked list control unit can set the lock success flag of the next command with the same tag to the second preset value.

[0056] Optionally, after the pipeline processing unit completes locking the target cache line, in addition to returning the successful locking information to the linked list control unit, it can also return the address of the target cache line (i.e., data address information) to the linked list control unit. The linked list control unit then writes this data address information into the next command cache unit corresponding to the same tag information command. For example, the address of the target cache line can be represented using (set, way).

[0057] In the above embodiments, when the locking identifier of the current command is the fourth preset value, the successful locking identifier is the fifth preset value, and the unlocking identifier is the third preset value, the current command is input to the pipeline processing unit. The pipeline processing unit locks the target cache line and returns the successful locking information to the linked list control unit, so that the linked list control unit updates the successful locking identifier of the next command based on the successful locking information. After locking the target cache line, subsequent commands with the same tag do not need to go through the pipeline processing process again and can directly access the data storage, greatly improving the execution efficiency of the command.

[0058] In some embodiments, when the current command's locking identifier is a first preset value, the successfully locked identifier is a second preset value, and the unlock identifier is a sixth preset value, the current command is input to the pipeline processing unit, and the pipeline processing unit unlocks the target cache line.

[0059] Specifically, after scheduling the current command from the command chain and obtaining the current command's lock identifier, unlock identifier, successful lock identifier, tag information, and data address information, the lock identifier, unlock identifier, and successful lock identifier can be judged. If the lock identifier is the first preset value, the successful lock identifier is the second preset value, and the unlock identifier is the sixth preset value, it means that the target cache line corresponding to the tag information of the current command has been successfully locked. There is no need to lock the target cache line, but it needs to be unlocked. In this case, the current command is input to the pipeline processing unit.

[0060] Upon receiving the current command, the pipeline processing unit executes the command according to the pipeline processing flow and simultaneously unlocks the target cache line corresponding to the tag information of the current command. The process of executing the current command according to the pipeline processing flow is described in the aforementioned embodiment and will not be repeated here.

[0061] As described above, the current command's locking flag is the first preset value, the successful locking flag is the second preset value, and the unlocking flag is the sixth preset value. This indicates that the target cache line corresponding to the current command's tag information has been successfully locked, and there is no need to lock the target cache line further. However, it needs to be unlocked. See below for further details. Figure 4 As shown, the lock in the target cache line in the tag memory (TAG_MEM) can be set to 0 to unlock the target cache line.

[0062] In the above embodiments, when the locking flag of the current command is a first preset value, the successful locking flag is a second preset value, and the unlocking flag is a sixth preset value, the current command is input to the pipeline processing unit, which then unlocks the target cache line. This ensures that after commands with the same tag information are processed, the corresponding cache line is unlocked promptly, improving cache performance.

[0063] In some embodiments, before the current command is scheduled, the command processing method provided in this application further includes: the linked list control unit sets the locked success identifier information of the current command to a second preset value according to the locked success information returned by the command scheduling unit based on the previous command or the locked success information returned by the pipeline processing unit after executing the previous command; otherwise, the locked success identifier information of the current command is set to a fifth preset value.

[0064] As described above, when the command scheduling unit schedules a command whose locking identifier is a first preset value, its successful locking identifier is a second preset value, and its unlocking identifier is a third preset value, it accesses the corresponding cache line in the data storage based on the command's tag information and data address information to complete data reading or writing. It also returns the information indicating that the corresponding cache line was successfully locked and the data address information to the linked list control unit. Furthermore, when the command scheduling unit determines that the command's locking identifier is a fourth preset value, its successful locking identifier is a fifth preset value, and its unlocking identifier is a third preset value, it inputs the command to the pipeline processing unit. After locking the corresponding cache line, the pipeline processing unit also returns the information indicating that the lock was successfully locked to the linked list control unit. If the command is the previous command with the same tag, after the linked list control unit receives a successful locking message from the command scheduling unit or the pipeline processing unit, it sets the successful locking flag of the current command to the second preset value; if the command scheduling unit or the pipeline processing unit returns a failed locking message, the linked list control unit sets the successful locking flag of the current command to the fifth preset value.

[0065] In the above embodiments, before the current command is scheduled, the linked list control unit sets the locked success flag of the current command to a second preset value based on the locked success information returned by the command scheduling unit based on the previous command or the locked success information returned by the pipeline processing unit after executing the previous command. Otherwise, the locked success flag of the current command is set to a fifth preset value. This allows the locking status of the cache line to be passed to subsequent commands with the same tag. Subsequent commands with the same tag do not need to go through the pipeline processing flow and can directly access the data storage, greatly improving command execution efficiency.

[0066] In some embodiments, before the current command is scheduled, the command processing method provided in this application further includes: if there is a scheduled access command with the same tag information after the current command in the command chain, then the locking identifier information of the current command is set to a fourth preset value and the unlocking identifier information is set to a third preset value; if there is no scheduled access command with the same tag information after the current command in the command chain, then the locking identifier information of the current command is set to a first preset value and the unlocking identifier information is set to a sixth preset value.

[0067] Specifically, if, upon receiving the current command, a previous command with the same tag has already been scheduled out, and another command with the same tag was received before the current command was scheduled out; or if the command scheduling unit or pipeline processing unit returns a locking failure message, and another command with the same tag was received before the current command was scheduled out, the linked list control unit can set the locking flag of the current command to a fourth preset value and the unlocking flag to a third preset value. It can also set the locking flag of the previously received command with the same tag to a first preset value and the unlocking flag to a sixth preset value. If, upon receiving the current command, a previous command with the same tag has already been scheduled out, and no other command with the same tag was received before the current command was scheduled out, the linked list control unit can set the locking flag of the current command to a first preset value and the unlocking flag to a third preset value. In this embodiment, commands in the lifecycle that have not yet been scheduled out are also referred to as pending access commands.

[0068] In the above embodiments, if there is a scheduled access command with the same tag information following the current command in the command chain, the locking flag of the current command is set to a fourth preset value, and the unlocking flag is set to a third preset value. If there is no scheduled access command with the same tag information following the current command in the command chain, the locking flag of the current command is set to a first preset value, and the unlocking flag is set to a third preset value. This setting method ensures that when there are two or more commands with the same tag information, the corresponding cache line will be locked. This allows commands with the same tag information scheduled after the cache line is locked to directly access the data storage without going through the pipeline processing flow, greatly improving the execution efficiency of the commands.

[0069] The following provides a complete explanation of the process for setting the lock flag, unlock flag, and successful lock flag for the current command:

[0070] If, upon receiving the current command, a previous command with the same tag has already been scheduled out, and another command with the same tag is received before the current command is scheduled out; or if the command scheduling unit or pipeline processing unit returns a locking failure message for the previous command with the same tag, and another command with the same tag is received before the current command is scheduled out, the linked list control unit can set the locking flag of the current command to the fourth preset value, the unlocking flag to the third preset value, and set the locking flag of the aforementioned newly received command with the same tag to the first preset value and the unlocking flag to the sixth preset value. If, upon receiving the current command, a previous command with the same tag has already been scheduled out, and no other command with the same tag is received before the current command is scheduled out, the linked list control unit can set the locking flag of the current command to the first preset value and the unlocking flag to the third preset value. After the command scheduling unit schedules the previous command with the same tag, if the locking flag is at the first preset value, the successful locking flag is at the second preset value, and the unlocking flag is at the third preset value, it will access the corresponding cache line in the data storage to complete data reading or writing based on the command's tag information and data address information. It will also return the information indicating successful locking of the corresponding cache line and the data address information to the linked list control unit. If the locking flag is at the fourth preset value, the successful locking flag is at the fifth preset value, and the unlocking flag is at the third preset value, it will input the previous command with the same tag to the pipeline processing unit. The pipeline processing unit will lock the target cache line and return the successful locking information to the linked list control unit. Upon receiving successful locking information from either the command scheduling unit or the pipeline processing unit, the linked list control unit will set the successful locking flag of the current command to the second preset value. If the command scheduling unit or the pipeline processing unit returns a failed locking message, the linked list control unit will set the successful locking flag of the current command to the fifth preset value.

[0071] The command processing method provided in the embodiments of this application is illustrated below with examples:

[0072] See Figure 5 As shown, Figure 5For this example's implementation framework, the command cache unit stores the following information: the head identifier of the linked list (represented by `head`, where `head=1` is required for scheduling), the tail identifier of the linked list (represented by `tail`), the command cache unit pointer (represented by `nxt_ptr`), the lock identifier (represented by `lock`), the unlock identifier (represented by `unlock`), the identifier indicating whether the command has been retrieved by the command scheduling unit (represented by `send`), and the identifier indicating successful locking (represented by `lock_success`). The initial value of all information in the command cache unit can be 0. In this example, the first preset value mentioned above is 0, the fourth preset value is 1, the third preset value is 0, the sixth preset value is 1, the second preset value is 1, and the fifth preset value is 0.

[0073] After receiving a command (represented by cmd0), the linked list control unit allocates a command buffer unit to cmd0. For example, it allocates the command buffer unit with buf_id=0 to cmd0, where buf_id is the identifier of the command buffer unit. The linked list control unit writes the tag information of cmd0 to the command buffer unit with buf_id=0. If the linked list control unit determines that cmd0 is the first command with that tag information, it sets head to 1, tail to 1, nxt_ptr to 0, lock to 0, and unlock to 0 in the command buffer unit with buf_id=0. If cmd0 is scheduled out, send is set to 1.

[0074] After the linked list control unit receives the next command (represented by cmd1) with the same tag information as cmd0, it allocates a command buffer unit to cmd1. For example, it allocates the command buffer unit with buf_id=1 to cmd1. The linked list control unit writes the tag information of cmd1 to the command buffer unit with buf_id=1, sets the head to 0 and the tail to 1 in the command buffer unit with buf_id=1, sets the tail to 0 in the command buffer unit with buf_id=0, and sets nxt_ptr to 1 in the command buffer unit with buf_id=1. If send=1 for cmd0 when cmd1 is received, it means that cmd0 has been scheduled out. The lock and unlock in the command buffer unit corresponding to cmd1 are set to 0. If send=0 for cmd0 when cmd1 is received, it means that cmd0 has not been scheduled out. The lock and unlock in the command buffer unit corresponding to cmd0 are set to 1 and 0, and the lock and unlock in the command buffer unit corresponding to cmd1 are set to 0 and 1. If cmd1 is scheduled out, set send to 1 in the command cache unit with buf_id=1. The command scheduling unit only schedules commands corresponding to the command cache unit with head=1. If cmd0 is scheduled out only after cmd1 is received, since cmd0's lock=1, unlock=0, and lock_success=0 (still the initial values, not yet set), the command scheduling unit will input cmd0 to the pipeline processing unit. The pipeline processing unit will execute cmd0 according to the pipeline processing flow and lock the target cache line corresponding to the tag information of cmd0. After successful locking, the pipeline processing unit will return the execution response of cmd0 and the information that the target cache line has been successfully locked to the linked list control unit. After receiving the execution response and the information that the lock has been successfully locked, the linked list control unit will release the command cache unit corresponding to cmd0, set the lock_success of cmd1 to 1, and write the data address information corresponding to the tag information (which may be returned along with the information that the lock has been successfully locked by the pipeline processing unit) into the command cache unit corresponding to cmd1, and set the head of cmd1 to 1. If the pipeline processing unit fails to lock the target cache line, it returns the execution response of cmd0 and the information of the target cache line locking failure to the linked list control unit. After receiving the execution response and the information of the locking failure, the linked list control unit releases the command cache unit corresponding to cmd0 and sets the head of cmd1 to 1.If cmd0 is scheduled out before cmd1 is received, since cmd0's lock=0 (still the initial value, not set), unlock=0 (still the initial value, not set), and lock_success=0 (still the initial value, not set), the command scheduling unit will directly input cmd0 to the pipeline processing unit. The pipeline processing unit will execute cmd0 according to the pipeline processing flow. After execution, the pipeline processing unit will return the execution response of cmd0 to the linked list control unit. After receiving the execution response, the linked list control unit will release the command buffer unit corresponding to cmd0 and set the head of cmd1 to 1. In this case, the commands are processed one by one, and there is no locking or unlocking.

[0075] After the linked list control unit receives the next command (represented by cmd2) with the same tag information, it allocates a command buffer unit to cmd2. For example, it allocates the command buffer unit with buf_id=2 to cmd2. The linked list control unit writes the tag information of cmd2 to the command buffer unit with buf_id=2, sets the head to 0 and the tail to 1 in the command buffer unit with buf_id=2, sets the tail to 0 in the command buffer unit with buf_id=1, and sets nxt_ptr to 2 in the command buffer unit with buf_id=2. Similarly, if send=1 in cmd1 when cmd2 is received, it means that cmd1 has been scheduled out, and the lock and unlock in the command buffer unit corresponding to cmd2 are set to 0. If `send=0` for `cmd1` when `cmd2` is received, it means `cmd1` has not been scheduled out. The `unlock` value in the command cache unit corresponding to `cmd1` is set to 0, and the `lock` value in the command cache unit corresponding to `cmd2` is set to 0 and `unlock` to 1. Additionally, if `head=1` and `lock_success=0` for `cmd1`, its `lock` value is also set to 1. If `cmd1` is executed according to the pipelined processing flow, when the pipelined processing unit completes its execution and returns a response, the linked list control unit sets `head` for `cmd2` to 1. If the command scheduling unit schedules out `cmd1` and recognizes that its `lock` value is 0, `lock_success=1`, and `unlock=0`, it directly accesses the target cache line in the data memory to complete data reading or writing and returns information that the target cache line has been successfully locked and the data address information to the linked list control unit. The linked list control unit then sets `head` for `cmd2` to 1, `lock_success` to 1, and writes the data address information to the command cache unit with `buf_id=2`. If cmd2 is scheduled out, its send value is set to 1. Alternatively, if cmd1 has already been scheduled out when cmd2 is received, and cmd1's lock=0, unlock=1, and lock_success=1, the command scheduling unit will input cmd1 to the pipeline processing unit. The pipeline processing unit will execute cmd1 according to the pipeline processing flow and unlock the target cache line corresponding to the tag information.

[0076] When the linked list control unit receives the next command (represented by cmd3) with the same tag information, it allocates a command buffer unit to cmd3. For example, it allocates the command buffer unit with buf_id=3 to cmd3. The linked list control unit writes the tag information of cmd3 to the command buffer unit with buf_id=3, sets the head to 0 and the tail to 1, sets the tail to 0 in the command buffer unit with buf_id=2, and sets nxt_ptr to 3 in the command buffer unit with buf_id=3. Similarly, if send=1 in cmd2 when cmd3 is received, it means that cmd2 has been scheduled out, and the lock and unlock in the command buffer unit corresponding to cmd3 are set to 0. If `send=0` for `cmd2` when `cmd3` is received, it means `cmd2` has not been scheduled out. The `unlock` value in the command cache unit corresponding to `cmd2` is set to 0, and the `lock` value in the command cache unit corresponding to `cmd3` is set to 0 and `unlock` to 1. Additionally, if `head=1` and `lock_success=0` for `cmd2`, `lock` for `cmd2` is also set to 1. If `cmd1` has not yet been scheduled out when `cmd2` is received, and the command scheduling unit recognizes that `head=1` for `cmd1`, it schedules `cmd1`. Since `lock=0`, `lock_success=1`, and `unlock=0` for `cmd1`, it directly accesses the target cache line in the data storage based on `cmd1`'s tag information and data address information to complete data reading or writing. It then returns information that the target cache line has been successfully locked and its data address information to the linked list control unit. The linked list control unit then sets `lock_success` and `head` for `cmd2` to 1 and writes the data address information to the command cache unit with `buf_id=2`. Next, the command scheduling unit recognizes that `head=1` for `cmd2` and schedules `cmd2`. Since `lock=0`, `lock_success=1`, and `unlock=0` for `cmd2`, it directly accesses the target cache line in the data storage based on the tag information and data address information of `cmd2` to complete the data read or write. It then returns information that the target cache line has been successfully locked and the data address information to the linked list control unit. The linked list control unit then sets `lock_success` to 1 and `head` to 1 for `cmd3`, and writes the data address information to the command cache unit with `buf_id=3`. Next, the command scheduling unit recognizes that `head=1` for `cmd3` and schedules `cmd3`. Since `lock=0`, `lock_success=1`, and `unlock=1` for `cmd2`, the command scheduling unit inputs `cmd3` to the pipeline processing unit. The pipeline processing unit executes `cmd3` according to the pipeline processing flow and unlocks the target cache line corresponding to the tag information.In summary, the head will be set to 1 in two cases: First, after the command is executed normally (after receiving the execution response of the previous command with the same tag information), the head of the current command will be set to 1, indicating that it can be scheduled; Second, after receiving the information that the lock has been successfully acquired and the data address information returned by the command scheduling unit.

[0077] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0078] Based on the same inventive concept, this application also provides a command processing apparatus for implementing the command processing method described above. The solution provided by this apparatus is similar to the implementation scheme described in the above method; therefore, the specific limitations in one or more command processing apparatus embodiments provided below can be found in the limitations of the command processing method described above, and will not be repeated here.

[0079] In some embodiments, a command processing apparatus is provided, comprising: a linked list control unit, a command scheduling unit, a data storage unit, and a pipelined processing unit; wherein...

[0080] The command scheduling unit is used to schedule the current command from the command chain, and obtain the locking identifier information, unlocking identifier information, successfully locked identifier information, tag information, and data address information of the current command, wherein the command chain consists of commands with the same tag information; when the locking identifier information is a first preset value, the successfully locked identifier information is a second preset value, and the unlocking identifier information is a third preset value, then the target cache line in the data storage is accessed according to the tag information and data address information of the current command to complete data reading or writing, and the information that the target cache line has been successfully locked and the data address information are returned to the linked list control unit; otherwise, the current command is input to the pipeline processing unit.

[0081] The pipeline processing unit is used to perform locking or unlocking of the target cache line and data processing, wherein the first preset value indicates that the target cache line does not need to be locked, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that the target cache line is not unlocked.

[0082] In some embodiments, the command scheduling unit is configured to input the current command to the pipeline processing unit when the locking identifier information of the current command is a fourth preset value, the successful locking identifier information is a fifth preset value, and the unlocking identifier information is a third preset value; the pipeline processing unit is configured to lock the target cache line and return the successful locking information to the linked list control unit; the linked list control unit is configured to update the successful locking identifier information of the next command according to the successful locking information.

[0083] In some embodiments, the command scheduling unit is configured to input the current command to the pipeline processing unit when the locking identifier information of the current command is a first preset value, the locking success identifier information is a second preset value, and the unlocking identifier information is a sixth preset value; the pipeline processing unit is configured to unlock the target cache line.

[0084] In some embodiments, before the current command is scheduled, the linked list control unit is configured to set the locked success identifier information of the current command to a second preset value according to the locked success information returned by the command scheduling unit based on the previous command or the locked success information returned by the pipeline processing unit after executing the previous command; otherwise, the locked success identifier information of the current command is set to a fifth preset value.

[0085] In some embodiments, before the current command is scheduled, the linked list control unit is configured to: if there is a scheduled access command with the same tag information after the current command in the command chain, set the locking identifier information of the current command to a fourth preset value and the unlocking identifier information to a third preset value; if there is no scheduled access command with the same tag information after the current command in the command chain, set the locking identifier information of the current command to a first preset value and the unlocking identifier information to a sixth preset value.

[0086] Each module in the aforementioned command processing device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can invoke and execute the operations corresponding to each module.

[0087] In some embodiments, a chip is provided that includes the command processing apparatus described in the above embodiments.

[0088] In some embodiments, a computer device is provided, including the chip described in the above embodiments or the command processing device described in the above embodiments.

[0089] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0090] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0091] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A command processing method, characterized in that, include: The current command is scheduled from the command chain, and the locking identifier, unlocking identifier, successful locking identifier, tag information and data address information of the current command are obtained, wherein the command chain consists of commands with the same tag information; If the locking identifier is a first preset value, the successful locking identifier is a second preset value, and the unlocking identifier is a third preset value, then the target cache line in the data storage is accessed according to the tag information and data address information of the current command to complete data reading or writing, and the information that the target cache line has been successfully locked and the data address information are returned to the linked list control unit. Otherwise, the current command is input to the pipeline processing unit to execute either locking or unlocking of the target cache line, and to perform data processing of the target cache line. The first preset value indicates that the target cache line does not need to be locked, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that the target cache line is not unlocked.

2. The method according to claim 1, characterized in that, When the locking identifier of the current command is the fourth preset value, the successful locking identifier is the fifth preset value, and the unlocking identifier is the third preset value, the current command is input to the pipeline processing unit. The pipeline processing unit locks the target cache line and returns the successful locking information to the linked list control unit, so that the linked list control unit updates the successful locking identifier of the next command according to the successful locking information.

3. The method according to claim 1, characterized in that, When the locking identifier of the current command is a first preset value, the successful locking identifier is a second preset value, and the unlocking identifier is a sixth preset value, the current command is input to the pipeline processing unit, and the pipeline processing unit unlocks the target cache line.

4. The method according to claim 1, characterized in that, Before the current command is scheduled, the method further includes: The linked list control unit sets the lock success flag of the current command to a second preset value based on the lock success information returned by the command scheduling unit based on the previous command or the lock success information returned by the pipeline processing unit after executing the previous command. The linked list control unit sets the locking success flag of the current command to a fifth preset value based on the locking failure information returned by the command scheduling unit based on the previous command or the locking failure information returned by the pipeline processing unit after executing the previous command.

5. The method according to claim 1, characterized in that, Before the current command is scheduled, the method further includes: If there is a scheduled access command with the same tag information after the current command in the command chain, then the locking identifier information of the current command is set to a fourth preset value, and the unlocking identifier information is set to a third preset value. If there is no scheduled access command with the same tag information after the current command in the command chain, then the locking identifier information of the current command is set to a first preset value, and the unlocking identifier information is set to a third preset value.

6. A command processing device, characterized in that, include: The system includes a linked list control unit, a command scheduling unit, a data storage unit, and a pipeline processing unit; among which, The command scheduling unit is used to schedule the current command from the command chain, obtain the locking identifier information, unlocking identifier information, successfully locked identifier information, tag information, and data address information of the current command, wherein the command chain consists of commands with the same tag information; if the locking identifier information is a first preset value, the successfully locked identifier information is a second preset value, and the unlocking identifier information is a third preset value, then the target cache line in the data storage is accessed according to the tag information and data address information of the current command to complete data reading or writing, and the information that the target cache line has been successfully locked and the data address information are returned to the linked list control unit; otherwise, the current command is input to the pipeline processing unit. The pipeline processing unit is used to perform either locking or unlocking of the target cache line, and to perform data processing on the target cache line, wherein the first preset value indicates that the target cache line does not need to be locked, the second preset value indicates that the target cache line has been successfully locked, and the third preset value indicates that the target cache line is not unlocked.

7. The apparatus according to claim 6, characterized in that, The command scheduling unit is used to input the current command to the pipeline processing unit when the locking identifier information of the current command is a fourth preset value, the locking success identifier information is a fifth preset value, and the unlocking identifier information is a third preset value. The pipeline processing unit is used to lock the target cache line and return the information that the lock has been successfully acquired to the linked list control unit. The linked list control unit is used to update the successful locking identifier information of the next command based on the successful locking information.

8. The apparatus according to claim 6, characterized in that, The command scheduling unit is used to input the current command to the pipeline processing unit when the locking identifier information of the current command is a first preset value, the locking success identifier information is a second preset value, and the unlocking identifier information is a sixth preset value. The pipeline processing unit is used to unlock the target cache line.

9. The apparatus according to claim 6, characterized in that, Before the current command is scheduled, the linked list control unit is configured to: set the locked success flag of the current command to a second preset value based on the locked success information returned by the command scheduling unit based on the previous command or the locked success information returned by the pipeline processing unit after executing the previous command; and set the locked success flag of the current command to a fifth preset value based on the locked failure information returned by the command scheduling unit based on the previous command or the locked failure information returned by the pipeline processing unit after executing the previous command.

10. The apparatus according to claim 6, characterized in that, Before the current command is scheduled, the linked list control unit is configured to: if there is a pending access command with the same tag information after the current command in the command chain, set the locking identifier information of the current command to a fourth preset value and the unlocking identifier information to a third preset value; if there is no pending access command with the same tag information after the current command in the command chain, set the locking identifier information of the current command to a first preset value and the unlocking identifier information to a sixth preset value.

11. A chip, characterized in that, Includes the command processing apparatus according to any one of claims 6-10.

12. A computer device, characterized in that, It includes the chip as described in claim 11, or the command processing device as described in any one of claims 6-10.

Citation Information

Patent Citations

  • Reading / writing-lock operation method, reading / writing-lock operation system and reading / writing-lock operation equipment

    CN107807858A

  • Data processing method and device, computer equipment and storage medium

    CN113448976A