Classification method of surface defects of integrated circuit chips

Abstract

This application relates to the field of chip inspection technology, and discloses a method for classifying surface defects of integrated circuit chips, including: acquiring a segmented image corresponding to an image of an integrated circuit chip to be inspected, and the position of the segmented image in the integrated circuit chip image; determining the defect type corresponding to the segmented image based on its position in the integrated circuit chip image; determining a target chip surface defect determination model from a set of pre-set candidate chip surface defect determination models based on the defect type; inputting the segmented image into the target chip surface defect determination model to determine the surface defects of the integrated circuit chip, and obtaining a chip surface defect determination result; and obtaining a classification result of the surface defects of the integrated circuit chip based on the chip surface defect determination result. This method can improve the efficiency of defect classification on the surface of integrated circuit chips. This application also discloses an integrated circuit chip surface defect classification device, electronic device, and storage medium.

Description

Technical Field

[0001] This application relates to the field of chip inspection technology, and for example to a method for classifying surface defects of integrated circuit chips. Background Technology

[0002] An integrated circuit chip is a circuit chip that encapsulates a certain number of semiconductor components onto a carrier made of different materials such as metal, plastic, glass, or ceramic to perform a specific function. Integrated circuit chips are widely used in computers, consumer electronics, network communications, automotive electronics, as well as public facilities such as water conservancy and power, and military equipment, and have become the lifeline of economic development and national information security.

[0003] In integrated circuit chips, the carrier used to house and encapsulate semiconductor components is called a semiconductor package. Semiconductor packages provide pins or contacts for connection to external circuits, as well as protection against impacts and scratches, while dissipating heat generated during operation. Inevitably, defects occur on the chip package surface at various stages of the semiconductor chip manufacturing and packaging process. These defects can significantly reduce the performance of the integrated circuit or even damage it. This compels integrated circuit chip manufacturers to promptly identify and remove chip products with surface defects to improve product quality and production efficiency. Therefore, surface defect detection of integrated circuit chips plays a crucial role in the chip packaging manufacturing process. With the continuous deepening of research and application in the field of machine vision, non-contact visual inspection technology is becoming increasingly mature in the field of surface quality inspection. However, existing technologies typically use a classifier to distinguish multiple types of defects in captured images. Users process the images to be classified before feeding them into the defect classifier to obtain the classification results. However, different classifiers have different efficiencies and accuracies on different datasets. While it is convenient to use a single classifier to classify different defects, it is not accurate enough. If the model has to go through each type of defect, the efficiency will be too low.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] To provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not intended as a general commentary, nor is it intended to identify key / important components or describe the scope of protection of these embodiments, but rather as a prelude to the detailed description that follows.

[0006] This disclosure provides a method for classifying surface defects of integrated circuit chips to improve the efficiency of defect classification on the surface of integrated circuit chips.

[0007] In some embodiments, the integrated circuit chip surface defect classification method includes: acquiring a segmented image corresponding to an image of an integrated circuit chip to be detected, and the position of the segmented image in the integrated circuit chip image; the segmented image is a part of the integrated circuit chip image; determining the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image; determining a target chip surface defect determination model from a plurality of preset candidate chip surface defect determination models based on the defect type; the candidate chip surface defect determination models are obtained by training with sample segmented images; the sample segmented images are a part of sample integrated circuit chip images; the candidate chip surface defect determination models are used to determine whether there are chip surface defects of a preset type in the segmented image; the chip surface defects determined by each candidate chip surface defect determination model are different; inputting the segmented image into the target chip surface defect determination model to determine the integrated circuit chip surface defects and obtain the chip surface defect determination result; and obtaining the integrated circuit chip surface defect classification result based on the chip surface defect determination result.

[0008] In some embodiments, the integrated circuit chip surface defect classification device includes: an acquisition module configured to acquire a segmented image corresponding to an image of an integrated circuit chip to be detected, and the position of the segmented image in the integrated circuit chip image; a defect type determination module configured to determine the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image; a model determination module configured to determine a target chip surface defect determination model from a plurality of preset candidate chip surface defect determination models based on the defect type; the candidate chip surface defect determination models are obtained by training with sample segmented images; the sample segmented images are a part of a sample integrated circuit chip image; the candidate chip surface defect determination models are used to determine whether there is a chip surface defect of a preset type in the segmented image; the chip surface defects determined by each candidate chip surface defect determination model are different; a defect detection module configured to input the segmented image into the target chip surface defect determination model to perform integrated circuit chip surface defect determination and obtain a chip surface defect determination result; and a defect classification module configured to obtain an integrated circuit chip surface defect classification result based on the chip surface defect determination result.

[0009] In some embodiments, the integrated circuit chip surface defect classification apparatus includes a processor and a memory storing program instructions, wherein the processor is configured to execute the aforementioned integrated circuit chip surface defect classification method when the program instructions are executed.

[0010] In some embodiments, the computer includes: a computer body; and the aforementioned integrated circuit chip surface defect classification device is installed on the computer body.

[0011] In some embodiments, the storage medium stores program instructions that are executed by a processor to implement the above-described method for classifying surface defects of integrated circuit chips.

[0012] The integrated circuit chip surface defect classification method, apparatus, computer, and storage medium provided in this disclosure can achieve the following technical effects: Based on the position of the segmented image in the integrated circuit chip image, the defect type corresponding to the segmented image is determined, and then the chip surface defect determination model is quickly determined, which actually completes the defect classification step. The subsequent detection using the corresponding model is essentially a classification verification. This method ensures the detection accuracy of a single chip surface defect determination model for targeted defects, and improves the overall efficiency of defect classification because it does not need to traverse every chip surface defect determination model.

[0013] The above general description and the description below are exemplary and illustrative only and are not intended to limit this application. Attached Figure Description

[0014] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations and drawings do not constitute a limitation on the embodiments. Elements having the same reference numerals in the drawings are shown as similar elements. The drawings are not to be scaled. And wherein: Figure 1 This is a schematic diagram of a method for classifying surface defects of an integrated circuit chip provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of an integrated circuit chip surface defect classification device provided in an embodiment of this disclosure; Figure 3 This is a schematic diagram of another integrated circuit chip surface defect classification device provided in an embodiment of this disclosure. Detailed Implementation

[0015] To provide a more detailed understanding of the features and technical content of the embodiments of this disclosure, the implementation of the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. The accompanying drawings are for illustrative purposes only and are not intended to limit the embodiments of this disclosure. In the following technical description, for ease of explanation, several details are used to provide a full understanding of the disclosed embodiments. However, one or more embodiments may still be implemented without these details. In other cases, well-known structures and devices may be simplified in their depiction to simplify the drawings.

[0016] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this disclosure described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0017] Unless otherwise stated, the term "multiple" means two or more.

[0018] In this embodiment of the disclosure, the character " / " indicates that the objects before and after it are in an "or" relationship. For example, A / B means: A or B.

[0019] The term "and / or" describes an association between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or A and B.

[0020] The term "correspondence" can refer to an association or binding relationship. The correspondence between A and B means that there is an association or binding relationship between A and B.

[0021] The integrated circuit chip surface defect classification method provided in this disclosure is applied to a computer.

[0022] Combination Figure 1 As shown, this disclosure provides a method for classifying surface defects of integrated circuit chips, including: Step S101: The computer acquires the segmented image corresponding to the image of the integrated circuit chip to be detected, and the position of the segmented image in the integrated circuit chip image. The segmented image is a portion of the integrated circuit chip image.

[0023] In some embodiments, the location of the segmented image in the integrated circuit chip image includes: the segmented image being located in the chip edge region, the segmented image being located in the pad region, the segmented image being located in the dense wiring region, the segmented image being located in the memory array region, or the segmented image being located in the passivation layer opening region, etc. The chip edge region is a region less than a first preset threshold distance from the chip outline boundary. The dense wiring region is a region where the line width and spacing are less than a second preset threshold. The pad region is the exposed metal bonding window.

[0024] Optionally, the computer acquires a segmented image corresponding to the image of the integrated circuit chip to be inspected, and the position of the segmented image within the integrated circuit chip image, including: the computer displays the integrated circuit chip image to be inspected in a graphical user interface. In response to a user's selection, clicking, or polygon drawing operation performed on the integrated circuit chip image to be inspected via an input device, corresponding trajectory data is generated. Based on the target area determined by the trajectory data, image data within the target area is copied to form a segmented image. The computer also receives the position of the segmented image within the integrated circuit chip image input by the user via an input device, such as a mouse or touchscreen.

[0025] Optionally, the computer acquires the segmented image corresponding to the integrated circuit chip image to be inspected, and the position of the segmented image in the integrated circuit chip image, including: the computer reads pre-configured template files corresponding to each position from a storage medium, wherein the template files record a set of reference coordinates for the corresponding position in the integrated circuit chip image to be inspected; the reference coordinate set is mapped onto the current integrated circuit chip image to be inspected; and based on the mapped coordinate set, a sub-image of the corresponding pixel region is extracted from the integrated circuit chip image to be inspected, and this sub-image is determined as the segmented image.

[0026] In some embodiments, the location template file corresponding to the chip edge region records the set of reference coordinates of the chip edge region in the integrated circuit chip image to be inspected; the location template file corresponding to the pad region records the set of reference coordinates of the pad region in the integrated circuit chip image to be inspected; the location template file corresponding to the dense wiring region records the set of reference coordinates of the dense wiring region in the integrated circuit chip image to be inspected; the location template file corresponding to the memory array region records the set of reference coordinates of the memory array region in the integrated circuit chip image to be inspected; and the location template file corresponding to the passivation layer opening region records the set of reference coordinates of the passivation layer opening region in the integrated circuit chip image to be inspected.

[0027] In step S102, the computer determines the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image.

[0028] In step S103, the computer determines the target chip surface defect determination model from a set of pre-set candidate chip surface defect determination models based on the defect type. The candidate chip surface defect determination models are obtained through training on sample segmented images. The sample segmented image is a portion of a sample integrated circuit chip image. The candidate chip surface defect determination model is used to determine whether a pre-set type of chip surface defect exists in the segmented image. Each candidate chip surface defect determination model identifies different chip surface defects.

[0029] In step S104, the computer inputs the segmented image into the target chip surface defect determination model, performs integrated circuit chip surface defect determination, and obtains the chip surface defect determination result.

[0030] Step S105: The computer obtains the classification result of the surface defects of the integrated circuit chip based on the determination result of the surface defects of the chip.

[0031] The integrated circuit chip surface defect classification method provided in this embodiment can determine the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image, and then quickly determine the chip surface defect determination model, thus completing the defect classification step. The subsequent detection using the corresponding model is essentially a classification verification. This method ensures the detection accuracy of a single chip surface defect determination model for targeted defects, and improves the overall efficiency of defect classification because it does not need to traverse every chip surface defect determination model.

[0032] Optionally, determining the defect type corresponding to the segmented image based on its position in the integrated circuit chip image includes: performing a lookup operation in a preset defect type table using the position of the segmented image in the integrated circuit chip image to obtain the defect type corresponding to that position, and then determining the defect type corresponding to that position as the defect type corresponding to the segmented image. The defect type table stores the correspondence between defect types and the positions of the segmented images in the integrated circuit chip image.

[0033] In some embodiments, if the segmented image is located in the chip edge region, the defect type corresponding to the segmented image in the defect type table is: chipped corner defect. If the segmented image is located in the pad region, the defect type corresponding to the segmented image in the defect type table is: oxidation discoloration defect. If the segmented image is located in the dense wiring region, the defect type corresponding to the segmented image in the defect type table is: bridging defect. If the segmented image is located in the memory array region, the defect type corresponding to the segmented image in the defect type table is: pinhole defect. If the segmented image is located in the passivation layer opening region, the defect type corresponding to the segmented image in the defect type table is: film peeling defect.

[0034] In some embodiments, the preset types include corner chipping defects, oxidation discoloration defects, bridging defects, pinhole defects, or film peeling defects. The plurality of candidate chip surface defect determination models include: a candidate chip surface defect determination model for determining whether a segmented image has corner chipping defects; a candidate chip surface defect determination model for determining whether a segmented image has oxidation discoloration defects; a candidate chip surface defect determination model for determining whether a segmented image has bridging defects; a candidate chip surface defect determination model for determining whether a segmented image has pinhole defects; and a candidate chip surface defect determination model for determining whether a segmented image has film peeling defects.

[0035] In some embodiments, the candidate chip surface defect determination model is obtained by: acquiring a preset number of sample segmented images, wherein the sample segmented images contain chip surface defects of a preset type; inputting the sample segmented images into a preset convolutional neural network for iterative training; stopping training when the number of iterations reaches a preset number; and determining the completed convolutional neural network as the candidate chip surface defect determination model, which is used to determine whether the segmented image contains a chip surface defect of a preset type.

[0036] Once the defect type corresponding to the segmented image of the integrated circuit chip to be inspected is obtained, a candidate chip surface defect determination model matching the defect type is selected from multiple candidate chip surface defect determination models, and this selected candidate chip surface defect determination model is determined as the target chip surface defect determination model. For example, if the defect type corresponding to the segmented image is a chipped corner defect, then the candidate chip surface defect determination model used to determine whether the segmented image has a chipped corner defect is determined as the target chip surface defect determination model.

[0037] Furthermore, the segmented image of the integrated circuit chip to be detected is input into the target chip surface defect determination model to determine the surface defects of the integrated circuit chip and obtain the chip surface defect determination result. This includes: inputting the segmented image of the integrated circuit chip to be detected into the target chip surface defect determination model, outputting the confidence level of the defect type corresponding to the target chip surface defect determination model, and determining that the chip surface defect determination result is that there is a chip surface defect of the type corresponding to the target chip surface defect determination model if the confidence level is greater than or equal to a set threshold. If the confidence level is less than the set threshold, determining that there is no chip surface defect of the type corresponding to the target chip surface defect determination model.

[0038] Optionally, the integrated circuit chip surface defect classification result is obtained based on the chip surface defect determination result, including: if the chip surface defect determination result indicates the presence of a chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is the defect type corresponding to the target chip surface defect determination model; if the chip surface defect determination result indicates the absence of a chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is no defect.

[0039] For example, if the segmented image of the integrated circuit chip to be inspected corresponds to a chipped corner defect, and this segmented image is input into a target chip surface defect determination model used to determine whether a chipped corner defect exists in the segmented image, if the confidence level of the chipped corner defect type is greater than or equal to a set threshold, then the chip surface defect determination result is determined to be a chipped corner defect. The integrated circuit chip surface defect classification result is also determined to be a chipped corner defect.

[0040] By using the location information of the segmented image in the integrated circuit chip image as a priori, false detections can be significantly reduced, and the corresponding model can be used for classification verification, which further improves the adaptability and efficiency of the detection algorithm in different regions.

[0041] Combination Figure 2 As shown in the figure, this disclosure provides an integrated circuit chip surface defect classification device, including: an acquisition module 201, a defect type determination module 202, a model determination module 203, a defect detection module 204, and a defect classification module 205.

[0042] The acquisition module 201 is configured to acquire the segmented image corresponding to the image of the integrated circuit chip to be inspected, and the position of the segmented image in the integrated circuit chip image. The defect type determination module 202 is configured to determine the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image. The model determination module 203 is configured to determine the target chip surface defect determination model from a set of multiple candidate chip surface defect determination models based on the defect type; the candidate chip surface defect determination models are obtained by training on sample segmented images; the sample segmented images are a part of the sample integrated circuit chip images; the candidate chip surface defect determination models are used to determine whether the segmented image contains a preset type of chip surface defect; each candidate chip surface defect determination model determines a different chip surface defect. The defect detection module 204 is configured to input the segmented image into the target chip surface defect determination model to determine the integrated circuit chip surface defects and obtain the chip surface defect determination result. The defect classification module 205 is configured to obtain the integrated circuit chip surface defect classification result based on the chip surface defect determination result.

[0043] The integrated circuit chip surface defect classification device provided in this embodiment can determine the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image, and then quickly determine the chip surface defect determination model, thus completing the defect classification step. The subsequent detection using the corresponding model is essentially a classification verification. This method ensures the detection accuracy of a single chip surface defect determination model for targeted defects, and improves the overall efficiency of defect classification because it does not need to traverse every chip surface defect determination model.

[0044] Optionally, the defect type determination module determines the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image in the following way: by performing a lookup operation in a preset defect type table using the position of the segmented image in the integrated circuit chip image to obtain the defect type corresponding to the position, and determining the defect type corresponding to the position as the defect type corresponding to the segmented image; the defect type table stores the correspondence between defect types and the position of the segmented image in the integrated circuit chip image.

[0045] Optionally, the defect classification module obtains the integrated circuit chip surface defect classification result based on the chip surface defect determination result in the following ways: if the chip surface defect determination result indicates the existence of a chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is the defect type corresponding to the target chip surface defect determination model; if the chip surface defect determination result indicates the absence of a chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is no defect.

[0046] Combination Figure 3 As shown, this embodiment of the disclosure provides an integrated circuit chip surface defect classification 300, including a processor 304 and a memory 301 storing program instructions. Optionally, the device may further include a communication interface 302 and a bus 303. The processor 304, communication interface 302, and memory 301 can communicate with each other via the bus 303. The communication interface 302 can be used for information transmission. The processor 304 can call the program instructions in the memory 301 to execute the integrated circuit chip surface defect classification method of the above embodiment.

[0047] Furthermore, the logic instructions in the aforementioned memory 301 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium.

[0048] The memory 301, as a computer-readable storage medium, can be used to store software programs and computer-executable programs, such as program instructions / modules corresponding to the methods in the embodiments of this disclosure. The processor 304 executes functional applications and data processing by running the program instructions / modules stored in the memory 301, thereby implementing the integrated circuit chip surface defect classification method in the above embodiments.

[0049] The memory 301 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the terminal device. Furthermore, the memory 301 may include high-speed random access memory and may also include non-volatile memory.

[0050] This disclosure provides a computer, including a computer body and the aforementioned integrated circuit chip surface defect classification device. The integrated circuit chip surface defect classification device is installed in the computer body. The installation relationship described herein is not limited to placement inside the computer, but also includes installation connections with other components of the computer, including but not limited to physical connections, electrical connections, or signal transmission connections. Those skilled in the art will understand that the integrated circuit chip surface defect classification device can be adapted to suitable computer bodies to achieve other feasible embodiments.

[0051] This disclosure provides a storage medium storing program instructions, which are executed by a processor to implement the above-described method for classifying surface defects of integrated circuit chips.

[0052] The technical solutions of this disclosure can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes one or more instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in this disclosure. The aforementioned storage medium can be a non-transitory storage medium, including: a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and other media capable of storing program code; it can also be a transient storage medium.

[0053] The foregoing description and accompanying drawings fully illustrate embodiments of this disclosure to enable those skilled in the art to practice them. Other embodiments may include structural, logical, electrical, procedural, and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the order of operation may vary. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. Moreover, the terminology used in this application is for describing embodiments only and is not intended to limit the claims. As used in the description of embodiments and claims, the singular forms “a,” “an,” and “the” are intended to equally include the plural forms unless the context clearly indicates otherwise. Similarly, the term “and / or” as used in this application means including one or more of the associated listed items and all possible combinations thereof. Additionally, when used in this application, the term "comprise" and its variations "comprises" and / or "comprising" refer to the presence of stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. Without further limitations, an element defined by the phrase "comprises a..." does not exclude the presence of other identical elements in the process, method, or apparatus that includes said element. In this document, each embodiment may focus on the differences from other embodiments, and similar or identical parts between embodiments can be referred to mutually. For methods, products, etc., disclosed in the embodiments, if they correspond to the method section disclosed in the embodiments, the relevant parts can be referred to the description of the method section.

[0054] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of this disclosure. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0055] The methods and products disclosed in the embodiments herein (including but not limited to devices and equipment) can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of units may be merely a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be electrical, mechanical, or other forms. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to implement this embodiment according to actual needs. In addition, the functional units in the embodiments of this disclosure may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0056] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than that shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. In the descriptions corresponding to the flowcharts and block diagrams in the accompanying drawings, the operations or steps corresponding to different blocks may also occur in a different order than disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. Each block in a block diagram and / or flowchart, and combinations of blocks in a block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

Claims

1. A method for classifying surface defects of integrated circuit chips, characterized in that, The method includes: Obtain a segmented image corresponding to the image of the integrated circuit chip to be detected, and the position of the segmented image in the integrated circuit chip image; the segmented image is a part of the integrated circuit chip image; The defect type corresponding to the segmented image is determined based on the position of the segmented image in the integrated circuit chip image; Based on the defect type, a target chip surface defect determination model is determined from a set of multiple candidate chip surface defect determination models. The candidate chip surface defect determination models are obtained through training on sample segmented images. The sample segmented images are a portion of a sample integrated circuit chip image. The candidate chip surface defect determination models are used to determine whether a chip surface defect of a preset type exists in the segmented image. The chip surface defects determined by each candidate chip surface defect determination model are different. The segmented image is input into the target chip surface defect determination model to determine the surface defects of the integrated circuit chip and obtain the chip surface defect determination result. Based on the determination results of the chip surface defects, the classification results of the integrated circuit chip surface defects are obtained.

2. The method for classifying surface defects of integrated circuit chips according to claim 1, characterized in that, Based on the position of the segmented image in the integrated circuit chip image, the defect type corresponding to the segmented image is determined, including: The defect type corresponding to the position of the segmented image in the integrated circuit chip image is obtained by looking up the position in a preset defect type table, and the defect type corresponding to the position is determined as the defect type corresponding to the segmented image; the defect type table stores the correspondence between defect types and the position of the segmented image in the integrated circuit chip image.

3. The method for classifying surface defects of integrated circuit chips according to claim 1, characterized in that, Based on the determination results of the chip surface defects, the classification results of the integrated circuit chip surface defects are obtained, including: When the chip surface defect determination result is that there is a chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is the defect type corresponding to the target chip surface defect determination model. If the chip surface defect determination result is that there is no chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is no defect.

4. A device for classifying surface defects of integrated circuit chips, characterized in that, include: The acquisition module is configured to acquire a segmented image corresponding to the image of the integrated circuit chip to be detected, and the position of the segmented image in the integrated circuit chip image; The defect type determination module is configured to determine the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image; The model determination module is configured to determine a target chip surface defect determination model from a plurality of preset candidate chip surface defect determination models based on the defect type; the candidate chip surface defect determination models are obtained by training on sample segmented images; the sample segmented images are a part of sample integrated circuit chip images; the candidate chip surface defect determination models are used to determine whether there are chip surface defects of a preset type in the segmented images; each candidate chip surface defect determination model determines different chip surface defects; The defect detection module is configured to input the segmented image into the target chip surface defect determination model, determine the integrated circuit chip surface defects, and obtain the chip surface defect determination result. The defect classification module is configured to obtain the integrated circuit chip surface defect classification result based on the chip surface defect determination result.

5. The integrated circuit chip surface defect classification device according to claim 4, characterized in that, The defect type determination module determines the defect type corresponding to the segmented image based on the position of the segmented image in the integrated circuit chip image in the following manner: The defect type corresponding to the position of the segmented image in the integrated circuit chip image is obtained by looking up the position in a preset defect type table, and the defect type corresponding to the position is determined as the defect type corresponding to the segmented image; the defect type table stores the correspondence between defect types and the position of the segmented image in the integrated circuit chip image.

6. The integrated circuit chip surface defect classification device according to claim 4, characterized in that, The defect classification module obtains the integrated circuit chip surface defect classification result based on the chip surface defect determination result in the following manner: When the chip surface defect determination result is that there is a chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is the defect type corresponding to the target chip surface defect determination model. If the chip surface defect determination result is that there is no chip surface defect of the type corresponding to the target chip surface defect determination model, the integrated circuit chip surface defect classification result is no defect.

7. A surface defect classification device for integrated circuit chips, comprising a processor and a memory storing program instructions, characterized in that, The processor is configured to execute the integrated circuit chip surface defect classification method as described in any one of claims 1 to 3 when running the program instructions.

8. A computer, characterized in that, include: Computer body; The integrated circuit chip surface defect classification device as described in claim 4 or 7 is installed on the computer body.

9. A storage medium storing program instructions, characterized in that, The program instructions are executed by the processor to implement the integrated circuit chip surface defect classification method as described in any one of claims 1 to 3.

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