Pixel circuits, display panels, display driver integrated circuits, display modules, electronic devices, and display driving methods

Abstract

This application provides a pixel circuit, a display panel, a display driver integrated circuit, a display module, an electronic device, and a display driving method, relating to the field of display technology, for improving display effects in low-brightness scenarios. A pixel circuit including a control circuit is provided, where a first light-emitting device directly receives a driving voltage, and a second light-emitting device receives the driving voltage through the control circuit. By controlling whether the second light-emitting device receives the driving voltage, the magnitude of the driving voltage received per unit area by the first light-emitting device can be adjusted. In low-brightness conditions, the control circuit is turned off, so that the driving voltage is used only to drive the first light-emitting device, thereby increasing the driving voltage of the first light-emitting device. A higher driving voltage results in faster charging of the light-emitting device and less noticeable low-brightness ghosting. Furthermore, a higher driving voltage leads to more stable transistor operating voltage, making problems such as uneven low-grayscale display, uneven graininess, and low-grayscale ghosting less noticeable.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a pixel circuit, display panel, display driver integrated circuit, display module, electronic device and display driving method. Background Technology

[0002] With the development of display panel technology, display panels are gradually evolving towards higher brightness. Taking organic light-emitting diode (OLED) display panels as an example, in order to achieve higher brightness, the structure of OLED display panels has gradually evolved from a single-emitting-layer structure to a multi-emitting-layer structure. Under the same power consumption, OLED display panels with multi-emitting-layer structures can achieve higher brightness. At the same brightness, OLED display panels with multi-emitting-layer structures can effectively reduce power consumption.

[0003] However, OLED display panels with multi-emitting-layer structures generally suffer from poor display performance in low-brightness scenarios. Summary of the Invention

[0004] This application provides a pixel circuit, a display panel, a display driver integrated circuit, a display module, an electronic device, and a display driving method for improving display effects in low-brightness scenarios.

[0005] A first aspect of this application provides a pixel circuit, which includes a driving circuit, a first light-emitting device, a second light-emitting device, and a control circuit. The driving circuit is used to receive data signals and provide a driving voltage to a first node. The first light-emitting device is coupled between the first node and a first voltage terminal. The second light-emitting device is coupled between a second node and the first voltage terminal. The control circuit is coupled between the first node and the second node. The control circuit also includes a first terminal, which is used to control the conduction or cutoff between the first node and the second node according to the voltage difference between the first terminal and the first node.

[0006] The pixel circuit provided in this application includes a control circuit and a second light-emitting device controlled by the control circuit. The control circuit controls whether the second light-emitting device receives a driving voltage, thus adjusting the driving voltage received per unit area by the first light-emitting device. Therefore, at low brightness, to improve the display effect, it is necessary to increase the driving voltage per unit area of ​​the light-emitting device. This can be achieved by turning off the control circuit, allowing the driving voltage of the first node to be used only to drive the first light-emitting device, thereby increasing the driving voltage per unit area of ​​the first light-emitting device. Since a higher driving voltage results in faster charging of the light-emitting device, the low-brightness ghosting problem is less noticeable. Furthermore, a higher driving voltage leads to more stable transistor operating voltage, making problems such as uneven low-grayscale display, uneven graininess, and low-grayscale ghosting less obvious. Therefore, increasing the driving voltage per unit area of ​​the first light-emitting device can improve the display effect at low brightness. At high brightness, to ensure sufficient light emission, the actual opening area of ​​the light-emitting device needs to be increased. This can be achieved by controlling the control circuit to conduct, thereby controlling the first and second light-emitting devices to emit light together, ensuring sufficient light emission at high brightness. Therefore, the pixel circuit provided in this application embodiment can improve problems such as low brightness ghosting, uneven low grayscale display, uneven graininess, and low grayscale afterimages without affecting the high brightness display effect.

[0007] In one possible implementation, the first terminal is used to receive a first control voltage; the control circuit is used to control the conduction between the first node and the second node based on the difference between the first control voltage and the driving voltage, transmitting the driving voltage of the first node to the second node, and controlling the second light-emitting device to emit light. For example, in a high-brightness scene, receiving the first control voltage causes the first and second light-emitting devices to emit light together. Directly controlling the on / off state of the control circuit through an external signal can reduce interference and improve the control accuracy.

[0008] In one possible implementation, the first terminal is used to receive the second control voltage; the control circuit is used to control the cutoff between the first node and the second node based on the difference between the second control voltage and the driving voltage, thereby controlling the second light-emitting device to stop emitting light. For example, in a low-brightness scenario, receiving the second control voltage causes the first device to emit light, while the second light-emitting device stops emitting light. Directly controlling the on / off state of the control circuit through an external signal can reduce interference and improve the accuracy of control.

[0009] In one possible implementation, the first control voltage and the second control voltage are, for example, high-level signals and low-level signals respectively. Providing high-level or low-level signals to the first terminal in different image frames can be easily achieved using mature gate drive circuit technology.

[0010] In one possible implementation, the control circuit includes a first transistor; the first terminal of the first transistor is coupled to a first node, the second terminal of the first transistor is coupled to a second node, and the control terminal of the first transistor is coupled to a first terminal of the control circuit. The first transistor controls the switching on and off of the first and second nodes, resulting in a simple structure. Furthermore, the first transistor can be formed synchronously with the transistors in the driving circuit, requiring no additional process steps and reducing cost.

[0011] In one possible implementation, the first terminal is coupled to the second node; the control circuit controls the conduction or cutoff between the first and second nodes based on the voltage difference between them. Thus, the conduction of the control circuit can be controlled based on the driving voltage received by the first node and the voltage difference between the second node. No external signal is required, reducing the number of external ports and simplifying the display panel structure.

[0012] In one possible implementation, the control circuit includes a second transistor; the first terminal of the second transistor is coupled to the first node, the second terminal of the second transistor is coupled to the second node, and the control terminal of the second transistor is coupled to the second node. The second transistor controls the switching on and off of the first and second nodes, resulting in a simple structure. Furthermore, the second transistor can be formed synchronously with the transistors in the driving circuit, requiring no additional process steps and reducing cost.

[0013] In one possible implementation, the first light-emitting device includes a first light-emitting unit and a second light-emitting unit connected in series between a first node and a first voltage terminal; the second light-emitting device includes a third light-emitting unit and a fourth light-emitting unit connected in series between a second node and the first voltage terminal. In low-brightness scenarios, the driving voltage per unit area of ​​the first light-emitting device can be increased. This increases the driving voltage of the equivalent capacitance derived from the first and second light-emitting units. A higher driving voltage results in a smaller difference in the charging time of the two equivalent capacitors, leading to a shorter duration of excessive brightness, thereby improving the problem of display ghosting in low-brightness scenarios under the stacked light-emitting device architecture.

[0014] In one possible implementation, the first and second light-emitting devices are used to emit green light. Green light-emitting devices have high luminous efficiency and require low driving voltage, but their display problems are more severe at low brightness. Therefore, setting the subpixels that emit green light to the above structure can improve the display effect of the display panel at low brightness.

[0015] A second aspect of the embodiments of this application provides a display panel, the display panel including a substrate and pixel circuits as described in any of the first aspects, the pixel circuits being disposed on the substrate.

[0016] The display panel provided in the second aspect of this application includes the pixel circuit of the first aspect, and its beneficial effects are the same as those of the pixel circuit, which will not be repeated here. When the display problem of some color subpixels is not obvious at low brightness, the pixel circuit structure in the related technology can be used without increasing the structural complexity of the display panel. When the display effect requirements are high, the pixel circuit structure of the first aspect can be used for each color subpixel.

[0017] In one possible implementation, the display panel further includes a gate driving circuit; the gate driving circuit includes cascaded multi-stage shift registers, with the first terminal of the control circuit in the pixel circuit located in the same row coupled to the same shift register. Providing a first control voltage or a second control voltage to the first terminal of the pixel circuit via the gate driving circuit is a mature technology, simple in principle, easy to implement, and low in cost.

[0018] In one possible implementation, the display panel further includes a positive power supply voltage terminal and a power line coupled to the positive power supply voltage terminal, the power line being located in the display area of ​​the display panel. A driving circuit is also coupled to the power line for receiving the positive light-emitting power supply voltage. The driving circuit includes a driving transistor, which includes a bottom gate and a top gate, the bottom gate being coupled to the power line located in the display area. Receiving the positive light-emitting power supply voltage within the display area at the bottom gate, instead of connecting it externally to the display area, can mitigate the impedance differences encountered when an externally connected positive light-emitting power supply voltage is transmitted to different pixel circuits, thereby reducing interference to the display caused by abrupt changes in the shielding signal due to impedance unevenness.

[0019] A third aspect of this application provides a display driver integrated circuit (ICC) for driving a display panel. The pixel circuit in the display panel includes a control circuit. The IC is configured to receive a first instruction characterizing a first luminance and send a first start signal. The first start signal is used to control the control circuit to turn on, for example, to control the control circuit to turn on during the luminance phase of an image frame. The IC is also configured to receive a second instruction characterizing a second luminance and send a second start signal. The second start signal is used to control the control circuit to turn off, for example, to control the control circuit to turn off during the luminance phase of an image frame. The first luminance is greater than the second luminance.

[0020] The display driver integrated circuit provided in this application embodiment can be used to provide a start control signal to the display panel. After being processed by the gate driving circuit in the display panel, it outputs corresponding control signals to the pixel circuit line by line to drive the pixel circuit to achieve the above display effect.

[0021] In one possible implementation, after receiving the first instruction, the display driver integrated circuit is further configured to send a first light emission control start signal; after receiving the second instruction, the display driver integrated circuit is further configured to send a second light emission control start signal; the duty cycle of the first light emission control start signal is greater than the duty cycle of the second light emission control start signal. By adjusting the duty cycle of the light emission control start signal, the brightness of the display screen is controlled to achieve matching between the brightness of the display screen and the brightness instruction.

[0022] In one possible implementation, the first start signal and the second start signal are respectively high-level and low-level signals. Controlling the on / off state of the control circuit using high and low-level signals is a simple and easy-to-implement solution.

[0023] A fourth aspect of the embodiments of this application provides a display module, the display module including a display driver integrated circuit and a display panel; the display driver integrated circuit is coupled to the display panel; the display panel includes the display panel as described in the second aspect; and / or, the display driver integrated circuit includes the display driver integrated circuit as described in the third aspect.

[0024] A fifth aspect of the embodiments of this application provides an electronic device, the electronic device including a drive controller and a display module, the drive controller being coupled to the display module; the display module includes the display module of the fourth aspect.

[0025] A sixth aspect of this application provides a display driving method for driving an electronic device. The electronic device includes a display driving integrated circuit and a display panel. The pixel circuit in the display panel includes a control circuit. The display driving integrated circuit receives a first instruction characterizing a first luminance and sends a first start signal to the display panel. The control circuit is turned on under the control of the first start signal. The display driving integrated circuit receives a second instruction characterizing a second luminance and sends a second start signal to the display panel. The control circuit is turned off under the control of the second start signal. The first luminance is greater than the second luminance.

[0026] After driving with the display driving method provided in the embodiments of this application, the pixel circuit including the control circuit in the electronic device can improve problems such as low brightness ghosting, uneven low grayscale display, uneven graininess, and low grayscale afterimage without affecting the high brightness display effect.

[0027] In one possible implementation, the pixel circuit further includes a first light-emitting device and a second light-emitting device; the display driving method further includes: after the control circuit is turned on under the control of the first start signal, controlling the second light-emitting device to emit light; after the control circuit is turned off under the control of the second start signal, controlling the second light-emitting device to stop emitting light. By controlling whether the second light-emitting device emits light, it is possible to determine whether only the first light-emitting device emits light in the current image frame, or whether the first and second light-emitting devices emit light together. This achieves the goal of optimizing the display effect in low-brightness and high-brightness scenes by controlling different numbers of light-emitting devices to emit light in low-brightness and high-brightness scenes respectively.

[0028] In one possible implementation, after receiving the first instruction, the display driver integrated circuit is further configured to send a first light-emitting control start signal to the display panel. Under the control of the first light-emitting control start signal, the display panel displays a first image, the brightness of which is a first light-emitting brightness. After receiving the second instruction, the display driver integrated circuit is further configured to send a second light-emitting control start signal to the display panel. Under the control of the second light-emitting control start signal, the display panel displays a second image, the brightness of which is a second light-emitting brightness. The duty cycle of the first light-emitting control start signal is greater than the duty cycle of the second light-emitting control start signal. Attached Figure Description

[0029] Figure 1A This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0030] Figure 1B A schematic diagram of the architecture of a display panel provided in an embodiment of this application;

[0031] Figure 2A A schematic diagram of the topology of a pixel circuit provided in an embodiment of this application;

[0032] Figure 2B A schematic diagram of another pixel circuit topology provided in an embodiment of this application;

[0033] Figure 2C An equivalent topological diagram of a light-emitting device provided in an embodiment of this application;

[0034] Figure 2D This is a schematic diagram of the structure of a light emission control signal generation circuit provided in an embodiment of this application;

[0035] Figure 3 A schematic diagram of a pixel circuit architecture provided in an embodiment of this application;

[0036] Figure 4A This is a schematic diagram of the structure of a light-emitting device provided in an embodiment of this application;

[0037] Figure 4B An equivalent topological diagram of a light-emitting device provided in an embodiment of this application;

[0038] Figure 5A and Figure 5B A schematic diagram of another pixel circuit topology provided in an embodiment of this application;

[0039] Figure 6A A driving timing diagram of a pixel circuit provided in an embodiment of this application;

[0040] Figure 6B A driving timing diagram for another pixel circuit provided in an embodiment of this application;

[0041] Figure 6C A driving timing diagram for yet another pixel circuit provided in an embodiment of this application;

[0042] Figure 6D A driving timing diagram for yet another pixel circuit provided in an embodiment of this application;

[0043] Figure 7A A driving timing diagram for yet another pixel circuit provided in an embodiment of this application;

[0044] Figure 7B A driving timing diagram for yet another pixel circuit provided in an embodiment of this application;

[0045] Figure 7C A driving timing diagram for yet another pixel circuit provided in an embodiment of this application;

[0046] Figure 7D A driving timing diagram for yet another pixel circuit provided in an embodiment of this application;

[0047] Figure 8 A schematic diagram of another pixel circuit architecture provided in an embodiment of this application;

[0048] Figure 9A A schematic diagram of another pixel circuit topology provided in an embodiment of this application;

[0049] Figure 9B A schematic diagram of another pixel circuit topology provided in an embodiment of this application;

[0050] Figure 10 This is a schematic diagram of the pixel layout of a display panel provided in an embodiment of this application;

[0051] Figures 11A-11C Schematic diagrams of pixel layouts of other display panels provided in embodiments of this application;

[0052] Figure 12 This is a schematic diagram of a green subpixel structure provided in an embodiment of this application. Detailed Implementation

[0053] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0054] Hereinafter, the terms "second," "first," etc., are used for descriptive convenience only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "second," "first," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0055] Furthermore, in the embodiments of this application, directional terms such as "upper," "lower," "left," and "right" may be defined relative to the orientation in which the components are schematically placed in the accompanying drawings. It should be understood that these directional terms can be relative concepts, used for relative description and clarification, and can change accordingly based on the orientation of the components in the accompanying drawings.

[0056] In the embodiments of this application, unless otherwise explicitly specified and limited, the term "connection" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. Furthermore, the term "coupled connection" can be a direct electrical connection or an indirect electrical connection through an intermediate medium. The term "contact" can be direct contact or indirect contact through an intermediate medium.

[0057] In this embodiment of the application, "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.

[0058] This application provides an electronic device, which may be, for example, a foldable electronic device. The electronic device may be, for example, a consumer electronics product, a home electronics product, an in-vehicle electronics product, or a financial electronics product. Consumer electronics products include mobile phones, tablets, laptops, e-readers, personal computers (PCs), personal digital assistants (PDAs), desktop monitors, smart wearable products (e.g., smartwatches, smart bracelets), virtual reality (VR) electronic devices, augmented reality (AR) electronic devices, mixed reality (MR) electronic devices, artificial intelligence (AI) electronic devices, drones, etc. Home electronics products include smart door locks, televisions, refrigerators, and rechargeable small household appliances (e.g., soymilk makers, robot vacuum cleaners), etc. In-vehicle electronics products include in-vehicle navigation systems, in-vehicle DVDs, etc. Financial electronics products include ATMs and self-service electronic devices, etc.

[0059] This application does not impose any special restrictions on the specific form of the above-mentioned electronic device. For the sake of convenience, the following embodiments all use mobile phones as an example for illustration.

[0060] Figure 1A This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0061] like Figure 1A As shown, the electronic device 1 includes a display module 40 and a drive controller 30.

[0062] The drive controller 30, as the core of the electronic device 1, is used for overall system processing and control. The drive controller 30 is coupled to the display module 40 and receives image signals and control signals (e.g., provided by a central processing unit (CPU)). The drive controller 30 outputs image data that matches the interface specifications of the display module 40 based on the image signals. The drive controller 30 may include, for example, a system-on-chip (SOC). The drive controller 30 can be coupled to the display module 40 via a mobile industry processor interface (MIPI). Alternatively, the drive controller 30 can also be coupled to the display module 40 via other high-speed serial / deserial (SerDes) interfaces.

[0063] The display module 40 includes, for example, a display panel 10 and a display driver integrated circuit 20. The display driver integrated circuit 20 serves as the control core of the display panel 10, driving the display panel 10 to work and receiving data from the drive controller 30.

[0064] The display driver integrated circuit 20 is coupled to, for example, the drive controller 30, receives signals output by the drive controller 30, and provides the display panel 10 with the scanning signals and data signals required for light emission. The signals sent by the display driver integrated circuit 20 will be explained in detail below in conjunction with the structure of the pixel circuit.

[0065] For example, the display driver integrated circuit 20 receives data control signals and image data from the driver controller 30. The display driver integrated circuit 20 converts the image data into data signals and outputs the data signals to multiple data signal lines. The data signals are analog voltages corresponding to the grayscale values ​​of the image data. The display driver integrated circuit 20 is also used to output scan control signals such as clock signals, gate activation signals (STV), and reset signals required for display to the display panel 10. The display driver integrated circuit 20 may include, for example, a display driver integrated circuit (DDIC).

[0066] The display panel 10 serves as a data presentation unit, used to display and control data sent by the drive controller 30. For example, the display panel 10 may be a self-emissive display module 40 such as an organic light-emitting diode (OLED) display module 40, an active-matrix organic light-emitting diode (AMOLED) display module 40, a mini organic light-emitting diode (Mini-OLED) display module 40, a micro light-emitting diode (Micro-LED) display module 40, a micro organic light-emitting diode (Micro-OLED) display module 40, or a quantum dot light-emitting diode (QLED) display module 40. In this case, the display panel 10 can be a rigid display panel or a flexible display panel.

[0067] For any of the above-described display panels 10, the display panel 10 includes an active display area (AA) and a non-display area BB located around the active display area AA. The active display area AA is used to display images and includes multiple sub-pixels (SPs). Each sub-pixel is provided with a pixel circuit 11, which receives data signals provided by the display driver integrated circuit 20. The non-display area BB includes a driving circuit, which receives scan control signals provided by the display driver integrated circuit 20.

[0068] In this application, the pixel circuits 11 are described using a matrix arrangement as an example. Pixel circuits 11 arranged in a row along the horizontal direction X are called the same row pixel circuits 11, and pixel circuits 11 arranged in a row along the vertical direction Y are called the same column pixel circuits 11.

[0069] Figure 1B This is a schematic diagram of the architecture of a display panel provided in an embodiment of this application.

[0070] In some embodiments, the pixel circuit 11 typically includes a driving circuit composed of multiple transistors and a light-emitting device. The driving circuit generates a driving voltage to drive the light-emitting device to emit light, thereby realizing the light emission of the pixel circuit 11. Multiple pixel circuits 11 are arrayed on a substrate. For example, a structure including a substrate and multiple arrayed driving circuits is called an array substrate. Multiple light-emitting devices are disposed on the array substrate, and each light-emitting device is coupled to a pixel circuit in a one-to-one correspondence. Alternatively, it can be understood as follows: Figure 1B As shown, the display panel 10 includes a substrate, a driving circuit layer, and a light-emitting device layer. The driving circuit layer includes an array of driving circuits, and the light-emitting device layer includes multiple light-emitting devices. The driving circuit and the light-emitting devices are coupled to form a pixel circuit 11.

[0071] Figure 2A This is a schematic diagram of the topology of a pixel circuit provided in an embodiment of this application.

[0072] In some embodiments, such as Figure 2A As shown, the pixel circuit 11 includes a driving circuit 111 and a light-emitting device 116. The driving circuit 111 is used to drive the light-emitting device 116 to emit light.

[0073] The driving circuit 111 includes a ninth transistor T9, a tenth transistor T10, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, and a storage capacitor Cst.

[0074] The gate of the ninth transistor T9 is coupled to the fifth node N5, the first terminal of the ninth transistor T9 is coupled to the third node N3, and the second terminal of the ninth transistor T9 is coupled to the sixth node N6. The gate of the tenth transistor T10 is coupled to the fourth scan signal terminal S4, the first terminal of the tenth transistor T10 is coupled to the output voltage terminal Vd, and the second terminal of the tenth transistor T10 is coupled to the third node N3. The gate of the third transistor T3 is coupled to the third scan signal terminal S3, the first terminal of the third transistor T3 is coupled to the fifth node N5, and the second terminal of the third transistor T3 is coupled to the fourth node N4. The gate of the fourth transistor T4 is coupled to the second scan signal terminal S2, the first terminal of the fourth transistor T4 is coupled to the fourth node N4, and the second terminal of the fourth transistor T4 is coupled to the first reset voltage terminal Vinit1. The gate of the fifth transistor T5 is coupled to the light emission control signal terminal EM, the first terminal of the fifth transistor T5 is coupled to the positive light emission power supply voltage terminal ELVDD, and the second terminal of the fifth transistor T5 is coupled to the third node N3. The gate of the sixth transistor T6 is coupled to the light-emitting control signal terminal EM, the first terminal of the sixth transistor T6 is coupled to the sixth node N6, and the second terminal of the sixth transistor T6 is coupled to the first node N1. The gate of the seventh transistor T7 is coupled to the first scan signal terminal S1, the first terminal of the seventh transistor T7 is coupled to the first node N1, and the second terminal of the seventh transistor T7 is coupled to the second reset voltage terminal Vinit2. The gate of the eighth transistor T8 is coupled to the first scan signal terminal S1, the first terminal of the eighth transistor T8 is coupled to the sixth node N6, and the second terminal of the eighth transistor T8 is coupled to the third reset voltage terminal Vinit3. One end of the storage capacitor Cst is coupled to the positive power supply voltage terminal ELVDD, and the other end of the storage capacitor Cst is coupled to the fifth node N5. One terminal of the light-emitting device 116 is coupled to the first node N1, and the other terminal of the light-emitting device 116 is coupled to the negative power supply voltage terminal ELVSS.

[0075] Figure 2B This is a schematic diagram of another pixel circuit topology provided in an embodiment of this application.

[0076] In other embodiments, such as Figure 2B As shown, the pixel circuit 11 includes a driving circuit 111 and a light-emitting device 116. The driving circuit 111 is used to drive the light-emitting device 116 to emit light.

[0077] The driving circuit 111 includes a ninth transistor M9, a tenth transistor M10, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, and a storage capacitor Cst.

[0078] The gate of the ninth transistor M9 is coupled to the second scan signal terminal G2. The first terminal of the first transistor M2 is coupled to the first reset voltage terminal Vinit1. The second terminal of the ninth transistor M9 is coupled to the sixth node N6. The gate of the tenth transistor M10 is coupled to the third scan signal terminal G3. The first terminal of the tenth transistor M10 is coupled to the sixth node N6. The second terminal of the tenth transistor M10 is coupled to the fifth node N5. The gate of the third transistor M3 is coupled to the fifth node N5. The first terminal of the third transistor M3 is coupled to the third node N3. The second terminal of the third transistor M3 is coupled to the sixth node N6. The gate of the fourth transistor M4 is coupled to the fourth scan signal terminal G4. The first terminal of the fourth transistor M4 is coupled to the data voltage terminal Vd. The second terminal of the fourth transistor M4 is coupled to the third node N3. The gate of the fifth transistor M5 is coupled to the light emission control signal terminal EM. The first terminal of the fifth transistor M5 is coupled to the positive light emission power supply voltage terminal ELVDD. The second terminal of the fifth transistor M5 is coupled to the third node N3. The gate of the sixth transistor M6 is coupled to the light-emitting control signal terminal EM, the first terminal of the sixth transistor M6 is coupled to the sixth node N6, and the second terminal of the sixth transistor M6 is coupled to the first node N1. The gate of the seventh transistor M7 is coupled to the first scan signal terminal G1, the first terminal of the seventh transistor M7 is coupled to the second reset voltage terminal Vinit2, and the second terminal of the seventh transistor M7 is coupled to the first node N1. The gate of the eighth transistor M8 is coupled to the first scan signal terminal G1, the first terminal of the eighth transistor M8 is coupled to the third reset voltage terminal Vinit3, and the second terminal of the eighth transistor M8 is coupled to the third node N3. One end of the storage capacitor Cst is coupled to the positive power supply voltage terminal ELVDD, and the other end of the storage capacitor Cst is coupled to the fifth node N5. One terminal of the light-emitting device 116 is coupled to the first node N1, and the other terminal of the light-emitting device 116 is coupled to the negative power supply voltage terminal ELVSS.

[0079] With the development of display panel 10 technology, display panel 10 is gradually evolving towards higher brightness. While achieving higher brightness, the power consumption of display panel 10 will also increase. The power consumption of display panel 10 mainly consists of two parts: one part is the power consumption required for the light-emitting device 116 to emit light, and the other part is the power consumption required for the display driver integrated circuit 20 to provide driving signals.

[0080] Taking OLED display panels as an example, in order to achieve higher brightness, the structure of OLED display panels has gradually evolved from a single-layer structure to a tandem structure. At the same light-emitting power consumption, the tandem structure can achieve higher brightness. At the same brightness, the tandem structure can effectively reduce light-emitting power consumption.

[0081] Figure 2C An equivalent topology diagram of a light-emitting device provided in an embodiment of this application.

[0082] In some embodiments, the display panel 10 includes an array substrate and a plurality of light-emitting devices 116 disposed on the array substrate. The array substrate includes a substrate and transistors and driving portions of pixel circuits 11 disposed on the substrate.

[0083] For example, such as Figure 2C As shown, the light-emitting device 116 is a stacked light-emitting device. For example, the light-emitting device 116 includes a seventh light-emitting unit 1161 and an eighth light-emitting unit 1162 connected in series. The seventh light-emitting unit 1161 has a first equivalent capacitance C1, and the eighth light-emitting unit 1162 has a second equivalent capacitance C2.

[0084] like Figure 1A As shown, in some embodiments, the display panel 10 may further include a gate driver on array (GOA) circuit, which transmits scan signals to the gates of the pixel circuits 11 in the display panel 10. Figure 2A Taking the pixel circuit 11 shown as an example, for instance, the display panel 10 includes multiple gate drive circuits GOA, which are respectively used to provide scan control signals to the first scan signal terminal S1, the second scan signal terminal S2, the third scan signal terminal S3, the fourth scan signal terminal S4, and the light emission control signal terminal EM. Figure 2B Taking the pixel circuit 11 shown as an example, the display panel 10 includes multiple gate drive circuits GOA, which are used to provide scan control signals to the first scan signal terminal G1, the second scan signal terminal G2, the third scan signal terminal G3, the fourth scan signal terminal G4, and the light emission control signal terminal EM, respectively.

[0085] Figure 2D This is a schematic diagram of a light emission control signal generation circuit provided in an embodiment of this application.

[0086] In some embodiments, such as Figure 2D As shown, the gate drive circuit GOA includes at least two cascaded shift registers SR(1) to SR(n). The signal input terminal VI of the first-stage shift register SR(1) is used to receive the start signal STV. Except for the first-stage shift register SR(1), the signal input terminal VI of each stage shift register SR(m) is coupled to the output terminal GO of its predecessor shift register SR(m-1). When the start signal STV is an enable signal, the first-stage shift register SR1 of the gate drive circuit GOA starts working, and subsequently, the multiple shift registers start working one after another.

[0087] For example, the start signal STV is provided by the display driver integrated circuit 20. The display panel 10 is used to receive the start signal STV sent by the display driver integrated circuit 20 and generate the gate scan signal required by the pixel circuit 11. The timing of the gate scan signal received by each row of pixel circuits is the same as the timing of the start signal STV.

[0088] When the light-emitting device 116 includes a seventh light-emitting unit 1161 and an eighth light-emitting unit 1162 connected in series, it is equivalent to the light-emitting device 116 including a first equivalent capacitor C1 and a second equivalent capacitor C2 connected in series. When there is a difference in capacitance between the first equivalent capacitor C1 and the second equivalent capacitor C2, during the light-emitting stage, the equivalent capacitor with the smaller rechargeable capacity completes charging earlier, resulting in a larger luminous current for the corresponding light-emitting unit, leading to excessive brightness. The greater the difference in rechargeable capacity between the first equivalent capacitor C1 and the second equivalent capacitor C2, the longer the duration of excessive brightness and the brighter the apparent brightness difference. During initial fabrication, due to the positional characteristics of the first electrode layer, conductive connection layer, and second electrode layer, it is difficult to completely resolve the capacitance difference between the first equivalent capacitor C1 and the second equivalent capacitor C2 in the light-emitting device 116 through design and manufacturing processes. Furthermore, it is impossible to predict the potential differences between the first equivalent capacitor C1 and the second equivalent capacitor C2 during subsequent use. The brightness difference between the seventh light-emitting unit 1161 and the eighth light-emitting unit 1162 will cause severe ghosting problems in the display panel 10 during display. Furthermore, in low-brightness scenarios, the peak current of the light-emitting device is smaller, and after current shunting, the current charging the first equivalent capacitor C1 and the second equivalent capacitor C2 is even smaller. With a fixed difference in the rechargeable capacity of the first equivalent capacitor C1 and the second equivalent capacitor C2, the smaller the charging current, the greater the difference in charging time between the two capacitors, resulting in a longer duration of excessive brightness and exacerbating the ghosting phenomenon in low-brightness scenarios. Moreover, display panels 10, including the multilayered light-emitting device 116, generally suffer from uneven low-grayscale display, uneven "dirty mura" effect, and low-grayscale ghosting. Furthermore, in current pixel design, the conventional aperture design of the display panel 10 maximizes the aperture ratio based on the lifespan ratio of red, green, and blue subpixels. A larger aperture ratio results in a lower current density for the light-emitting device 116, and combined with the increased efficiency of the multilayered light-emitting device, this leads to a further reduction in the driving voltage, exacerbating display problems in low-brightness scenarios.

[0089] Based on this, the pixel circuit 11 provided in this application embodiment is used to improve the problem of display ghosting under low brightness, and can also improve problems such as uneven low grayscale display, uneven graininess, and low grayscale afterimage.

[0090] Figure 3 This is a schematic diagram of the architecture of a pixel circuit provided in an embodiment of this application.

[0091] like Figure 3 As shown, this application embodiment provides a pixel circuit 11, which includes a driving circuit 111, a control circuit 112, a first light-emitting device 113, and a second light-emitting device 114.

[0092] The driving circuit 111 is used to receive data signals and provide a driving voltage to the first node N1. The specific structure of the driving circuit 111 is not limited in the embodiments of this application; the driving circuit 111 can be any structure of a driving circuit 111 in the related art. For example, the driving circuit 111 can be... Figure 2A and Figure 2B The schematic diagram shows the driving circuit 111 of an 8T1C transistor. Alternatively, the driving circuit 111 can also be a 6T1C, 7T1C, 9T2C, or 9T3C structure commonly used in the art. "T" stands for transistor, and "C" stands for storage capacitor.

[0093] The first light-emitting device 113 is coupled between the first node N1 and the first voltage terminal V1, and the second light-emitting device 114 is coupled between the second node N2 and the first voltage terminal V1. For example, the first voltage terminal V1 can be the negative power supply voltage terminal of the display panel 10. Alternatively, the first voltage terminal V1 can be the reference ground voltage terminal.

[0094] The control circuit 112 is coupled between the first node N1 and the second node N2. The control circuit 112 also includes a first terminal K. The control circuit 112 is used to control the conduction or cutoff between the first node N1 and the second node N2 according to the signal of the first terminal K. For example, the control circuit 112 is used to control the conduction or cutoff between the first node N1 and the second node N2 according to the voltage difference between the first terminal K and the first node N1.

[0095] For example, the first terminal K is used to receive a first control voltage. The control circuit 112 is used to control the conduction between the first node N1 and the second node N2 under the control of the first control voltage, transmitting the driving voltage of the first node N1 to the second node N2, and controlling the second light-emitting device 114 to emit light. For example, the control circuit 112 is used to control the conduction between the first node N1 and the second node N2 based on the difference between the first control voltage received at the first terminal K and the driving voltage of the first node N1. At this time, both the first light-emitting device 113 and the second light-emitting device 114 in the pixel circuit 11 emit light.

[0096] Alternatively, for example, the first terminal K is used to receive a second control voltage. The control circuit 112 is used to control the first node N1 and the second node N2 to be cut off under the control of the second control voltage, so that the driving voltage of the first node N1 cannot be transmitted to the second node N2, and the second light-emitting device 114 stops emitting light. For example, the control circuit 112 is used to control the first node N1 and the second node N2 to be cut off based on the difference between the second control voltage received at the first terminal K and the driving voltage of the first node N1. At this time, the first light-emitting device 113 in the pixel circuit 11 emits light, and the second light-emitting device 114 does not emit light.

[0097] Alternatively, the control circuit 112 is used to control whether the second light-emitting device 114 emits light. When the second light-emitting device 114 emits light, the driving voltage is used to drive the first light-emitting device 113 and the second light-emitting device 114 to emit light together.

[0098] The actual aperture area of ​​the light-emitting device is the sum of the aperture areas of the first and second light-emitting devices. Since the driving voltage received per unit area of ​​the light-emitting device is equal to the driving voltage of the first node N1 divided by the actual aperture area of ​​the light-emitting device, in pixel circuit 11, when the actual aperture area of ​​the light-emitting device is large, the driving voltage received per unit area of ​​the light-emitting device will be relatively small. The actual aperture area can be understood, for example, as the effective light-emitting area of ​​the light-emitting device, and is related to the aperture ratio of the sub-pixel where the light-emitting device is located.

[0099] When the second light-emitting device 114 is not emitting light, the driving voltage is only used to drive the first light-emitting device 113 to emit light. The actual opening area of ​​the light-emitting device is the opening area of ​​the first light-emitting device. When the actual opening area of ​​the light-emitting device in the pixel circuit 11 is small, the driving voltage received per unit area of ​​the light-emitting device will be relatively large.

[0100] Because a higher driving voltage results in faster charging of the light-emitting device, the less noticeable the low-brightness ghosting problem becomes. Furthermore, a higher driving voltage leads to more stable transistor operating voltages, making issues such as uneven low-grayscale display, uneven graininess, and low-grayscale ghosting less noticeable. The pixel circuit 11 provided in this embodiment includes a control circuit 112 and a second light-emitting device 114 controlled by the control circuit 112. By controlling whether the second light-emitting device 114 emits light, the control circuit 112 can adjust the charging current of the first light-emitting device 113, giving the pixel circuit 11 the ability to adjust the charging current value. Therefore, at low brightness, to improve the display effect, it is necessary to increase the driving voltage per unit area of ​​the light-emitting device. This can be achieved by turning off the control circuit 112, allowing the driving voltage of the first node N1 to be used only to drive the first light-emitting device 113, thereby increasing the driving voltage per unit area of ​​the first light-emitting device 113 and improving the display effect at low brightness. At high brightness, to ensure sufficient light emission, it is necessary to increase the actual opening area of ​​the light-emitting device. At this time, the first light-emitting device 113 and the second light-emitting device 114 can be controlled to emit light together by controlling the control circuit 112 to ensure the brightness of light emission under high brightness. Therefore, the pixel circuit 11 provided in this application embodiment can improve problems such as low brightness ghosting, uneven low grayscale display, uneven graininess, and low grayscale afterimage without affecting the high brightness display effect.

[0101] In some embodiments, the first light-emitting device 113 and / or the second light-emitting device 114 may be single-layer light-emitting devices.

[0102] Figure 4A This is a schematic diagram of the structure of a light-emitting device provided in an embodiment of this application. Figure 4A The light-emitting device shown is a schematic diagram of a stacked light-emitting device. Figure 4A The structure of the stacked light-emitting device shown is only a schematic diagram and is not limited to the specific structure of the stacked light-emitting device. Figure 4B An equivalent topological diagram of a light-emitting device provided in an embodiment of this application. Figure 4B The light-emitting device shown may include two light-emitting units connected in series.

[0103] In other embodiments, the first light-emitting device 113 and / or the second light-emitting device 114 can be as follows: Figure 4A The stacked light-emitting device shown can be equivalent to a first light-emitting unit and a second light-emitting unit connected in series.

[0104] For example, the first light-emitting device 113 is a stacked light-emitting device, which includes a first electrode layer, a first light-emitting layer, a conductive connection layer, a second light-emitting layer, and a second electrode layer arranged sequentially.

[0105] The first and second light-emitting layers can be used to emit light of the same color. Taking the first light-emitting layer as an example, the first light-emitting layer includes an organic light-emitting layer, and may further include at least one of a hole injection layer, a hole transport layer, an electron blocking layer, an electron transport layer, and an electron injection layer. The organic light-emitting layer in the first and second light-emitting layers can be used to emit light of the same color or to emit light of different colors.

[0106] For example, the first electrode layer serves as the anode of the first light-emitting device 113, and the second electrode layer serves as the cathode. A relatively high potential is applied to the first electrode layer, and a relatively low potential is applied to the second electrode layer. Holes are injected from the first electrode layer into the first light-emitting layer, and electrons are injected from the second electrode layer through the conductive connection layer into the first light-emitting layer. The energy generated after the holes and electrons recombine in the first light-emitting layer can excite it to emit light. Similarly, holes are injected from the first electrode layer through the conductive connection layer into the second light-emitting layer, and electrons are injected from the second electrode layer into the second light-emitting layer. The energy generated after the holes and electrons recombine in the second light-emitting layer can excite it to emit light. Both the second electrode layer and the conductive connection layer are transparent conductive layers. Light of the same color emitted by the first and second light-emitting layers is superimposed and emitted from the second electrode layer side. Of course, the first light-emitting device 113 may include more light-emitting layers, with conductive connection layers disposed between adjacent light-emitting layers. Figure 4A This is just an illustration.

[0107] For example, the second light-emitting device 114 can be as follows: Figure 4A The stacked light-emitting device shown, the second light-emitting device 114 can be equivalent to including a third light-emitting unit and a fourth light-emitting unit connected in series.

[0108] Figure 5A A schematic diagram of another pixel circuit topology provided in an embodiment of this application; Figure 5B This is a schematic diagram of another pixel circuit topology provided in an embodiment of this application.

[0109] In some embodiments, such as Figure 5A As shown, the control circuit 112 includes a first transistor TFT1. The first terminal of the first transistor TFT1 is coupled to a first node N1, and the second terminal of the first transistor TFT1 is coupled to a second node N2. The control terminal of the first transistor TFT1 is used to receive control signals. For example, the control terminal of the first transistor TFT1 is coupled to the first terminal K of the control circuit 112 to receive the aforementioned first control voltage and second control voltage. Alternatively, the control terminal of the first transistor TFT1 serves as the first terminal K of the control circuit 112 to receive the aforementioned first control voltage and second control voltage.

[0110] This application does not limit the control circuit 112 to include the first transistor TFT1. Any circuit that can achieve the same function as the control circuit 112 provided in this application is applicable to this application. For example, the control circuit 112 may also include transistors connected in series and / or in parallel with the first transistor TFT1.

[0111] The first transistor TFT1 can be an N-type transistor or a P-type transistor. Figure 5A This is just an illustration.

[0112] The control signal received by the control electrode of the first transistor TFT1 is Vk. The first voltage terminal is the light-emitting negative power supply voltage terminal ELVSS, and the voltage received by the light-emitting negative power supply voltage terminal ELVSS is the light-emitting negative power supply voltage elvss. The gate-source voltage difference of the first transistor TFT1 is Vgs = Vk - elvss. In a high-brightness scene, |Vgs| > |Vth|, where Vth is the threshold voltage of the first transistor TFT1. At this time, the first transistor TFT1 is turned on, and the first light-emitting device 113 and the second light-emitting device 114 emit light simultaneously. In a low-brightness scene, |Vgs| < |Vth|. At this time, the first transistor TFT1 is turned off, the second light-emitting device 114 does not emit light, and the first light-emitting device 113 emits light.

[0113] The first transistor TFT1 receives a turn-on signal or a turn-off signal through its control electrode, thereby controlling the conduction or cutoff between the first node N1 and the second node N2. The structure is simple and easy to implement.

[0114] For example, the first light-emitting device 113 includes a first light-emitting unit 1131 and a second light-emitting unit 1132 connected in series between the first node N1 and the first voltage terminal. Either the first light-emitting unit 1131 or the second light-emitting unit 1132 can be positioned close to the first node N1. Figure 5A This is for illustrative purposes only. Additionally, Figure 5A The diagram is illustrated using ELVSS as an example, where the first voltage terminal is the negative power supply voltage terminal for light emission.

[0115] For example, the second light-emitting device 114 includes a third light-emitting unit 1141 and a fourth light-emitting unit 1142 connected in series between the second node N2 and the first voltage terminal. Either the third light-emitting unit 1141 or the fourth light-emitting unit 1142 can be positioned close to the second node N2. Figure 5A This is for illustrative purposes only.

[0116] The structure of the stacked light-emitting device in this application is not limited, and it can be any stacked light-emitting device in the related art. For example, the structures of the first light-emitting device 113 and the second light-emitting device 114 can be referred to... Figure 2CThe structure of the light-emitting device 116 shown is such that the first light-emitting device 113 and the second light-emitting device 114 each include a plurality of light-emitting units connected in series. For example, the first light-emitting device 113 and the second light-emitting device 114 are both stacked OLED devices.

[0117] The first light-emitting device 113 may further include a fifth light-emitting unit connected in series with the first light-emitting unit 1131 or the second light-emitting unit 1132, but this embodiment of the application is not limited in this respect. The second light-emitting device 114 may further include a sixth light-emitting unit connected in series with the third light-emitting unit 1141 or the fourth light-emitting unit 1142, but this embodiment of the application is not limited in this respect.

[0118] The pixel circuit provided in this application embodiment can increase the driving voltage per unit area of ​​the first light-emitting device 113 in low-brightness scenes. This increases the driving voltage of the equivalent capacitance of the first light-emitting unit and the equivalent capacitance of the second light-emitting unit. A higher driving voltage results in a smaller difference in the charging time of the two equivalent capacitors, leading to a shorter duration of excessive brightness, thereby improving the problem of display ghosting in low-brightness scenes under the stacked light-emitting device architecture.

[0119] In some embodiments, such as Figure 5A As shown, the driving circuit 111 may include Figure 2A The driving circuit 111 shown.

[0120] In other embodiments, such as Figure 5B As shown, the driving circuit 111 may include Figure 2B The driving circuit 111 shown.

[0121] In some embodiments, the first light-emitting device 113 and the second light-emitting device 114 are used to emit green light. That is, in a sub-pixel (SP) used to emit green light, two light-emitting devices are provided.

[0122] Green light-emitting devices have high luminous efficiency and require low driving voltage, but their display problems are more severe at low brightness. Therefore, setting the green light-emitting subpixels to the structure described above can improve the display effect of the display panel 10 at low brightness.

[0123] In some embodiments, the driving circuit 111 may include a driving transistor. For example, Figure 2A The ninth transistor T9 in the circuit serves as the driving transistor for the driving circuit 111. Or, for example, Figure 2B The third transistor M3 in the circuit serves as the driving transistor for the driving circuit 111.

[0124] For example, the driving transistor is a dual-gate transistor, comprising a first terminal, a second terminal, a bottom gate, and a top gate. For instance, a bottom gate can be introduced into the driving transistor using bottom shield metal (BSM) technology. For example, the bottom gate of the driving transistor receives the positive power supply voltage elvdd within the display area AA, which is provided by the positive power supply voltage terminal ELVDD. Since the bottom gate of the driving transistor receives the positive power supply voltage elvdd, it effectively acts as a shielding layer for the driving transistor.

[0125] Optionally, the display panel may also include a power line coupled to the positive power supply voltage terminal ELVDD, the power line being located in the display area AA of the display panel. The bottom gate of the driving transistor in the pixel circuit 11 is coupled to the power line. The bottom gates of each pixel circuit 11 may be coupled to each other, or they may not be coupled to each other.

[0126] When the positive power supply voltage elvdd in the display area AA is received at the bottom gate, instead of being externally connected to the display area AA, the impedance encountered when the external positive power supply voltage elvdd is transmitted to different pixel circuits 11 can be improved, thereby reducing the interference caused by the sudden change in shielding signal due to impedance imbalance to the display.

[0127] When the pixel circuit 11 provided in the embodiments of this application is applied to the display panel 10 provided in the embodiments of this application, each sub-pixel in the display panel 10 may include the pixel circuit 11, or only some sub-pixels in the display panel 10 may include the pixel circuit 11. For example, only the green sub-pixel may include the pixel circuit 11.

[0128] This application embodiment also provides a driving method for a pixel circuit, wherein the pixel circuit 11 includes any of the pixel circuits described above. The driving method includes:

[0129] In the first image frame:

[0130] During the driving phase, the driving circuit 111 receives data signals and outputs driving voltage to the first node N1.

[0131] During the light-emitting stage, the first terminal K receives the first control voltage, and the control circuit 112 is turned on under the control of the first control voltage. The driving voltage is transmitted to the second node N2 through the control circuit 112, and the driving voltage drives the first light-emitting device 113 and the second light-emitting device 114 to emit light together.

[0132] In the first image frame, during the light emission stage, the first light-emitting device 113 and the second light-emitting device 114 emit light together, resulting in a relatively high brightness. For example, the first image frame can be a high-brightness image frame.

[0133] In the second image frame:

[0134] During the driving phase, the driving circuit 111 receives data signals and outputs driving voltage to the first node N1.

[0135] During the light-emitting stage, the first terminal K receives the second control voltage, the control circuit 112 is turned off under the control of the second control voltage, and the driving voltage drives the first light-emitting device 113 to emit light.

[0136] In the second image frame, only the first light-emitting device 113 emits light during the light-emitting stage, and the light-emitting brightness is relatively small. The second image frame can be, for example, a low-brightness image frame.

[0137] Figure 6A This is a driving timing diagram of a pixel circuit provided in an embodiment of this application.

[0138] In the first possible implementation, in some embodiments, such as Figure 6A As shown, with Figure 5A Taking the pixel circuit 11 shown as an example, the driving stage can be divided into initialization stage t1, reset stage t and threshold compensation stage t2.

[0139] In the first image frame, under high-brightness scenes:

[0140] During initialization phase t1:

[0141] The second scan signal at the second scan signal terminal S2 and the third scan signal at the third scan signal terminal S3 change from low level to high level, and then from high level to low level. Consequently, the fourth transistor T4 and the third transistor T3 change from off to on, and then from on to off. The first scan signal at the first scan signal terminal S1, the fourth scan signal at the fourth scan signal terminal S4, the light emission control signal at the light emission control signal terminal EM, and the control signal at the first terminal K all remain at high level. Therefore, the seventh transistor T7, the eighth transistor T8, the tenth transistor T10, the fifth transistor T5, the sixth transistor T6, and the first transistor TFT1 all remain off.

[0142] During initialization phase t1, transistors T9, T3, and T4 are turned on, enabling voltage control of nodes N4, N6, and N5. Since T3 and T4 act as switches, and node N5 is electrically connected to the control electrode of transistor T9, and node N6 is electrically connected to node N4, initialization phase t1 achieves voltage control of transistors T9, N5, N6, and N4. This ensures that the control electrode voltage of transistor T9, the voltage of node N5, the voltage of node N6, and the voltage of node N4 are the first initialization voltages of the first initialization voltage terminal Vinit1, effectively resetting the voltages of transistor T9, N5, N6, and N4.

[0143] During the reset phase t:

[0144] The first scan signal at the first scan signal terminal S1 changes from high to low and then back to high. Consequently, the seventh transistor T7 and the eighth transistor T8 change from off to on and then back to off. The second scan signal at the second scan signal terminal S2 and the third scan signal at the third scan signal terminal S3 remain at a low level. The fourth scan signal at the fourth scan signal terminal S4, the light emission control signal at the light emission control signal terminal EM, and the control signal at the first terminal K remain at a high level. The third transistor T3, the fourth transistor T4, the tenth transistor T10, the fifth transistor T5, the sixth transistor T6, and the first transistor TFT1 all remain off.

[0145] During the reset phase t, the seventh transistor T7 and the eighth transistor T8 are turned on, realizing the control of the voltage of the sixth node N6 and the anode voltage of the light-emitting device 116. This makes the voltage of the sixth node N6 the third initialization voltage of the third initialization voltage terminal Vinit3, and the voltage of the anode of the light-emitting device 116 the second initialization voltage of the second initialization voltage terminal Vinit2, thus resetting the second terminal voltage of the ninth transistor T9 and the anode voltage of the light-emitting device 116.

[0146] During threshold compensation phase t2:

[0147] The fourth scan signal at the fourth scan signal terminal S4 changes from high to low and then back to high. Consequently, the tenth transistor T10 changes from off to on and then back to off. The third scan signal at the third scan signal terminal S3 changes from low to high and then back to low. Consequently, the third transistor T3 changes from off to on and then back to off. The first scan signal at the first scan signal terminal S1, the light emission control signal at the light emission control signal terminal EM, and the control signal at the first terminal K all remain at high levels, while the second scan signal at the second scan signal terminal S2 remains at a low level. Therefore, the seventh transistor T7, the eighth transistor T8, the fifth transistor T5, the sixth transistor T6, the fourth transistor T4, and the first transistor TFT1 all remain off.

[0148] During the threshold compensation stage t2, the tenth transistor T10, the third transistor T3, and the ninth transistor T9 are turned on, storing the data signal at the data voltage terminal Vd in the storage capacitor Cst, thus completing the data signal writing. This also compensates for the threshold voltage of the ninth transistor T9. The threshold voltage compensation process of the ninth transistor T9 can be considered as the process of the ninth transistor T9 changing from the on state to the off state.

[0149] During the luminescence stage t3:

[0150] The light-emitting control signal at the EM terminal changes from high to low and then back to high. Consequently, the sixth transistor T6 and the fifth transistor T5 change from off to on and then back to off. The control signal at the first terminal K changes from high to low and then back to high, receiving the first control voltage. Consequently, the first transistor TFT1 changes from off to on and then back to off. The second scan signal at the second scan signal terminal S2 and the third scan signal at the third scan signal terminal S3 remain at low levels, while the fourth transistor T4 and the third transistor T3 remain off. The first scan signal at the first scan signal terminal S1 and the fourth scan signal at the fourth scan signal terminal S4 remain at high levels, while the seventh transistor T7, the eighth transistor T8, and the tenth transistor T10 remain off.

[0151] During the light-emitting stage t3, the fifth transistor T5, the ninth transistor T9, the sixth transistor T6, and the first transistor TFT1 are turned on respectively, transmitting driving voltage to the first light-emitting device 113 and the second light-emitting device 114. The first light-emitting device 113 and the second light-emitting device 114 emit light under the drive of the driving voltage.

[0152] When the display panel 10 displays at different brightness levels, the voltages received by each control electrode and data voltage terminal of the pixel circuit 11 in the display panel 10 are dynamically adjusted.

[0153] Figure 6B This is a driving timing diagram for another pixel circuit provided in an embodiment of this application.

[0154] by Figure 5A Taking the pixel circuit 11 shown as an example, as Figure 6B As shown, the driving method may further include, in the second image frame, in a low-brightness scene:

[0155] The initialization phase t1, reset phase t, and threshold compensation phase t2 are driven by the same methods as those in the first image frame, and will not be described again here.

[0156] Emission stage t3:

[0157] The light emission control signal at the EM terminal changes from high to low and then back to high. Consequently, the sixth transistor T6 and the fifth transistor T5 change from off to on and then back to off. The second scan signal at the second scan signal terminal S2 and the third scan signal at the third scan signal terminal S3 remain at low levels, while the fourth transistor T4 and the third transistor T3 remain off. The first scan signal at the first scan signal terminal S1, the fourth scan signal at the fourth scan signal terminal S4, and the control signal at the first terminal K remain at high levels. The first terminal K receives the second control voltage, and the seventh transistor T7, the eighth transistor T8, the tenth transistor T10, and the first transistor TFT1 remain off.

[0158] During the light-emitting stage t3, the fifth transistor T5, the ninth transistor T9, and the sixth transistor T6 are turned on, transmitting driving voltage only to the first light-emitting device 113, which emits light under the drive of the driving voltage.

[0159] By setting a reset phase t after the initialization phase t1, the sixth node N6 can be reset to achieve negative voltage bias (NBS) on the ninth transistor T9, which cancels the positive voltage bias (PBS) on the ninth transistor T9 in the previous frame emission phase t3, thus improving the problem of threshold voltage offset of the ninth transistor T9.

[0160] Figure 6C A driving timing diagram for yet another pixel circuit provided in an embodiment of this application; Figure 6D This is a driving timing diagram for another pixel circuit provided in an embodiment of this application.

[0161] In some embodiments, such as Figure 6C and Figure 6D As shown, after the threshold compensation stage t2 and before the emission stage t3, the driving method may also include executing a reset stage t again.

[0162] The threshold voltage Vth of the ninth transistor T9 is affected by the voltage of the sixth node N6. Data signals written to the sixth node N6 will cause a positive bias in the threshold voltage Vth of the ninth transistor T9. Adding a reset stage t after the threshold compensation stage t2 to reset the sixth node N6 can improve the threshold voltage Vth offset problem, thereby improving the display flickering issue.

[0163] Therefore, by adjusting the timing of the control electrodes of each transistor, the driving voltage received by the first node N1 can be affected. The magnitude and stability of the driving voltage will be impacted.

[0164] Figure 7A This is a driving timing diagram for another pixel circuit provided in an embodiment of this application.

[0165] In the second possible implementation, such as Figure 7A As shown, with Figure 5B Taking the pixel circuit 11 shown as an example, in some embodiments, the driving stage can be divided into an initialization stage t1, a reset stage t, and a threshold compensation stage t2.

[0166] In the first image frame, under high-brightness scenes:

[0167] During initialization phase t1:

[0168] The third scan signal at the third scan signal terminal G3 changes from low to high and then back to low. The second scan signal at the second scan signal terminal G2 changes from high to low and then back to high. Consequently, the ninth transistor M9 and the tenth transistor M10 change from off to on and then back to off. The first scan signal at the first scan signal terminal G1, the fourth scan signal at the fourth scan signal terminal G4, the light emission control signal at the light emission control signal terminal EM, and the control signal at the first terminal K all remain at high levels. Therefore, the seventh transistor M7, the eighth transistor M8, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the second transistor TFT2 all remain off.

[0169] During initialization phase t1, transistors M9, M10, and M3 are turned on, enabling voltage control of nodes N6 and N5. Since transistors M3 and M10 act as switches, and node N5 is electrically connected to the control electrode of transistor M3, initialization phase t1 achieves voltage control of the control electrode of transistor M3, the voltage of node N5, and the voltage of node N6. This ensures that the control electrode voltage of transistor M3, the voltage of node N5, and the voltage of node N6 are the first initialization voltages of the first initialization voltage terminal Vinit1, effectively resetting the voltages of the control electrode of transistor M3, node N5, and node N6.

[0170] During the reset phase t:

[0171] The first scan signal at the first scan signal terminal G1 changes from high to low and then back to high. Consequently, the seventh transistor M7 and the eighth transistor M8 change from off to on and then back to off. The third scan signal at the third scan signal terminal G3 remains low, while the second scan signal at the second scan signal terminal G2, the fourth scan signal at the fourth scan signal terminal G4, the light emission control signal at the light emission control signal terminal EM, and the control signal at the first terminal K all remain high. The ninth transistor M9, the tenth transistor M10, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the second transistor TFT2 all remain off.

[0172] During the reset phase t, the seventh transistor M7 and the eighth transistor M8 are turned on, realizing the control of the voltage of the first node N1 and the voltage of the third node N3, so that the voltage of the third node N3 is the third initialization voltage of the third initialization voltage terminal Vinit3, and the voltage of the fifth node N4 is the second initialization voltage of the second initialization voltage terminal Vinit2, thereby realizing the reset of the second electrode of the third transistor M3 and the anode voltage of the first light-emitting device 113.

[0173] During threshold compensation phase t2:

[0174] The fourth scan signal at the fourth scan signal terminal G4 changes from high to low and then back to high. Consequently, the fourth transistor M4 changes from off to on and then back to off. The third scan signal at the third scan signal terminal G3 changes from low to high and then back to low. Consequently, the tenth transistor M10 changes from off to on and then back to off. The first scan signal at the first scan signal terminal G1, the second scan signal at the second scan signal terminal G2, the light emission control signal at the light emission control signal terminal EM, and the control signal at the first terminal K all remain at high levels. Therefore, the seventh transistor M7, the eighth transistor M8, the fifth transistor M5, the sixth transistor M6, the ninth transistor M9, and the second transistor TFT2 all remain off.

[0175] During the threshold compensation stage t2, the fourth transistor M4, the ninth transistor M9, and the tenth transistor M10 are turned on, storing the data signal at the data voltage terminal Vd in the storage capacitor Cst, thus completing the data signal writing. This also compensates for the threshold voltage of the third transistor M3. The threshold voltage compensation process of the third transistor M3 can be considered as the process of the third transistor M3 changing from the on state to the off state.

[0176] During the luminescence stage t3:

[0177] The light-emitting control signal at the EM terminal changes from high to low and then back to high. Consequently, the sixth transistor M6 and the fifth transistor M5 change from off to on and then back to off. The control signal at the first terminal K changes from high to low and then back to high. Consequently, the second transistor TFT2 changes from off to on and then back to off. The third scan signal at the third scan signal terminal G3 remains low, and the tenth transistor M10 remains off. The first scan signal at the first scan signal terminal G1, the second scan signal at the second scan signal terminal G2, and the fourth scan signal at the fourth scan signal terminal G4 remain high, while the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the fourth transistor M4 remain off.

[0178] During the light-emitting stage t3, the fifth transistor M5, the third transistor M3, the sixth transistor M6, the ninth transistor M9, and the second transistor TFT2 are turned on respectively, transmitting driving voltage to the first light-emitting device 113 and the second light-emitting device 114. The first light-emitting device 113 and the second light-emitting device 114 emit light under the drive of the driving voltage.

[0179] When the display panel 10 displays at different brightness levels, the voltages received by each control electrode and data voltage terminal of the pixel circuit 11 in the display panel 10 are dynamically adjusted.

[0180] Figure 7B This is a driving timing diagram for another pixel circuit provided in an embodiment of this application.

[0181] by Figure 5B Taking the pixel circuit 11 shown as an example, as Figure 7B As shown, the driving method may further include, in the second image frame, in a low-brightness scene:

[0182] The initialization phase t1, reset phase t, and threshold compensation phase t2 are driven by the same methods as those in the first image frame, and will not be described again here.

[0183] Emission stage t3:

[0184] The light-emitting control signal at the EM terminal changes from high to low and then back to high. Consequently, the sixth transistor M6 and the fifth transistor M5 change from off to on and then back to off. The control signal at the first terminal K remains low, and the second transistor TFT2 remains off. The third scan signal at the third scan signal terminal G3 remains low, and the tenth transistor M10 remains off. The first scan signal at the first scan signal terminal G1, the second scan signal at the second scan signal terminal G2, and the fourth scan signal at the fourth scan signal terminal G4 remain high, while the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the fourth transistor M4 all remain off.

[0185] During the light-emitting stage t3, the fifth transistor M5, the third transistor M3, and the sixth transistor M6 are turned on, while the ninth transistor TFT9 is turned off. Only the driving voltage is transmitted to the first light-emitting device 113, which emits light under the drive of the driving voltage.

[0186] By setting a reset phase t after the initialization phase t1, the sixth node N6 can be reset to achieve negative voltage bias (NBS) on the third transistor M3, which cancels the positive voltage bias (PBS) on the third transistor M3 in the previous frame emission phase t3, thus improving the problem of threshold voltage offset of the third transistor M3.

[0187] Figure 7C A driving timing diagram for yet another pixel circuit provided in an embodiment of this application; Figure 7D This is a driving timing diagram for another pixel circuit provided in an embodiment of this application.

[0188] In some embodiments, such as Figure 7C and Figure 7D As shown, after the threshold compensation stage t2 and before the emission stage t3, the driving method may also include executing a reset stage t again.

[0189] The threshold voltage Vth of the third transistor M3 is affected by the voltage of the sixth node N6. Writing data signals to the sixth node N6 causes a positive bias in the threshold voltage Vth of the third transistor M3. Adding a reset stage t after the threshold compensation stage t2 to reset the sixth node N6 can improve the threshold voltage Vth offset problem, thereby reducing the display flickering issue.

[0190] Therefore, by adjusting the timing of the control electrodes of each transistor, the driving voltage received by the first node N1 can be affected. The magnitude and stability of the driving voltage will be impacted.

[0191] This application embodiment also provides a display driver integrated circuit 20, which is used to drive the display panel 10 provided in this application embodiment. The structure of at least a portion of the pixel circuits in the display panel 10 includes the pixel circuit 11 provided in this application embodiment.

[0192] For example, the display driver integrated circuit 20 is used to receive a first instruction characterizing a first luminous intensity, such as during the luminous phase t3 of the first image frame, and to send a first start signal, which is used to control the control circuit 112 to turn on.

[0193] The display driver integrated circuit 20 is also used to receive a second instruction characterizing the second luminous intensity, for example, during the luminous phase t3 of the second image frame, to send a second start signal, which is used to control the control circuit 112 to turn off.

[0194] When the first light-emitting brightness is greater than the second light-emitting brightness, in a high-brightness scenario, the display driver integrated circuit 20 is used to drive the control circuit of the pixel circuit 11 in the display panel 10 to conduct, controlling the first light-emitting device 113 and the second light-emitting device 114 to emit light together. In a low-brightness scenario, the display driver integrated circuit 20 is used to drive the control circuit of the pixel circuit 11 in the display panel 10 to turn off, controlling only the first light-emitting device 113 to emit light.

[0195] For example, the first luminous brightness is greater than the preset brightness, and the second luminous brightness is less than or equal to the preset brightness. The preset brightness is the critical dividing value between low brightness and high brightness. In the embodiments of this application, the value of the preset brightness is not limited.

[0196] In one possible example, the preset brightness value can range from 5 nits to 20 nits. For example, the preset brightness can be 5 nits, 10 nits, 12 nits, or 20 nits. A reasonable preset brightness value can reduce power consumption while improving the display effect at low brightness levels.

[0197] For example, the first start signal and the second start signal are high-level and low-level signals, respectively. For instance, the first start signal is high-level and the second start signal is low-level. Or, for instance, the first start signal is low-level and the second start signal is high-level.

[0198] In this embodiment, low-level signals and high-level signals are relative terms. A low-level signal is a lower value than a high-level signal, and a high-level signal is a higher value than a low-level signal. It is not limited to signals below a certain setting being considered low-level or signals above a certain setting being considered high-level.

[0199] by Figure 5A Taking the pixel circuit 11 shown as an example, in some embodiments, the display driver integrated circuit 20 is also used to output a start signal that matches the first scan signal terminal S1, the second scan signal terminal S2, the third scan signal terminal S3, the fourth scan signal terminal S4, and the light emission control signal terminal EM signal during the light emission stage t3 of the first image frame.

[0200] In some embodiments, the display driver integrated circuit 20 is further configured to output a start signal that matches the first scan signal terminal S1, the second scan signal terminal S2, the third scan signal terminal S3, the fourth scan signal terminal S4, the light emission control signal terminal EM, and the first terminal K signal during the driving phase of the first image frame.

[0201] Similarly, the display driver integrated circuit 20 is also used to output a start signal that matches the first scan signal terminal S1, the second scan signal terminal S2, the third scan signal terminal S3, the fourth scan signal terminal S4, the light emission control signal terminal EM, and the first terminal K signal at each stage of the second image frame.

[0202] For example, after receiving the first instruction, the display driver integrated circuit 20 is also used to send a first light emission control start signal. The first light emission control start signal serves as the start signal of the light emission control signal terminal EM and is used to control whether the driver circuit 111 transmits a driving voltage to the first node N1.

[0203] After receiving the second instruction, the display driver integrated circuit 20 is also used to send a second light emission control start signal. The second light emission control start signal is still the start signal of the light emission control signal terminal EM, used to control whether the driver circuit 111 transmits the driving voltage to the first node N1.

[0204] If the duty cycle of the first light-emitting control start signal is greater than that of the second light-emitting control start signal, then under the control of the first light-emitting control start signal, the duration for which the driving circuit 111 transmits the driving voltage to the first node N1 is longer, resulting in higher brightness for the first light-emitting device 113 and the second light-emitting device 114. Conversely, under the control of the second light-emitting control start signal, the duration for which the driving circuit 111 transmits the driving voltage to the first node N1 is shorter, resulting in lower brightness for the first light-emitting device 113 and the second light-emitting device 114.

[0205] For example, after receiving the first instruction, the display driver integrated circuit 20 is also used to send a first data signal, which is used to control the display panel to display the first image.

[0206] After receiving the second instruction, the display driver integrated circuit 20 is also used to send a second data signal, which is used to control the display panel to display a second image.

[0207] Under the control of the first light emission control start signal and the first data signal, the display panel 10 displays a first image. Under the control of the second light emission control start signal and the second data signal, the display panel 10 displays a second image. The brightness of the first image is the first light emission brightness, and the brightness of the second image is the second light emission brightness, wherein the first light emission brightness is greater than the second light emission brightness.

[0208] This application also provides a display driving method for driving an electronic device, the electronic device including the above-described display driving integrated circuit 20 and display panel 10.

[0209] Display driver methods include:

[0210] The display driver integrated circuit 20 receives a first instruction characterizing the first luminous intensity and sends the aforementioned first start signal to the display panel 10. The control circuit 112 is turned on under the control of the first start signal.

[0211] For example, after the control circuit 112 is turned on under the control of the first start signal, it controls the second light-emitting device 114 to emit light, and the first light-emitting device 113 emits light under the control of the first node N1.

[0212] For example, after receiving the first instruction, the display driver integrated circuit 20 is also used to send a first light emission control start signal to the display panel 10, and the display panel 10 displays a first image under the control of the first light emission control start signal.

[0213] At this time, the brightness of the first image displayed on the display panel 10 in the first image frame is the first luminous brightness.

[0214] The display driver integrated circuit 20 receives a second instruction representing a second luminous intensity and sends the aforementioned second start signal to the display panel 10. The control circuit 112 is turned off under the control of the second start signal.

[0215] For example, after the control circuit 112 is turned off under the control of the second start signal, it controls the second light-emitting device 114 to not emit light, and only the first light-emitting device 113 emits light under the control of the first node N1.

[0216] For example, after receiving the second instruction, the display driver integrated circuit 20 is also used to send a second light emission control start signal to the display panel 10, and the display panel 10 displays the first image under the control of the second light emission control start signal.

[0217] At this time, the brightness of the second image displayed on the display panel 10 in the second image frame is the second luminous brightness.

[0218] The duty cycle of the first light emission control start signal is greater than the duty cycle of the second light emission control start signal, and the first light emission brightness of the first screen is greater than the second light emission brightness of the second screen.

[0219] For example, the first and second instructions can be provided, for instance, by the drive controller 30 in the electronic device 1. In one possible example, the user or the CPU adjusts the brightness of the electronic device 1, and the drive controller 30 determines the brightness requirement based on the touch position.

[0220] For example, when the brightness requirement exceeds the preset brightness, the drive controller 30 sends a first instruction to the display driver integrated circuit 20. The display driver integrated circuit 20 receives the first instruction and sends a first start signal to the display panel 10.

[0221] When the brightness requirement is less than or equal to the preset brightness, the drive controller 30 sends a second instruction to the display driver integrated circuit 20. The display driver integrated circuit 20 receives the second instruction and sends a second start signal to the display panel 10.

[0222] Figure 8 This is a schematic diagram of another pixel circuit architecture provided in an embodiment of this application.

[0223] In other embodiments, such as Figure 8 As shown, the first terminal K of the control circuit 112 is coupled to the second node N2. The control circuit 112 is used to control the conduction or cutoff between the first node N1 and the second node N2 based on the voltage difference between the first node N1 and the second node N2. For example, when the first terminal K is coupled to the second node N2, the signal received by the first terminal K is the voltage of the first voltage terminal V1, which remains unchanged.

[0224] Therefore, the conduction of the control circuit 112 can be controlled based on the magnitude of the driving voltage received by the first node N1. No external signal is required, simplifying the structure of the display panel 10.

[0225] For example, when the driving voltage received by the first node N1 is greater than or equal to a set value, the control circuit 112 is directly turned on. When the driving voltage received by the first node N1 is less than the set value, the control circuit 112 is directly turned off. Therefore, in a high-brightness scenario, the driving voltage received by the first node N1 is relatively large, the control circuit 112 is turned on, and the first light-emitting device 113 and the second light-emitting device 114 emit light together. In a low-brightness scenario, the driving voltage received by the first node N1 is relatively small, the control circuit 112 is turned off, and only the first light-emitting device 113 emits light.

[0226] Figure 9A A schematic diagram of another pixel circuit topology provided in an embodiment of this application; Figure 9B This is a schematic diagram of another pixel circuit topology provided in an embodiment of this application.

[0227] In some embodiments, such as Figure 9A and Figure 9B As shown, the control circuit 112 includes a second transistor TFT2. The first terminal of the second transistor TFT2 is coupled to the first node N1, the second terminal of the second transistor TFT2 is coupled to the second node N2, and the control terminal of the second transistor TFT2 is coupled to the second node N2. The control terminal of the second transistor TFT2 can be, for example, the first terminal K of the control circuit 112, or the control terminal of the second transistor TFT2 can be coupled to the first terminal K of the control circuit 112.

[0228] This application does not limit the control circuit 112 to include the second transistor TFT2. Any circuit that can achieve the same function as the control circuit 112 provided in this application is applicable to this application. For example, the control circuit 112 may also include transistors connected in series and / or in parallel with the second transistor TFT2.

[0229] The second transistor TFT2 can be an N-type transistor or a P-type transistor. Figure 9A This is just an illustration.

[0230] The control electrode of the second transistor TFT2 is coupled to the second node N2. The driving voltage received by the first node N1 is transmitted to the second node N2 via the second transistor TFT2. In high-brightness scenarios, the driving voltage is large, the voltage received by the first node N1 is large, and the voltage difference between the first node N1 and the second node N2 is large. Therefore, |Vgs| is greater than |Vth|, where Vgs is the gate-source voltage difference of the second transistor TFT2 and Vth is the threshold voltage of the second transistor TFT2. The second transistor TFT2 remains on, and the first light-emitting device 113 and the second light-emitting device 114 emit light simultaneously. In low-brightness scenarios, the driving voltage is small, the voltage received by the first node N1 is small, and the voltage difference between the first node N1 and the second node N2 is small. |Vgs| is less than |Vth|. At this time, the second transistor TFT2 is off, the second light-emitting device 114 does not emit light, and the first light-emitting device 113 emits light.

[0231] The control electrode of the second transistor TFT2 is coupled to the second node N2. Utilizing the switching characteristics of the transistor and the difference in driving voltage at high and low brightness levels, the absolute value of the gate-source voltage difference of the second transistor TFT2 is less than the absolute value of the threshold voltage at low brightness, thus controlling the second transistor TFT2 to be turned off. At high brightness, the absolute value of the gate-source voltage difference of the second transistor TFT2 is greater than the absolute value of the threshold voltage, thus controlling the second transistor TFT2 to be turned on. The structure is simple and easy to implement.

[0232] In some embodiments, such as Figure 9A As shown, the driving circuit 111 may include Figure 2A The driving circuit 111 shown.

[0233] In other embodiments, such as Figure 9B As shown, the driving circuit 111 may include Figure 2B The driving circuit 111 shown.

[0234] This application also provides a method for driving a pixel circuit. In some embodiments, using... Figure 7A Taking the pixel circuit 11 shown as an example, the driving stage can still be divided into an initialization stage t1, a reset stage t, and a threshold compensation stage t2. The difference from the above driving method is that in each stage of the pixel circuit 11 driving process, the first terminal K does not need an external signal, but is coupled to the second node N2 and controlled by the signal of the second node N2.

[0235] In an image frame, except for the first terminal K, which does not require an external signal but is coupled to the second node N2, the signals received by the first scan signal terminal S1, the second scan signal terminal S2, the third scan signal terminal S3, the fourth scan signal terminal S4, and the light emission control signal terminal EM in the remaining stages are the same as described above. Figure 6A and Figure 6BThe signals received by the first scanning signal terminal S1, the second scanning signal terminal S2, the third scanning signal terminal S3, the fourth scanning signal terminal S4, and the light emission control signal terminal EM are the same.

[0236] In the first image frame of a high-brightness scene, the first terminal K controls the control circuit 112 to turn on based on the large driving voltage of the first node N1 and the potential of the second node N2. The driving voltage drives the first light-emitting device 113 and the second light-emitting device 114 to emit light together.

[0237] In the second image frame under low brightness scene, the first terminal K controls the control circuit 112 to be cut off based on the small driving voltage of the first node N1 and the potential of the second node N2, and the driving voltage only drives the first light-emitting device 113 to emit light.

[0238] In other embodiments, with Figure 7B Taking the pixel circuit 11 shown as an example, the driving stage can still be divided into an initialization stage t1, a reset stage t, and a threshold compensation stage t2. The difference from the above driving method is that in each stage of the pixel circuit 11 driving process, the first terminal K does not need an external signal, but is coupled to the second node N2 and controlled by the signal of the second node N2.

[0239] In an image frame, except for the first terminal K, which does not require an external signal but is coupled to the second node N2, the signals received by the first scan signal terminal G1, the second scan signal terminal G2, the third scan signal terminal G3, the fourth scan signal terminal G4, and the light emission control signal terminal EM in the remaining stages are the same as described above. Figure 7A and Figure 7B The signals received by the first scan signal terminal G1, the second scan signal terminal G2, the third scan signal terminal G3, the fourth scan signal terminal G4, and the light emission control signal terminal EM are the same.

[0240] In the first image frame of a high-brightness scene, the first terminal K controls the control circuit 112 to turn on based on the large driving voltage of the first node N1 and the potential of the second node N2. The driving voltage drives the first light-emitting device 113 and the second light-emitting device 114 to emit light together.

[0241] In the second image frame under low brightness scene, the first terminal K controls the control circuit 112 to be cut off based on the small driving voltage of the first node N1 and the potential of the second node N2, and the driving voltage only drives the first light-emitting device 113 to emit light.

[0242] In this architecture, for example, a display driver integrated circuit 20 from related technologies can be used to provide driving signals to the display panel 10, thereby driving the electronic device using a corresponding display driving method.

[0243] Figure 10This is a schematic diagram of the pixel layout of a display panel provided in an embodiment of this application.

[0244] This application embodiment also provides a display panel 10, such as Figure 10 As shown, the display panel includes components disposed on a substrate ( Figure 10 The first pixel circuit 101 (not shown in the diagram) includes any of the pixel circuits 11 described above in the embodiments of this application. For example, the first pixel circuit 101 may include the aforementioned... Figure 3 , Figure 5A , Figure 5B , Figure 8 , Figure 9A or Figure 9B The pixel circuit 11 shown.

[0245] The display panel may also include a second pixel circuit 102 disposed on a substrate. The first pixel circuit 101 and the second pixel circuit 102 may be arranged in any pixel layout according to the related art. Figure 10 The image is for illustrative purposes only and is not intended to be limiting.

[0246] In some embodiments, the second pixel circuit 102 may also include any of the pixel circuits 11 described above in the embodiments of this application.

[0247] In other embodiments, the second pixel circuit 102 can be any pixel circuit in the related art. For example, the second pixel circuit 102 may include the one described above. Figure 2A or Figure 2B The pixel circuit 11 shown.

[0248] The structure and driving method of the second pixel circuit 102 can be the same as those in related technologies, and will not be described again in the embodiments of this application.

[0249] Figures 11A-11C Schematic diagram of pixel layout for some other display panels provided in embodiments of this application.

[0250] In some embodiments, such as Figure 11A As shown, the green subpixel G includes a first pixel circuit 101, and the red subpixel R and the blue subpixel B include a second pixel circuit 102.

[0251] For example, a pixel area of ​​a display panel includes one red subpixel R, four blue subpixels B, and four green subpixels G. The red subpixel R is located in the center, the four blue subpixels B are located at the four opposite corners of the red subpixel R, and a green subpixel G is placed between adjacent blue subpixels B. The red subpixel R, four blue subpixels B, and four green subpixels G can be arranged, for example, in a diamond shape. Alternatively, it can be understood that the four blue subpixels B are arranged at the four corners of a diamond, with green subpixels G placed between adjacent blue subpixels B, and the red subpixel R is located in the center of the diamond.

[0252] like Figures 11A-11C As shown, when the pixel circuit 11 is applied to the display panel, the present application embodiment does not limit the positional relationship between the first light-emitting device 113 and the second light-emitting device 114 in the pixel circuit 11 and the red sub-pixel R.

[0253] For example, such as Figure 11A As shown, the display panel has a red subpixel R, and the multiple light-emitting devices surrounding the red subpixel R for emitting green light are all first light-emitting devices 113. That is, they are all light-emitting devices coupled to the first node N1 in the pixel circuit 11. Therefore, when only one light-emitting device in the green subpixel is emitting light, it is the light-emitting device that is relatively far away from the red subpixel R that is emitting light.

[0254] Or, for example, such as Figure 11B As shown, the display panel has a red subpixel R, and the multiple light-emitting devices surrounding the red subpixel R for emitting green light are all second light-emitting devices 114. That is, they are all light-emitting devices coupled to the second node N2 in the pixel circuit 11. Therefore, when only one light-emitting device in the green subpixel is emitting light, it is the light-emitting device relatively close to the red subpixel R that is emitting light.

[0255] Or, for example, such as Figure 11C As shown, the display panel has a red subpixel R. Around the red subpixel R, there are multiple light-emitting devices for emitting green light, some of which are first light-emitting devices 113, and some are second light-emitting devices 114. Therefore, when only one light-emitting device in a green subpixel is emitting light, in some green subpixels, the light-emitting device is relatively far from the red subpixel R, and in some green subpixels, the light-emitting device is relatively close to the red subpixel R.

[0256] In some embodiments, when the green subpixel G in the display panel includes the pixel circuit 11 described above in the embodiments of this application, compared to the green subpixel G in the display panel including conventional pixel circuits in the art, the aperture ratio of the red subpixel R can be relatively reduced. Alternatively, it can be understood that the area of ​​the red subpixel R can be reduced.

[0257] Under the same luminous intensity, the driving voltage transmitted from the driving circuit 111 to the first node N1 is fixed. Reducing the area of ​​the red subpixel R can increase the current density of the red subpixel R. Alternatively, it can be understood as increasing the driving voltage per unit area of ​​the light-emitting device in the red subpixel R, thereby reducing the power consumption of the red subpixel R and increasing its lifetime.

[0258] In some embodiments, by setting two light-emitting devices in the green subpixel G, the total aperture ratio of the green subpixel G can remain unchanged. Alternatively, by setting two light-emitting devices in the green subpixel G, the total aperture ratio of the green subpixel G can also be reduced.

[0259] Figure 12 This is a schematic diagram of a green subpixel structure provided in an embodiment of this application.

[0260] like Figure 12 As shown, in related technologies, the driving circuit 111 drives a light-emitting device 116 for emitting green light. However, in this embodiment, the driving circuit 111 drives two light-emitting devices, a first light-emitting device 113 and a second light-emitting device 114, for emitting green light. The opening of a green subpixel can be divided into two by changing the layout of the light-emitting devices and the layout of the pixel definition layer (PDL). For example, the light-emitting device 116 can be divided into two by changing the layout of the anode in the light-emitting device. Similarly, the layout of the light-emitting device and the pixel definition layer can be changed by changing the opening layout of the mask.

[0261] In some embodiments, the display panel 10 may further include a gate driving circuit GOA, the architecture of which may be, for example, the one described above. Figure 2D The gate drive circuit GOA shown has the same architecture. The first terminal K of the control circuit 112 in the first pixel circuit 101 located in the same row is coupled to the same shift register SR. Alternatively, it can be understood that the control signal of the first terminal K of the control circuit 112 is provided by the gate drive circuit GOA in the display panel 10.

[0262] For example, during the light emission phase t3 of the first image frame, the gate drive circuit GOA receives a first start signal and provides the aforementioned first control voltage to the first pixel circuit 101. During the light emission phase t3 of the second image frame, the gate drive circuit GOA receives a second start signal and provides the aforementioned second control voltage to the first pixel circuit 101.

[0263] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A pixel circuit, characterized in that, The pixel circuit includes: The driving circuit is used to receive data signals and provide driving voltage to the first node; The first light-emitting device is coupled between the first node and the first voltage terminal; The second light-emitting device is coupled between the second node and the first voltage terminal; A control circuit is coupled between the first node and the second node; the control circuit also includes a first terminal, which is used to control the conduction or cutoff between the first node and the second node according to the voltage difference between the first terminal and the first node.

2. The pixel circuit according to claim 1, characterized in that, The first terminal is used to receive the first control voltage; The control circuit is used to control the conduction between the first node and the second node according to the difference between the first control voltage and the driving voltage, transmit the driving voltage of the first node to the second node, and control the second light-emitting device to emit light.

3. The pixel circuit according to claim 1, characterized in that, The first terminal is used to receive the second control voltage; The control circuit is used to control the first node and the second node to cut off based on the difference between the second control voltage and the driving voltage, thereby controlling the second light-emitting device to stop emitting light.

4. The pixel circuit according to any one of claims 1-3, characterized in that, The control circuit includes a first transistor; The first terminal of the first transistor is coupled to the first node, the second terminal of the first transistor is coupled to the second node, and the control terminal of the first transistor is coupled to the first terminal.

5. The pixel circuit according to claim 1, characterized in that, The first end is coupled to the second node; The control circuit is used to control the conduction or cutoff between the first node and the second node based on the pressure difference between the first node and the second node.

6. The pixel circuit according to claim 5, characterized in that, The control circuit includes a second transistor; The first terminal of the second transistor is coupled to the first node, the second terminal of the second transistor is coupled to the second node, and the control terminal of the second transistor is coupled to the second node.

7. The pixel circuit according to any one of claims 1-6, characterized in that, The first light-emitting device includes a first light-emitting unit and a second light-emitting unit connected in series between the first node and the first voltage terminal; The second light-emitting device includes a third light-emitting unit and a fourth light-emitting unit connected in series between the second node and the first voltage terminal.

8. The pixel circuit according to any one of claims 1-7, characterized in that, The first light-emitting device and the second light-emitting device are used to emit green light.

9. A display panel, characterized in that, The display panel includes a substrate and a pixel circuit as described in any one of claims 1-8; the pixel circuit is disposed on the substrate.

10. The display panel according to claim 9, characterized in that, The display panel also includes a gate driving circuit; The gate drive circuit includes cascaded multi-stage shift registers, and the first terminal of the control circuit in the pixel circuit located in the same row is coupled to the same shift register.

11. A display driver integrated circuit, characterized in that, The display driver integrated circuit is used to drive the display panel, and the pixel circuit in the display panel includes a control circuit. The display driver integrated circuit is used to receive a first instruction characterizing a first luminous intensity and send a first start signal; the first start signal is used to control the control circuit to be turned on. The display driver integrated circuit is also used to receive a second instruction characterizing a second luminous intensity and send a second start signal, the second start signal being used to control the control circuit to turn off; the first luminous intensity is greater than the second luminous intensity.

12. The display driver integrated circuit according to claim 11, characterized in that, After receiving the first instruction, the display driver integrated circuit is also used to send a first light emission control start signal; After receiving the second instruction, the display driver integrated circuit is also used to send a second light emission control start signal; The duty cycle of the first light emission control start signal is greater than the duty cycle of the second light emission control start signal.

13. The display driver integrated circuit according to claim 11 or 12, characterized in that, The first start signal and the second start signal are high-level signals and low-level signals, respectively.

14. A display module, characterized in that, The display module includes a display driver integrated circuit and a display panel; the display driver integrated circuit is coupled to the display panel; The display panel includes the display panel as described in claim 9 or 10; And / or, The display driver integrated circuit may include the display driver integrated circuit according to any one of claims 11-13.

15. An electronic device, characterized in that, The electronic device includes a drive controller and a display module, wherein the drive controller is coupled to the display module; the display module includes the display module as described in claim 14.

16. A display driving method, characterized in that, For driving electronic devices, the electronic devices include a display driver integrated circuit and a display panel, the pixel circuit in the display panel including a control circuit; The display driver integrated circuit receives a first instruction characterizing a first luminous intensity and sends a first start signal to the display panel; the control circuit is turned on under the control of the first start signal. The display driver integrated circuit receives a second instruction characterizing a second luminous intensity, sends a second start signal to the display panel, and the control circuit is turned off under the control of the second start signal; Wherein, the first luminous intensity is greater than the second luminous intensity.

17. The display driving method according to claim 16, characterized in that, The pixel circuit also includes a first light-emitting device and a second light-emitting device; The display driving method further includes: After the control circuit is turned on under the control of the first start signal, it controls the second light-emitting device to emit light. After the control circuit is turned off under the control of the second start signal, it controls the second light-emitting device to stop emitting light.

18. The display driving method according to claim 16 or 17, characterized in that, After receiving the first instruction, the display driver integrated circuit is further configured to send a first light emission control start signal to the display panel, and the display panel displays a first image under the control of the first light emission control start signal, wherein the brightness of the first image is the first light emission brightness; After receiving the second instruction, the display driver integrated circuit is further configured to send a second light emission control start signal to the display panel, and the display panel displays a second image under the control of the second light emission control start signal, wherein the brightness of the second image is the second light emission brightness; The duty cycle of the first light emission control start signal is greater than the duty cycle of the second light emission control start signal.

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