A phased array antenna wave control method, system, device and medium

Abstract

This application discloses a phased array antenna beam control method, system, device, and medium. The array layout information of the phased array antenna is stored in a FLASH memory chip, followed by parameterized configuration. The parameterized array layout information input module reads and stores the array layout information from the FLASH memory chip. Parameterized frequency and pointing input modules acquire externally input frequency and pointing information in real time, calculating the phase shift value. A parameterized phase shift quantization processing output module converts the phase shift value into a TR control code recognizable by the TR chip according to the configured phase shift quantization bit depth. The TR chip then outputs antenna element control information based on the received TR control code, controlling the beam pointing of the phased array antenna. Through modular parameter configuration and pre-stored layout information in FLASH memory, universal adaptability to different array sizes, operating frequency bands, and TR chips is achieved, improving the reconfigurability and development efficiency of the beam control system.

Description

Technical Field

[0001] This application relates to the field of antenna communication technology, and more specifically, to a phased array antenna wave control method, system, device, and medium. Background Technology

[0002] The basic principle of phased array antenna beam control is to dynamically regulate the direction, shape, and intensity of the electromagnetic beam by precisely adjusting the phase and amplitude of each radiating element in the array. This technology can complete beam scanning without mechanical rotation and has advantages such as fast response speed, flexible beam, and strong anti-interference capability. It is currently widely used in radar detection, satellite communication, electronic countermeasures, 5G / 6G wireless communication, and aerospace. In engineering practice, beam control technology needs to meet the requirements of multi-task parallel processing in complex environments while ensuring pointing accuracy and sidelobe suppression levels.

[0003] With the continuous growth in communication capacity and data rate demands, the operating frequency bands of phased array antennas are constantly expanding to higher frequencies, gradually extending from the early L, S, C, and Ku bands to the Ka band and even the millimeter-wave band, in order to obtain wider bandwidth and higher spatial multiplexing capabilities. To control electromagnetic compatibility risks and avoid harmful interference to neighboring systems, the International Telecommunication Union (ITU) and national radio management agencies have formulated strict operating specifications for phased array applications in different frequency bands. These specifications cover technical indicators such as transmit power, spectrum mask, beam pointing accuracy, and sidelobe level, ensuring that systems can coexist safely and reliably.

[0004] In recent years, the types and structural forms of phased array antennas have become increasingly diversified, evolving from traditional planar arrays to three-dimensional arrays, reconfigurable flexible arrays, and multi-band broadband cooperative arrays, with applications covering multiple fields such as satellite communication, mobile networks, radar detection, and intelligent sensing. However, the dramatic increase in antenna structural complexity and topology has brought significant difficulties to the design and deployment of traditional beamforming algorithms. Whenever a new array structure is introduced, or key parameters such as element arrangement, feeding method, and physical dimensions are adjusted, the original beamforming algorithm often cannot be used directly, requiring re-modeling of beam pointing and recalculation of phase distribution. This process not only consumes a lot of manpower and time but is also prone to introducing deviations due to human error, affecting the system development schedule. More importantly, the lack of a unified algorithm framework leads to poor software compatibility between different antenna models, making it difficult to achieve cross-platform collaborative control and resource sharing, further increasing the burden of research and development and maintenance, and restricting the responsiveness of phased array technology in rapid deployment scenarios. Summary of the Invention

[0005] The purpose of this application is to overcome the shortcomings of existing technologies and provide a phased array antenna wave control method, system, device and medium. Through modular parameter configuration and FLASH pre-stored layout information, it realizes universal adaptation to different array sizes, operating frequency bands and TR chips, and improves the reconfigurability and development efficiency of the wave control system.

[0006] The objective of this application is achieved through the following technical solution: In a first aspect, this application proposes a phased array antenna beam control method, including: Step S1: Store the array layout information of the phased array antenna into the FLASH memory chip; Step S2: Configure the array layout information input module, frequency input module, pointer input module, and phase-shift quantization processing output module with parameters respectively; Step S3: After the system is powered on, the FPGA chip reads and stores the array layout information from the FLASH storage chip through the parameterized array layout information input module; Step S4: Obtain the frequency and pointing information from external inputs in real time through the parameterized frequency input module and pointing input module; Step S5: Calculate the required phase shift value for each antenna element based on the array layout information, frequency information, and pointing information; Step S6: The parameterized phase-shift quantization processing output module converts the phase-shift value into a TR control code recognizable by the TR chip according to the configured phase-shift quantization bit number, so that the TR chip outputs antenna element control information according to the received TR control code to control the beam pointing of the phased array antenna.

[0007] In one possible implementation, the step of parameterizing the array layout information input module, frequency input module, pointer input module, and phase-shift quantization processing output module includes: The number of array elements in the array layout information input module is parameterized. The frequency bit length and step size of the frequency input module are parameterized. The azimuth and pitch stepping of the pointing input module are parameterized. The phase-shift quantization bit depth of the phase-shift quantization output module is parameterized.

[0008] In one possible implementation, the step of storing the array layout information of the phased array antenna to the FLASH memory chip includes: The array layout information is written into the FLASH storage chip via serial communication from the host computer.

[0009] In one possible implementation, the array layout information includes the number of array elements, the array element arrangement, the array element spacing, and the array element coordinates.

[0010] In one possible implementation, the parameterized frequency input module is used for multi-band switching and to configure the operating frequency range and frequency resolution.

[0011] In one possible implementation, the parameterized pointing input module is used to input multi-dimensional angle information and perform step parameterization configuration for the azimuth and elevation angles of the beam pointing.

[0012] In one possible implementation, step S7 is repeated, followed by steps S4-S6, until real-time beam scanning is achieved.

[0013] Secondly, this application proposes a phased array antenna beam control system, comprising: FLASH memory chips are used to store the array layout information of phased array antennas; The FPGA chip includes a phase-shifting calculation module, a parameterized array layout information input module, a frequency input module, a pointer input module, and a phase-shifting quantization processing output module; The parameterized array layout information input module is used to read and store array layout information from the FLASH storage chip after the system is powered on; The parameterized frequency input module is used to acquire frequency information from external inputs in real time. The parameterized pointer input module is used to obtain pointer information from external inputs in real time. The phase shift calculation module is used to calculate the required phase shift value for each antenna element based on the array layout information, frequency information, and pointing information. The parameterized phase-shift quantization processing output module is used to convert the phase-shift value into a TR control code that can be recognized by the TR chip according to the configured phase-shift quantization bit number. The TR chip is used to receive TR control codes and output antenna element control information according to the TR control codes in order to control the beam pointing of the phased array antenna.

[0014] Thirdly, this application also proposes a computer device comprising a processor and a memory, wherein the memory stores a computer program, which is loaded and executed by the processor to implement the phased array antenna beam control method as described in any of the first aspects.

[0015] Fourthly, this application also proposes a computer-readable storage medium storing a computer program that is loaded and executed by a processor to implement the phased array antenna beam control method as described in any of the first aspects.

[0016] The main solution and its various further alternatives described above can be freely combined to form multiple solutions, all of which are solutions that can be adopted and are claimed in this application; furthermore, the (non-conflicting alternatives) can also be freely combined with each other and with other alternatives. Those skilled in the art, after understanding the solution of this application, will realize from the prior art and common general knowledge that there are many combinations, all of which are technical solutions to be protected in this application, and will not be exhaustively listed here.

[0017] This application discloses a phased array antenna beam control method, system, device, and medium. The array layout information of the phased array antenna is stored in a FLASH memory chip for parameterized configuration. An FPGA chip reads and stores the array layout information from the FLASH memory chip through a parameterized array layout information input module. A parameterized frequency input module and a pointing input module acquire externally input frequency and pointing information in real time, calculating the required phase shift value for each antenna element. A parameterized phase shift quantization processing output module converts the phase shift value into a TR control code recognizable by the TR chip according to the configured phase shift quantization bit depth. The TR chip then outputs antenna element control information based on the received TR control code, controlling the beam pointing of the phased array antenna. Through modular parameter configuration and pre-stored layout information in FLASH memory, universal adaptability to different array sizes, operating frequency bands, and TR chips is achieved, improving the reconfigurability and development efficiency of the beam control system. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A schematic flowchart of a phased array antenna beam control method proposed in an embodiment of this application is shown.

[0020] Figure 2 The system architecture and signal flow block diagram of the phased array antenna beam control method are shown.

[0021] Figure 3 This is a flowchart illustrating the implementation of a general-purpose phased array antenna beam control method. Detailed Implementation

[0022] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0023] Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] To efficiently and rationally utilize various communication frequency band resources, comprehensively improve the intelligence level and operational security of phased array antenna systems, and minimize the repetitive development costs and deployment delays of beam control algorithms caused by the diversification of antenna structures, this application proposes a phased array antenna beam control method. This method, based on modular modeling, constructs a configurable antenna beam control module that can automatically adapt to the different physical characteristics of new antenna types and adjust module parameters accordingly to suit the beam control of new antennas. This significantly reduces manual modifications, shortens the algorithm development cycle, and improves system flexibility. This method not only effectively solves the problem of repetitive algorithm development caused by the diversification of antenna configurations but also achieves seamless migration and efficient deployment of beam control algorithms across multiple platforms.

[0025] Please refer to Figure 1 , Figure 1 This paper presents a schematic flowchart of a phased array antenna beam control method according to an embodiment of this application. The method includes: Step S1: Store the array layout information of the phased array antenna into the FLASH memory chip; First, the array layout information of the phased array antenna is pre-stored in a separate FLASH memory chip. The array layout information characterizes the topology and physical layout of the antenna array, including but not limited to the number of array elements, the arrangement of array elements, the spacing between array elements, and the precise coordinate position of each array element in a preset coordinate system.

[0026] The steps of storing the array layout information of the phased array antenna into the FLASH memory chip include: The array layout information is written into the FLASH storage chip via serial communication from the host computer.

[0027] An external host computer is used as the configuration tool. Designers or system integrators establish a communication connection with the FLASH memory chip via a serial communication interface using the host computer software. The serial communication interface can use standard serial communication protocols such as UART, RS232, or RS422. After confirming that the connection is correct, the host computer writes the array distribution parameters generated for the specific antenna model used in the project into the FLASH memory chip according to a predetermined data format. After writing is completed, the memory chip will have the complete layout information of that specific phased array antenna permanently stored.

[0028] It is worth noting that step S1 belongs to the offline configuration stage before the system is powered on. Once written, the layout information in the FLASH memory chip can be automatically read every time the system starts, without needing to reprogram the FPGA hardware logic or software program due to changes in antenna model or array structure. When it is necessary to adapt to an antenna with a different layout, it is only necessary to rewrite the new layout parameters to the FLASH memory chip through the host computer.

[0029] Step S2: Configure the array layout information input module, frequency input module, pointer input module, and phase-shift quantization processing output module with parameters respectively; To achieve universal adaptability of the beam control method to different types of phased array antennas, it is necessary to perform parameterized design on several core functional modules during the FPGA program development stage. Parameterized configuration refers to defining variable parameters in the module as variables that can be flexibly adjusted through external parameters or pre-compiled macros when writing FPGA hardware description language code, rather than using fixed constants.

[0030] The steps for parameterizing the array layout information input module, frequency input module, pointer input module, and phase-shift quantization processing output module include: The number of array elements in the array layout information input module is parameterized. The frequency bit length and step size of the frequency input module are parameterized. The azimuth and pitch stepping of the pointing input module are parameterized. The phase-shift quantization bit depth of the phase-shift quantization output module is parameterized.

[0031] The array layout information input module is responsible for reading the antenna array layout information from the FLASH memory chip after the system powers on and storing it in the FPGA's internal registers or block random access memory for use by the phase shift calculation module. The number of array elements varies significantly between different phased array antenna systems. To enable this module to adapt to arrays of arbitrary size, the array element quantity parameter in the array layout information input module is parameterized. A parameterized constant is defined in the FPGA program, the value of which can be set according to the total number of array elements in the actual antenna. By modifying this parameter value, any array size with 1 to N elements can be matched without redesigning the module's internal logic.

[0032] The frequency input module receives operating frequency information from an external controller. To meet diverse needs, two key parameters of the frequency input module—frequency bit length and frequency step—are parameterized. The frequency bit length parameter defines the number of binary data bits used to represent the frequency value, determining the maximum range and quantization accuracy of the frequency value. The frequency step parameter defines the minimum interval between two adjacent programmable frequency points. Designers can flexibly set these parameter values ​​according to the target antenna's frequency operating range and system resolution requirements.

[0033] The pointing input module receives desired beam pointing information from an external controller, typically expressed as azimuth and elevation angles. The control range of azimuth and elevation angles may vary depending on the antenna installation method and usage scenario. To address this issue, the azimuth and elevation step parameters in the pointing input module are parameterized. Two parameters, AZIMUTH_STEP and ELEVATION_STEP, are defined in the FPGA program to represent the minimum resolvable angles of azimuth and elevation, respectively. Simultaneously, the bit width representing the angle values ​​can be parameterized to determine the maximum range of angle input.

[0034] The phase-shift quantization processing output module converts the theoretical phase-shift value output by the phase-shift calculation module into binary control code that the TR chip can directly parse. To ensure the wavecontrol method is compatible with various TR chips, the phase-shift quantization bit width parameter of the phase-shift quantization processing output module is parameterized. First, a PHASE_QUANTIZATION_BITS parameter is defined in the FPGA program, whose value is equal to the phase-shift control bit width of the selected TR chip. Internally, the module automatically calculates the phase quantization step size based on this parameter and maps the rounded theoretical phase-shift value to a binary control code of the corresponding bit width.

[0035] Step S3: After the system is powered on, the FPGA chip reads and stores the array layout information from the FLASH storage chip through the parameterized array layout information input module; Once the entire wave control system is powered on, the FPGA chip automatically executes its internal initialization process. The parameterized array layout information input module is activated. This module actively accesses the external FLASH memory chip according to a pre-set interface timing sequence, reading the array layout information previously programmed and solidified by the host computer from the chip's designated address area. The read information includes the number of array elements, their arrangement, the spacing between elements, and their precise position coordinates in the coordinate system. After completing the read operation, the FPGA chip temporarily stores this layout information in its on-chip integrated block random access memory or register array for real-time access by the subsequent phase-shifting calculation module during runtime.

[0036] Step S4: Obtain the frequency and pointing information from external inputs in real time through the parameterized frequency input module and pointing input module.

[0037] After the system powers on and the FPGA chip completes the loading and storage of the array layout information, the FPGA chip further receives beam control commands from an external control module. The external control module can be a host computer, main control computer, or embedded controller, and it connects to the FPGA chip via a serial port or other standard communication interface. The external control module dynamically generates operating frequency information and beam pointing information based on current task requirements. The frequency information includes the target operating frequency and possible frequency band selections, and the pointing information includes the azimuth and elevation angles of the desired beam. This information is sent to the FPGA chip in a predetermined data frame format.

[0038] After parameterization, the frequency input module parses and quantizes the received frequency data according to the preset frequency bit length and frequency step, converting it into a frequency control word with an internal unified representation. At the same time, after parameterization, the pointing input module performs dimension conversion and normalization processing on the original angle input value according to the preset azimuth and elevation angle steps, obtaining an angle representation suitable for internal calculations in the subsequent phase shift calculation module.

[0039] The parameterized frequency input module is used for multi-band switching and to configure the operating frequency range and frequency resolution.

[0040] The parameterized frequency input module is designed with configurable variables for the key parameters that determine frequency reception and resolution capabilities—frequency bit length and frequency step. This allows the module to flexibly adapt to the multi-band operating requirements of different communication standards or application scenarios. Specifically, the configurable frequency bit length determines the width of the module's internal data bus and registers, thereby defining the numerical and dynamic range of the operating frequency values ​​that the system can receive, process, and represent. This enables the same hardware platform to support a wide range of frequency points from low to high frequencies. The configurable frequency step defines the minimum adjustment granularity of frequency control, allowing the minimum frequency change increment to be set according to the accuracy requirements of specific applications.

[0041] The parameterized pointing input module is used to input multi-dimensional angle information and perform step parameterized configuration for the azimuth and elevation angles of the beam pointing.

[0042] The parameterized pointing input module supports a complete description of the spatial pointing of the desired beam in both azimuth and elevation dimensions, and the input range and minimum resolution of both angles can be flexibly set through independent parameters. After the raw azimuth and elevation values ​​sent by the external control module in digital form enter the module, the module performs dimension conversion and normalization processing according to preset step parameters, discretizing the continuous angle values ​​into internally unified angle representation words for direct use by the subsequent phase shift calculation module.

[0043] Step S5: Calculate the required phase shift value for each antenna element based on the array layout information, frequency information, and pointing information; The array layout information includes the number of array elements, the arrangement of array elements, the spacing between array elements, and the coordinates of array elements.

[0044] The phase-shift calculation module first calculates the corresponding operating wavelength or wavenumber based on the frequency information. Then, using the spatial coordinates of each element in the array layout information as a reference, and combining the desired beam pointing information, it determines the spatial phase difference when the wavefront arrives at different elements. For planar arrays or arrays with arbitrary geometric configurations, this module typically employs the classic array antenna beamforming principle: calculating the path difference of each element relative to a reference point, and then converting the path difference into a theoretical phase shift value in degrees or radians. Since the number of elements in the array layout information has been parameterized as NUM_ELEMENTS, the phase-shift calculation module iterates through all elements, calculating the corresponding phase shift control data for each channel sequentially. This calculation process is executed at high speed within the FPGA in a pipelined or parallel manner, capable of updating the phase shift value of the entire array within microseconds, thus meeting the requirements of real-time beam scanning and rapid pointing switching. The calculated phase shift value is a high-precision value, the accuracy of which is jointly guaranteed by the parameterized resolution of the frequency input module and the pointing input module, providing accurate raw data for subsequent quantization output.

[0045] Step S6: The parameterized phase-shift quantization processing output module converts the phase-shift value into a TR control code recognizable by the TR chip according to the configured phase-shift quantization bit number, so that the TR chip outputs antenna element control information according to the received TR control code to control the beam pointing of the phased array antenna.

[0046] The parameterized phase-shift quantization output module receives the high-precision phase-shift value generated by the phase-shift calculation module. Based on the pre-configured number of phase-shift quantization bits, this theoretical value undergoes standardized digital quantization processing. This quantization process typically includes algorithms such as normalization, rounding, and mapping. The goal is to discretize the continuous high-precision phase-shift value into a finite set of TR control codes, each corresponding one-to-one with the discrete phase states of the TR chip's phase shifter. By parameterizing this quantization bit depth, this system can flexibly adapt to TR components from different resolutions and manufacturers on the market by simply modifying configuration parameters, without modifying the underlying hardware description language code. This fundamentally solves the compatibility problem of traditional solutions requiring redesign of the driver interface when replacing the TR chip.

[0047] The generated TR control code is transmitted to the TR chip in real time. As the final beam actuator, the TR chip's internal digital control circuit generates antenna element control information with specific phase and amplitude relationships based on the received TR control code.

[0048] Ultimately, each antenna element, driven by its independent element control information, radiates electromagnetic waves with a specific phase and amplitude. The electromagnetic waves radiated by all elements are vector-superimposed in space, and the combined result is a beam with the desired pointing angle and shape.

[0049] The method also includes: Step S7: Repeat steps S4-S6 until real-time beam scanning is achieved.

[0050] In this embodiment, to meet the beam agility requirements of phased array antennas in applications such as radar search, target tracking, and communication link switching, the beam control method is designed to continuously and dynamically update the beam pointing. After the system completes initialization and enters normal operating mode, the FPGA chip repeatedly executes the operation sequence defined in steps S4 to S6 at a preset refresh cycle: that is, it acquires the current frequency and pointing information sent by the external control module in real time, calculates the required phase shift value for each antenna element based on the loaded array layout information and the acquired frequency and pointing information, and then converts the phase shift value into TR control code through the parameterized phase shift quantization processing output module and drives the TR chip to output antenna element control information. Each cycle can update the phase distribution of the entire array according to the latest external instructions, so that the antenna beam points to the desired azimuth and elevation angle in real time.

[0051] Figure 2 The system architecture and signal flow block diagram of the phased array antenna beam control method are shown. As shown in the figure, the system mainly includes a host computer, a FLASH memory chip, an external control module, an FPGA chip, a TR chip, and a phased array antenna. Its workflow is as follows: the host computer writes the array layout information into the FLASH memory chip; during system operation, the FPGA chip reads the layout information from the FLASH memory through its internal parameterized array layout information input module, and simultaneously receives real-time commands from the external control module through the parameterized frequency and pointing input modules; the phase shift calculation module calculates the phase shift information based on the above information, which is then processed into TR control codes by the parameterized phase shift quantization processing output module and sent to the TR chip; finally, the TR chip drives the phased array antenna to generate a beam.

[0052] Figure 3 The flowchart illustrates the implementation of a general-purpose phased array antenna beam control method. First, two initialization deployment steps are executed in parallel: one is to write the antenna array layout information into the FLASH memory chip, and the other is to write the parameterized functional module programs into the FPGA chip. After deployment, the system enters the operation phase: upon power-on, the FPGA chip reads the static array layout information from the FLASH chip and simultaneously receives dynamic frequency and pointing commands from the external control module in real time. Next, the FPGA calculates the phase shift value based on this information and converts it into a TR control code output. Finally, the TR chip drives the phased array antenna to form the desired beam according to this control code.

[0053] Compared with the prior art, the embodiments of this application have the following beneficial effects: First, by integrating core technologies such as parameterized storage of array layout, modular configuration of frequency and pointing interfaces, and customizable processing of phase-shift control parameters, unified support is achieved for phased array antenna systems of different sizes, frequency bands, and TR chip configurations. Thus, a single beam control scheme can be adapted to multiple antenna models, completely solving the compatibility problem of the traditional "one model, one calculation" approach.

[0054] Secondly, based on modular modeling and a configurable architecture, this method can instantly generate beam control schemes based on key information such as the antenna's physical layout, array element distribution, and frequency. This significantly shortens the system debugging cycle and greatly improves R&D efficiency and rapid deployment capabilities.

[0055] Third, by establishing a unified underlying framework for beam control algorithms, this method supports cross-platform and cross-scenario algorithm reuse and collaborative management. This effectively avoids the resource waste and maintenance difficulties caused by repeatedly developing algorithms for different antennas, and significantly reduces the total lifecycle operation and maintenance costs.

[0056] Fourth, while improving compatibility, the system ensures stable and reliable beam pointing accuracy and beamforming performance through precise parametric design. The system maintains excellent beam scanning and pointing control capabilities even in highly dynamic and complex electromagnetic environments.

[0057] Fifth, it significantly lowers the deployment threshold of phased array systems in complex application scenarios, enabling even non-professional users to quickly configure and use them. At the same time, it provides solid technical support for the large-scale and standardized development of phased array technology in future intelligent communications, high-speed mobile platforms, and multi-task collaborative systems.

[0058] The following is a possible implementation of a phased array antenna beam control system, which is used to execute the various execution steps and corresponding technical effects of the phased array antenna beam control method shown in the above embodiments and possible implementations, including: FLASH memory chips are used to store the array layout information of phased array antennas; The FPGA chip includes a phase-shifting calculation module, a parameterized array layout information input module, a frequency input module, a pointer input module, and a phase-shifting quantization processing output module; The parameterized array layout information input module is used to read and store array layout information from the FLASH storage chip after the system is powered on; The parameterized frequency input module is used to acquire frequency information from external inputs in real time. The parameterized pointer input module is used to obtain pointer information from external inputs in real time. The phase shift calculation module is used to calculate the required phase shift value for each antenna element based on the array layout information, frequency information, and pointing information. The parameterized phase-shift quantization processing output module is used to convert the phase-shift value into a TR control code that can be recognized by the TR chip according to the configured phase-shift quantization bit number. The TR chip is used to receive TR control codes and output antenna element control information according to the TR control codes in order to control the beam pointing of the phased array antenna.

[0059] This preferred embodiment provides a computer device that can implement the steps in any embodiment of the phased array antenna beam control method provided in this application. Therefore, it can achieve the beneficial effects of the phased array antenna beam control method provided in this application. For details, please refer to the previous embodiments, which will not be repeated here.

[0060] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by instructions, or by instructions controlling related hardware. These instructions can be stored in a computer-readable storage medium and loaded and executed by a processor. Therefore, embodiments of this application provide a storage medium storing multiple instructions that can be loaded by a processor to execute the steps of any embodiment of the phased array antenna beam control method provided in this application.

[0061] The storage medium may include: read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.

[0062] Since the instructions stored in the storage medium can execute the steps in any of the phased array antenna beam control method embodiments provided in this application, the beneficial effects that any of the phased array antenna beam control methods provided in this application can achieve can be realized. For details, please refer to the previous embodiments, which will not be repeated here.

[0063] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A phased array antenna beam control method, characterized in that, include: Step S1: Store the array layout information of the phased array antenna into the FLASH memory chip; Step S2: Configure the array layout information input module, frequency input module, pointer input module, and phase-shift quantization processing output module with parameters respectively; Step S3: After the system is powered on, the FPGA chip reads and stores the array layout information from the FLASH storage chip through the parameterized array layout information input module; Step S4: Obtain the frequency and pointing information from external inputs in real time through the parameterized frequency input module and pointing input module; Step S5: Calculate the required phase shift value for each antenna element based on the array layout information, frequency information, and pointing information; Step S6: The parameterized phase-shift quantization processing output module converts the phase-shift value into a TR control code recognizable by the TR chip according to the configured phase-shift quantization bit number, so that the TR chip outputs antenna element control information according to the received TR control code to control the beam pointing of the phased array antenna.

2. The phased array antenna beam control method as described in claim 1, characterized in that, Step S2 includes: The number of array elements in the array layout information input module is parameterized. The frequency bit length and step size of the frequency input module are parameterized. The azimuth and pitch stepping of the pointing input module are parameterized. The phase-shift quantization bit depth of the phase-shift quantization output module is parameterized.

3. The phased array antenna beam control method as described in claim 1, characterized in that, Step S1 includes: The array layout information is written into the FLASH storage chip via serial communication from the host computer.

4. The phased array antenna beam control method as described in claim 1, characterized in that, The array layout information includes the number of array elements, the arrangement of array elements, the spacing between array elements, and the coordinates of array elements.

5. The phased array antenna beam control method as described in claim 1, characterized in that, The parameterized frequency input module is used for multi-band switching and to configure the operating frequency range and frequency resolution.

6. The phased array antenna beam control method as described in claim 1, characterized in that, The parameterized pointing input module is used to input multi-dimensional angle information and perform step parameterized configuration for the azimuth and elevation angles of the beam pointing.

7. The phased array antenna beam control method as described in claim 1, characterized in that, The method further includes: Step S7: Repeat steps S4-S6 until real-time beam scanning is achieved.

8. A phased array antenna beam control system, characterized in that, include: FLASH memory chips are used to store the array layout information of phased array antennas; The FPGA chip includes a phase-shifting calculation module, a parameterized array layout information input module, a frequency input module, a pointer input module, and a phase-shifting quantization processing output module; The parameterized array layout information input module is used to read and store array layout information from the FLASH storage chip after the system is powered on; The parameterized frequency input module is used to acquire frequency information from external inputs in real time. The parameterized pointer input module is used to obtain pointer information from external inputs in real time. The phase shift calculation module is used to calculate the required phase shift value for each antenna element based on the array layout information, frequency information, and pointing information. The parameterized phase-shift quantization processing output module is used to convert the phase-shift value into a TR control code that can be recognized by the TR chip according to the configured phase-shift quantization bit number. The TR chip is used to receive TR control codes and output antenna element control information according to the TR control codes in order to control the beam pointing of the phased array antenna.

9. A computer device, characterized in that, The computer device includes a processor and a memory, the memory storing a computer program, which is loaded and executed by the processor to implement the phased array antenna beam control method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The storage medium stores a computer program, which is loaded and executed by a processor to implement the phased array antenna beam control method as described in any one of claims 1-7.

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