Driver circuit, chip and switching power supply

Abstract

This invention provides a driving circuit, a chip, and a switching power supply. The driving circuit includes: a voltage regulator module that generates an operating voltage based on the power supply; a logic control module that generates high-side control signals and low-side control signals; a high-side drive module that receives the high-side control signals and is connected to the power supply to generate high-side drive signals; and a low-side drive module that receives the low-side control signals and is connected to the switching node of the switching power supply to generate low-side drive signals that drive the low-side switching transistor to turn on or off. The high level of the voltage domain containing the low-side drive signals is the voltage of the switching node, and the low level is a voltage lower than a set voltage of the switching node. This invention addresses applications requiring single-event immunity in space environments by implementing control over the turn-on and turn-off of low-side PMOS transistors. It also proposes a dual-PMOS switching power supply circuit, improving the reliability of switching power supply circuits in space environments.

Description

Technical Field

[0001] This invention relates to the field of integrated circuits, and in particular to a driving circuit, a chip, and a switching power supply. Background Technology

[0002] In the power management chip market, switching power supply chips hold the largest market share. Among them, the DC-DC (Direct Current-Direct Current) converter transforms a fixed DC voltage into a variable DC voltage and is an important branch of switching power supplies.

[0003] Existing DC-DC converters utilize the energy storage characteristics of capacitors C and inductors L, and use a drive device to drive switching transistors for high-frequency switching. For example... Figure 1 The diagram shows a DC-DC converter that uses NMOS power transistors as the high-side switch Ma and the low-side switch Mb, exhibiting low on-resistance within the same area. Figure 2 The diagram shows another architecture that uses a PMOS power transistor as the high-side switch Ma and an NMOS transistor as the low-side switch Mb. Both of these architectures use NMOS transistors. In aerospace and other environments, after being subjected to a single-event impact, the parasitic bipolar transistor inside the NMOS transistor exhibits a regenerative feedback mechanism, causing the collector junction current to continuously increase until secondary breakdown damages the device. In comparison, PMOS transistors have stronger resistance to single-event burn-out.

[0004] However, when using PMOS transistors as switching transistors in DC-DC converters, especially when driving the low-side PMOS transistors, traditional driving circuits cannot control the PMOS transistors to turn on and off normally. Therefore, for applications requiring single-event immunity, such as space environments, developing a driving circuit capable of driving the low-side PMOS transistors to operate normally has become one of the urgent problems to be solved by those skilled in the art.

[0005] It should be noted that the above description of the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of the present invention and facilitating understanding by those skilled in the art. It should not be assumed that the above technical solutions are known to those skilled in the art simply because they have been described in the background section of this invention. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a driving circuit, chip, and switching power supply to solve the problem of poor single-event immunity of switching power supplies in the prior art.

[0007] To achieve the above and other related objectives, the present invention provides a driving circuit for driving a switching power supply, wherein the low-side switching transistor of the switching power supply is a PMOS transistor, and the driving circuit includes at least:

[0008] Voltage regulator module, logic control module, high-side driver module and low-side driver module;

[0009] The voltage regulator module is connected to the power supply of the switching power supply and generates an operating voltage based on the power supply.

[0010] The logic control module is connected to the output terminal of the voltage regulator module and is used to generate high-side control signals and low-side control signals.

[0011] The high-side drive module receives the high-side control signal and is connected to the power supply to generate a high-side drive signal.

[0012] The low-side drive module receives the low-side control signal and is connected to the switching node of the switching power supply to generate a low-side drive signal that drives the low-side switch to turn on or off; wherein, the high level of the voltage domain in which the low-side drive signal is located is the voltage of the switching node, and the low level is a voltage lower than the set voltage of the switching node.

[0013] Optionally, the low-side driving module includes a first preset voltage generation unit and a driving unit;

[0014] The first preset voltage generating unit generates a negative voltage and connects to the switching node, generating the preset voltage based on the voltage of the switching node;

[0015] The driving unit receives the low-side control signal and connects to the switch node and the output terminal of the first preset voltage generating unit, and generates the low-side driving signal based on the low-side control signal.

[0016] Alternatively, the first preset voltage generating unit includes a negative voltage circuit and a step-down circuit;

[0017] The negative voltage circuit receives the operating voltage and generates the negative voltage; wherein the absolute value of the negative voltage is equal to the operating voltage;

[0018] The step-down circuit connects the switching node and the negative voltage, and steps down the voltage of the switching node to obtain the set voltage.

[0019] Alternatively, the negative voltage circuit includes a first switch, a second switch, a third switch, a fourth switch, and a first capacitor;

[0020] One end of the first switch is connected to the operating voltage, and the other end is connected to the first plate of the first capacitor;

[0021] One end of the second switch is connected to the first plate of the first capacitor, and the other end is connected to reference ground;

[0022] One end of the third switch is connected to the second plate of the first capacitor, and the other end is connected to the reference ground;

[0023] One end of the fourth switch is connected to the second plate of the first capacitor, and the other end outputs the negative voltage.

[0024] Alternatively, the negative voltage circuit includes a constant voltage control unit, a fifth switch, a sixth switch, a first inductor, and a second capacitor;

[0025] The first terminal of the fifth switch is connected to the operating voltage, and the second terminal is connected to the reference ground via the first inductor;

[0026] The first terminal of the sixth switch is connected to the second terminal of the fifth switch, and the second terminal outputs the negative voltage.

[0027] The first plate of the second capacitor is connected to the second terminal of the sixth switch, and the second plate is connected to reference ground;

[0028] The control terminals of the fifth switch and the sixth switch are controlled by the constant pressure control unit.

[0029] Alternatively, the step-down circuit includes a first diode, a first resistor, a third capacitor, and a first PMOS transistor, wherein the first diode is a Zener diode;

[0030] The cathode of the first diode is connected to the switching node, and the anode is connected to the negative voltage via the first resistor;

[0031] The drain of the first PMOS transistor is connected to the negative voltage, the gate is connected to the anode of the first diode, and the source is connected to the switching node via the third capacitor; the source of the first PMOS transistor outputs the set voltage.

[0032] Optionally, the low-side driving module includes a low-side logic control unit, a second preset voltage generation unit, and a potential shift driving circuit;

[0033] The low-side logic control unit receives the low-side control signal and generates a drive control signal that is inversely related to the low-side control signal.

[0034] The second preset voltage generating unit is connected to the output terminal of the low-side logic control unit and the switching node, and generates the preset voltage based on the voltage of the switching node;

[0035] The potential shift drive circuit is connected to the output terminal of the low-side logic control unit and converts the drive control signal located in the first voltage domain into the low-side drive signal located in the second voltage domain; wherein, the high level of the first voltage domain is the operating voltage and the low level is the reference ground; the high level of the second voltage domain is the voltage of the switching node and the low level is the set voltage.

[0036] Alternatively, the second preset voltage generating unit includes a second diode, a second resistor, a third diode, a fourth capacitor, a fifth capacitor, and a second PMOS transistor, wherein the second diode is a Zener diode;

[0037] The cathode of the second diode is connected to the switching node, and the anode is connected to the anode of the third diode via the second resistor; the cathode of the third diode is connected to reference ground.

[0038] The first plate of the fourth capacitor is connected to the output terminal of the low-side logic control unit, and the second plate is connected to the anode of the third diode.

[0039] The drain of the second PMOS transistor is connected to the anode of the third diode, the gate is connected to the anode of the second diode, and the source is connected to the switching node via the fifth capacitor; the source of the second PMOS transistor outputs the set voltage.

[0040] To achieve the above and other related objectives, the present invention also provides a chip, the chip including at least the above-described driving circuit.

[0041] To achieve the above and other related objectives, the present invention also provides a switching power supply, the switching power supply comprising at least:

[0042] The high-side switching transistor, the low-side switching transistor, the second inductor, the sixth capacitor, and the aforementioned driving circuit, wherein the high-side switching transistor and the low-side switching transistor are PMOS transistors;

[0043] The source of the high-side switching transistor is connected to the power supply, and the gate is connected to the high-side driving signal output by the driving circuit.

[0044] The drain of the low-side switching transistor is connected to reference ground, and the gate is connected to the low-side driving signal output by the driving circuit.

[0045] The drain of the high-side switch and the source of the low-side switch are connected together to form a switching node.

[0046] One end of the second inductor is connected to the switching node, and the other end serves as the output terminal of the switching power supply;

[0047] The first plate of the sixth capacitor is connected to the output terminal of the switching power supply, and the second plate is connected to the reference ground.

[0048] As described above, the driving circuit, chip, and switching power supply of the present invention have the following beneficial effects:

[0049] 1. The driving circuit and chip of the present invention provide a driving scheme for the low-side PMOS switching transistor in the switching power supply, so that the low-side PMOS transistor can be turned on and off normally.

[0050] 2. In the switching power supply of the present invention, both the high-side switching transistor and the low-side switching transistor are implemented using PMOS transistors. Compared with the scheme of using NMOS transistors as switching transistors, the switching power supply of the present invention has stronger resistance to single-particle irradiation, which can improve the reliability of the switching power supply in the space environment and broaden the application field of the switching power supply of the present invention.

[0051] 3. In one example, the driving circuit and chip of the present invention cleverly utilize the switch control signal to generate a negative voltage when controlling the low-side switch to be turned on, eliminating the need for a dedicated negative voltage circuit and making the structure more concise. Attached Figure Description

[0052] Figure 1 The diagram shows a schematic of a DC-DC converter that uses NMOS power transistors as the high-side switch Ma and the low-side switch Mb.

[0053] Figure 2 The diagram shows a DC-DC converter that uses a PMOS power transistor as the high-side switch Ma and an NMOS transistor as the low-side switch Mb.

[0054] Figure 3 The diagram shown is a schematic block diagram of the driving circuit of the present invention.

[0055] Figure 4 The diagram shown is a structural schematic of the driving circuit of the present invention.

[0056] Figure 5 The diagram shown is a structural schematic of the first preset voltage generating unit of the present invention.

[0057] Figure 6 The diagram shown is another structural schematic of the first preset voltage generating unit of the present invention.

[0058] Figure 7 The diagram shown is another structural schematic of the low-side driving module of the present invention.

[0059] Figure 8 The diagram shown is a structural schematic of a switching power supply according to the present invention.

[0060] Figure 9 The diagram shown is a schematic diagram of the key node waveforms of a switching power supply according to the present invention.

[0061] Component designation explanation

[0062] 1-Drive circuit; 10-Voltage regulator module; 11-Logic control module; 12-High-side drive module; 13-Low-side drive module; 131-First preset voltage generation unit; 132-Drive unit; 13a-Negative voltage circuit; 13b-Step-down circuit; 13c-Low-side logic control unit; 13d-Second preset voltage generation unit; 13e-Level shift drive circuit. Detailed Implementation

[0063] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0064] Please see Figures 3-9 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0065] like Figure 3 As shown, the present invention provides a driving circuit 1 for driving a switching power supply, wherein the low-side switching transistor of the switching power supply is a PMOS transistor. The driving circuit 1 of the present invention includes:

[0066] Voltage regulator module 10, logic control module 11, high-side drive module 12 and low-side drive module 13.

[0067] like Figure 3 As shown, the voltage regulator module 10 is connected to the power supply VIN of the switching power supply and generates the operating voltage VCC based on the power supply VIN.

[0068] Specifically, the voltage regulator module 10 can be implemented using any circuit structure with voltage regulation function, including but not limited to LDO. In this embodiment, the voltage regulator module 10 converts the power supply VIN into a stable 5V operating voltage VCC. The voltage value of the operating voltage VCC can be set according to actual needs and is not limited to this embodiment.

[0069] like Figure 3 As shown, the logic control module 11 is connected to the output terminal of the voltage regulator module 10 and is used to generate the high-side control signal HG and the low-side control signal LG.

[0070] Specifically, the logic control module 11 uses the operating voltage VCC as the power supply and the reference ground GND as the reference to generate control signals for controlling the on / off switching of the high-side and low-side switching transistors in the switching power supply.

[0071] like Figure 3 As shown, the high-side drive module 12 receives the high-side control signal HG and is connected to the power supply VIN to generate the high-side drive signal HDRV.

[0072] Specifically, the high-side drive module 12 amplifies the power of the high-side control signal HG to obtain the high-side drive signal HDRV. In this embodiment, the high level of the voltage domain where the high-side drive signal HDRV is located is the power supply VIN, and the low level is the reference ground GND; in actual use, it can be set as needed to control the high-side switch to turn on and off. In one example, the high-side drive signal HDRV is in phase with the high-side control signal HG; in another example, the high-side drive signal HDRV is out of phase with the high-side control signal HG.

[0073] like Figure 3 As shown, the low-side drive module 13 receives the low-side control signal LG and is connected to the switching node SW of the switching power supply to generate a low-side drive signal LDRV that drives the low-side switch transistor to turn on or off. The high level of the low-side drive signal LDRV in the voltage domain is the voltage Vsw of the switching node SW, and the low level is a set voltage Vset that is lower than the switching node voltage Vsw.

[0074] Specifically, the low-side drive module 13 amplifies the power of the low-side control signal LG to obtain the low-side drive signal LDRV. To enable the low-side drive signal LDRV to control the low-side switching transistor (PMOS transistor) to turn on and off, the high level of the voltage domain containing the low-side drive signal LDRV is set to the switching node voltage Vsw, and the low level is set to the set voltage Vset. The set voltage Vset is smaller than the switching node voltage Vsw by a set value. For example, the set value is set to 5V. In actual use, the set value can be set as needed (not less than the absolute value of the threshold voltage Vth of the low-side switching transistor) to ensure normal turn-on and turn-off of the low-side switching transistor. Values ​​include, but are not limited to, 2V, 3V, 4V, 6V, 10V, 15V, and 20V, which will not be elaborated here.

[0075] This invention ensures the normal operation of the low-side switch by providing a drive voltage lower than the switching node voltage Vsw, thereby improving the single-event immunity of the switching power supply chip. The low-side drive module 13 is further described below based on an example.

[0076] Example 1

[0077] like Figure 4As shown, this embodiment provides a driving circuit 1, wherein the low-side driving module 13 includes a first preset voltage generating unit 131 and a driving unit 132.

[0078] like Figure 4 As shown, the first preset voltage generating unit 131 generates a negative voltage (less than the reference ground) and connects to the switching node SW. Based on the voltage Vsw of the switching node, it generates a set voltage Vset (for example, Vset = Vsw - 5V).

[0079] Specifically, in this embodiment, the first preset voltage generating unit 131 includes a negative voltage circuit 13a and a step-down circuit 13b. The negative voltage circuit 13a receives the operating voltage VCC and generates a negative voltage; in this example, the absolute value of the negative voltage is equal to the operating voltage, that is, the negative voltage is -VCC. The step-down circuit 13b connects the switching node SW and the negative voltage -VCC, and steps down the voltage Vsw of the switching node to obtain the set voltage Vset.

[0080] More specifically, such as Figure 5 As shown, in one example, the negative voltage circuit 13a includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, and a first capacitor C1. One end of the first switch S1 is connected to the operating voltage VCC, and the other end is connected to the first plate of the first capacitor C1. One end of the second switch S2 is connected to the first plate of the first capacitor C1, and the other end is connected to the reference ground GND. One end of the third switch S3 is connected to the second plate of the first capacitor C1, and the other end is connected to the reference ground GND. One end of the fourth switch S4 is connected to the second plate of the first capacitor C1, and the other end outputs a negative voltage -VCC. During the first half-cycle of the negative voltage circuit 13a, when the first switch S1 and the third switch S3 are turned on and the second switch S2 and the fourth switch S4 are turned off, the working voltage VCC output by the voltage regulator module 10 is used to store energy for the first capacitor C1. At this time, the voltage of the first plate of the first capacitor C1 is VCC and the voltage of the second plate is 0V. During the second half-cycle of the negative voltage circuit 13a, when the first switch S1 and the third switch S3 are turned off and the second switch S2 and the fourth switch S4 are turned on, the first plate of the first capacitor C1 is connected to the reference ground (i.e., 0V) through the second switch S2. Since the voltage difference between the two plates of the first capacitor C1 is constant, the voltage of its second plate becomes -VCC.

[0081] More specifically, such as Figure 6As shown, in another example, the negative voltage circuit 13a includes a constant voltage control unit U1, a fifth switch S5, a sixth switch S6, a first inductor L1, and a second capacitor C2; in this example, the fifth switch S5 and the sixth switch S6 are configured as MOSFETs. The first terminal of the fifth switch S5 is connected to the operating voltage VCC, and the second terminal is connected to the reference ground GND via the first inductor L1. The first terminal of the sixth switch S6 is connected to the second terminal of the fifth switch S5, and the second terminal outputs a negative voltage -VCC. The first plate of the second capacitor C2 is connected to the second terminal of the sixth switch S6, and the second plate is connected to the reference ground GND. The control terminals of the fifth switch S5 and the sixth switch S6 are controlled by the constant voltage control unit U1, which is used to adjust the duty cycle.

[0082] It should be noted that any circuit structure that can generate a negative voltage (e.g., -VCC) based on the working voltage VCC is applicable to the negative voltage circuit 13a of the present invention, and is not limited to this embodiment.

[0083] More specifically, such as Figure 5 and Figure 6 As shown, the step-down circuit 13b includes a first diode D1, a first resistor R1, a third capacitor C3, and a first PMOS transistor P1, wherein the first diode D1 is a Zener diode. The cathode of the first diode D1 is connected to the switching node SW, and the anode is connected to the negative voltage -VCC via the first resistor R1; the drain of the first PMOS transistor P1 is connected to the negative voltage -VCC, the gate is connected to the anode of the first diode D1, and the source is connected to the switching node SW via the third capacitor C3; the source of the first PMOS transistor P1 outputs a set voltage Vset. Assuming that the voltage across the first diode D1 is regulated to 5V (i.e., the set value), and ignoring the influence of the threshold voltage of the first PMOS transistor P1, the set voltage Vset output is Vsw-5V, that is, the set voltage Vset follows the change of the switching node voltage Vsw.

[0084] like Figure 4 As shown, the drive unit 132 receives the low-side control signal LG and connects to the switch node SW and the output terminal of the first preset voltage generation unit 131, and generates a low-side drive signal LDRV based on the low-side control signal LG.

[0085] Specifically, in this embodiment, the drive unit 132 converts the 0V / 5V control signal (low-side control signal LG) generated by the logic control module 11 into a drive signal (low-side drive signal LDRV) for Vsw / Vset, thereby controlling the on and off of the low-side switching transistor in the external switching power supply.

[0086] Other structures will not be described in detail here.

[0087] Example 2

[0088] like Figure 7 As shown, this embodiment provides a driving circuit 1, which differs from the first embodiment in that the low-side driving module 13 includes a low-side logic control unit 13c, a second preset voltage generation unit 13d, and a potential shift driving circuit 13e.

[0089] like Figure 7 As shown, the low-side logic control unit 13c receives the low-side control signal LG and generates a drive control signal LGB that is inversely related to the low-side control signal LG.

[0090] Specifically, in this embodiment, the low-side logic control unit 13c operates in the voltage domain of VCC / GND.

[0091] like Figure 7 As shown, the second preset voltage generation unit 13d is connected to the output terminal of the low-side logic control unit 13c and the switching node SW, and generates a preset voltage Vset based on the switching node voltage Vsw.

[0092] Specifically, when the low-side control signal LG controls the low-side switch to turn on, the second preset voltage generating unit 13d obtains a negative voltage using the low-side control signal LG and generates a corresponding preset voltage Vset. This preset voltage Vset is used to pull down the gate voltage of the low-side switch, thereby turning on the low-side switch. However, when the low-side control signal LG controls the low-side switch to turn off, no negative voltage is generated. Therefore, in this embodiment, the negative voltage is cleverly generated using the low-side control signal LG, eliminating the need for a dedicated negative voltage circuit, further simplifying the circuit structure and reducing costs.

[0093] More specifically, as an example, the second preset voltage generation unit 13d includes a second diode D2, a second resistor R2, a third diode D3, a fourth capacitor C4, a fifth capacitor C5, and a second PMOS transistor P2, wherein the second diode D2 is a Zener diode. The cathode of the second diode D2 is connected to the switching node SW, and the anode is connected to the anode of the third diode D3 via the second resistor R2; the cathode of the third diode D3 is connected to reference ground GND; the first plate of the fourth capacitor C4 is connected to the output terminal of the low-side logic control unit 13c, and the second plate is connected to the anode of the third diode D3; the drain of the second PMOS transistor P2 is connected to the anode of the third diode D3, the gate is connected to the anode of the second diode D2, and the source is connected to the switching node SW via the fifth capacitor C5; the source of the second PMOS transistor P2 outputs a preset voltage Vset.

[0094] like Figure 7 As shown, the potential shift drive circuit 13e is connected to the output terminal of the low-side logic control unit 13c, and converts the drive control signal LGB located in the first voltage domain into the low-side drive signal LDRV located in the second voltage domain.

[0095] Specifically, in this embodiment, the high level of the first voltage domain is the operating voltage VCC, and the low level is the reference ground GND; the high level of the second voltage domain is the voltage Vsw of the switching node, and the low level is the set voltage Vset.

[0096] Example 3

[0097] like Figure 8 As shown, this embodiment provides a switching power supply, which includes:

[0098] The high-side switch M1, the low-side switch M2, the second inductor L2, the sixth capacitor C6, and the driving circuit 1 of the present invention are included. The high-side switch M1 and the low-side switch M2 are PMOS transistors.

[0099] like Figure 8 As shown, the source of the high-side switch M1 is connected to the power supply VIN, and its gate is connected to the high-side drive signal HDRV output by drive circuit 1. The drain of the low-side switch M2 is connected to reference ground GND, and its gate is connected to the low-side drive signal LDRV output by drive circuit 1. The drain of the high-side switch M1 and the source of the low-side switch M2 are connected together to form the switching node SW. One end of the second inductor L2 is connected to the switching node SW, and the other end serves as the output terminal of the switching power supply. The first plate of the sixth capacitor C6 is connected to the output terminal of the switching power supply, and the second plate is connected to reference ground GND.

[0100] Specifically, when the high-side drive signal HDRV causes the gate-source voltage of the high-side switch M1 to be less than the threshold voltage (negative value), the high-side switch M1 is turned on; otherwise, the high-side switch M1 is turned off. When the low-side drive signal LDRV causes the gate-source voltage of the low-side switch M2 to be less than the threshold voltage (negative value), the low-side switch M2 is turned on; otherwise, the low-side switch M2 is turned off. The high-side switch M1 and the low-side switch M2 are turned on alternately to generate the desired output voltage VOUT.

[0101] The high-side control signal HG and the low-side control signal LG are complementary. When the high-side control signal HG is high, the low-side control signal LG is low. This causes the high-side switch M1 to be turned on and the low-side switch M2 to be turned off through the high-side drive module 12 and the low-side drive module 13, respectively, resulting in a high-level switch node voltage Vsw (i.e., power supply VIN). When the high-side control signal HG is low, the low-side control signal LG is high. This causes the high-side switch M1 to be turned off and the low-side switch M2 to be turned on through the high-side drive module 12 and the low-side drive module 13, respectively, resulting in a low-level switch node voltage Vsw (i.e., reference ground GND).

[0102] Assuming the power supply VIN is 28V (not less than 5V) and the output voltage of the voltage regulator module 10 is 5V, then when the switching node voltage Vsw is low (0V), the low-side drive signal LDRV is -5V, and the low-side switch M2 is turned on; when the switching node voltage Vsw is high (28V), the low-side drive signal LDRV is 28V, and the low-side switch M2 is turned off; thus, the on and off states of the low-side switch are controlled.

[0103] Specifically, in this example, the driving circuit 1 adopts the structure of Embodiment 2. For example... Figure 9 As shown, when the low-side control signal LG is low (i.e., GND=0V), the drive control signal LGB is high (i.e., VCC=5V). Ignoring the forward voltage drop of the second diode D2, the anode voltage VSUB of the third diode D3 is 0V, and the voltage difference across the second diode D2 is the operating voltage VCC (i.e., 5V). At this time, the high-side control signal HG is high, the high-side switch M1 is turned on, and the switching node voltage Vsw is high (i.e., VIN=28V). Ignoring the threshold voltage of the second PMOS transistor P2, a 5V voltage can be generated across the second diode D2 and the fifth capacitor C5, thus outputting Vset=Vsw-5V (i.e., equal to VIN-5V=28V-5V=23V) to the level shift drive circuit 13e. When the drive control signal LGB is high, the low-side drive signal LDRV output by the level shift drive circuit 13e is high (i.e., the switching node voltage Vsw=28V), therefore, the low-side switch M2 is turned off.

[0104] like Figure 9 As shown, when the low-side control signal LG is high (i.e., VCC=5V), the drive control signal LGB is low (i.e., GND=0V). Ignoring the forward voltage drop of the second diode D2, since the voltage difference across the fifth capacitor C5 is 5V, the anode voltage VSUB of the third diode D3 is -5V. At this time, the high-side control signal HG is low, the high-side switch M1 is turned off, and the switching node voltage Vsw is low (i.e., GND=0V). Ignoring the threshold voltage of the second PMOS transistor P2, a 5V voltage can be generated across the second diode D2 and the fifth capacitor C5, thus outputting Vset=Vsw-5V (i.e., equal to 0V-5V=-5V) to the level shift drive circuit 13e. When the drive control signal LGB is low (i.e., GND=0V), the low-side drive signal LDRV output by the level shift drive circuit 13e is low (i.e., the switching node voltage Vsw=-5V), therefore, the low-side switch M2 is turned on.

[0105] The present invention also provides a chip, which includes: the driving circuit 1 of the present invention. In this embodiment, the high-side switching transistor M1, the low-side switching transistor M2, the second inductor L2, and the sixth capacitor C6 are disposed outside the chip.

[0106] In summary, this invention provides a driving circuit, a chip, and a switching power supply. The driving circuit includes a voltage regulator module, a logic control module, a high-side driving module, and a low-side driving module. The voltage regulator module is connected to the power supply of the switching power supply and generates an operating voltage based on the power supply. The logic control module is connected to the output of the voltage regulator module and generates high-side control signals and low-side control signals. The high-side driving module receives the high-side control signals and is connected to the power supply to generate high-side driving signals. The low-side driving module receives the low-side control signals and is connected to the switching node of the switching power supply to generate low-side driving signals that drive the low-side switching transistor to turn on or off. The high level of the low-side driving signal in the voltage domain is the voltage of the switching node, and the low level is a set voltage less than that of the switching node. This invention addresses applications requiring single-event immunity in space environments by implementing control over the turn-on and turn-off of a low-side PMOS transistor. Based on this low-side PMOS transistor drive circuit, a dual-PMOS switching power supply circuit is also proposed. Since PMOS transistors offer stronger single-event immunity compared to NMOS transistors, employing the low-side PMOS transistor drive circuit and PMOS-based switching power supply circuit of this invention can improve the reliability of switching power supply circuits in space environments. Therefore, this invention effectively overcomes various shortcomings of existing technologies and possesses high industrial applicability.

[0107] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A driving circuit for driving a switching power supply, wherein the low-side switching transistor of the switching power supply is a PMOS transistor, characterized in that, The driving circuit includes at least: Voltage regulator module, logic control module, high-side driver module and low-side driver module; The voltage regulator module is connected to the power supply of the switching power supply and generates an operating voltage based on the power supply. The logic control module is connected to the output terminal of the voltage regulator module and is used to generate high-side control signals and low-side control signals. The high-side drive module receives the high-side control signal and is connected to the power supply to generate a high-side drive signal. The low-side drive module receives the low-side control signal and is connected to the switching node of the switching power supply to generate a low-side drive signal that drives the low-side switch to turn on or off; wherein, the high level of the voltage domain in which the low-side drive signal is located is the voltage of the switching node, and the low level is a voltage lower than the set voltage of the switching node.

2. The driving circuit according to claim 1, characterized in that: The low-side driving module includes a first preset voltage generation unit and a driving unit; The first preset voltage generating unit generates a negative voltage and connects to the switching node, generating the preset voltage based on the voltage of the switching node; The driving unit receives the low-side control signal and connects to the switch node and the output terminal of the first preset voltage generating unit, and generates the low-side driving signal based on the low-side control signal.

3. The driving circuit according to claim 2, characterized in that: The first preset voltage generating unit includes a negative voltage circuit and a step-down circuit; The negative voltage circuit receives the operating voltage and generates the negative voltage; wherein the absolute value of the negative voltage is equal to the operating voltage; The step-down circuit connects the switching node and the negative voltage, and steps down the voltage of the switching node to obtain the set voltage.

4. The driving circuit according to claim 3, characterized in that: The negative voltage circuit includes a first switch, a second switch, a third switch, a fourth switch, and a first capacitor; One end of the first switch is connected to the operating voltage, and the other end is connected to the first plate of the first capacitor; One end of the second switch is connected to the first plate of the first capacitor, and the other end is connected to reference ground; One end of the third switch is connected to the second plate of the first capacitor, and the other end is connected to the reference ground; One end of the fourth switch is connected to the second plate of the first capacitor, and the other end outputs the negative voltage.

5. The driving circuit according to claim 3, characterized in that: The negative pressure circuit includes a constant pressure control unit, a fifth switch, a sixth switch, a first inductor, and a second capacitor; The first terminal of the fifth switch is connected to the operating voltage, and the second terminal is connected to the reference ground via the first inductor; The first terminal of the sixth switch is connected to the second terminal of the fifth switch, and the second terminal outputs the negative voltage. The first plate of the second capacitor is connected to the second terminal of the sixth switch, and the second plate is connected to reference ground; The control terminals of the fifth switch and the sixth switch are controlled by the constant pressure control unit.

6. The driving circuit according to claim 3, characterized in that: The step-down circuit includes a first diode, a first resistor, a third capacitor, and a first PMOS transistor, wherein the first diode is a Zener diode; The cathode of the first diode is connected to the switching node, and the anode is connected to the negative voltage via the first resistor; The drain of the first PMOS transistor is connected to the negative voltage, the gate is connected to the anode of the first diode, and the source is connected to the switching node via the third capacitor; the source of the first PMOS transistor outputs the set voltage.

7. The driving circuit according to claim 1, characterized in that: The low-side driving module includes a low-side logic control unit, a second preset voltage generation unit, and a potential shift driving circuit. The low-side logic control unit receives the low-side control signal and generates a drive control signal that is inversely related to the low-side control signal. The second preset voltage generating unit is connected to the output terminal of the low-side logic control unit and the switching node, and generates the preset voltage based on the voltage of the switching node; The potential shift drive circuit is connected to the output terminal of the low-side logic control unit and converts the drive control signal located in the first voltage domain into the low-side drive signal located in the second voltage domain; wherein, the high level of the first voltage domain is the operating voltage and the low level is the reference ground; the high level of the second voltage domain is the voltage of the switching node and the low level is the set voltage.

8. The driving circuit according to claim 7, characterized in that: The second preset voltage generating unit includes a second diode, a second resistor, a third diode, a fourth capacitor, a fifth capacitor, and a second PMOS transistor, wherein the second diode is a Zener diode; The cathode of the second diode is connected to the switching node, and the anode is connected to the anode of the third diode via the second resistor; the cathode of the third diode is connected to reference ground. The first plate of the fourth capacitor is connected to the output terminal of the low-side logic control unit, and the second plate is connected to the anode of the third diode. The drain of the second PMOS transistor is connected to the anode of the third diode, the gate is connected to the anode of the second diode, and the source is connected to the switching node via the fifth capacitor; the source of the second PMOS transistor outputs the set voltage.

9. A chip, characterized in that, The chip includes at least the driving circuit as described in any one of claims 1-8.

10. A switching power supply, characterized in that, The switching power supply includes at least: The high-side switching transistor, the low-side switching transistor, the second inductor, the sixth capacitor, and the driving circuit as described in any one of claims 1-8, wherein the high-side switching transistor and the low-side switching transistor are PMOS transistors; The source of the high-side switching transistor is connected to the power supply, and the gate is connected to the high-side driving signal output by the driving circuit. The drain of the low-side switching transistor is connected to reference ground, and the gate is connected to the low-side driving signal output by the driving circuit. The drain of the high-side switch and the source of the low-side switch are connected together to form a switching node. One end of the second inductor is connected to the switching node, and the other end serves as the output terminal of the switching power supply; The first plate of the sixth capacitor is connected to the output terminal of the switching power supply, and the second plate is connected to the reference ground.

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