Power control device

Abstract

This invention provides a power control device capable of preventing reverse current from flowing through the output terminal and preventing current from flowing through a bias circuit and a control circuit. The power control device includes: a first transistor disposed between an input terminal and an output terminal, controlling the current supplied from the input terminal to the output terminal; and a regulator control circuit that detects the voltage at the output terminal and controls the first transistor to keep the voltage at the output terminal constant. The power control device also includes: a reverse current detection circuit that detects the reverse current state between the input terminal and the output terminal; a logic circuit that receives the detection result signal from the reverse current detection circuit; and a bias circuit that generates a bias current that activates the regulator control circuit. The logic circuit, based on the detection result signal from the reverse current detection circuit, supplies a potential to the bias circuit that causes the generation of the bias current in the bias circuit to be in an on or off state.

Description

Technical Field

[0001] This invention relates to a power control device with a built-in reverse current prevention circuit, and particularly to a technique for effectively using a linear regulator having a transistor for output control connected between an input terminal and an output terminal. Background Technology

[0002] A linear regulator (hereinafter simply referred to as a regulator) is a power supply device that controls a transistor used for output control, located between a DC voltage input terminal and an output terminal, to output a DC voltage at a desired potential. The regulator's semiconductor integrated circuit (semiconductor device for power control) includes a control circuit composed of an error amplifier, which generates a voltage that controls the output control transistor based on the output voltage.

[0003] In regulators, sometimes the output voltage is higher than the input voltage. When this happens, a reverse current sometimes flows from the output terminal towards the input terminal or ground terminal. If this reverse current continues to flow and is relatively large, the IC may be damaged. As a path for this reverse current, a parasitic diode is known to exist between the drain and back gate in transistors used for output control, such as MOS transistors. Additionally, a parasitic diode is known to exist between the collector and base in bipolar transistors.

[0004] To prevent reverse current from flowing from the output terminal to the input terminal through the parasitic diode, there exists a regulator that includes a reverse current detection circuit for detecting when the output voltage is higher than the input voltage, and a reverse current prevention transistor connected in parallel with the output control transistor (e.g., Patent Document 1). Furthermore, as an invention related to a power supply device equipped with a reverse current detection circuit, there exists the invention described in Patent Document 2.

[0005] Patent Document 1: Japanese Patent Application Publication No. 63-307510

[0006] Patent Document 2: Japanese Patent No. 7341196 Summary of the Invention

[0007] The regulator described in Patent Document 1 has the following problem: although it can detect the occurrence of a reverse current state and prevent the flow of reverse current, during the period when the reverse current state occurs, current continues to flow in the control circuit (error amplifier) ​​of the transistor used to control the output and in the current source circuit (bias circuit) that supplies the operating current to the control circuit.

[0008] The present invention was made with regard to the above-mentioned problems, and its object is to provide a power control device and a power control semiconductor device (power control IC) that can prevent reverse current from flowing from the output terminal and prevent current from flowing through the bias circuit and the control circuit when the output voltage is higher than the input voltage by a predetermined potential.

[0009] To achieve the above objectives, the power control device of the present invention includes: a first transistor disposed between an input terminal and an output terminal, which controls the current supplied from the input terminal to the output terminal; and a regulator control circuit that detects the voltage of the output terminal and controls the first transistor to keep the voltage of the output terminal constant.

[0010] The power control device includes:

[0011] A reverse current detection circuit detects the reverse current state between the input terminal and the output terminal;

[0012] A logic circuit, which is input to the detection result signal of the reverse current detection circuit; and

[0013] A bias circuit that generates a bias current that causes the regulator control circuit to operate.

[0014] The logic circuit is configured to supply a potential to the bias circuit, based on the detection result signal from the reverse current detection circuit, to make the generation of the bias current in the bias circuit either in a conducting or cut-off state.

[0015] According to the power control device with the above structure, when the output voltage is higher than the input voltage by a predetermined potential, the output of the reverse current detection circuit changes, and the logic circuit turns the bias current generation of the bias circuit to a cut-off state. Therefore, it is possible to prevent current from flowing through the bias circuit and the regulator control circuit in the reverse current state. In addition, by making the first transistor (output control transistor) to a cut-off state through this process, it is possible to prevent reverse current from flowing from the output terminal to the input terminal.

[0016] The power control device according to the present invention has the following effects: when the output voltage is higher than the input voltage by a predetermined potential, it can prevent reverse current from flowing through the output terminal and prevent current from flowing through the bias circuit and the control circuit. Attached Figure Description

[0017] Figure 1 This is a circuit diagram illustrating one embodiment of a power supply device using a linear regulator method of the power control device of the present invention.

[0018] Figure 2This is a logic structure diagram illustrating an example of the logic circuitry of the power control device in the regulator constituting the embodiment.

[0019] Figure 3 It is a graph showing the relationship between the input-output voltage difference and the reverse current in the regulator of the implementation method.

[0020] Figure 4 This is a circuit diagram illustrating a modified example of the regulator IC in the implementation method.

[0021] Figure 5 (A) and (B) are circuit diagrams showing the structure of the regulator IC studied prior to this invention. Detailed Implementation

[0022] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

[0023] Figure 1 This describes one embodiment of a power supply device employing a linear regulator method of the power control device of the present invention. Furthermore, in Figure 1 In this circuit, the portion enclosed by a single-dot dash is formed as a semiconductor integrated circuit (regulator IC) 10 on a semiconductor chip such as single-crystal silicon. The capacitor Co is connected to the output terminal OUT of the regulator IC 10, thereby functioning as a DC power supply device that outputs a stable DC voltage Vout to the load 20.

[0024] like Figure 1 As shown, in the power supply device of this embodiment, a PNP bipolar transistor Q1 for output control is connected between the voltage input terminal IN of the regulator IC10 where a DC input voltage Vin is applied and the output terminal OUT. Resistors R1 and R2 that constitute a voltage divider circuit 11 for dividing the output voltage Vout are connected in series between the output terminal OUT and the ground line (grounding point) where a ground potential GND is applied.

[0025] The voltage at node N1, where resistors R1 and R2 constitute the voltage divider circuit 11, is input as a feedback voltage VFB to the non-inverting input terminal of the error amplifier 12, which controls the base terminal of the output control transistor Q1. Additionally, a reference voltage Vref from a reference voltage circuit 13 is applied to the inverting input terminal of the error amplifier 12. This reference voltage circuit 13 generates a predetermined reference voltage Vref based on the input voltage Vin. The error amplifier 12 generates a voltage corresponding to the potential difference between the output feedback voltage VFB and the reference voltage Vref and supplies it to the base terminal of the output control transistor Q1 to control Q1, ensuring that the output voltage Vout reaches the desired potential.

[0026] Furthermore, the regulator IC10 in this embodiment is provided with a bias circuit 14 that generates the operating current of the error amplifier 12 and the reference voltage circuit 13.

[0027] The bias circuit 14 has the following components between the voltage input terminal IN and the ground point: a resistor R3 connected in series and NPN bipolar transistors Q2 and Q3; a resistor R4 connected between the base terminal and the emitter terminal of transistor Q2; and an NPN bipolar transistor Q4 whose base terminal is connected to the collector terminal of transistor Q2 and whose emitter terminal is connected to the base terminal of Q2.

[0028] A PNP bipolar transistor Q5, constituting the primary side of a current mirror circuit, is disposed between the collector terminal of transistor Q4 and the voltage input terminal IN. Furthermore, PNP bipolar transistors Q6, Q7, and Q8, which share a common connection with the base of transistor Q5 and operate as a current source on the secondary side of the current mirror circuit, are disposed between the voltage input terminal IN, the reference voltage circuit 13, and the error amplifier 12. Transistor Q8 operates as a current source for the output stage of the error amplifier 12, effectively stabilizing the output voltage of the error amplifier 12. Additionally, Q8... Figure 1 It is shown outside of error amplifier 12, but can also be regarded as constituting error amplifier 12.

[0029] Furthermore, in the regulator IC10 of this embodiment, in order to control the operating state of the internal circuits of the IC, a control input terminal CT is provided as an external terminal for inputting a control signal CNT supplied by a microcomputer (not shown), and a logic circuit 15 is provided to generate a signal EN that controls the operation of the bias circuit 14 based on the control signal CNT from the control input terminal CT. The signal EN output from the logic circuit 15 is input to the base terminal of the transistor Q3. When Q3 is turned on, the bias circuit 14 is in an operating state, and when Q3 is turned off, the bias circuit 14 is in a stopped state.

[0030] If the base-emitter voltage of transistor Q2 is set to VF and the resistance of resistor R3 is set to R, then when transistor Q3 is turned on by the signal EN from logic circuit 15, collector current flows through Q2. A current I, expressed as I = VF / R, is drawn from the current source (the primary-side transistor Q5 of the current mirror circuit) connected to the collector terminal of Q4, enabling the internal circuits (error amplifier 12 and reference voltage circuit 13) to operate. Then, when transistor Q3 is turned off by the signal EN from logic circuit 15, current no longer flows through transistor Q2, and the current I drawn from Q5 connected to the collector terminal of Q3 becomes zero, stopping the operation of the internal circuits.

[0031] Furthermore, in this embodiment, a reverse current detection circuit 16 is provided to monitor the voltage Vin at the voltage input terminal IN and the voltage Vout at the output terminal OUT, and to detect reverse current conditions where Vout is higher than Vin by Vf. The detection signal from the reverse current detection circuit 16 is input to a logic circuit 15, which performs the following function: obtaining the logical sum of the input control signal CNT at the control input terminal CT and the detection signal DT from the reverse current detection circuit 16, and generating a signal EN for controlling the conduction and cutoff of the bias circuit 14.

[0032] The reverse current detection circuit 16 consists of a resistor R5, a PNP bipolar transistor Q9, and a resistor R6 connected in series between the output terminal OUT and the ground point. A voltage input terminal IN is connected to the base of transistor Q9. Furthermore, the connection node N2 between transistor Q9 and resistor R6 is connected to the input terminal of the aforementioned logic circuit 15.

[0033] When the voltage Vout at the output terminal OUT is higher than the voltage Vin at the input terminal IN by more than Vf (i.e., Vout > (Vin + Vf), the reverse current detection circuit 16 turns on the transistor Q9, and current flows through the resistor R6. The potential of the connection node N2 between Q9 and the resistor R6 rises, and a high-level signal is input to the input terminal of the logic circuit 15.

[0034] Furthermore, the aforementioned resistor R5 can be omitted, but by setting resistor R5, the threshold voltage Vf that gives transistor Q9 the power to switch from off to on can be adjusted. Therefore, resistor R5 can be configured to allow switching of the resistance value by connecting multiple resistors in parallel and connecting or disconnecting any one of them. Alternatively, it can be configured such that resistor R5 of any resistance value can be connected as an external resistor via an external terminal on the IC, thereby achieving a circuit capable of adjusting the voltage Vf according to the system using the power supply device of this embodiment.

[0035] exist Figure 2 The diagram below shows a logic structure diagram representing an example of logic circuit 15. Table 1 below shows a truth table representing the relationship between the input control signal CNT, the detection signal DT of the reverse current detection circuit 16, and the signal EN output from logic circuit 15.

[0036] [Table 1]

[0037] like Figure 2As shown, logic circuit 15 consists of an inverter INV1 that inverts the input control signal CNT, and a NOR gate G1 that takes the output signal of the inverter INV1 and the detection signal DT of the reverse current detection circuit 16 as inputs. The output changes to a high level (H) only when the input control signal CNT is high (H) and the detection signal DT of the reverse current detection circuit 16 is low (L), allowing current to flow through the bias circuit 14. Otherwise, the output becomes low (L), cutting off the current to the bias circuit 14. As a result, the supply of operating current to the error amplifier 12 and the reference voltage circuit 13 is also cut off, stopping the operation of these circuits. This allows the output control transistor Q1 to be turned off, preventing reverse current from flowing from the output terminal OUT to the input terminal IN.

[0038] As described above, in the regulator IC of this embodiment, the current of the bias circuit 14 can be cut off by the external control signal CNT, so as to stop the operation of the error amplifier 12 and the reference voltage circuit 13. Even when the reverse current detection circuit 16 detects a reverse current state, the current of the bias circuit 14 can be cut off, so as to stop the operation of the error amplifier 12 and the reference voltage circuit 13.

[0039] Furthermore, the regulator IC according to this embodiment can prevent reverse current flowing towards the ground point through the parasitic PN junction diode present between the collector and base of transistors Q1 and Q8. Figure 3 The diagram illustrates the relationship between the input-output voltage difference (Vout-Vin) and the reverse current in the regulator IC of this embodiment. Furthermore, in... Figure 3 In the diagram, the dashed lines represent research conducted by the inventor prior to this invention. Figure 5 The relationship between the input-output voltage difference (Vout-Vin) and the reverse current in the regulator IC shown is illustrated. Figure 3 It is known that without applying this embodiment, the larger the input-output voltage difference (Vout-Vin), the greater the reverse current. However, by applying this embodiment, when the input-output voltage difference becomes a predetermined voltage (Vf) or higher, the reverse current can be suppressed to a value close to zero.

[0040] Next, regarding the function of preventing reverse current flowing through the parasitic PN junction diodes of Q1 and Q8, it is consistent with the research conducted prior to this invention. Figure 5 Compare and explain the operation of the circuits shown in (A) and (B).

[0041] In addition, Figure 5In the circuit shown in (A), a leakage absorption resistor R0 is provided, which cuts off the current mirror circuit when the bias circuit 14 is stopped by the external control signal CNT. Due to the presence of this resistor R0, in the reverse current state, the reverse current RC1 may flow through the parasitic PN junction diodes of transistors Q1 and Q8 and the resistor R0.

[0042] Therefore, as Figure 5 As with circuit (B), the inventors investigated the case where the leakage absorption resistance R0 was eliminated. However, in the case where the leakage absorption resistance R0 was eliminated... Figure 5 In the circuit shown in (B), the following problem exists: when the bias circuit 14 is turned on by the control signal CNT, the reverse current RC2 flows to the ground point through the parasitic PN junction diodes of Q1 and Q8 and then through the bias circuit 14.

[0043] The present invention was made to solve the above-mentioned problems. According to the regulator IC having the structure of the above embodiment, the following effect is achieved: by providing the reverse current detection circuit 16, the operation of the bias circuit 14 can be stopped in the reverse current state, thereby preventing the reverse current flowing from the output terminal toward the ground point.

[0044] Furthermore, in the regulator IC of this embodiment, in the reverse current state, current flows toward the ground point through the parasitic PN junction diode between the collector and base of the newly set transistor Q9 constituting the reverse current detection circuit 16. However, by using a high-resistance element as resistor R6, this current can be suppressed to a smaller value.

[0045] (Modified example)

[0046] Next, use Figure 4 A variation of the regulator IC described in the above embodiment will be explained.

[0047] Figure 4 The modulator IC shown in the modified example includes a thermal shutdown circuit 17 that detects a rise in chip temperature, omitting the configuration of... Figure 1 The resistor R6 in the reverse current detection circuit 16 of the regulator IC 10 in the illustrated embodiment connects the collector of transistor Q9 to the internal node of the TSD (thermal shutdown) circuit 17. The structure of the bias circuit 14 is similar to... Figure 1 The regulator IC in the illustrated embodiment is the same, therefore a detailed circuit diagram is omitted. The output signal of the TSD circuit 17 is supplied to the logic circuit 15, which is supplied with the input control signal CNT to the control input terminal CT. Furthermore, the logic circuit 15 in this variation is... Figure 2 Unlike other gates, it can be constructed using NAND gates.

[0048] In this modified example, the TSD circuit 17 in the regulator IC consists of an NPN bipolar transistor Q11 connected in series between the voltage input terminal IN and the ground point, resistors R7 and R8, and an NPN bipolar transistor Q12 whose emitter is connected to the ground point and whose base is connected to the connection node N3 of resistors R7 and R8. The collector of Q12 is the output terminal of the TSD circuit.

[0049] The TSD circuit 17 has a constant voltage applied from the reference voltage circuit 13 to the base of transistor Q11, so that current always flows through it. When the chip temperature rises, the potential of node N3 rises. When it reaches a predetermined temperature, transistor Q12 turns on, and the output SD of the TSD circuit becomes low, stopping the operation of the bias circuit 14 through the logic circuit 15.

[0050] Furthermore, in this modified example, the collector of transistor Q9 of the reverse current detection circuit 16 is connected to node N3, the connection point of resistors R7 and R8. When Vout > (Vin + Vf), transistor Q9 is turned on, and current flows through resistor R8 to the ground point, causing the potential of node N3 to rise. Therefore, even if the TSD circuit 17 does not detect a rise in chip temperature, when the reverse current detection circuit 16 detects a reverse current state, the output SD of the TSD circuit 17 becomes low, which can stop the operation of the bias circuit 14.

[0051] In addition, Figure 4 In the modified example shown, the case where TSD circuit 17 is provided is described. However, in addition to TSD circuit 17, for example, in a regulator IC that has overcurrent protection circuit and overvoltage protection circuit, the signal from the abnormal detection circuit such as overcurrent protection circuit and overvoltage protection circuit can be input to logic circuit 15, so that the operation of bias circuit 14 is stopped when an abnormality such as overcurrent or overvoltage occurs.

[0052] The invention described above is based on specific embodiments, but the invention is not limited to the embodiments described above. For example, the above embodiments were described in the case of a regulator IC composed of bipolar transistors, but the invention can also be applied to a regulator IC composed of MOS transistors or a regulator IC composed of both bipolar transistors and MOS transistors.

[0053] Furthermore, in the above embodiment, as the reverse current detection circuit 16, such as Figure 1 The diagram shows a structure in which transistor Q9 and resistor R6 are connected in series, but a differential voltage comparator circuit can also be used as the reverse current detection circuit 16.

[0054] Explanation of reference numerals in the attached figures

[0055] 10… Regulator IC, 11… Voltage divider circuit, 12… Error amplifier (regulator control circuit), 13… Reference voltage circuit, 14… Bias circuit (current source circuit), 15… Logic circuit, 16… Reverse current detection circuit, 17… Thermal shutdown circuit (TSD circuit), Q1… Output control transistor, CT… Control input terminal (external control terminal).

Claims

1. A power supply control device comprising: a first transistor disposed between an input terminal and an output terminal, for controlling the current supplied from the input terminal to the output terminal; and a regulator control circuit that detects the voltage of the output terminal and controls the first transistor to keep the voltage of the output terminal constant, characterized in that, The power control device includes: A reverse current detection circuit detects the reverse current state between the input terminal and the output terminal; A logic circuit, which is input to the detection result signal of the reverse current detection circuit; as well as A bias circuit that generates a bias current that causes the regulator control circuit to operate. The logic circuit supplies a potential to the bias circuit, based on the detection result signal from the reverse current detection circuit, to make the bias current generation of the bias circuit either in a conducting or cut-off state.

2. The power control device according to claim 1, characterized in that, The reverse current detection circuit has a second transistor and a first resistor connected in series between the output terminal and the constant potential point. The base or gate of the second transistor is connected to the input terminal, and the voltage after current-to-voltage conversion by the first resistor is input to the logic circuit as the detection result signal.

3. The power control device according to claim 2, characterized in that, When the voltage difference between the output terminal and the input terminal is higher than the threshold voltage of the second transistor, the logic circuit supplies a potential to the bias circuit that causes the generation of the bias current in the bias circuit to be cut off.

4. The power control device according to claim 3, characterized in that, A second resistor is connected between the emitter or source of the second transistor and the output terminal.

5. The power control device according to any one of claims 1 to 4, characterized in that, The power control device also has external control terminals. The logic circuit supplies a potential to the bias circuit, based on the detection result signal from the reverse current detection circuit and the input signal from the external control terminal, to the bias circuit to generate a bias current in a conducting or cut-off state.

6. The power control device according to claim 5, characterized in that, The power control device includes an anomaly detection circuit for detecting abnormalities. The logic circuit supplies a potential to the bias circuit to make the bias current of the bias circuit either in a conducting or cut-off state, based on the detection result signal from the reverse current detection circuit, the input signal from the external control terminal, and the abnormal detection signal from the abnormal detection circuit.

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