A three-phase motor gate drive circuit with protection function

Abstract

This application discloses a three-phase motor gate drive circuit with protection function, including: a three-phase full bridge comprising six power switching transistors; a three-phase gate drive chip, which sets the dead time via a hardware dead time setting branch connected to external components to prevent simultaneous conduction of the upper and lower bridge arms of the same phase in the three-phase full bridge; the three-phase gate drive chip is configured to: receive pulse width modulation signals and output corresponding gate drive signals to drive the six power switching transistors to perform switching actions, thereby driving the three-phase motor to operate; an overcurrent protection branch, including a sampling resistor connected between the lower bridge arm of the three-phase full bridge and ground, the sampling resistor being used to collect current signals to detect overcurrent conditions; and a temperature detection branch, including multiple negative temperature coefficient thermistors disposed near the power switching transistors for detecting the temperature of the power switching transistors. This application can effectively improve the overall reliability and safety of the system.

Description

Technical Field

[0001] This application relates to the technical field of motor drives, and in particular to a gate drive circuit for a three-phase motor with protection function. Background Technology

[0002] Currently, brushless DC motors (BLDC) are widely used in automotive electronics due to their advantages such as high efficiency, long lifespan, and low noise, including applications in body actuators such as window lifts, seat adjustments, and sliding rail drives. BLDC motors are typically driven using a three-phase full-bridge topology, which controls the switching of six power transistors through a gate driver chip to achieve precise control of motor speed and direction.

[0003] In related technologies, existing automotive low-power motor drive solutions typically employ the following approaches: First, they use discrete components to build a three-phase drive bridge, resulting in complex peripheral circuitry, incomplete protection functions, and low reliability. Second, they use basic gate driver chips, with dead-time control relying on software implementation, posing a risk of dead-time failure due to program anomalies, leading to bridge arm shoot-through short circuits and power switch burnout. Third, protection functions are singular or incomplete, often only offering basic current limiting or undervoltage protection, lacking direct and accurate temperature monitoring and programmable overcurrent protection threshold settings. Fourth, the system integration is low, peripheral circuitry is complex, and it occupies a large area of ​​printed circuit boards (PCBs), hindering the miniaturization and high-density design of automotive electronic modules. Fifth, they lack temperature sensing components directly mounted next to the power switches, making it impossible to reflect the temperature rise of power devices in real time and accurately; they typically rely on external temperature sensors to detect heat sink temperature, resulting in low response speed and sensing accuracy.

[0004] Therefore, there is an urgent need for a three-phase motor gate drive circuit that integrates multiple protection functions and has high reliability, capable of achieving hardware dead-time control, overcurrent detection, and temperature monitoring without relying on software intervention, so as to improve the overall reliability and safety of the system. Summary of the Invention

[0005] The purpose of this application is to provide a three-phase motor gate drive circuit with protection function, which can effectively improve the overall reliability and safety of the system.

[0006] To achieve the above objectives, this application provides the following solution:

[0007] A three-phase motor gate drive circuit with protection function includes: a three-phase full bridge including six power switching transistors; a three-phase gate drive chip, which sets the dead time through a hardware dead time setting branch connected to an external component to prevent the upper and lower bridge arms of the same phase in the three-phase full bridge from conducting simultaneously; the three-phase gate drive chip is configured to: receive pulse width modulation signals and output corresponding gate drive signals to drive the six power switching transistors to perform switching actions to drive the three-phase motor to operate; an overcurrent protection branch including a sampling resistor connected between the lower bridge arm of the three-phase full bridge and ground, the sampling resistor being used to collect current signals to detect overcurrent conditions; and a temperature detection branch including multiple negative temperature coefficient thermistors disposed near the power switching transistors, the negative temperature coefficient thermistors being used to detect the temperature of the power switching transistors.

[0008] For example, the hardware dead-time setting branch includes an external resistor connected to the dead-time setting pin of the three-phase gate driver chip.

[0009] For example, the value of the dead time is proportional to the resistance value of the external resistor.

[0010] For example, the overcurrent protection branch further includes a first threshold resistor and a second threshold resistor. One end of the first threshold resistor is used to connect to the power supply, and the other end is connected in series with the second threshold resistor and then grounded. The intermediate connection point between the first threshold resistor and the second threshold resistor is connected to the overcurrent reference pin of the three-phase gate driver chip.

[0011] For example, it also includes a microcontroller unit connected to the three-phase gate driver chip, which is used to output the pulse width modulation signal and receive fault signals and temperature detection signals from the three-phase gate driver chip.

[0012] For example, the temperature detection branch further includes multiple voltage divider resistors, and the multiple negative temperature coefficient thermistors are connected one-to-one with the multiple voltage divider resistors.

[0013] For example, the plurality of voltage divider resistors are also used to connect to the analog-to-digital converter pin of the microcontroller to convert the resistance change of the negative temperature coefficient thermistor into a voltage signal for the microcontroller to acquire.

[0014] For example, the three-phase gate drive chip also includes a fault pin, which is pulled low to a low level when an overcurrent or undervoltage fault occurs, in order to report the fault status to the microcontroller unit.

[0015] For example, the three-phase gate driver chip further includes a sleep control pin, and the microcontroller unit is further configured to output a sleep signal to the sleep control pin to control the three-phase gate driver chip to enter a low-power standby state.

[0016] For example, all six power switches are N-channel metal-oxide-semiconductor field-effect transistors.

[0017] According to the specific embodiments provided in this application, the following technical effects are disclosed:

[0018] This application provides a three-phase motor gate drive circuit with protection functions, which has the following technical advantages: The three-phase gate drive chip sets the dead time through a hardware dead time setting branch connected to external components, effectively preventing the simultaneous conduction of the upper and lower bridge arms of the same phase in a three-phase full-bridge circuit. The overcurrent protection branch includes a sampling resistor connected between the lower bridge arm of the three-phase full-bridge and ground. The current signal is directly acquired through the sampling resistor to detect the overcurrent state, with a faster response speed than software detection methods. It can quickly respond when an overcurrent fault occurs, effectively protecting the power switching transistor from overcurrent damage. The temperature detection branch includes multiple negative temperature coefficient thermistors placed near the power switching transistor, which can directly reflect the temperature rise of the power switching transistor. Combined with the monitoring of the microcontroller unit, over-temperature warning and derating protection can be realized. Key protection functions such as dead time control, overcurrent detection, and temperature monitoring are implemented by hardware circuits, eliminating the need for software intervention and real-time monitoring by the microcontroller unit. This reduces software complexity and the load on the central processing unit (CPU). Furthermore, integrating multiple protection functions into the three-phase gate drive chip and its peripheral configuration reduces the number of external components, contributing to cost reduction. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the gate drive circuit of a three-phase motor in an embodiment of this application.

[0021] Figure 2 This is a schematic diagram of a three-phase motor gate drive circuit with protection function in an embodiment of this application. Detailed Implementation

[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0023] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0024] This application provides a three-phase motor gate drive circuit with protection function, including: a three-phase full bridge, including six power switching transistors (denoted as Q1, Q2, Q3, Q4, Q5, and Q6); a three-phase gate drive chip U3, which sets the dead time through a hardware dead time setting branch connected to external components to prevent the upper and lower bridge arms of the same phase in the three-phase full bridge from conducting simultaneously; the three-phase gate drive chip U3 is configured to: receive pulse width modulation signals and output corresponding gate drive signals to drive the six power switching transistors respectively. Q1 to Q6 perform switching actions to drive the three-phase motor; the overcurrent protection branch includes sampling resistors (denoted as R1, R2, R3) connected between the lower arm of the three-phase full bridge and ground. Sampling resistors R1, R2, and R3 are used to collect current signals to detect overcurrent conditions; the temperature detection branch includes multiple negative temperature coefficient thermistors (denoted as RT1, RT2, RT3) placed near the power switching transistors Q1 to Q6. Negative temperature coefficient thermistors RT1, RT2, and RT3 are used to detect the temperature of the power switching transistors Q1 to Q6.

[0025] In this embodiment, the three-phase gate driver chip U3 sets the dead time via a hardware dead time setting branch connected to an external component, effectively preventing simultaneous conduction of the upper and lower arms of the same phase in the three-phase full-bridge. The overcurrent protection branch includes sampling resistors R1, R2, and R3 connected between the lower arm of the three-phase full-bridge and ground. Current signals are directly acquired through these resistors to detect overcurrent conditions, resulting in a faster response than software detection. This allows for rapid response when an overcurrent fault occurs, effectively protecting power switches Q1 to Q6 from overcurrent damage. The temperature detection branch includes multiple negative temperature coefficient thermistors RT1, RT2, and RT3 located near the power switches Q1 to Q6. These thermistors directly reflect the temperature rise of the power switches Q1 to Q6. Combined with monitoring by the microcontroller unit (MCU), over-temperature warning and derating protection can be implemented. Key protection functions such as dead-zone control, overcurrent detection, and temperature monitoring are implemented by hardware circuits, eliminating the need for software intervention and real-time monitoring by the microcontroller unit (MCU), thus reducing software complexity. At the same time, multiple protection functions are integrated into the three-phase gate driver chip U3 and its peripheral configuration, reducing the number of external components and helping to reduce costs.

[0026] It should be noted that the three-phase motor gate drive circuit in this application is applied to brushless DC motor (BLDC) drive systems in the automotive electronics field, and is particularly suitable for body actuators such as window lifts, seat adjustments, and slide rail drives. This drive circuit aims to solve the technical problems existing in traditional discrete drive solutions or single-function drive chip solutions, such as dead-time control relying on software, incomplete protection functions, and low system integration.

[0027] like Figure 1 and Figure 2 As shown, the three-phase motor gate drive circuit with protection function in this embodiment includes: a three-phase gate drive chip U3, a three-phase full bridge, a microcontroller unit (MCU), a hardware dead-time setting branch, an overcurrent protection branch, a temperature detection branch, and peripheral configuration circuits.

[0028] The three-phase gate driver chip U3 is the core controller of this drive circuit. Preferably, the model of the three-phase gate driver chip U3 is MPQ6531GV-AEC1. The three-phase gate driver chip U3 receives six pulse width modulation (PWM) signals PWM1 to PWM6 from the MCU. After internal level conversion and drive amplification, it outputs six gate drive signals G1 to G6.

[0029] The three-phase full-bridge circuit comprises six power switches Q1, Q2, Q3, Q4, Q5, and Q6. In this embodiment, all six power switches Q1 to Q6 are N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs). The six power switches Q1 to Q6 form a three-phase bridge structure, where Q1 and Q4 form the U-phase bridge arm, Q2 and Q5 form the V-phase bridge arm, and Q3 and Q6 form the W-phase bridge arm. Each phase bridge arm includes one upper bridge arm power switch and one lower bridge arm power switch. The six gate drive signals G1 to G6 output by the three-phase gate driver chip U3 are respectively connected to the gates of the six power switches Q1 to Q6, driving them to switch and operate, thereby driving the three-phase motor. The three-phase output terminals U, V, and W are led out from the middle node of each phase bridge arm and used to connect to an external three-phase motor. The drains of the power switching transistors Q1, Q2, and Q3 in the upper arm of the three-phase full bridge are connected to the power supply terminal VBAT (automotive battery voltage) to provide the main power supply for the three-phase full bridge.

[0030] The microcontroller unit (MCU) is connected to the three-phase gate driver chip U3 via PWM signal output pins to generate and output six pulse width modulation signals PWM1 to PWM6. The MCU is also equipped with analog-to-digital converter (ADC) input pins and general-purpose input / output (GPIO) pins for receiving temperature detection signals and fault signals.

[0031] The hardware dead-time setting branch has the following structure: It includes an external resistor R4. One end of R4 is connected to the dead-time setting pin (DT pin) of the three-phase gate driver chip U3, and the other end is grounded. By selecting the value of the external resistor R4, the internal dead time of the three-phase gate driver chip U3 can be precisely set. The value of the dead time is directly proportional to the value of the external resistor R4.

[0032] In this embodiment, the formula for calculating the dead time is: tDEAD(ns) = 60 × R(kΩ).

[0033] Where tDEAD represents the dead time in nanoseconds (ns), and R represents the resistance of the external resistor R4 in kiloohms (kΩ). For example, when the resistance of the external resistor R4 is 10kΩ, the dead time is 600ns.

[0034] The function of the hardware dead-time setting branch is to set the dead time through external hardware components (i.e., external resistor R4), without relying on software control, fundamentally avoiding the risk of dead-time failure due to program abnormalities, effectively preventing the upper and lower arms of the same phase in a three-phase full bridge from conducting simultaneously, and eliminating the occurrence of bridge arm shoot-through short circuits.

[0035] The overcurrent protection branch includes sampling resistors R1, R2, and R3, as well as a first threshold resistor R5 and a second threshold resistor R6. Sampling resistors R1, R2, and R3 are connected between the three lower arms of the three-phase full-bridge circuit and ground. Specifically, sampling resistor R1 is connected between the source of power switch Q4 and ground, sampling resistor R2 is connected between the source of power switch Q5 and ground, and sampling resistor R3 is connected between the source of power switch Q6 and ground. Sampling resistors R1, R2, and R3 are used to acquire current signals to detect overcurrent conditions. In this embodiment, sampling resistors R1, R2, and R3 are milliohm-level precision resistors, which can accurately detect the lower arm current without affecting the normal operation of the circuit.

[0036] The first threshold resistor R5 and the second threshold resistor R6 form a threshold setting voltage divider network. One end of the first threshold resistor R5 is connected to the power supply (e.g., 5V), and the other end is connected in series with the second threshold resistor R6 and then grounded. The midpoint between the first threshold resistor R5 and the second threshold resistor R6 is connected to the overcurrent reference pin (OCREF pin) of the three-phase gate driver chip U3. By adjusting the resistance ratio of the first threshold resistor R5 and the second threshold resistor R6, the voltage threshold for overcurrent protection can be set. When the voltage drop across the sampling resistors R1, R2, or R3 exceeds the reference voltage of the OCREF pin, the three-phase gate driver chip U3 determines that an overcurrent fault has occurred and executes the protection action.

[0037] The temperature detection branch includes negative temperature coefficient (NTC) thermistors RT1, RT2, and RT3, and multiple voltage divider resistors R7, R8, and R9. The NTC thermistors RT1, RT2, and RT3 are respectively positioned near power switching transistors Q1 to Q6 to detect their temperature. In this embodiment, NTC thermistor RT1 is mounted near power switching transistors Q1 and Q4 in the U-phase bridge arm, NTC thermistor RT2 is mounted near power switching transistors Q2 and Q5 in the V-phase bridge arm, and NTC thermistor RT3 is mounted near power switching transistors Q3 and Q6 in the W-phase bridge arm. The resistance of the NTC thermistors decreases as temperature increases, directly and in real-time reflecting the temperature rise of the power switching transistors.

[0038] Multiple voltage divider resistors R7, R8, and R9 are connected one-to-one with multiple negative temperature coefficient thermistors RT1, RT2, and RT3 to form a voltage divider temperature measurement network. Specifically, voltage divider resistor R7 is connected in series with negative temperature coefficient thermistor RT1 between the power supply (5V) and ground; voltage divider resistor R8 is connected in series with negative temperature coefficient thermistor RT2 between the power supply and ground; and voltage divider resistor R9 is connected in series with negative temperature coefficient thermistor RT3 between the power supply and ground.

[0039] The intermediate connection points of multiple voltage divider resistors R7, R8, and R9 are also used to connect to the analog-to-digital converter pins (ADC1, ADC2, ADC3) of the microcontroller unit (MCU) to convert the resistance changes of the negative temperature coefficient thermistors RT1, RT2, and RT3 into voltage signals for the MCU to acquire. The MCU calculates the actual temperature of the power switch based on the acquired voltage values ​​and performs over-temperature warning or derating protection when the temperature exceeds a preset threshold.

[0040] The three-phase gate driver chip U3 also includes a fault pin (FAULT pin). The fault pin is pulled low to report the fault status to the microcontroller unit (MCU) in the event of an overcurrent or undervoltage fault. The fault pin is an open-drain output and normally remains high; when the overcurrent protection branch detects an overcurrent condition, or the three-phase gate driver chip U3 detects an internal undervoltage condition, the fault pin is pulled low by internal circuitry. The fault pin is connected to a general-purpose input / output pin of the MCU. The MCU obtains fault information by detecting changes in the level of the fault pin and can trigger an interrupt response for fault handling.

[0041] The three-phase gate driver chip U3 also includes a sleep control pin (nSLEEP pin). The microcontroller unit (MCU) is also used to output a sleep signal to the sleep control pin to control the three-phase gate driver chip U3 to enter a low-power standby state. When the system enters standby mode (e.g., when the vehicle is powered off or the motor has not been operated for a long time), the MCU outputs a low-level sleep signal to the nSLEEP pin, and the three-phase gate driver chip U3 enters a low-power standby state. At this time, the internal drive circuit stops working, and the static power consumption is significantly reduced. When it is necessary to resume normal operation, the MCU outputs a high-level wake-up signal to the nSLEEP pin, and the three-phase gate driver chip U3 resumes normal operation.

[0042] During normal operation, the MCU outputs six pulse width modulation signals (PWM1 to PWM6) to the three-phase gate driver chip U3. After internal level conversion and drive amplification, the three-phase gate driver chip U3 outputs six gate drive signals (G1 to G6), which drive six power switching transistors (Q1 to Q6) to switch in a predetermined sequence, forming a rotating magnetic field to drive the three-phase motor. At this time, a hardware dead-time branch ensures that the upper and lower arms of each phase bridge arm do not conduct simultaneously, preventing short circuits.

[0043] When an overcurrent fault occurs, the voltage drop across the sampling resistors R1, R2, or R3 increases. When it exceeds the reference voltage threshold of the OCREF pin, the three-phase gate driver chip U3 immediately performs a protection action, and at the same time, the fault pin is pulled low to report the fault status to the MCU.

[0044] When the temperature of the power switch increases, the resistance of the negative temperature coefficient thermistors RT1, RT2, or RT3 decreases, causing a change in the voltage at the voltage divider point. The MCU acquires the voltage signal through the ADC pin, calculates the temperature value, and executes derating protection or shuts down the output when the temperature exceeds a preset threshold.

[0045] The three-phase motor gate drive circuit with protection functions in this embodiment has at least the following advantages: By using a hardware dead-time setting branch, the dead-time can be set by external hardware components, fundamentally preventing bridge arm shoot-through short circuits and improving system reliability. Through the overcurrent protection branch, real-time acquisition and rapid overcurrent detection of the lower bridge arm current are achieved, effectively protecting the power switching transistors. Through the temperature detection branch, direct and real-time monitoring of the power switching transistor temperature is achieved, improving the system's durability in high-temperature environments. Multiple protection functions are integrated into the three-phase gate drive chip and its peripheral configuration, reducing software complexity and CPU load, decreasing the number of peripheral components and PCB area, and improving system integration.

[0046] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0047] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM).

[0048] The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0049] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0050] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A three-phase motor gate drive circuit with protection function, characterized in that, include: Three-phase full-bridge, including six power switching transistors; The three-phase gate drive chip sets the dead time by connecting external components through a hardware dead time setting branch to prevent the upper and lower bridge arms of the same phase in the three-phase full bridge from conducting simultaneously. The three-phase gate drive chip is configured to receive pulse width modulation signals and output corresponding gate drive signals to drive the six power switching transistors to perform switching actions, thereby driving the three-phase motor to run. The overcurrent protection branch includes a sampling resistor connected between the lower arm of the three-phase full bridge and ground. The sampling resistor is used to collect current signals to detect overcurrent conditions. The temperature detection branch includes multiple negative temperature coefficient thermistors disposed near the power switch transistor, the negative temperature coefficient thermistors being used to detect the temperature of the power switch transistor.

2. The three-phase motor gate drive circuit with protection function according to claim 1, characterized in that, The hardware dead-time setting branch includes an external resistor, which is connected to the dead-time setting pin of the three-phase gate driver chip.

3. The three-phase motor gate drive circuit with protection function according to claim 2, characterized in that, The value of the dead time is proportional to the resistance value of the external resistor.

4. The three-phase motor gate drive circuit with protection function according to claim 1, characterized in that, The overcurrent protection branch also includes a first threshold resistor and a second threshold resistor. One end of the first threshold resistor is used to connect to the power supply, and the other end is connected in series with the second threshold resistor and then grounded. The midpoint between the first threshold resistor and the second threshold resistor is connected to the overcurrent reference pin of the three-phase gate drive chip.

5. The three-phase motor gate drive circuit with protection function according to claim 1, characterized in that, It also includes a microcontroller unit connected to the three-phase gate driver chip, which is used to output the pulse width modulation signal and receive fault signals and temperature detection signals from the three-phase gate driver chip.

6. The three-phase motor gate drive circuit with protection function according to claim 5, characterized in that, The temperature detection branch also includes multiple voltage divider resistors, and the multiple negative temperature coefficient thermistors are connected one-to-one with the multiple voltage divider resistors.

7. The three-phase motor gate drive circuit with protection function according to claim 6, characterized in that, The plurality of voltage divider resistors are also used to connect to the analog-to-digital converter pins of the microcontroller to convert the resistance change of the negative temperature coefficient thermistor into a voltage signal for the microcontroller to acquire.

8. The three-phase motor gate drive circuit with protection function according to claim 5, characterized in that, The three-phase gate drive chip also includes a fault pin, which is pulled low to a low level when an overcurrent or undervoltage fault occurs, so as to report the fault status to the microcontroller unit.

9. The three-phase motor gate drive circuit with protection function according to claim 5, characterized in that, The three-phase gate driver chip also includes a sleep control pin, and the microcontroller unit is further configured to output a sleep signal to the sleep control pin to control the three-phase gate driver chip to enter a low-power standby state.

10. The three-phase motor gate drive circuit with protection function according to claim 1, characterized in that, All six power switches are N-channel metal-oxide-semiconductor field-effect transistors.

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