A multi-mode control method and system for a half-bridge three-level converter applicable to a wide load range

Abstract

This invention discloses a multi-mode control method and system for a half-bridge three-level converter applicable to a wide load range. The method acquires the converter output state information and classifies the operating modes into three categories: light load, medium load, and heavy load. Under light load, PI control is used to determine the dynamic modulation duty cycle, combined with a Burst control strategy to achieve intermittent modulation. Under medium load, PI control outputs a dynamic modulation duty cycle within the range of 0 to 0.5, controlling the power switching devices to operate continuously according to a preset phase relationship and conduction logic. Under heavy load, based on the medium load control, DC bus voltage divider capacitor voltage acquisition and equalization adjustment are added, and an equalization compensation amount is generated through a PI algorithm and superimposed on the dynamic modulation duty cycle. This invention solves the problems of high light load loss and heavy load voltage imbalance in traditional half-bridge three-level converters under wide load conditions, achieving efficient and stable operation of the converter across the entire load range. It is suitable for industrial power supplies, new energy power supplies, and other scenarios, and has good engineering practical value.

Description

Technical Field

[0001] This invention belongs to the field of power electronics and switching power supply technology, specifically relating to a multi-mode control method and system for a half-bridge three-level isolated converter suitable for a wide load range. Background Technology

[0002] Half-bridge three-level converters are widely used in industrial power supply systems requiring high power density and high efficiency due to their advantages such as low voltage stress on power devices, low switching losses, and suitability for high input voltage applications. However, in practical applications, half-bridge three-level converters typically need to operate over a wide load range, from light to heavy loads. Existing control methods often employ fixed modulation schemes or single control strategies, making it difficult to meet the performance requirements under different load conditions. In light-load mode, the converter operates in continuous high-frequency PWM mode, resulting in a high proportion of switching and drive losses from the power switching devices and their drive circuits, leading to a significant decrease in system efficiency under light load. In heavy-load mode, voltage imbalance is prone to occur in the DC bus voltage divider capacitors of the three-level structure. Without effective voltage equalization control, this may increase voltage stress on power devices and reduce system reliability. Therefore, it is necessary to propose a multi-mode operating method suitable for half-bridge three-level isolated converters to achieve comprehensive optimization of efficiency, stability, and reliability over a wide load range. Summary of the Invention

[0003] This invention provides a multi-mode control method for a half-bridge three-level converter applicable to a wide load range, characterized by: acquiring output state information; determining the operating mode based on the output state information, wherein the operating mode is one of light-load mode, medium-load mode, and heavy-load mode; when the operating mode is light-load mode, determining the dynamic modulation duty cycle for adjusting the output voltage based on the output voltage feedback signal using a PI control algorithm, and introducing a Burst control strategy based on the dynamic modulation duty cycle to obtain the equivalent duty cycle based on a preset number of Burst cycles; performing intermittent modulation control on the power switching devices of the isolated half-bridge three-level converter based on the combination relationship between the dynamic modulation duty cycle and the equivalent duty cycle; when the operating mode is medium-load mode, based on the output voltage... The feedback signal is used to determine the current dynamic modulation duty cycle using a PI control algorithm, and the dynamic modulation duty cycle is limited to the range of 0 to 0.5 as the power modulation duty cycle within a fixed period. Based on the dynamic modulation duty cycle, the power switching devices S1, S2, S3, and S4 in the isolated half-bridge three-level converter are controlled to operate according to a preset phase relationship and conduction logic. When the operating mode is the heavy load mode, based on the control of the medium load mode, the voltage information of the DC bus voltage divider capacitor is further collected, and the voltage deviation between the upper and lower voltage divider capacitors is calculated by the PI control algorithm. Based on the voltage deviation, a voltage equalization adjustment amount is generated. The voltage equalization adjustment amount is superimposed on the dynamic modulation duty cycle to correct the modulation signal of the power switching devices, thereby realizing dynamic equalization control of the DC bus voltage.

[0004] Preferably, the output current is obtained, and a first current threshold I is preset. L1 Second current threshold I L2 The first current threshold corresponds to the boundary between light load and medium load, and the second current threshold corresponds to the boundary between medium load and heavy load; the output current is less than the first current threshold I. L1 The operating mode is determined to be a light-load mode; the output current is greater than or equal to the first current threshold I. L1 And less than the second current threshold I L2 The operating mode is determined to be a medium-load mode; the output current is greater than or equal to the second current threshold I. L2 The operating mode is determined to be a heavy-load mode.

[0005] Preferably, all modes use the same basic modulation unit. The control logic of the basic modulation unit includes: setting the switching period to T, with switches S2 and S3 conducting for half a cycle in each switching period, and switch S3 lagging behind switch S2 by half a cycle; switches S1 and S2 having the same turn-on time, and switches S4 and S3 having the same turn-on time; switches S1 and S4 having the same duty cycle, which is D, and adjusting D to adjust the converter output voltage.

[0006] Preferably, when the operating mode is a light-load mode, the control system enters a light-load Burst control process, including: calculating the dynamic modulation duty cycle D for maintaining output voltage stability using a PI control algorithm based on the output voltage feedback signal, and limiting the duty cycle to make it within the effective range of 0 to 0.5; setting the number of Burst cycles N according to the allowable output voltage ripple and system stability requirements under light-load mode, and using the control logic of the basic modulation unit in each Burst cycle.

[0007] Preferably, when the operating mode is the medium load mode, the control system enters the PWM modulation control mode, including: calculating the current dynamic modulation duty cycle D based on the output voltage feedback signal using a PI control algorithm, and limiting the duty cycle to the range of 0 to 0.5; and controlling the power switching device according to the control logic of the basic modulation unit.

[0008] Preferably, when the operating mode is the heavy-load mode, the capacitor voltage equalization control function is enabled, including: real-time acquisition of the voltage signals of the first voltage divider capacitor C1 and the second voltage divider capacitor C2, and calculation of the voltage deviation value ΔV between the voltage divider capacitors C1 and C2; after performing PI calculation on the voltage deviation value ΔV, outputting the duty cycle compensation amount ΔD used to realize capacitor voltage equalization control; when ΔD is positive, adjusting the turn-on time of switch S1 to (D+ΔD)T, and simultaneously adjusting the turn-on time of switch S4 to (D-ΔD)T; when ΔD is negative, shortening the turn-on time of switch S1 to (D-|ΔD|)T, and simultaneously extending the turn-on time of switch S4 to (D+|ΔD|)T.

[0009] A multi-mode control system for a half-bridge three-level converter suitable for a wide load range is characterized by the application of the method described above. The control system includes: an information acquisition module for acquiring the converter's operating status information; a mode determination module for judging the current load state of the converter based on the operating status information and determining the converter's operating mode accordingly; wherein the operating mode is one of light load mode, medium load mode, and heavy load mode; and a converter control module for determining, when the operating mode is light load mode, the current dynamic modulation duty cycle D used to maintain output voltage stability based on the output voltage feedback signal using a PI control algorithm, and introducing a Burst control strategy based on the dynamic modulation duty cycle to obtain an equivalent duty cycle according to a preset Burst cycle number N. The converter control module is further configured to, when the operating mode is medium load mode, determine the current dynamic modulation duty cycle D based on the output voltage feedback signal using a PI control algorithm, and limit the dynamic modulation duty cycle to the range of 0 to 0.5 as the power modulation duty cycle within a fixed switching cycle, and control the power switching devices S1, S2, S3, and S4 to operate according to a preset three-level conduction logic based on the dynamic modulation duty cycle; the converter control module is further configured to, when the operating mode is heavy load mode, calculate the voltage equalization adjustment amount based on the voltage information of the DC bus voltage divider capacitor using a PI control algorithm, and add the voltage equalization adjustment amount to the dynamic modulation duty cycle to correct the modulation signal of the power switching devices, based on the voltage information of the DC bus voltage divider capacitor, using a heavy load mode control, and add the voltage equalization adjustment amount to the dynamic modulation duty cycle.

[0010] Compared with existing technologies, the multi-mode control method and system for half-bridge three-level isolated converters applicable to a wide load range provided by this invention have at least the following advantages: By introducing a multi-mode control strategy into a half-bridge three-level isolated converter, the converter can automatically switch its operating mode according to load changes under light, medium, and heavy load conditions, thereby achieving efficient operation over a wide load range. In light load mode, Burst control is used instead of PWM control, effectively reducing the equivalent switching frequency of the power switching devices, significantly reducing switching and drive losses, and improving system efficiency under light load. In medium load mode, a clear and flexible control mode is adopted, ensuring output voltage stability and system efficiency. In heavy load mode, DC bus voltage equalization control is introduced, effectively suppressing the voltage imbalance problem of the voltage divider capacitors in the three-level structure, reducing voltage stress on power devices, and improving the reliability and safety of the system under high-power operating conditions. Furthermore, this invention achieves smooth transitions between different operating modes through a reasonable mode determination and switching mechanism, avoiding output voltage fluctuations and system oscillations, and has good engineering practical value. Attached Figure Description

[0011] Figure 1 This is a flowchart illustrating a multi-mode control method for a half-bridge three-level converter applicable to a wide load range according to the present invention.

[0012] Figure 2 This is a schematic diagram illustrating the process of determining the working mode in an embodiment of the present invention.

[0013] Figure 3 This is a circuit diagram of a half-bridge three-level isolated converter for a wide load range according to an embodiment of the present invention.

[0014] Figure 4 This is a schematic diagram of the basic modulation unit control logic in an embodiment of the present invention.

[0015] Figure 5 This is a control block diagram for the light-load mode in an embodiment of the present invention.

[0016] Figure 6 This is a control block diagram of the load mode in an embodiment of the present invention.

[0017] Figure 7 This is a control block diagram for the overloaded mode in an embodiment of the present invention.

[0018] Figure 8 This is a schematic diagram of the simulated waveform of the light-load mode with a reference voltage of 48V and an output current of 1A in an embodiment of the present invention.

[0019] Figure 9 This is a schematic diagram of the simulation waveform of a reference voltage of 48V and an output current of 10A under the load mode in an embodiment of the present invention.

[0020] Figure 10 This is a schematic diagram of the simulated waveform under heavy-load mode with a reference voltage of 48V and an output current of 25A in an embodiment of the present invention.

[0021] Figure 11 This is a schematic diagram of the simulated waveforms during jumps in light load, medium load, and heavy load modes according to an embodiment of the present invention.

[0022] Figure 12 This is a schematic diagram comparing the efficiency of converters without and with multi-mode control methods across the entire load range under the same power, load, and circuit topology conditions according to an embodiment of the present invention. Detailed Implementation

[0023] To more clearly illustrate the technical solutions of the embodiments in this specification, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are merely some examples or embodiments of this specification. For those skilled in the art, these drawings can be applied to other similar scenarios without creative effort. Unless obvious from the linguistic context or otherwise specified, the same reference numerals in the drawings represent the same structures or operations. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0024] Example 1: As Figure 1 This is a flowchart illustrating a multi-mode control method for a half-bridge three-level converter applicable to a wide load range, as shown below. Figure 1 As shown, a multi-mode control method for a half-bridge three-level isolated converter with a wide load range may include the following steps.

[0025] Step 110: Obtain the output information.

[0026] Specifically, the output information may include parameters such as output voltage, output current, and DC bus voltage divider capacitor voltage.

[0027] Step 120: Based on the collected output information, determine the current load condition of the converter and determine the working mode of the converter accordingly. The mode is one of light load mode, medium load mode, and heavy load mode.

[0028] Step 130: When the converter is in light-load mode, based on the output voltage feedback signal, a PI control algorithm is used to determine the dynamic modulation duty cycle for adjusting the output voltage. A Burst control strategy is introduced based on this dynamic modulation duty cycle, and the equivalent duty cycle is obtained according to a preset number of Burst cycles. This ensures that the converter transfers energy only during a portion of the switching cycles, maintaining a zero-level clamping state during the remaining cycles. Based on the combination of the dynamic modulation duty cycle and the equivalent duty cycle, intermittent modulation control is applied to the power switching devices of the isolated half-bridge three-level converter. This method significantly reduces the equivalent switching frequency, thereby reducing switching losses and drive losses, and improving light-load operating efficiency.

[0029] Step 140: When the converter is in medium-load mode, based on the output voltage feedback signal, a PI control algorithm is used to determine the current dynamic modulation duty cycle, and the dynamic modulation duty cycle is limited to the range of 0 to 0.5 as the power modulation duty cycle within a fixed period. According to the dynamic modulation duty cycle, the power switching devices S1, S2, S3 and S4 in the isolated half-bridge three-level converter are controlled to work according to the preset phase relationship and conduction logic. Through the adjustment of the phase relationship and duty cycle of the basic modulation unit, continuous control of the energy transfer of the isolation transformer is realized, thereby ensuring the stable operation of the output voltage under medium-load conditions.

[0030] Step 150: When the converter is in heavy-load mode, the DC bus voltage equalization control function is enabled based on the medium-load normal control mode. The control system collects the voltage values ​​of the upper and lower voltage divider capacitors in real time and calculates the voltage deviation; it generates a voltage equalization adjustment amount through a PI control algorithm and adds this adjustment amount to the modulation duty cycle to correct the drive signal of the power switching devices. This method can effectively suppress the bus voltage imbalance problem during heavy-load operation, reduce the voltage stress on the devices, achieve dynamic equalization control of the DC bus voltage, and improve system reliability.

[0031] Figure 2 This is a flowchart illustrating the determination of the operating mode according to some embodiments of this specification, such as... Figure 2 As shown, in some embodiments, step 120 specifically includes: S1. Determine if the output current is greater than or equal to the first current threshold I. L1 If yes, execute S2; otherwise, determine that the working mode is a light-load mode. S2. Determine if the output current is greater than or equal to the second current threshold I. L2 If yes, execute S3; otherwise, determine that the working mode is a medium-load mode. S3. Determine that the working mode is a heavy-load mode.

[0032] In some embodiments, the first current threshold I L1 Second current threshold I L2 Determined based on rated output current.

[0033] Specifically, the first current threshold I L1 Used to distinguish between light-load and medium-load modes. L1 The setting corresponds to the load current point where switching losses begin to be on the same order of magnitude as conduction losses, allowing for a significant efficiency improvement when using the Burst control strategy below this current. Furthermore, I... L1The threshold value should not be too small, otherwise the converter will frequently enter the Burst state during normal low-power continuous operation, affecting output voltage ripple and control stability. Taking into account the output power level, switching device parameters, and output filtering capability, the first current threshold value I is set as follows: L1 The design current is approximately 10% to 15% of the rated output current; in this embodiment, I is taken as... L1 The current is set to 3A, thus ensuring both improved efficiency under light loads and optimal output performance. The second current threshold I... L2 Used to distinguish between medium-load and heavy-load modes. L2 The setting should correspond to the load current range where the risk of bus voltage imbalance increases significantly and voltage equalization control needs to be introduced. L2 Too low a voltage will cause complex voltage equalization control to be activated prematurely under medium load conditions, increasing the burden on the control system; L2 Excessive current may cause the converter to remain in an unbalanced voltage control state even at high power levels, thus affecting device safety. Based on a rated output current of 25A, the second current threshold I... L2 Set to approximately 45% to 55% of the rated output current, I L2 A value of 13A is selected to ensure that the heavy-load control strategy is activated in a timely manner when entering the high-power operating range.

[0034] The beneficial effect of this embodiment is that it provides a clear and quantifiable load state perception and automatic operating mode decision-making framework. By preset a first current threshold IL1 and a second current threshold IL2 related to the rated current, and by quickly comparing them with the real-time acquired output current, the system can accurately and automatically classify the complex operating state of the converter into three discrete modes: light load, medium load, and heavy load. This judgment mechanism is a prerequisite for the correct execution of all subsequent differentiated control strategies. Its core value lies in realizing the intelligent matching of control strategies and load conditions, fundamentally avoiding the performance compromises caused by a single control strategy, and laying a key decision-making foundation for achieving comprehensive optimization of efficiency, stability, and reliability over a wide load range.

[0035] Example 2: This example should be understood as including at least all the features of any of the foregoing examples, and further improving upon them; Figure 3 This is a circuit diagram of a half-bridge three-level isolated converter. The converter includes a first voltage-dividing capacitor C1 and a second voltage-dividing capacitor C2 connected in series on the input side to form a three-level DC bus; four power switching devices S1, S2, S3, and S4 are arranged sequentially from top to bottom to form a power conversion unit, with switches S1 and S2 forming the upper bridge arm and switches S3 and S4 forming the lower bridge arm; the output of the power conversion unit is connected to a high-frequency isolation transformer L. mThe transformer's secondary side outputs DC power after rectification and filtering. The duty cycle of switches S1 and S4 is D. Where V... s For DC power supply, P is the anode of DC power supply, N is the cathode of DC power supply, and u c1 The voltage across capacitor C1, u c2 The voltage across capacitor C2 is C. coss1 C is a capacitor connected in parallel with S1. coss2 C is a capacitor connected in parallel with S2. coss3 For the capacitor connected in parallel with S3, C coss4 For the capacitor connected in parallel with S4, D r1 D r2 D s1 D s2 D s3 D s4 D1, D2, D3, and D4 are all diodes, L r For inductance, C f For capacitor R o For resistance, i o For the output current, u o This is the output voltage. The connection point Q between the upper voltage divider capacitor C1 and the lower voltage divider capacitor C2 is connected to the diode D. r1 The anode of diode D is connected. s1 The anode a terminal and the inductor L r One end is connected, inductor L r The other end is connected to converter L m One end of the primary winding is connected. The anode of diode D1 is connected to converter L. m The secondary side (c) is connected, and the anode of diode D2 is connected to converter L. m The secondary side d terminal is connected. Here, n:1 represents the transformation ratio; the connection point Q is also connected to diode D. r2 Cathode M, converter L m Connect the other end b on the first side.

[0036] Figure 4 The basic modulation unit control logic diagram shows that the converter uses the same basic modulation logic in three different modes: In each switching cycle, switches S2 and S3 are both on for half a cycle, with switch S3 lagging behind switch S2 by half a cycle; switches S1 and S2 have the same on-time, and switches S4 and S3 have the same on-time, with the same duty cycle. The duty cycle D ranges from 0 to 0.5. By adjusting the duty cycle of switches S1 and S4, the converter output voltage is regulated.

[0037] When the operating mode is light-load mode, the control system enters the light-load Burst control process, including: calculating the dynamic modulation duty cycle D for maintaining output voltage stability using a PI control algorithm based on the output voltage feedback signal, and limiting the duty cycle to keep it within the effective range of 0 to 0.5; setting the number of Burst cycles N according to the allowable output voltage ripple and system stability requirements under light-load mode, and using the control logic of the basic modulation unit in each Burst cycle. This reduces the equivalent switching frequency and decreases switching and drive losses while ensuring output voltage stability.

[0038] Specifically, Figure 5 This is the control block diagram under light load mode. The light load mode introduces a Burst control strategy based on the basic modulation unit to achieve a significant improvement in light load efficiency. In this light load control mode, the control system first adjusts the output voltage V... o Perform real-time sampling and compare it with the reference voltage V. ref A comparison is made to obtain a voltage error signal. This voltage error signal is input to a PI controller, which calculates the dynamic modulation duty cycle D for the basic modulation unit based on the error magnitude. The duty cycle value ranges from 0 to D and from 0 to 0.5. This dynamic modulation duty cycle ensures that the output voltage remains near the reference value when the converter is in energy transfer mode, thereby ensuring steady-state regulation accuracy. Under the aforementioned light-load mode, the PI controller adjusts the dynamic duty cycle D of the basic modulation unit using the output voltage error as input, defining the output voltage error as e. v (t), its calculation formula is: The dynamic duty cycle output by the PI controller is: Where k pL k is the proportionality coefficient for the light-load mode. iL These are the integral coefficients for the lightly loaded mode.

[0039] The Burst control module periodically enables and disables the basic modulation unit according to a preset number of Burst cycles N. The Burst control module uses the switching cycle as the smallest time unit, allowing only the first N cycles within a consecutive N switching cycles to be enabled or disabled. on The basic modulation unit is enabled for one cycle, enabling the converter to operate normally according to the aforementioned dynamic duty cycle and transfer energy to the load; in the remaining N... off =N−N onDuring each cycle, the drive signal output of the basic modulation unit is disabled, keeping the main power switch in a zero-level clamped state, thereby cutting off the energy transfer path. Through this intermittent operation mode, the equivalent switching frequency of the converter is significantly reduced, effectively reducing the switching and drive losses of the power devices.

[0040] Specifically, the number of Burst cycles N is set according to the output current magnitude and is related to the first current threshold I. L1 Correspondingly: when the output current is close to zero load, a larger N value is chosen to minimize the equivalent switching frequency; when the output current gradually approaches I... L1 At this time, N is gradually decreased to reduce voltage ripple and achieve a smooth transition to the medium load mode. The maximum value of the Burst cycle number N is... max The main constraints are output voltage ripple, the reduction effect of equivalent switching frequency, and control stability: when N is too large, the output capacitor discharge time is too long during the disabled phase, which easily leads to increased output voltage ripple and affects voltage loop stability; when N is too small, the reduction of equivalent switching frequency is limited, and the energy-saving effect under light load is not obvious. Based on the output filtering parameters and simulation verification of a half-bridge three-level isolated converter with a rated output current of 25A, N... max The value is set within the range of 20 to 30; in this embodiment, 30 is used. The minimum value N of the Burst cycle number is... min Primarily used to ensure effective differentiation between Burst control and PWM control, and to achieve a smooth transition from light-load mode to medium-load mode. If the value of N is too small, it will weaken the intermittent power supply characteristics and reduce the difference in control strategies. Considering both control continuity and ease of digital implementation, N is... min The value is set within the range of 3 to 5; in this embodiment, it is set to 5, thereby achieving an effective improvement in light-load efficiency while ensuring output voltage stability. Under light-load mode, the number of Burst cycles N and the output current I... o The relationship can be represented as: Among them I min To minimize effective output current near no-load conditions and avoid numerical fluctuations, it is set to 0.5A; N max N represents the maximum number of Burst cycles allowed under light load. min This represents the minimum number of Burst cycles allowed under light load mode; ⌊⌋ indicates the floor function, used to ensure that the number of Burst cycles is an integer.

[0041] The smooth transition described in this embodiment can be a gradual change from the current duty cycle to the target duty cycle.

[0042] When the operating mode is the medium load mode, the control system enters the PWM modulation control mode, including: calculating the current dynamic modulation duty cycle D based on the output voltage feedback signal using a PI control algorithm, and limiting the duty cycle to the range of 0 to 0.5; and controlling the power switching device according to the control logic of the basic modulation unit.

[0043] Specifically, Figure 6 The control block diagram for medium load mode is as follows: When the converter operates in medium load mode, the control system exits the Burst control strategy used during light load and switches to the normal control mode of PWM modulation. In medium load mode, the control system first adjusts the output voltage V... o Perform real-time sampling and compare with reference voltage V ref The output voltage error signal is obtained by comparison. This error signal is input to a PI controller, which calculates the modulation duty cycle D in real time based on the magnitude and trend of the voltage deviation. Upper bridge arm power switches S1 and S2 are turned on simultaneously, while lower bridge arm power switches S3 and S4 are turned on in another time period. The conduction phase of S3 lags behind S2 by half a switching cycle, thus forming a symmetrical three-level voltage waveform on the primary side of the transformer. By adjusting the duty cycle of S1 and S4, the effective voltage amplitude on the primary side is continuously adjusted, thereby controlling the energy transfer of the isolation transformer. The duty cycle of switches S1 and S4 is used to adjust the amount of energy transferred to the isolation transformer, thereby achieving stable control of the output voltage. In the above-mentioned medium-load mode, the PI controller uses the output voltage error as input to adjust the dynamic duty cycle D of the basic modulation unit, defining the output voltage error as e. v (t), its calculation formula is: The dynamic duty cycle output by the PI controller is: Where k pM k is the proportionality coefficient for the intermediate load mode. iM These are the integral coefficients of the intermediate load mode.

[0044] When the operating mode is heavy load mode, the capacitor voltage equalization control function is enabled, including: real-time acquisition of the voltage signals of the first voltage divider capacitor C1 and the second voltage divider capacitor C2, calculation of the voltage deviation value ΔV between the voltage divider capacitors C1 and C2; outputting the duty cycle compensation amount ΔD for realizing capacitor voltage equalization control after performing PI calculation on the voltage deviation value ΔV; so as to realize dynamic equalization control of DC bus voltage, thereby suppressing the voltage imbalance phenomenon under heavy load mode.

[0045] When ΔD is positive, the turn-on time of switch S1 is adjusted to (D+ΔD)T, and the turn-on time of switch S4 is adjusted to (D-ΔD)T. When ΔD is negative, the turn-on time of switch S1 is shortened to (D-|ΔD|)T, and the turn-on time of switch S4 is extended to (D+|ΔD|)T. This dynamic compensation mechanism achieves balanced and stable voltage across the two capacitors.

[0046] Specifically, Figure 7 Control block diagram under heavy load mode: Output voltage V o With a given reference voltage V ref The deviation signal between the two voltage levels is processed by a PI controller to generate the main duty cycle D for adjusting the output voltage amplitude. In heavy-load mode, the PI controller uses the output voltage error as input to adjust the dynamic duty cycle D of the basic modulation unit, defining the output voltage error as e. v (t), its calculation formula is: The dynamic duty cycle output by the PI controller is: Where k pH k is the proportionality coefficient for the heavy-load mode. iH These are the integral coefficients for the overloaded mode.

[0047] Under this duty cycle, power switches S1 and S4 are turned on for a duration of DT in each switching cycle, with S4's turn-on timing lagging behind S1 by half a switching cycle. Simultaneously, power switches S2 and S3 are turned on for a duration of T / 2 in each switching cycle, with S3's turn-on timing also lagging behind S2 by half a switching cycle, thus forming a symmetrical three-level excitation waveform on the primary side of the transformer. The voltage difference V between the DC bus voltage divider capacitors C1 and C2... c1 -V c2 The PI controller, acting as a feedback signal input to the voltage equalization regulation PI stage, outputs a capacitor voltage equalization regulation amount ΔD, used for fine-tuning the main duty cycle. The PI controller uses the voltage difference V... c1 -V c2 As input, the duty cycle ΔD of the voltage equalization control is adjusted, and the output voltage error is defined as e. vd (t), its calculation formula is: The dynamic duty cycle output by the PI controller is: Where k pd k is the proportional coefficient for pressure equalization control. id This is the integral coefficient for pressure equalization control.

[0048] When ΔD is positive, the control strategy increases the on-time of switch S1 to (D+ΔD)T, while correspondingly decreasing the on-time of switch S4 to (D−ΔD)T. When ΔD is negative, the on-time of S1 is shortened and the on-time of S4 is lengthened. Since the changes in the on-time of S1 and S4 are equal in magnitude and opposite in direction within the same switching cycle, and the output voltage amplitude is only related to the total on-time of S1 and S4 within one cycle, the system achieves balanced regulation of the DC bus voltage without causing significant fluctuations in the output voltage, thus ensuring stable operation of the system under heavy load conditions.

[0049] Figure 8 This is a schematic diagram of the simulation waveform when the reference voltage is 48V and the output current is 1A under light load mode. In the diagram, V... gs3 It is the drive signal for power switch S3, V gs4 This is the drive signal for power switch S4, and the horizontal axis in the graph represents time. As can be seen from the graph, under light load conditions, the drive signals for power switches S3 and S4 exhibit obvious Burst mode characteristics, meaning that they are only turned on for a portion of the continuous switching cycle, while maintaining a zero-level clamping state for the remaining cycles, thus achieving intermittent energy transfer. Observing the output waveform specifically, the output voltage V... o The voltage rises rapidly to near the reference voltage during the brief energy transfer cycle, and decreases slightly during the disable cycle, but remains within the allowable ripple range overall. Output current waveform I o The waveform exhibits a low-amplitude, stable state, consistent with the reference load current of 1A, and shows no obvious oscillations. This indicates that the light-load Burst control strategy can ensure the stability and continuity of the output voltage and current while reducing the equivalent switching frequency and switching losses.

[0050] Figure 9 This is a schematic diagram of the simulation waveform when the reference voltage is 48V and the output current is 10A under medium load mode. In the diagram, V... gs3 It is the drive signal for power switch S3, V gs4 This is the drive signal for power switch S4; the horizontal axis in the diagram represents time. Under medium load conditions, the converter uses PWM modulation with no intermittent enable, and the conduction logic of switches S1-S4 executes stably according to the phase relationship of the basic modulation unit. Observing the output waveform, we can see that the output voltage V... o The output current I remains stable near the reference value. o The waveform is smooth and continuous, without the periodic decline phenomenon observed in the Burst mode.

[0051] Figure 10This is a simulated waveform diagram of the capacitor voltage difference under heavy-load mode with a reference voltage of 48V and an output current of 25A. The vertical axis represents the voltage difference, and the horizontal axis represents time. In this mode, the converter switch operates in PWM mode, and DC bus voltage divider and equalization control is introduced. This equalization control effectively suppresses the voltage difference between bus capacitors C1 and C2 after fine-tuning the switch duty cycle ΔD. Output voltage V o Even under high-power transmission conditions, it can still stably maintain a value near the reference value of 48V, with an output current I o The waveform is continuous and the amplitude is consistent with the set value of 25A, indicating that the equalization regulation effectively avoids voltage fluctuations or excessive switch stress caused by bus imbalance.

[0052] Figure 11 This diagram illustrates the simulated waveforms during mode switching under light, medium, and heavy load conditions. As can be seen from the diagram, the output voltage V changes during different mode switching processes. o No obvious sudden change occurred, and the output current I o The fact that the modal determination and switching mechanism proposed in this invention changes with the set value demonstrates that it has good smoothness and stability.

[0053] Figure 12 This diagram compares the efficiency of converters using the multimodal control method of this invention with those using the method under the present invention across the entire load range. The vertical axis represents efficiency, and the horizontal axis represents load. The results show that under light and heavy load conditions, the converter using the multimodal control method of this invention has significantly higher efficiency than the traditional single control method, fully verifying the comprehensive performance advantages of this invention over a wide load range.

[0054] The beneficial effects of this embodiment are that, under a unified basic modulation unit, different control methods are designed for three load modes: Under light load, Burst control is introduced to achieve intermittent operation, significantly reducing the equivalent switching frequency, directly reducing switching and drive losses under light load, and greatly improving light load efficiency; under medium load, classic PI control with continuous PWM is adopted, ensuring stable and accurate output voltage while achieving efficient energy transfer, providing a reliable basic operating platform; under heavy load, a voltage equalization closed loop based on the voltage deviation of the voltage divider capacitor is superimposed on the PWM control, dynamically correcting the switching signal by generating a duty cycle compensation amount ΔD, thereby effectively suppressing DC bus voltage imbalance, reducing voltage stress on power devices, and significantly improving the system's operational reliability and safety under high power. The three modes switch smoothly, collectively covering the entire load range.

[0055] Example 3: This example should be understood as including at least all the features of any of the foregoing examples, and further improving upon them; This embodiment provides a control system for a half-bridge three-level isolated converter suitable for a wide load range. Applying the aforementioned multi-mode control method for half-bridge three-level converters, the control system includes: an information acquisition module for acquiring the converter's operating status information, which includes at least output voltage information, output current information, and the voltage information of the DC bus voltage divider capacitor; a mode determination module for judging the current load state of the converter based on the operating status information and determining the converter's operating mode accordingly, wherein the operating mode is one of light load mode, medium load mode, and heavy load mode; and a converter control module for determining the current dynamic modulation duty cycle D for maintaining output voltage stability based on the output voltage feedback signal using a PI control algorithm when the operating mode is light load mode, and introducing a Burst control strategy based on the dynamic modulation duty cycle, obtaining an equivalent duty cycle according to a preset Burst cycle number N, thereby controlling the isolated half-bridge three-level converter. The power switching devices are intermittently modulated to reduce the equivalent switching frequency and switching losses. The converter control module is also used to determine the current dynamic modulation duty cycle D based on the output voltage feedback signal when the operating mode is medium load mode, and limit the dynamic modulation duty cycle to the range of 0 to 0.5 as the power modulation duty cycle within a fixed switching cycle. According to the dynamic modulation duty cycle, the power switching devices S1, S2, S3 and S4 are controlled to operate according to the preset three-level conduction logic to achieve stable regulation of the output voltage. The converter control module is also used to calculate the voltage equalization adjustment amount based on the voltage information of the DC bus voltage divider capacitor when the operating mode is heavy load mode, based on the medium load mode control, and add the voltage equalization adjustment amount to the dynamic modulation duty cycle to correct the modulation signal of the power switching devices, thereby achieving dynamic equalization control of the three-level DC bus voltage.

[0056] The beneficial effect of this embodiment is that it provides a control system for a half-bridge three-level isolated converter suitable for a wide load range. The system includes a hardware and software collaboration of an information acquisition module, a mode determination module, and a converter control module, and successfully applies the aforementioned method to the specific circuit topology of a half-bridge three-level isolated converter. Through the implementation of this system and empirical verification using simulation waveforms and efficiency comparison curves, this embodiment demonstrates that the multi-modal control method can be effectively executed in real circuits and achieves smooth, disturbance-free transitions between modes during load changes. Finally, in the efficiency comparison across the entire load range, especially in the light and heavy load ranges, the efficiency of this method significantly and comprehensively surpasses that of traditional single control strategies. From both system implementation and experimental data perspectives, this invention verifies that the overall technical solution proposed in this invention possesses excellent engineering practical value and comprehensive performance advantages.

Claims

1. A multi-mode control method for a half-bridge three-level converter suitable for a wide load range, characterized in that: The system acquires output status information; based on the output status information, it determines the operating mode, which is one of light-load mode, medium-load mode, and heavy-load mode; when the operating mode is light-load mode, based on the output voltage feedback signal, it uses a PI control algorithm to determine the dynamic modulation duty cycle for adjusting the output voltage, and introduces a Burst control strategy based on the dynamic modulation duty cycle to obtain the equivalent duty cycle according to a preset number of Burst cycles; based on the combination relationship between the dynamic modulation duty cycle and the equivalent duty cycle, it performs intermittent modulation control on the power switching devices of the isolated half-bridge three-level converter; when the operating mode is medium-load mode, based on the output voltage feedback signal, it uses a PI control algorithm to determine the current dynamic modulation duty cycle. The dynamic modulation duty cycle is limited to the range of 0 to 0.5, serving as the power modulation duty cycle within a fixed period. Based on the dynamic modulation duty cycle, the power switching devices S1, S2, S3, and S4 in the isolated half-bridge three-level converter are controlled to operate according to a preset phase relationship and conduction logic. When the operating mode is the heavy-load mode, based on the control of the medium-load mode, the voltage information of the DC bus voltage divider capacitor is further collected. The voltage deviation between the upper and lower voltage divider capacitors is calculated through a PI control algorithm, and a voltage equalization adjustment amount is generated based on the voltage deviation. The voltage equalization adjustment amount is superimposed on the dynamic modulation duty cycle to correct the modulation signal of the power switching devices, thereby achieving dynamic equalization control of the DC bus voltage.

2. The multi-mode control method for a half-bridge three-level converter applicable to a wide load range according to claim 1, characterized in that: Obtain the output current and preset the first current threshold I. L1 Second current threshold I L2 The first current threshold corresponds to the boundary between light load and medium load, and the second current threshold corresponds to the boundary between medium load and heavy load. The output current is less than the first current threshold I L1 The operating mode is determined to be a light-load mode; The output current is greater than or equal to the first current threshold I. L1 And less than the second current threshold I L2 The operating mode is determined to be a medium-load mode; The output current is greater than or equal to the second current threshold I. L2 The operating mode is determined to be a heavy-load mode.

3. The multi-mode control method for a half-bridge three-level converter applicable to a wide load range according to claim 2, characterized in that, All modes use the same basic modulation unit. The control logic of the basic modulation unit includes: setting the switching period to T, with switches S2 and S3 conducting for half a cycle in each switching period, and switch S3 lagging behind switch S2 by half a cycle; switches S1 and S2 having the same turn-on time, and switches S4 and S3 having the same turn-on time; switches S1 and S4 having the same duty cycle, which is D, and adjusting D to regulate the converter output voltage.

4. The multi-mode control method for a half-bridge three-level converter applicable to a wide load range according to claim 3, characterized in that, When the operating mode is light load mode, the control system enters the light load Burst control process, including: based on the output voltage feedback signal, using a PI control algorithm to calculate the dynamic modulation duty cycle D for maintaining output voltage stability, and limiting the duty cycle to make it within the effective range of 0 to 0.5; according to the allowable output voltage ripple and system stability requirements under light load mode, setting the number of Burst cycles N, and using the control logic of the basic modulation unit in each Burst cycle.

5. The multi-mode control method for a half-bridge three-level converter applicable to a wide load range according to claim 3, characterized in that, When the operating mode is the medium load mode, the control system enters the PWM modulation control mode, including: calculating the current dynamic modulation duty cycle D based on the output voltage feedback signal using a PI control algorithm, and limiting the duty cycle to the range of 0 to 0.5; and controlling the power switching device according to the control logic of the basic modulation unit.

6. The multi-mode control method for a half-bridge three-level converter applicable to a wide load range according to claim 2, characterized in that, When the operating mode is heavy load mode, the capacitor voltage equalization control function is enabled, including: real-time acquisition of the voltage signals of the first voltage divider capacitor C1 and the second voltage divider capacitor C2, and calculation of the voltage deviation value ΔV between the voltage divider capacitors C1 and C2; after the voltage deviation value ΔV is processed by PI, the duty cycle compensation amount ΔD used to realize capacitor voltage equalization control is output; when ΔD is positive, the turn-on time of switch S1 is adjusted to (D+ΔD)T, and the turn-on time of switch S4 is adjusted to (D-ΔD)T; when ΔD is negative, the turn-on time of switch S1 is shortened to (D-|ΔD|)T, and the turn-on time of switch S4 is extended to (D+|ΔD|)T.

7. A multi-mode control system for a half-bridge three-level converter suitable for a wide load range, characterized in that, The control system, using the method described in claim 6, comprises: an information acquisition module for acquiring the operating status information of the converter; a mode determination module for judging the current load state of the converter based on the operating status information, and determining the operating mode of the converter accordingly; wherein the operating mode is one of a light load mode, a medium load mode, and a heavy load mode; a converter control module for determining, when the operating mode is a light load mode, the current dynamic modulation duty cycle D used to maintain output voltage stability based on the output voltage feedback signal and through a PI control algorithm, and introducing a Burst control strategy based on the dynamic modulation duty cycle to obtain an equivalent duty cycle according to a preset number of Burst cycles N; the converter control module is further configured to... When the operating mode is medium load mode, the current dynamic modulation duty cycle D is determined by a PI control algorithm based on the output voltage feedback signal, and the dynamic modulation duty cycle is limited to the range of 0 to 0.5 as the power modulation duty cycle within a fixed switching cycle. According to the dynamic modulation duty cycle, the power switching devices S1, S2, S3, and S4 are controlled to operate according to a preset three-level conduction logic. The converter control module is also used to calculate the voltage equalization adjustment amount by a PI control algorithm based on the voltage information of the DC bus voltage divider capacitor when the operating mode is heavy load mode, based on the medium load mode control, and add the voltage equalization adjustment amount to the dynamic modulation duty cycle to correct the modulation signal of the power switching devices.

Images