A three-phase interleaved three-level cascaded solid-state transformer topology and control method

Abstract

This disclosure provides a three-phase interleaved three-level cascaded solid-state transformer topology and control method. The topology includes three phase units; each phase unit consists of multiple power units, with their input sides connected in series and their output sides connected in parallel. Each power unit includes an AC input stage, an isolation conversion stage, and a DC output stage connected in sequence. The AC input stage employs a diode-neutral-clamped three-level full-bridge topology; the isolation conversion stage employs a three-phase interleaved parallel CLLLC resonant converter; and the DC output stage consists of multiple phase-interleaved parallel bidirectional half-bridge converter units. This disclosure combines a diode-NPC three-level full-bridge, a three-phase interleaved parallel CLLLC resonant converter, and an interleaved parallel DC-DC three-stage converter to construct a three-phase interleaved SST topology with three-level cascade as its core, possessing the advantages of multi-level low stress and modular easy expansion.

Description

Technical Field

[0001] This disclosure relates to the field of solid-state transformer technology, specifically to a three-phase interleaved three-level cascaded solid-state transformer topology and control method. Background Technology

[0002] A solid-state transformer (SST), also known as a power electronic transformer, is a new type of power conversion device based on power electronics technology and the principle of high-frequency electromagnetic induction. Existing solid-state transformers typically employ a multi-stage power conversion structure, using power electronic devices to complete AC-DC-DC or AC-DC-AC energy conversion, and utilizing high-frequency transformers to achieve electrical isolation.

[0003] Currently, the power conversion topologies applied to the high-voltage side of solid-state transformers in existing technologies mainly include two mainstream structures: modular multilevel converter schemes and traditional two-level cascaded H-bridge schemes.

[0004] However, all of the above-mentioned existing topologies have significant technical drawbacks. Among them, the modular multilevel converter scheme has a complex overall system architecture, requires a large number of power electronic devices, resulting in high system control difficulty and low scalability; the traditional two-level cascaded H-bridge scheme is limited by the inherent two-level modulation characteristics, resulting in high voltage stress on the switching devices.

[0005] In summary, existing solid-state transformer topologies generally suffer from technical problems such as low scalability and high voltage stress on devices, which restrict the operating efficiency of the equipment. Summary of the Invention

[0006] This disclosure addresses the problems existing in the prior art by providing a three-phase interleaved three-level cascaded solid-state transformer topology and control method, which can solve the problems of low scalability and high voltage stress of devices in existing solid-state transformer topologies, and improve the operating efficiency of the equipment.

[0007] To achieve the above objectives, the technical solution adopted in this disclosure is as follows: The first aspect of this disclosure provides a three-phase interleaved three-level cascaded solid-state transformer topology, comprising three phase units; each phase unit consists of multiple power units, with the input sides of the power units connected in series and the output sides connected in parallel; each power unit includes an AC input stage, an isolation conversion stage, and a DC output stage connected in sequence; wherein, the AC input stage adopts a diode-neutral-clamped three-level full-bridge topology, including two first bridge arms and two DC support capacitors, each first bridge arm consisting of four switching devices and two clamping diodes; the two DC support capacitors are connected in series at the center. The contacts form the midpoint potential, and each first bridge arm is connected to the midpoint potential. The isolation conversion stage adopts a three-phase interleaved parallel CLLLC resonant converter, including a three-phase bridge inverter circuit, a three-phase primary resonant network, a three-phase high-frequency isolation transformer, a three-phase secondary resonant network, and a three-phase bridge rectifier circuit. The three-phase bridge inverter circuit and the three-phase primary resonant network are located on the primary side of the three-phase high-frequency isolation transformer, and the three-phase secondary resonant network and the three-phase bridge rectifier circuit are located on the secondary side of the three-phase high-frequency isolation transformer. The DC output stage consists of multiple bidirectional half-bridge conversion units with interleaved phases connected in parallel.

[0008] In some embodiments of this disclosure, the two first bridge arms have the same structure and connection method; the four switching devices of each first bridge arm are connected in series, and their two ends are respectively connected to two DC support capacitors, wherein the connection point of the first two switching devices is the first node, the connection point of the last two switching devices is the second node, the cathodes of the two clamping diodes are respectively connected to the first node and the second node, and the anodes of the two clamping diodes are both connected to the midpoint potential.

[0009] In some embodiments of this disclosure, the input terminal of the three-phase bridge inverter circuit serves as the input terminal of the isolation converter stage. The output terminal of the three-phase bridge inverter circuit is connected to the input terminal of the three-phase primary resonant network. The output terminal of the three-phase primary resonant network is connected to the input terminal of the three-phase high-frequency isolation transformer. The output terminal of the three-phase high-frequency isolation transformer is connected to the input terminal of the three-phase secondary resonant network. The output terminal of the three-phase secondary resonant network is connected to the input terminal of the three-phase bridge rectifier circuit. The output terminal of the three-phase bridge rectifier circuit serves as the output terminal of the isolation converter stage. The three-phase bridge inverter circuit and the three-phase bridge rectifier circuit are symmetrically structured and each consists of three second bridge arms, each consisting of two switching devices. The three-phase primary resonant network consists of a resonant inductor, a resonant capacitor, and a transformer magnetizing inductor. The three-phase secondary resonant network consists of a resonant inductor and a resonant capacitor. The three-phase high-frequency isolation transformer employs an independent magnetic circuit structure or an integrated magnetic core structure.

[0010] In some embodiments of this disclosure, each bidirectional half-bridge converter includes two switching devices and a filter inductor, wherein the two switching devices are connected in series, and the connection point of the two switching devices in series is a third node, and the filter inductor is connected to the third node.

[0011] In some embodiments of this disclosure, three high-voltage AC input ports and a common low-voltage DC output port are provided corresponding to the three phase units; the input terminals of the AC input stages of all power units in the same phase unit are connected in series and then connected to the corresponding high-voltage AC input ports; the output terminal of the AC input stage of each power unit is connected to the input terminal of the isolation conversion stage in the same power unit; the output terminal of the isolation conversion stage of each power unit is connected to the input terminal of the DC output stage in the same power unit; and the output terminals of the DC output stages of all power units in the same phase unit are connected in parallel and then connected to the common low-voltage DC output port.

[0012] In some embodiments of this disclosure, three access circuits are also included. The three phase units are respectively connected to the corresponding high-voltage AC input ports through the corresponding access circuits. Each access circuit includes an input circuit breaker, a soft starter circuit, and an input inductor. The soft starter circuit consists of a pre-charge resistor and a bypass relay connected in parallel with the pre-charge resistor.

[0013] In some embodiments of this disclosure, the three phase units are phase A, phase B, and phase C, and the phase A, phase B, and phase C have the same structure; the three phase units are independent of each other.

[0014] A second aspect of this disclosure provides a control method for a three-phase interleaved three-level cascaded solid-state transformer, applicable to the three-phase interleaved three-level cascaded solid-state transformer topology provided in the first aspect or any embodiment thereof. The control method employs a hierarchical architecture combining a system-level power equalization coordination control strategy and a power unit-level autonomous control strategy. The system-level power equalization coordination control strategy includes: collecting operating parameters of each power unit and calculating the actual total power of the system; calculating the power deviation based on the actual total power of the system and a preset total power target value; and adjusting the power... The deviation is calculated using a proportional-integral method to generate the total system power command. Based on the three-phase power balance, the total system power command is sequentially distributed to each phase unit, and then distributed to each power unit within each phase unit. Combined with the high-voltage side DC voltage of each power unit, the power reference value of each power unit is adjusted to achieve system-level power equalization and coordinated control. The power unit-level autonomous control strategy includes: performing independent closed-loop control on the AC input stage, isolation conversion stage, and DC output stage within each power unit step by step to complete the full-link power conversion of AC rectification, isolation voltage regulation, and low-voltage regulation, thereby achieving power unit-level autonomous control.

[0015] In some embodiments of this disclosure, independent closed-loop control is performed stage by stage for each power unit, including: for the AC input stage, a voltage-current dual closed-loop control strategy is adopted to regulate the on / off state of the switching devices of each first bridge arm, matching the midpoint potential to output positive, zero, and negative levels, thereby completing the controllable rectification and conversion of high-voltage AC power and outputting high-voltage DC power; for each three-phase bridge inverter circuit of the isolation conversion stage, a 120° phase-interleaved driving method is adopted, combined with a CLLLC resonant frequency modulation control strategy, to perform electrical isolation and voltage regulation DC-DC conversion of high-voltage DC power, realizing current sharing control of each resonant branch, and outputting high-voltage DC power after isolation conversion; for each bidirectional half-bridge converter unit of the DC output stage, an equal-phase interval interleaved PWM modulation strategy is adopted to perform low-voltage regulation and parallel current sharing control of the high-voltage DC power after isolation conversion, thereby realizing balanced distribution of output power of each bidirectional half-bridge converter unit and outputting low-voltage DC power.

[0016] In some embodiments of this disclosure, the three-phase power balance relationship includes: In the formula, This represents the summation over phases A, B, and C. Indicates the relationship between each phase n Summing the power units, Indicates the first The first The active power of each power unit This indicates the total active power exchanged between the entire machine and external systems.

[0017] Compared with the prior art, this disclosure has the following beneficial effects: This disclosure combines a diode-based NPC three-level full-bridge converter, a three-phase interleaved parallel CLLLC resonant converter, and an interleaved parallel DC-DC converter to construct a three-phase interleaved SST topology with three-level cascade as its core. This topology combines the advantages of multi-level low stress and modular, easily expandable design. Furthermore, this disclosure proposes a hierarchical control strategy adapted to this topology, enabling coordinated operation of system-level optimization and power unit-level autonomous control, effectively achieving key control objectives such as three-level midpoint potential balance and output current sharing. In addition, each power unit possesses independent voltage support and fault isolation capabilities, enabling autonomous unit operation and improving the overall system's operational reliability and fault tolerance. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall architecture of a three-phase interleaved three-level cascaded solid-state transformer topology provided in this embodiment of the disclosure; Figure 2 This is a schematic diagram of the power unit structure of a three-phase interleaved three-level cascaded solid-state transformer topology provided in an embodiment of this disclosure; Figure 3 This is a schematic diagram of the AC input stage structure of a three-phase interleaved three-level cascaded solid-state transformer topology provided in an embodiment of this disclosure; Figure 4 This is a schematic diagram of the isolation transformer stage structure of a three-phase interleaved three-level cascaded solid-state transformer topology provided in an embodiment of this disclosure; Figure 5 This is a schematic diagram of the DC output stage structure of a three-phase interleaved three-level cascaded solid-state transformer topology provided in an embodiment of this disclosure; Figure 6 This is a schematic diagram of the hierarchical architecture of a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in an embodiment of this disclosure; Figure 7 This is a diode NPC rectifier topology control block diagram of a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in this embodiment of the disclosure; Figure 8 This is a waveform diagram of a three-phase interleaved parallel CLLLC resonant converter, which is part of a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in this embodiment of the disclosure. Figure 9 This is a circuit diagram of the first working stage of phase A of a three-phase interleaved parallel CLLLC resonant converter, which is a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in this embodiment of the disclosure. Figure 10 This is a circuit diagram of the second working stage of phase A of a three-phase interleaved parallel CLLLC resonant converter, which is a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in this embodiment of the disclosure. Figure 11 This is a circuit diagram of the third working stage of phase A of a three-phase interleaved parallel CLLLC resonant converter, which is a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in this embodiment of the disclosure. Figure 12 This is an interleaved parallel DC-DC control block diagram of a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in this disclosure embodiment; Figure 13 This is an interleaved parallel DC-DC output current waveform diagram of a control method for a three-phase interleaved three-level cascaded solid-state transformer provided in this embodiment of the disclosure. Detailed Implementation

[0019] The present disclosure will now be further described with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present disclosure and should not be construed as limiting the scope of protection of the present disclosure. It should be noted that the following detailed descriptions are exemplary and intended to provide further explanation of this application.

[0020] The acquisition, transmission, storage, use, and processing of data in this disclosure comply with relevant national laws and regulations. In the embodiments of this disclosure, certain existing industry solutions such as software, components, and models may be mentioned. These should be considered exemplary and intended only to illustrate the feasibility of implementing the technical solution disclosed herein, but do not imply that the applicant has already used or necessarily used such a solution.

[0021] All terms used in this disclosure have the same meaning as understood by one of ordinary skill in the art to which this disclosure pertains, unless otherwise specifically defined. It should also be understood that terms defined in general dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant art, and not as idealized or highly formalized, unless expressly defined herein.

[0022] For ease of understanding, the technical terms appearing in the embodiments of this disclosure are explained in advance. Unless otherwise specified, the following definitions apply throughout the entire specification.

[0023] SST: Solid State Transformer; a new type of transformer based on a multi-stage power electronic conversion architecture, which can realize voltage transformation, high-frequency electrical isolation, bidirectional energy transmission and power quality regulation; NPC: Neutral Point Clamped; it is the mainstream three-level topology in the field of power electronics. It can stabilize the DC bus neutral point potential, output stepped three-level voltage, and suppress switching harmonics and device voltage stress. This disclosure adopts a three-phase interleaved NPC configuration, which is suitable for medium and high voltage high power conversion conditions. AC-DC: Alternating Current-Direct Current; it can realize the conversion and voltage regulation of AC power to DC power. As the core conversion stage of the SST topology disclosed in this paper, it provides a stable high-voltage DC input power to the subsequent isolation conversion circuit.

[0024] CLLLC: Capacitor-Less LLC resonant converter; it is an improved high-frequency isolated DC-DC topology of traditional LLC resonant converter. It abandons the independent resonant capacitor of the traditional topology and builds a resonant network based on the inherent leakage inductance and magnetizing inductance of the high-frequency transformer. It can realize soft switching and wide voltage gain regulation across the entire load range, effectively simplifying the circuit structure, reducing the number of components, improving the system power density and operational reliability, and is suitable for medium and high voltage high-efficiency isolated power conversion scenarios.

[0025] DC-DC: Direct Current to Direct Current conversion; it can realize the adjustment of DC voltage and the precise distribution of DC power. This disclosure adopts a bidirectional half-bridge converter unit interleaved parallel structure, which effectively reduces output current ripple and ensures the stability of high power output of the system.

[0026] This disclosure provides a three-phase interleaved three-level cascaded solid-state transformer topology, such as... Figure 1 As shown, it mainly includes three high-voltage AC input ports (A1, B1, C1), three identical phase units (phase A, phase B, and phase C), and a unified low-voltage DC output port. Its core lies in adopting a modular three-level power unit cascaded topology, combined with a hierarchical and coordinated control method, to achieve efficient and reliable power conversion.

[0027] Three high-voltage AC input ports, A1, B1, and C1, are connected to subsequent power units via three independent input links. Taking the A-phase input link as an example, an input circuit breaker QS11, a soft-start circuit, and an input inductor L11 are sequentially arranged from the AC grid side to the power unit. The soft-start circuit is composed of a pre-charging resistor R11 and a bypass relay QS21 connected in parallel with it. Similarly, the B-phase and C-phase input links are respectively equipped with input circuit breakers QS12 and QS13, input inductors L21 and L31, and soft-start circuits composed of pre-charging resistors R12 and R13 and bypass relays QS22 and QS23. The structure of each phase is completely identical. The above input terminal structure design provides overcurrent limiting, fault isolation, and start-up process protection functions for the embodiments of this disclosure.

[0028] In a single-phase link, the low-voltage DC output terminals of all power units are connected in parallel to form the DC output port of that phase. Taking phase A as an example, if... Figure 1 The output terminals of the multiple power units 1 shown are connected in parallel to form the A-phase DC output port; similarly, the B-phase and C-phase DC output ports can be obtained. These three-phase output ports are further connected in parallel on the low-voltage side to form a unified low-voltage DC bus, that is, the three-phase output ports are connected in parallel to a unified common low-voltage DC output port. The bus side is equipped with output circuit breakers (QS31, QS32), filter inductors (L41, L51), and a DC-side soft-start circuit composed of soft-start resistors (R21, R22) and bypass relays (QS41, QS42) to complete the final protection and filtering output.

[0029] Each phase unit is composed of multiple power units 1 connected together. In this embodiment, taking phase A as an example, it contains several power units 1, which are connected in series to the phase A high-voltage AC bus to achieve natural voltage division under the input voltage. Phase B and phase C are structurally identical to phase A. The three phase units are not directly electrically connected to each other, forming three independent and symmetrical input links. All power units have the same structure, the same control method, and operate independently, possessing good scalability and ease of maintenance.

[0030] In this embodiment of the disclosure, the internal structure of each power unit is as follows: Figure 2 As shown, it includes a three-stage conversion circuit connected in sequence: AC input stage 1-1, isolation conversion stage 1-2 and DC output stage 1-3.

[0031] First, for the AC input stage, this stage adopts a diode-neutral-clamped three-level full-bridge topology.

[0032] Specific topology as follows Figure 3 As shown, the bridge includes eight switching devices (S11-S14, S21-S24), four clamping diodes (D1-D4), and two series-connected DC support capacitors C1 and C2. Each set of four switching devices and two clamping diodes forms a first bridge arm, resulting in two first bridge arms. The connection point of the two series-connected DC support capacitors C1 and C2 forms the midpoint O1 of the DC bus, enabling each first bridge arm to output power. Three levels.

[0033] See Figure 3 One of the first bridge arms has the following specific structure: four switching devices S11, S12, S13, and S14 are connected in series between the positive and negative terminals of the DC bus. The connection point between S11 and S12 is node E1, and the connection point between S13 and S14 is node E2. The anode of clamping diode D1 is connected to the midpoint O1 of the bridge arm, and the cathode is connected to node E1. The anode of clamping diode D2 is connected to node E2, and the cathode is connected to the midpoint O1 of the bridge arm. The other first bridge arm has the following specific structure: four switching devices S21, S22, S23, and S24 are connected in series between the positive and negative terminals of the DC bus. The connection point between S21 and S22 is node E3, and the connection point between S23 and S24 is node E4. The anode of clamping diode D3 is connected to the midpoint O1 of the bridge arm, and the cathode is connected to node E3. The anode of clamping diode D4 is connected to node E4, and the cathode is connected to the midpoint O1 of the bridge arm.

[0034] This stage of the circuit operates as a rectifier, converting the input high-voltage AC power into stable DC power.

[0035] Second, for the isolation converter stage, a three-phase interleaved parallel CLLLC resonant converter is used.

[0036] Specific topology as follows Figure 4 As shown, the three-phase interleaved parallel CLLLC resonant converter mainly consists of a three-phase bridge inverter circuit, a three-phase primary resonant network, a three-phase high-frequency isolation transformer, a three-phase secondary resonant network, and a three-phase bridge rectifier circuit.

[0037] The three-phase bridge inverter circuit and the three-phase primary resonant network are located on the primary side of the three-phase high-frequency isolation transformer, while the three-phase secondary resonant network and the three-phase bridge rectifier circuit are located on the secondary side of the three-phase high-frequency isolation transformer.

[0038] The input-side three-phase bridge inverter circuit consists of three second bridge arms: K1, K2, and K3. Each second bridge arm contains two series-connected switching devices (such as S31~S32, S41~S42, or S51~S52). The connection points of S31 and S32, S41 and S42, and S51 and S52 are E5, E6, and E7, respectively. Each second bridge arm is connected in parallel to the high-voltage DC bus output from the preceding NPC rectifier circuit, inverting the DC power into high-frequency AC power.

[0039] The three-phase secondary resonant network and the three-phase primary resonant network are respectively connected to the primary and secondary windings of the three-phase high-frequency isolation transformer. The three-phase high-frequency isolation transformer can employ an independent magnetic circuit structure or an integrated magnetic core structure, thereby improving power density and structural integration. The three-phase primary resonant network consists of a resonant inductor (L... r1 ~L r3 ), resonant capacitor (C) r1 ~C r3 ) and transformer magnetizing inductance (L m1 ~L m3 The three-phase secondary resonant network is composed of a resonant inductor (L...). r4 ~L r6 ), resonant capacitor (C) r4 ~C r6 The system is composed of a three-phase primary resonant network, a three-phase high-frequency isolation transformer, and a three-phase secondary resonant network. The input terminals of these three resonant branches are connected to the output terminals E5, E6, and E7 of the second arm of the three-phase bridge inverter circuit, respectively. Connection points O2 and O3 are provided on the resonant branches.

[0040] The secondary side of the three-phase high-frequency isolation transformer is equipped with a three-phase bridge rectifier circuit, whose structure corresponds to the primary side bridge structure. It consists of three second bridge arms: K4, K5, and K6. Each second bridge arm contains two series-connected switching devices (such as S61~S62, S71~S72, or S81~S82). The connection points of S61 and S62, S71 and S72, and S81 and S82 are E10, E9, and E8, respectively. The output terminals of the three resonant branches are connected to the input terminals E8, E9, and E10 of each second bridge arm of the three-phase bridge rectifier circuit. The three-phase bridge rectifier circuit is used to rectify the three-phase high-frequency AC power into DC power. The rectified three-phase currents are connected in parallel on the output side and supplied to the subsequent DC bus.

[0041] This stage of the circuit is mainly responsible for converting the high-voltage DC power supplied by the previous stage into a stable low-voltage DC power output that meets the system requirements, thereby realizing the voltage level conversion.

[0042] Third, for the DC output stage, this stage consists of multiple bidirectional half-bridge converter units connected in parallel with phase interleaving.

[0043] This stage is used for final regulation of the DC output from the isolation converter stage, and its specific topology is as follows: Figure 5 As shown, the system consists of multiple (three shown) identical bidirectional half-bridge converter units connected in parallel with staggered phases. Each bidirectional half-bridge converter unit includes two series-connected switching devices (such as S81~S82, S83~S84, or S85~S86) and a filter inductor (such as L11, L22, or L33). The connection points of S81 and S82, S83 and S84, and S85 and S86 are E11, E12, and E13, respectively, and each output terminal is connected to L1, L2, and L3, respectively. The input terminals of all bidirectional half-bridge converter units are connected in parallel to the secondary side DC bus of the preceding stage, and a DC support capacitor C3 is also connected in parallel to the input terminal. The output terminals are connected in parallel to the low-voltage DC output terminal of the power unit, and a DC support capacitor C4 is connected in series to the output terminal. In terms of control, staggered PWM modulation is used for each phase, which can significantly reduce the total output current ripple and improve power quality. At the same time, this structure also has phase-level fault tolerance capability.

[0044] This disclosure also provides a control method for a three-phase interleaved three-level cascaded solid-state transformer, applicable to the three-phase interleaved three-level cascaded solid-state transformer topology provided in the above embodiments. In this disclosure, the control method employs a hierarchical architecture combining a system-level power equalization coordination control strategy and a power unit-level autonomous control strategy.

[0045] Layered architecture, such as Figure 6As shown, the left side is the system coordination control module, which acts as the upper-level control unit. It receives the total power / voltage command from the system level, performs internal calculations, and assigns an independent control reference value to each cascaded unit. This achieves power balancing among multiple units and optimization of the system-level dynamic response, providing top-level constraints for the autonomous control of each power unit. The right side, within the dashed box, is the power unit-level autonomous control module (only two units are shown in the figure, but it can actually be expanded to N units). Each power unit adopts a dual-closed-loop PI control + three-stage conversion circuit topology (diode NPC, CLLLC, and interleaved DC-DC, corresponding to the AC input stage, isolation conversion stage, and DC output stage, respectively). This architecture enables closed-loop voltage regulation, electrical isolation, and low-voltage side regulated output within the power unit. At the same time, through autonomous control between power units, it ensures voltage consistency among cascaded units.

[0046] In this embodiment, the system-level power equalization and coordination control strategy includes: collecting the operating parameters of each power unit and calculating the actual total power of the system; calculating the power deviation based on the actual total power of the system and the preset total power target value; performing proportional-integral calculation on the power deviation based on the total number and operating status of the power units to generate a total system power command; distributing the total system power command sequentially to each phase unit according to the three-phase power balance relationship, then distributing it to each power unit within each phase unit, and adjusting the power reference value of each power unit in conjunction with the high-voltage side DC voltage of each power unit to achieve system-level power equalization and coordination control.

[0047] Specifically, the system-level coordination control module collects the DC-side output voltage of each power unit in real time. With current ,in, For the first l Xiangdi k The actual value of the high-voltage DC side voltage of each power unit. For the first l Xiangdi k The actual value of the high-voltage DC side current of each power unit is obtained, and the actual total power of the system is calculated based on this value. Compare the actual total power with the target total power of the system. The power deviation is compared and combined with the current number of effective power units and operating status of the system (e.g., online / offline, fault / normal). The result is then calculated by the PI controller to generate the total system power command. Subsequently, based on the three-phase power balance relationship, the system's total power command... The voltage is broken down into phases and further distributed to individual power units within each phase. During this process, the system-level coordination control module synchronously monitors the DC-side voltage of each power unit. Furthermore, the DC-side voltage is dynamically adjusted through autonomous voltage control of the power unit, based on the preliminary calculations.l Xiangdi k Power reference value of each power unit Real-time correction is performed. Through this closed-loop regulation, power units with excessively high DC-side voltage will have their power output reduced appropriately, while power units with excessively low DC-side voltage will have their power output increased accordingly. This automatically brings the DC-side voltages of all series-connected power units closer to the same level, achieving dynamic voltage balance among the power units. This control method achieves dynamic autonomous balancing of the DC voltages of power units in a three-level cascaded system without adding additional voltage equalization hardware circuitry. It effectively avoids overvoltage damage to devices caused by uneven voltage distribution among power units, improving the stability and reliability of the system operation.

[0048] In one specific embodiment, the three-phase power balance relationship includes: In the formula, This represents the summation over phases A, B, and C. Indicates the relationship between each phase n Summing the power units, Indicates the first The first The active power of each power unit This indicates the total active power exchanged between the entire machine and external systems.

[0049] Each power unit receives its own Subsequently, the module controller independently completes all control of the three-stage conversion. In this embodiment, the power unit-level autonomous control strategy includes: performing independent closed-loop regulation on the AC input stage, isolation conversion stage, and DC output stage within each power unit to complete the full-link power conversion of AC rectification, isolation voltage regulation, and low-voltage regulation, thereby realizing power unit-level autonomous control.

[0050] In some embodiments, for the AC input stage, a voltage-current dual closed-loop control strategy is adopted to regulate the on / off state of the switching devices of each first bridge arm, match the midpoint potential to output positive, zero and negative levels, complete the controllable rectification and conversion of high-voltage AC power, and output high-voltage DC power.

[0051] Specifically, such as Figure 7 As shown, the control system adopts a dual closed-loop structure based on a rotating coordinate system (dq axis) for both voltage and current. The outer loop is the voltage loop, which is based on the target value of the DC bus voltage on the high-voltage side after rectification. Compared with actual value The deviation is used as input, where, For the first l Xiangdi k Target value of the high-voltage DC side voltage of each power unit For the first l Xiangdi kThe actual value of the high-voltage DC side voltage of each power unit is used to output active current commands through a PI regulator. This is to maintain a stable DC voltage. The inner loop is a current loop, receiving... and the set reactive current command (Usually set to zero to achieve unity power factor), compared with the measured grid-side three-phase AC current after coordinate transformation. , A comparison is made. The current PI regulator outputs the corresponding voltage command. and Then, the measured grid-side three-phase AC voltage is transformed using coordinates. , The difference is compared, and then the deviation value is transformed by inverse Park to obtain a two-phase stationary coordinate system. α-β Voltage modulation signal under) , Then, a three-phase modulated wave is generated by the inverse Clark transform. , , The drive signals for each switching device of the NPC full bridge are then obtained through carrier phase-shift modulation. g (t) This structure enables tracking of the three-phase AC current on the grid side, ensuring that the input current is sinusoidal and in phase with the grid voltage.

[0052] Furthermore, to suppress DC-side capacitor voltage imbalance caused by asymmetrical switching states or load fluctuations, this disclosure introduces midpoint potential balance control in the modulation stage. This is achieved by real-time detection of the voltage deviation between the two supporting capacitors. Calculate a zero-sequence voltage compensation amount. This compensation amount is injected into the sinusoidal modulation wave. Without affecting the line voltage, the injection time of each phase bridge arm to the midpoint current is dynamically fine-tuned, thereby automatically balancing the capacitor voltage and ensuring the three levels of the three-level output. Symmetric and stable.

[0053] In some embodiments, for each three-phase bridge inverter circuit of the isolation conversion stage, a 120° phase-interleaved driving method is adopted, combined with a CLLLC resonant frequency modulation control strategy, to perform electrical isolation and voltage regulation DC-DC conversion of high-voltage DC power, realize current sharing control of each resonant branch, and output high-voltage DC power after isolation conversion.

[0054] Specifically, the operating mode and switching frequency of the three-phase interleaved parallel CLLLC resonant converter Closely related, this article takes Taking the resonant frequency as an example, we analyze the three operating stages in the first half of the cycle. Figure 8 As shown, U GS31 UGS32 U is the voltage across S31 and S32. GS41 U GS42 U is the voltage across S41 and S42. GS51 U GS52 U is the voltage across S51 and S52. A02 I is the voltage at point O2 in phase A. Lr1 I Lm1 For L r1 L m1 The current, I S81 I S82 For the currents of S81 and S82, For the first l Xiangdi k The actual values ​​of the high-voltage DC side voltage of each power unit are shown in the figure. The drive signal frequencies of the three-phase bridge arms K1, K2, and K3 are consistent, and their phases differ by 120° sequentially. The upper and lower switching devices of each phase's primary side bridge arm complement each other, achieving three-phase interleaved operation. Since the three-phase structure is identical and the working principle is the same, we will take phase A as an example to explain the stages of its first half-cycle. , , The equivalent circuits are as follows: Figures 9-11 As shown in the figure For the first l Xiangdi k The actual value of the high-voltage DC side voltage of each power unit, I Lr1 I Lm1 I Lr4 For L r1 L m1 L r4 The current is indicated by a red label, signifying that the current is flowing. For the first l Xiangdi k The actual low-voltage DC side voltage of each power unit. The blue solid line represents the current active flow path, and the remaining part represents the current inactive flow path.

[0055] Combination Figure 8 and Figure 9 As shown, in During this phase, the lower transistor S32 on the primary side is turned off, and the upper transistor S31 is turned on. Resonant current. By charging and discharging the parasitic capacitances of S31 and S32, the voltage across S31 drops to zero, allowing current to flow through the body diode, thus creating conditions for S31 to achieve zero-voltage turn-on (ZVS). Combined with... Figure 8 and Figure 10 As shown, in During this phase, S31 conducts under zero-voltage conditions, and the resonant current gradually rises from a negative value to a positive value and flows into the resonant network. When During this process, energy is transferred from the primary side of the transformer to the secondary side; this stage is the main power transmission range. The controller adjusts the switching frequency in real time based on the output voltage feedback signal. This is done by changing the equivalent gain of the resonant network, thereby achieving closed-loop regulation of the output voltage. Combined with... Figure 8 and Figure 11 As shown, in stage, Gradually decrease, when When the secondary current drops to zero, zero-current turn-off (ZCS) of the secondary switching device is achieved, and energy transfer is suspended. By setting the operating frequency range, soft-switching characteristics can be maintained over a wide load variation range.

[0056] After a certain time, the converter enters the second half of the cycle. The working phase is symmetrical to the first half of the cycle, and the principle is the same, so it will not be described again.

[0057] The module controller uniformly adjusts the switching frequency of the three-phase bridge arms, maintaining a fixed 120° phase difference, so that the three-phase resonant branches sequentially enter the aforementioned operating stages. The three-phase resonant currents are staggered and superimposed on the time axis, effectively reducing current ripple on the input and output sides. Furthermore, the module controller can sample and compare the three-phase resonant currents. When any phase current deviates from the average value, current sharing control is achieved by fine-tuning the drive parameters of the corresponding bridge arm, ensuring consistent power distribution during three-phase parallel operation. By combining frequency modulation control with fixed phase difference interleaved drive, soft-switching operation is achieved while maintaining stable output voltage and three-phase current sharing.

[0058] In some embodiments, for each bidirectional half-bridge converter unit of the DC output stage, an equal-phase interval interleaved PWM modulation strategy is adopted to perform low-voltage regulation and parallel current sharing control on the high-voltage DC power after isolation conversion, so as to achieve balanced distribution of output power of each bidirectional half-bridge converter unit and output low-voltage DC power.

[0059] Specifically, such as Figure 12 As shown, this stage employs a dual-loop control system with both current and voltage. The voltage loop controls the output voltage. Feedback value and target reference value The deviation between them is taken as input, where, For the first l Xiangdi k Target value of low-voltage side voltage for each power unit For the first l Xiangdi k The actual low-voltage side voltage of each power unit is calculated by the voltage regulator to generate the total output current command. This loop is primarily used to maintain the stability of the module's output voltage. The current loop receives this current command and uses it as the current for each parallel phase inductor. , , The reference benchmark. The current regulator uses current commands. With actual current The deviation is used as input to track and adjust the inductor current value of each phase, ensuring that the output current accurately follows the command and achieves current sharing among parallel phases. The output signal of the current regulator... , , The signals are sent to the PWM modulator to generate pulse signals g1, g2, and g3 to drive the switching transistors of each phase, and finally, the inductor current of each phase is obtained as the final output. , , .

[0060] In the output stage control of this disclosure, each parallel DC-DC converter unit is controlled using an interleaved modulation strategy. That is, at the same switching frequency, the drive signals of each phase generator are staggered in phase at equal intervals. For example... Figure 13 As shown, in Stage, inductor current in each phase , , They exhibit the characteristic of having the same amplitude but staggered phases. The three-phase currents are connected in parallel and superimposed at the output terminal to form the total output current. Due to phase interleaving, the ripple troughs and peak values ​​of the currents in each phase occur at different times, thus canceling each other out during superposition and effectively suppressing the output current. The ripple is reduced, improving the power quality of the DC bus on the output side.

[0061] As described above, in this embodiment, the three-phase AC power is connected to independent cascaded power units A, B, and C. Each power unit independently completes the full power conversion process from AC rectification and isolation to DC output. After being converted by the power module cluster within each phase, the electrical energy first converges at the DC output port of that phase, and then the DC outputs of the three phases converge again on a unified low-voltage DC bus, ultimately forming a modular, highly reliable solid-state transformer topology with electrical isolation characteristics.

[0062] It should be noted that the terms "first," "second," and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different parts. Terms such as "including" or "contains" mean that the element preceding the word covers the element listed after the word, and do not exclude the possibility of covering other elements as well.

[0063] Although operations are described in a specific order in the accompanying drawings in this disclosure, it should not be construed as requiring these operations to be performed in the specific order or serial order shown, or requiring all of the shown operations to obtain the desired result. In certain environments, multitasking and parallel processing may be advantageous.

[0064] Finally, it should be noted that the above content is only used to illustrate the technical solution of this disclosure, and is not intended to limit the scope of protection of this disclosure. Simple modifications or equivalent substitutions made by those skilled in the art to the technical solution of this disclosure do not depart from the substance and scope of the technical solution of this disclosure.

Claims

1. A three-phase interleaved three-level cascaded solid-state transformer topology, characterized in that, It includes three phase units; each phase unit consists of multiple power units, with the input sides of the power units connected in series and the output sides connected in parallel; each power unit includes an AC input stage, an isolation conversion stage, and a DC output stage connected in sequence; wherein, The AC input stage adopts a diode-neutral-clamped three-level full-bridge topology, including two first bridge arms and two DC support capacitors. Each first bridge arm consists of four switching devices and two clamping diodes. The center connection point of the two DC support capacitors connected in series forms a neutral point potential, and each first bridge arm is connected to the neutral point potential. The isolation converter stage employs a three-phase interleaved parallel CLLLC resonant converter, comprising a three-phase bridge inverter circuit, a three-phase primary resonant network, a three-phase high-frequency isolation transformer, a three-phase secondary resonant network, and a three-phase bridge rectifier circuit. The three-phase bridge inverter circuit and the three-phase primary resonant network are located on the primary side of the three-phase high-frequency isolation transformer, while the three-phase secondary resonant network and the three-phase bridge rectifier circuit are located on the secondary side of the three-phase high-frequency isolation transformer. The DC output stage consists of multiple bidirectional half-bridge converter units connected in parallel with phase interleaving.

2. The three-phase interleaved three-level cascaded solid-state transformer topology according to claim 1, characterized in that, The two first bridge arms have the same structure and connection method; the four switching devices of each first bridge arm are connected in series, and their two ends are respectively connected to the two DC support capacitors. The connection point of the first two switching devices is the first node, and the connection point of the last two switching devices is the second node. The cathodes of the two clamping diodes are respectively connected to the first node and the second node, and the anodes of the two clamping diodes are both connected to the midpoint potential.

3. The three-phase interleaved three-level cascaded solid-state transformer topology according to claim 2, characterized in that, The input terminal of the three-phase bridge inverter circuit serves as the input terminal of the isolation converter stage. The output terminal of the three-phase bridge inverter circuit is connected to the input terminal of the three-phase primary-side resonant network. The output terminal of the three-phase primary-side resonant network is connected to the input terminal of the three-phase high-frequency isolation transformer. The output terminal of the three-phase high-frequency isolation transformer is connected to the input terminal of the three-phase secondary-side resonant network. The output terminal of the three-phase secondary-side resonant network is connected to the input terminal of the three-phase bridge rectifier circuit. The output terminal of the three-phase bridge rectifier circuit serves as the output terminal of the isolation converter stage. The three-phase bridge inverter circuit and the three-phase bridge rectifier circuit are symmetrical in structure and each consists of three second bridge arms, each of which consists of two switching devices. The three-phase primary-side resonant network consists of a resonant inductor, a resonant capacitor, and a transformer magnetizing inductor. The three-phase secondary resonant network is composed of a resonant inductor and a resonant capacitor. The three-phase high-frequency isolation transformer adopts an independent magnetic circuit structure or an integrated magnetic core structure.

4. The three-phase interleaved three-level cascaded solid-state transformer topology according to claim 3, characterized in that, Each of the bidirectional half-bridge converter units includes two switching devices and a filter inductor, wherein the two switching devices are connected in series, and the connection point of the two switching devices in series is a third node, and the filter inductor is connected to the third node.

5. The three-phase interleaved three-level cascaded solid-state transformer topology according to any one of claims 1-4, characterized in that, It also includes three high-voltage AC input ports and one common low-voltage DC output port, which are provided corresponding to the three phase units; The input terminals of the AC input stages of all the power units within the same phase unit are connected in series and then connected to the corresponding high-voltage AC input port. The output terminal of the AC input stage of each power unit is connected to the input terminal of the isolation converter stage within the same power unit. The output terminal of the isolation converter stage of each power unit is connected to the input terminal of the DC output stage within the same power unit. The output terminals of the DC output stages of all the power units within the same phase unit are connected in parallel and then connected to the common low-voltage DC output port.

6. The three-phase interleaved three-level cascaded solid-state transformer topology according to claim 5, characterized in that, It also includes three access circuits, and the three phase units are respectively connected to the corresponding high-voltage AC input ports through the corresponding access circuits. Each access circuit includes an input circuit breaker, a soft starter circuit, and an input inductor, wherein the soft starter circuit consists of a pre-charge resistor and a bypass relay connected in parallel with the pre-charge resistor.

7. The three-phase interleaved three-level cascaded solid-state transformer topology according to any one of claims 1-4, characterized in that, The three phase units are phase A, phase B, and phase C, and the phase A, phase B, and phase C have the same structure; the three phase units are independent of each other.

8. A control method for a three-phase interleaved three-level cascaded solid-state transformer, characterized in that, The control method is applicable to the three-phase interleaved three-level cascaded solid-state transformer topology as described in any one of claims 1-7, wherein the control method adopts a hierarchical architecture combining a system-level power equalization and voltage coordination control strategy and a power unit-level autonomous control strategy; wherein, The system-level power equalization and coordination control strategy includes: collecting the operating parameters of each power unit and calculating the actual total power of the system; calculating the power deviation based on the actual total power of the system and the preset total power target value; performing proportional-integral calculation on the power deviation based on the total number and operating status of the power units to generate a total system power command; distributing the total system power command sequentially to each phase unit according to the three-phase power balance relationship, then distributing it to each power unit within each phase unit, and adjusting the power reference value of each power unit in conjunction with the high-voltage side DC voltage of each power unit to achieve system-level power equalization and coordination control. The power unit hierarchical autonomous control strategy includes: performing independent closed-loop regulation on the AC input stage, isolation conversion stage, and DC output stage within each power unit to complete the full-link power conversion of AC rectification, isolation voltage regulation, and low-voltage regulation, thereby realizing power unit hierarchical autonomous control.

9. The control method according to claim 8, characterized in that, The step-by-step independent closed-loop control of the AC input stage, isolation conversion stage, and DC output stage within each power unit includes: For the AC input stage, a voltage-current dual closed-loop control strategy is adopted to regulate the on / off state of the switching devices of each first bridge arm, and match the midpoint potential to output positive, zero and negative levels, thereby completing the controllable rectification and conversion of high-voltage AC power and outputting high-voltage DC power. For each of the three-phase bridge inverter circuits in the isolation conversion stage, a 120° phase interleaved drive mode is adopted, combined with a CLLLC resonant frequency modulation control strategy, to perform electrical isolation and voltage regulation DC-DC conversion on the high-voltage DC power, realize current sharing control of each resonant branch, and output the high-voltage DC power after isolation conversion. For each of the bidirectional half-bridge converter units in the DC output stage, an equal-phase-interval staggered PWM modulation strategy is adopted to perform low-voltage regulation and parallel current sharing control on the high-voltage DC power after isolation conversion, so as to achieve balanced distribution of output power of each of the bidirectional half-bridge converter units and output low-voltage DC power.

10. The control method according to claim 8, characterized in that, The three-phase power balance relationship includes: ； In the formula, This represents the summation over phases A, B, and C. Indicates the relationship between each phase n Summing the power units, Indicates the first The first The active power of each power unit This indicates the total active power exchanged between the entire machine and external systems.

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