A method and conversion device for supporting adaptive access of multi-channel APL / PA devices
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-20
- Publication Date
- 2026-08-14
AI Technical Summary
然而,现有技术方案中无法简化现场布线问题,无法满足现场不同协议仪表自适应切换的功能需求,只能实现单一通信协议类型仪表接入
[0044]本发明的方法满足现场不同协议仪表自适应切换的功能需求,能够实现多通信协议类型仪表接入。具体地,转换装置可负责APL/PA仪表的数据管理并上送至控制网络;支持多个分支通道自适应切换APL/PA仪表接入,可随时插拔切换仪表类型,并支持APL/PA仪表自适应供电。
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Figure CN122578733A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of industrial communication technology, and in particular to a method and conversion device for supporting adaptive access of multi-channel APL / PA devices. Background Technology
[0002] Ethernet-APL is an extension of the 10BASE_T1L (IEEE 802.3cg-2019) Ethernet physical layer standard, supporting various high-order Ethernet communication protocols. By adjusting the physical layer, Ethernet-APL meets the requirements for reliable operation in process-related plants and specifies the application details of Ethernet communication in process industry sensors and actuators. It also specifies implementation methods for use in high-risk explosion-proof environments, promoting the deployment of high-speed, Ethernet-enabled instruments in process automation facilities in high-risk environments.
[0003] Currently, the most advanced information transmission methods used in industrial fields are HART, fieldbus, and wireless. These communication methods all require expensive, complex, and energy-intensive gateway devices (such as network cards, couplers, and gateways). However, by adopting APL technology, these complex devices are no longer needed. Data access from distributed field instruments can be achieved directly through a switch. By optimizing and eliminating gateway devices in the entire system, overall installation and maintenance costs can be significantly reduced, and system complexity can be decreased.
[0004] Currently, in practical field applications, there are numerous instruments using the PA protocol, and these instruments fall into several categories, such as pressure gauges, temperature gauges, valve positioners, flow meters, and radar level gauges. Taking intelligent pressure transmitters as an example, these include a conversion unit communication card and a detection unit card. The detection unit cards and hardware structures of pressure transmitters from different manufacturers vary, with the only difference being the conversion unit communication card. The communication card encapsulates the real-time data from the detection unit card into different communication protocols for transmission. However, existing technical solutions cannot simplify field wiring, cannot meet the functional requirements of adaptive switching between instruments using different protocols, and can only enable access to instruments using a single communication protocol. Summary of the Invention
[0005] (a) Technical problems to be solved
[0006] In view of the above-mentioned shortcomings and deficiencies of the prior art, the present invention provides a method and conversion device for supporting adaptive access of multi-channel APL / PA devices, which meets the functional requirements of adaptive switching of instruments with different protocols in the field and realizes the access of instruments with multiple communication protocol types.
[0007] (II) Technical Solution
[0008] To achieve the above objectives, the main technical solutions adopted by the present invention include:
[0009] In a first aspect, embodiments of the present invention provide a method for supporting adaptive access of multi-channel APL / PA devices, wherein the channels connecting APL / PA devices within a switch are independent and used for physical layer access of devices in high-risk environments; the method includes:
[0010] For each branch channel within the switch, the baseboard CPU shuts down the PA physical layer circuit of that branch channel and determines whether the APL physical layer circuit of that branch channel is in a link-up state.
[0011] If the APL physical layer circuit of the branch channel is in the link-up state, it enters the communication processing stage of the APL device;
[0012] If the APL physical layer circuit of the branch channel is in the link down state, the PA physical layer circuit in the link down state is kept in the first preset time, and the link up state of the APL physical layer circuit of the branch channel is determined in real time within the first preset time.
[0013] If the APL physical layer circuit is still in the link down state after the first preset time period, the PA physical layer circuit is put into the connected state, and the PA device's address polling command is sent. When the address polling command is responded to, the PA device is interacted with.
[0014] Optionally, the CPU disables the APL physical layer circuit of the branch channel before sending the address polling command for the PA device, with the PA physical layer circuit in a link-up state.
[0015] Optionally, the PA physical layer circuit is put into a link-up state, and an address polling command for the PA device is sent. When a response is received to the address polling command, interaction is performed with the connected PA device, including:
[0016] The polling method sends address polling commands to all PA devices on that branch channel, with a range of 3-126.
[0017] If a response message is received from at least one PA device, it is determined that a PA device is connected in the branch channel, and the CPU will no longer switch the branch channel to APL device access processing.
[0018] If no response is received after sending an address polling command to all PA devices in the branch channel, the APL physical layer circuit of the APL device is put into the link-up state, and the PA physical layer circuit of the branch channel is shut down.
[0019] Poll the above operations until the APL / PA device in this branch channel is in a linked-up state.
[0020] Optionally, in the APL / PA adaptive switching mode within the switch, the PA physical layer circuit is kept in a connected state, an address polling command for the PA device is sent, and interaction with the accessed PA device is performed when a response is received to the address polling command. The method also includes:
[0021] The PA device rapid deployment optimization method enables PA devices to be quickly connected;
[0022] Specifically, the CPU obtains physical layer information, including voltage and current values, from the MCU on the backplane via a serial port in the current branch channel.
[0023] Based on the physical sealing information, determine whether there is a valid voltage value in the current branch channel. If so, enter the communication mode for PA devices in that branch channel.
[0024] Optionally, determining whether a valid voltage value exists in the current branch channel based on the physical sealing information, and if so, entering the communication mode for PA devices accessing that branch channel, further includes:
[0025] If a valid voltage value exists, when polling the address of the PA device, a polling method of 3+x is used. The first round polls the address 3+126; that is, first poll the address 3, then poll the address 126, then poll the address 4, then poll the address 5, and so on; x is a natural number greater than or equal to 1.
[0026] When the address of the PA device polled is not 3, the CPU actively sends an address modification command to change the address of the channel connection device to 3.
[0027] Optionally, the method further includes:
[0028] The CPU accesses the web page via IP address. The web page supports online device upgrade and device configuration processes.
[0029] Specifically, in response to the user's command to select the latest firmware, the system executes the online upgrade process, uploads the latest firmware data, and controls the device to restart online after the data upload is complete to complete the firmware update.
[0030] Execute the device configuration process: Display device operating information through a web page, including: firmware version, compilation date, channel connection status, physical layer diagnostic information, and communication protocol configuration switching interface;
[0031] In response to the user's instruction to display the target channel on the web page, the system identifies the type of device currently connected to that target channel. If it is identified as an APL device, the system displays Ethernet device information, including MAC address, PN instrument name, and IP address, on the web page. If it is identified as a PA device, the system displays fieldbus device information, including device name, PA short address, device PA communication protocol version, and NE107 alarm information, on the web page.
[0032] In response to communication protocol configuration commands triggered by users via Web configuration commands, the target channel is forced to be configured as APL mode or PA mode.
[0033] Secondly, embodiments of the present invention also provide a conversion device that supports adaptive access of multi-channel APL / PA devices, comprising: a base, a bottom plate fixed on the base, and one or more back plates; the bottom plate and each back plate communicate via the base through IIC communication;
[0034] The base plate is responsible for data management of the APL / PA device, and the backplane provides power to the APL / PA device.
[0035] The baseboard is equipped with an embedded microprocessor CPU, used to implement the method described in the first aspect above for supporting adaptive access of multi-channel APL / PA devices.
[0036] Both the base plate and the back plate are equipped with switch chips, and the back plate is equipped with an IO expansion chip. The expansion chip is connected to the APL physical layer circuit or the PA physical layer circuit through at least one branch channel, and each channel is independent of each other.
[0037] The switch chip on the baseboard and the switch chip and I / O expansion chip on the backboard enable Ethernet communication and bus communication.
[0038] Optionally, the backplane provides power to the APL / PA device using PODL technology;
[0039] The embedded microprocessor communicates with the MAC of the switch chip via RMII.
[0040] The backplane also houses an MCU for supporting rapid access to the PA physical layer circuit, and all MCUs are connected to the CPU in a cascaded manner.
[0041] Optionally, the CPU controls the pins of the IO expansion chip via the IIC bus. Specifically, a 3-to-8 decoder is used to expand the three IO pins to 8 channels. During adaptive switching, only one of Y0~Y7 is low at any given time, and the low level corresponds to the PA physical layer circuit channel of the selected PA device.
[0042] Thirdly, embodiments of the present invention also provide a switch that integrates any of the conversion devices described in the second aspect above that support adaptive access of multi-channel APL / PA devices.
[0043] (III) Beneficial Effects
[0044] The method of this invention meets the functional requirements of adaptive switching between instruments with different protocols in the field, and can realize the access of instruments with multiple communication protocol types. Specifically, the conversion device can be responsible for the data management of APL / PA instruments and send them to the control network; it supports adaptive switching of APL / PA instrument access on multiple branch channels, allows for plug-and-play switching of instrument types at any time, and supports adaptive power supply for APL / PA instruments.
[0045] Furthermore, the conversion device in this embodiment supports online viewing and online upgrade functions for APL / PA instrument data management, and has higher stability and security. Attached Figure Description
[0046] Figure 1 This is a schematic diagram of a conversion device that supports adaptive access of multi-channel APL / PA devices, provided in an embodiment of the present invention.
[0047] Figure 2 A flowchart illustrating a method for supporting adaptive access of multi-channel APL / PA devices provided in an embodiment of the present invention;
[0048] Figure 3 This is a schematic diagram of another conversion device that supports adaptive access of multi-channel APL / PA devices according to an embodiment of the present invention;
[0049] Figure 4 A flowchart illustrating a method for supporting adaptive access of multi-channel APL / PA devices provided in an embodiment of the present invention;
[0050] Figure 5 and Figure 6 These are schematic diagrams illustrating the display of information on a web page interface according to embodiments of the present invention. Detailed Implementation
[0051] To better explain and facilitate understanding of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
[0052] PROFIBUS-PA, as a member of the PROFIBUS standard, has wide applications in process measurement. This type of communication technology offers advantages such as strong anti-interference capabilities, long transmission distances, and support for two-wire power supply. Currently, in industrial control systems, some transmitter instruments use the HART protocol to superimpose digital communication signals onto a 4-20mA current loop. However, the PROFIBUS-PA solution offers certain advantages over traditional 4-20mA signals.
[0053] The advantages of APL dual-line Ethernet technology include significantly improved communication speed, 10Mbps Ethernet, maximum communication distance of 1000 meters / 200 meters for Trunk backbone network / Spur branch network, suitability for high-explosive hazardous areas, communication cable simultaneously powering field equipment, and logical isolation of micro-segments to prevent illegal message traffic from interfering with normal communication and consuming network bandwidth resources.
[0054] PROFINET, an open communication protocol based on industrial Ethernet, has advantages such as real-time performance, openness, flexibility, advanced diagnostic functions, security, and seamless integration. It is widely used in various industrial automation scenarios such as distributed I / O systems, motion control, system integration, and process control, and can significantly improve system efficiency and reliability.
[0055] The method of this invention can support APL / PA instrument hardware physical layer access in high-risk environments and enables free switching and communication between the two types of instruments through embedded functions. In the following embodiments, the APL instrument is a type of APL device, and the PA instrument is a type of PA device. In the following embodiments, SPUR is an industry term in the APL technical standard, meaning branch channel.
[0056] Example 1
[0057] like Figure 1 As shown, Figure 1 A conversion device supporting adaptive access of multi-channel APL / PA devices is shown, comprising: a base, a bottom plate fixed on the base, and one or more back plates; the bottom plate and each back plate communicate via I2C through the base;
[0058] The baseboard is responsible for the data management of the APL / PA equipment, and the backplane provides power to the APL / PA equipment. The backplane is the power board for the physical layer circuit of the SPUR interface, and the power supply for each instrument is realized through PODL technology (i.e., Power over Data line, a technology that allows the device to receive power and data simultaneously through a single cable).
[0059] The baseboard is equipped with an embedded microprocessor CPU, which is used to implement a method to support adaptive access of multi-channel APL / PA devices. For example, it is used to perform parameter processing, algorithm calculation, parameter protection and storage, data acquisition and conversion of APL / PA instruments and uploading to the control network. In the specific implementation, the conversion device is complex and can use high-performance CPU hardware, such as MIMXRT1176CVM8A.
[0060] Both the base plate and the back plate are equipped with switch chips, and multiple switch chips can be cascaded to support dual-line Ethernet / PA interfaces, enabling Ethernet communication and bus communication between the base plate and the back plate.
[0061] The backplane contains an IO expansion chip, which is connected to the APL physical layer circuit or the PA physical layer circuit through at least one branch channel. Each channel is independent of the others.
[0062] The backplane provides power to the APL device through PODL technology.
[0063] The embedded microprocessor CPU communicates with the MAC of the switch chip via RMII.
[0064] The APL physical layer circuit (i.e., the corresponding Ethernet PHY chip) on the backplane uses ADIN1100. The physical layer circuit conforms to the 10BASE-T1L standard. The CPU and the switch chip's MAC communicate using RMII.
[0065] Since this switch requires multiple dual-line Ethernet / PA interfaces, it uses a cascaded approach with multiple switch chips (88E6097F). Each switch chip uses 7 RMII interfaces to connect to the APL physical layer circuit, and the switches communicate with each other using their built-in SERDES.
[0066] In this embodiment, the backplane branch channel (i.e., SPUR port) supports two types of instrument access: (1) APL instrument; (2) Profibus-PA instrument; where the APL instrument supports access via multiple communication protocols, such as: 1. HART-IP; 2. Profinet; 3. OPCUA. Specifically, both PA and APL instruments are accessed via two wires, with the two positive and negative wires connected to the corresponding channels.
[0067] In this embodiment, the CPU controls the pins of the IO expansion chip through the I2C bus. Specifically, a 3-to-8 decoder is used to expand the three IO pins to 8 channels. During adaptive switching, only one of Y0~Y7 is low at any given time, and the low level corresponds to the selected PA channel.
[0068] The CPU on the baseboard controls the pins of the I / O expansion chip via the IIC bus. Due to insufficient pin count on the I / O expansion chip, a 3-to-8 decoder is used to expand the three I / O pins to eight channels. The added logic is as follows: only one of Y0~Y7 is low at any given time, and the low level corresponds to the selected PA channel.
[0069] The channel switching definitions for the IO expansion chip are as follows:
[0070]
[0071] In this circuit, P00 / P01 / P02 of the IO expansion chip are the control pins for the 3 / 8 decoder, and P03 is the enable pin for the 3 / 8 decoder. The control sequence is as follows: P03 remains high, P00 / P01 / P02 output the corresponding values, channel switching is complete, and a 3ms wait is made for the PA physical layer circuit to stabilize before the PA sends data. That is, after the PA physical layer circuit stabilizes through modulation and demodulation, the bus data of the PA physical layer circuit is sent through encoding and decoding.
[0072] Furthermore, this embodiment proposes a conversion device for optimizing the address online status of PA instruments during adaptive switching between APL and PA devices, such as... Figure 3 As shown.
[0073] Add an embedded microprocessor (MCU) to each backplane (e.g.) Figure 3 The backplanes shown are all LPC 5506. This MCU is functionally used for ADC voltage sampling, performing SPUR channel physical layer diagnostics, and sending channel voltage, current, and diagnostic data to the baseboard CPU via serial port. Considering the relatively simple functions required on the backplanes, the LPC5506 chip was selected.
[0074] The LPC5506 chip samples the current channel voltage and current values through its built-in ADC peripheral, performs simple calculations and diagnostics based on the sampled values, and sends the current physical layer sampling information to the CPU via a private serial port protocol.
[0075] The switch chip (88E6097F) and LPC5506 chip on the backplane are independent of each other. The switch chip on the backplane is responsible for real-time data communication; the LPC5506 chip is responsible for ADC sampling voltage and current values and performing physical layer diagnostics; both chips communicate with the CPU (RT1176) on the baseboard to transmit data.
[0076] Example 2
[0077] like Figure 2 As shown, Figure 2 The flowchart illustrates a method for supporting adaptive access of multi-channel APL / PA devices, specifically, in conjunction with... Figure 1The conversion device shown can be understood to support both APL and PA type instrument physical layer access for each branch channel, and each SPUR port is independent and does not interfere with each other. Taking a single-channel SPUR port as an example, the CPU task control adaptive switching method includes:
[0078] 201. Because the PA physical layer circuit (i.e., PA parsing hardware circuit) connection will affect the handshake signal of the APL physical layer circuit, the PA physical layer circuit needs to be turned off in the initial stage. First, determine the current channel APL Link up status.
[0079] In this embodiment, the conversion device has multiple channels, each of which operates and is controlled independently. This embodiment takes the control process of one branch channel as an example, and the control process of all branch channels is similar.
[0080] Figure 2 The APL PHY chip in this context refers to the APL physical layer circuit.
[0081] 202. First, determine the link-up status of the APL physical layer circuit of the current branch channel. If the APL physical layer circuit of the current branch channel is in the link-up state, then shut down the PA physical layer circuit and enter the communication processing flow of the APL instrument / device.
[0082] 203. If the current branch channel APL physical layer circuit is in the link down state, keep the PA physical layer circuit closed for 20 seconds (i.e., the first preset duration, which can be configured according to actual needs, such as 30 seconds or 15 seconds). During this time, the link up state of the APL physical layer circuit can be checked periodically every 500ms. If the state of the APL physical layer circuit remains in the link down state during the 20 seconds, proceed to the next step.
[0083] 204. Switch to PA physical layer circuit connection state, that is, enter the PA communication scanning stage. Before sending the PA address polling command, the APL physical layer circuit must be turned off (because the APL physical layer circuit will send a handshake signal in the Power Up state, which will cause PA communication packet parsing errors when superimposed on the PA communication signal).
[0084] 205. Poll the PA instrument address of this branch channel (i.e., send a PA address polling command to all PA devices in this channel while the PA physical layer circuit is connected), with a range of 3-126. If any address responds, it is determined that a PA instrument is connected to this channel, and the process will not switch to APL state. If there is no response after one round of address polling, the APL physical layer circuit is activated, and the above operation is repeated until either APL or PA type is linked up.
[0085] In the above embodiments, "circuit off" and "circuit disconnected" mean the same thing, that is, both of which cause the circuit to be in a non-connected state.
[0086] Furthermore, to address the issue of slow PA instrument online time, this embodiment combines... Figure 3 The MCU chip is optimized.
[0087] According to the PA bus communication protocol between the PA physical layer circuit and the IO expansion chip, the instrument address may be in the range of 3 to 126. Assuming that the communication time required for each channel is 50ms, it may take nearly 30 seconds or more to poll from address 3 to address 126. In addition, the time for APL / PA adaptive switching may be even longer.
[0088] Therefore, in APL / PA adaptive switching mode, the PA instrument rapid deployment optimization method is as follows: Figure 4 As shown:
[0089] 401. When polling each channel, the CPU on the backplane (such as model RT1176) obtains the physical layer information of the current channel voltage and current values from the LPC5506 chip on the backplane via the serial port.
[0090] 402. Determine if a valid voltage value exists in the current channel. If it does, enter PA instrument communication mode.
[0091] 403. When polling the PA instrument address with a valid voltage value, a polling method of 3+x (where x increases) is used. The first round polls the address 3+126; that is, first poll the address 3, then poll the address 126, then poll the address 4, then poll the address 5, and so on.
[0092] 404. When the PA instrument address found through polling is not 3, actively issue an address modification command to change the instrument address to 3. For example... Figure 4 As shown.
[0093] According to the PA protocol, most PA instruments are factory defaulted to address 126, so when the instrument is first connected to this conversion device, it will still go online very quickly.
[0094] Furthermore, if the default address of the instrument PA is not 3 or 126, but another address, as long as it has been successfully connected to this conversion device once and successfully polled, its address will be changed to 3. Upon the next power-on connection to this conversion device, it will quickly go online. This effectively optimizes the polling time for the remaining 120+ addresses.
[0095] Compared with existing technologies, the method in this embodiment can effectively solve the problem of slow PA instrument online in the case of APL / PA adaptive switching.
[0096] Figure 5 The diagram shows the web interface of the conversion device for adaptive access of APL / PA equipment. Figure 6 This shows a portion of the information from the web page interface.
[0097] Specifically, the CPU accesses web pages via IP addresses. By directly entering the IPv4 address in a browser, users can access the web page interface. The web page interface contains information such as firmware version, compilation date, channel connection status, and physical layer diagnostics.
[0098] The web page supports online device upgrades. The online upgrade process is as follows: Click "Select File" to choose the latest firmware, click "upload" to upload the latest firmware data, and after the data upload is complete, click "Reboot" to restart the device online to update the firmware.
[0099] Furthermore, the webpage also displays the corresponding channel device status information, in order to Figure 6 For example, clicking on the corresponding channel will display the type of APL / PA instrument device currently connected to the channel. If it is an APL instrument, it will display Ethernet information such as MAC address, PN instrument name, and IP address. If it is a PA instrument, it will display the device name, PA short address, device PA communication protocol version, NE107 alarm information, etc.
[0100] The web interface also features a communication protocol configuration switching interface, allowing users to configure the communication protocol via web configuration commands and force it to be set to APL or PA mode.
[0101] The web-based management interface solution using Ethernet and PA bus communication protocols offers better user operability and improved device diagnostic and maintenance capabilities.
[0102] Understandably, the conversion device of this embodiment includes: a base, a bottom plate fixed on the base, and one or more back plates; the bottom plate and each back plate communicate via the base using IIC; the bottom plate is responsible for data management of the APL / PA devices, and the back plates provide power to the APL / PA devices; an embedded microprocessor CPU is configured on the bottom plate for implementing the method for supporting adaptive access of multi-channel APL / PA devices as described in any of the first aspects above.
[0103] Both the base plate and the back plate are equipped with switch chips, and the back plate is equipped with an IO expansion chip. The expansion chip is connected to the APL physical layer circuit or the PA physical layer circuit through at least one branch channel, and each channel is independent of each other.
[0104] The switch chip on the baseboard and the switch chip and I / O expansion chip on the backboard enable Ethernet communication and bus communication.
[0105] Optionally, the backplane provides power to the APL / PA device using PODL technology;
[0106] The embedded microprocessor communicates with the MAC of the switch chip via RMII.
[0107] The backplane also houses an MCU for supporting rapid access to the PA physical layer circuit, and all MCUs are connected to the CPU in a cascaded manner.
[0108] Optionally, the CPU controls the pins of the IO expansion chip via the IIC bus. Specifically, a 3-to-8 decoder is used to expand the three IO pins to 8 channels. During adaptive switching, only one of Y0~Y7 is low at any given time, and the low level corresponds to the PA physical layer circuit channel of the selected PA device.
[0109] In addition, this embodiment also provides a switch that integrates the aforementioned conversion device supporting adaptive access of multi-channel APL / PA devices. This enables rapid deployment of APL and PA devices and automatic connection of multiple protocols.
[0110] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0111] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, as well as combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions.
[0112] It should be noted that any reference numerals placed between parentheses in the claims should not be construed as limiting the claims. The word "comprising" does not exclude the presence of components or steps not listed in the claims. The word "a" or "an" preceding a component does not exclude the presence of a plurality of such components. The invention can be implemented by means of hardware comprising several different components and by means of a suitably programmed computer. In claims that enumerate several means, several of these means may be embodied by the same hardware. The use of the terms first, second, third, etc., is merely for convenience of expression and does not indicate any order. These terms can be understood as part of the component names.
[0113] Furthermore, it should be noted that in the description of this specification, the terms "one embodiment," "some embodiments," "embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0114] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the claims should be interpreted to include both the preferred embodiments and all changes and modifications falling within the scope of the invention.
[0115] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, then this invention should also include these modifications and variations.
Claims
1. A method for supporting adaptive access of multi-channel APL / PA devices, characterized in that, The switch has a dedicated channel for connecting APL / PA devices and is used for physical layer access of devices in high-risk environments; the method includes: For each branch channel within the switch, the baseboard CPU shuts down the PA physical layer circuit of that branch channel and determines whether the APL physical layer circuit of that branch channel is in a link-up state. If the APL physical layer circuit of the branch channel is in the link-up state, it enters the communication processing stage of the APL device; If the APL physical layer circuit of the branch channel is not in the link-up state, the PA physical layer circuit in the off state will be kept in the first preset time, and the link-up state of the APL physical layer circuit of the branch channel will be judged in real time within the first preset time. If the APL physical layer circuit is still not in a non-link-up state after the first preset time period, the PA physical layer circuit is put into a link-up state, and an address polling command for the PA device is sent. When the address polling command is responded to, the PA device is interacted with.
2. The method according to claim 1, characterized in that, Before sending the address polling command for the PA device, the CPU shuts down the APL physical layer circuit of the branch channel, ensuring the PA physical layer circuit is in a connected state.
3. The method according to claim 1, characterized in that, The PA physical layer circuit is put into a connected state, and an address polling command for the PA device is sent. When a response to the address polling command is received, interaction is performed with the connected PA device, including: The polling method sends address polling commands to all PA devices on that branch channel, with a range of 3-126. If a response message is received from at least one PA device, it is determined that a PA device is connected in the branch channel, and the CPU will no longer switch the branch channel to APL device access processing. If no response is received after sending an address polling command to all PA devices in the branch channel, the APL physical layer circuit of the APL device will be in the link-up state, and the PA physical layer circuit of the branch channel will be in the non-link-up state. Poll the above operations until the APL / PA device in this branch channel is in a linked-up state.
4. The method according to claim 3, characterized in that, In the APL / PA adaptive switching mode within the switch, the PA physical layer circuit is in a link-up state, an address polling command for the PA device is sent, and interaction with the accessed PA device is performed upon receiving a response to the address polling command. This also includes: The PA device rapid deployment optimization method enables PA devices to be quickly connected; Specifically, the CPU obtains physical layer information, including voltage and current values, from the MCU on the backplane via a serial port in the current branch channel. Based on the physical sealing information, determine whether there is a valid voltage value in the current branch channel. If so, enter the communication mode for PA devices in that branch channel.
5. The method according to claim 4, characterized in that, Based on the physical sealing information, determine whether there is a valid voltage value in the current branch channel. If so, enter the communication mode for PA devices accessing that branch channel, which also includes: If a valid voltage value exists, when polling the address of the PA device, a polling method of 3+x is used. The first round polls the address 3+126; that is, first poll the address 3, then poll the address 126, then poll the address 4, then poll the address 5, and so on; x is a natural number greater than or equal to 1. When the address of the PA device polled is not 3, the CPU actively sends an address modification command to change the address of the channel connection device to 3.
6. The method according to claim 1, characterized in that, The method further includes: The CPU accesses the web page via IP address. The web page supports online device upgrade and device configuration processes. Specifically, in response to the user's command to select the latest firmware, the system executes the online upgrade process, uploads the latest firmware data, and controls the device to restart online after the data upload is complete to complete the firmware update. Execute the device configuration process: Display device operating information through a web page, including: firmware version, compilation date, channel connection status, physical layer diagnostic information, and communication protocol configuration switching interface; In response to the user's instruction to display the target channel on the web page, the system identifies the type of device currently connected to that target channel. If it is identified as an APL device, the system displays Ethernet device information, including MAC address, PN instrument name, and IP address, on the web page. If it is identified as a PA device, the system displays fieldbus device information, including device name, PA short address, device PA communication protocol version, and NE107 alarm information, on the web page. In response to communication protocol configuration commands triggered by users via Web configuration commands, the target channel is forced to be configured as APL mode or PA mode.
7. A conversion device supporting adaptive access of multi-channel APL / PA devices, characterized in that, include: A base, a bottom plate fixed to the base, and one or more back plates; The base plate and each back plate communicate via a base; The base plate is used to manage the data of the APL / PA device, and the backplane provides power to the APL / PA device. The baseboard is equipped with an embedded microprocessor CPU for implementing the method for supporting adaptive access of multi-channel APL / PA devices as described in any one of claims 1 to 6. Both the base plate and the back plate are equipped with switch chips, and the back plate is equipped with an IO expansion chip. The expansion chip is connected to the APL physical layer circuit or the PA physical layer circuit through at least one branch channel, and each channel is independent of each other. The switch chip on the baseboard and the switch chip and I / O expansion chip on the backboard enable Ethernet communication and bus communication.
8. The conversion device according to claim 7, characterized in that, The backplane uses PODL technology to power the APL / PA device. The embedded microprocessor communicates with the MAC of the switch chip via RMII. The backplane also houses an MCU for supporting rapid access to the PA physical layer circuit, and all MCUs are connected to the CPU in a cascaded manner.
9. The conversion device according to claim 7, characterized in that, The CPU controls the pins of the I / O expansion chip via the IIC bus. Specifically, a 3-to-8 decoder is used to expand the three I / O pins to eight channels. During adaptive switching, only one of Y0~Y7 is low at any given time, and the low level corresponds to the PA physical layer circuit channel of the selected PA device.
10. A switch integrating a conversion device as described in any one of claims 7 to 9 that supports adaptive access of multi-channel APL / PA devices.