A method and apparatus for edge node traffic reconstruction and deterministic scheduling control

Abstract

This invention provides a method and apparatus for edge node traffic reconstruction and deterministic scheduling control, belonging to the field of data processing. The method includes generating a continuous pixel-level semantic value field; stripping and recombining high-value region of interest (ROI) pixels into independent ROI stream data packets, and marking these high-value ROI stream data packets with the highest priority; inputting heterogeneous data streams with differentiated service priority labels into an underlying physical queue, and performing high-frequency monitoring using hardware probes; fine-tuning the opening and closing times of the local gating queue based on ROI fluctuations to generate a gating control list; reconstructing the local gating queue when extreme congestion occurs; performing deterministic hardware-level shaping and preemption processing of the feature stream; and performing end-to-end latency assessment and reverse-adjusting the feature confidence threshold. This invention addresses the core pain points of existing technologies, such as rigid static scheduling, severe bandwidth waste, high latency, and indiscriminate packet loss.

Description

Technical Field

[0001] This invention belongs to the field of data processing, and in particular relates to a method and apparatus for edge node traffic reconstruction and deterministic scheduling control. Background Technology

[0002] In the converged architecture of 5G and the Industrial Internet, DS-TT, with the deepening advancement of intelligent manufacturing, has become a core component of intelligent production line upgrades in industrial automation applications based on machine vision (such as product defect detection, high-precision pose positioning, and robot vision servo control). In these scenarios, industrial cameras need to transmit high-resolution, high-frame-rate image data to edge computing nodes or cloud computing units in real time for processing. To ensure deterministic transmission of industrial field control commands and massive amounts of visual data across the network, Time-Sensitive Networking (TSN) has been widely adopted in industrial communication architectures. In the converged architecture of 5G and the Industrial Internet, DS-TT, as a key gateway device for industrial terminals to access TSN, undertakes the core functions of local clock synchronization, traffic classification and mapping, and underlying MAC layer scheduling.

[0003] Time-Sensitive Networking (TSN) uses the Time-Aware Shaper (TAS) defined by the IEEE 802.1Qbv standard to allocate dedicated, strict time windows to traffic of different priorities, thereby providing microsecond-level deterministic transmission latency and zero congestion packet loss service guarantees on standard Ethernet links. However, traditional TSN scheduling mechanisms are mainly designed for industrial control messages (such as PLC heartbeat messages and motion control command messages) with stable periodic characteristics, small packet lengths, and fixed traffic characteristics.

[0004] When industrial vision applications are connected to Time-Sensitive Networks (TSNs), they face a significant technical adaptation gap. Current industrial vision service data exhibits typical traffic characteristics of "high bandwidth consumption, strong burst characteristics, and non-periodic transmission." A single gigabit industrial camera generates a burst of gigabyte-level jumbo frames at the moment of exposure. If this type of visual data is transmitted on the same network as critical control data, even with a VLAN priority allocation mechanism, the large volume of visual data will still quickly fill the local buffer queue of the DS-TT end-side gateway. Traditional network devices use an indiscriminate forwarding processing mode for this type of visual data; that is, the data link layer (MAC layer) and physical layer (PHY layer) are unaware of the service semantics and content characteristics of the application-layer visual images. This results in a series of insurmountable technical bottlenecks in existing technical solutions for industrial vision service TSN transmission scenarios. Summary of the Invention

[0005] To address the aforementioned shortcomings in existing technologies, this invention provides a method and apparatus for edge node traffic reconstruction and deterministic scheduling control. This invention aims to achieve cross-layer intelligent scheduling within DS-TT end-side devices, solving the core pain points of existing technologies such as rigid static scheduling, severe bandwidth waste, high latency, and indiscriminate packet loss.

[0006] To achieve the above objectives, the technical solution adopted by this invention is: a method for edge node traffic reconstruction and deterministic scheduling control, comprising the following steps: S1. When a large video frame arrives at the local network port, extract the key defect area from the naked video stream and generate a continuous pixel-level semantic value field. S2. Based on the generated pixel-level value field and the original payload frame data of the system kernel state residing in the edge node, the high-value region of interest (ROI) pixels are stripped and recombined into independent ROI stream data packets, and the high-value ROI stream data packets are marked with the highest priority. S3. Based on the labeling results, the heterogeneous data stream with service priority labels is input into the underlying physical queue. Hardware probes are used for high-frequency monitoring and real-time reporting of queue status and overall physical cache occupancy over-limit alarms. S4. Based on the monitoring results and the fluctuation of the region of interest (ROI), fine-tune the opening and closing times of the local gating queue and generate a gating control list. S5. When extreme congestion exists, reconstruct the local gating queue and output the reconstructed sending queue. S6. Based on the gating control list and the reconstructed sending queue, perform deterministic hardware-level shaping and preemption processing of feature streams; S7. Based on the processing results of S6, perform end-to-end latency assessment and reverse adjust the threshold of feature confidence in S1 to complete edge node traffic reconstruction and deterministic scheduling control.

[0007] Further, S1 includes: When a large video frame arrives at the local network port, it is directly connected to the edge neural network processing unit (NPU). Obtain a set of Region of Interest (ROI) bounding boxes containing defect targets and key feature identifiers from the naked video stream, and extract the associated geometric pixel coordinates and feature confidence scores. Based on the extracted geometric pixel coordinates and feature confidence scores, the discrete bounding box is transformed into a continuous pixel-level semantic value field, where the expression for the absolute semantic value of each pixel is as follows:

[0008] in, This represents the contribution score of each pixel in the image space to the underlying task. This represents the index of the candidate region of interest (ROI) bounding box. This represents the total number of candidate Region of Interest (ROI) bounding boxes obtained. Indicates the first The feature confidence score associated with the bounding box of each Region of Interest (ROI). This represents the x-axis coordinate of the pixel whose semantic value is to be calculated in the two-dimensional coordinate system of the image. Indicates the first The absolute x-axis coordinates of the geometric center of the bounding box of a region of interest (ROI) in the two-dimensional coordinate system of the image. This represents the ordinate of the pixel whose semantic value is to be calculated in the two-dimensional coordinate system of the image. Indicates the first The absolute vertical coordinates of the geometric center of the bounding box of a region of interest (ROI) in the two-dimensional coordinate system of the image. Indicates the first The variance control parameters corresponding to the bounding boxes of each Region of Interest (ROI).

[0009] Furthermore, S2 includes: Read the continuous pixel-level semantic value field residing in shared memory, as well as the raw payload frame data residing in the system kernel mode; The pixel-level semantic value field is scanned based on a preset bidirectional dynamic threshold, and the scan results are used as a spatial mapping index to match the original payload frame data. Based on the matching results, the corresponding high-value region of interest (ROI) pixel set is located in the physical memory space, and the absolute spatial offset of the ROI pixel block in the original two-dimensional image coordinate system and the original video frame sequence number to which it belongs are obtained. Based on the positioning results, the scatter-aggregate DMA hardware mechanism is invoked to extract and aggregate the discrete high-value Region of Interest (ROI) pixel sets in the physical memory space, and inject the absolute spatial offset and the original video frame sequence number into the custom application layer header to reassemble them into independent ROI stream data packets. The payload average semantic value of the reconstructed Region of Interest (ROI) flow packets is calculated and mapped to the physical memory descriptor of the packets as the initial semantic value. At the same time, the standard Linux flow control mapping table is bypassed directly, and the IEEE 802.1Q VLAN PCP priority label in the Ethernet MAC frame header is forcibly rewritten at the physical memory descriptor level of the ROI flow packets to mark the high-value ROI flow packets with defects with the highest priority.

[0010] Furthermore, S3 includes: Based on the labeling results, heterogeneous data streams with service priority labels are input into the underlying physical queue; Using hardware probes, the absolute depth of current byte accumulation, header message delay, overall physical buffer occupancy, and real instantaneous throughput of the physical medium at each priority level are periodically read to construct a multi-dimensional perception matrix of micro-queue status. The multi-dimensional perception matrix of the micro-queue state is compared with the preset security threshold, and the overall physical cache occupancy rate is compared with the preset saturation threshold. If the queuing delay of the high-speed queue header message approaches the failure threshold, or if a backpressure signal is detected at the underlying level, or if the overall physical cache occupancy exceeds the preset saturation threshold, the hardware probe will trigger a non-maskable hardware interrupt through the interrupt pin and report an alarm for the overall physical cache occupancy exceeding the limit and a real-time queuing status data matrix to the system kernel.

[0011] Furthermore, S4 includes: Based on the Region of Interest (ROI), predict the amount of feature dequeue bandwidth compensation required by the high-speed control queue in real time when the original payload physically arrives in the next cycle. ; Based on feature-based outbound bandwidth compensation Recalculate the dynamic door opening time of the high-priority fast queue; Based on the dynamic door opening time and using the monitoring results as a reference variable for dynamically fine-tuning the door control bandwidth, an updated door control list (GCL) is dynamically generated.

[0012] Furthermore, the expression for the dynamic door opening time is as follows:

[0013] in, This indicates the effective door-opening time window dynamically allocated to the highest priority fast queue within the current scheduling period. This indicates the system's preset minimum bandwidth opening time reserved for the highest priority high-speed queue. This indicates the pre-allocated bandwidth for the lowest priority queue. This indicates the minimum safe operating limit.

[0014] Furthermore, S5 includes: In response to an over-limit alarm reported by S3 indicating that the overall physical cache utilization rate exceeds a preset saturation threshold, the global cache area is locked through atomic operations; Extract the initial semantic value of each message marked in S2, and combine it with the queuing time of the messages in the system fed back by S3 to perform high-speed traversal of massive congested messages, and dynamically calculate the first... jThe current effective retention value of each feature data packet, where the expression for the current effective retention value is as follows:

[0015] in, Indicates the first A feature visual data package The effective surplus value at the current moment. Represents visual data packets The initial semantic value is generated at the moment of its creation. Indicates the value decay coefficient. This represents the system's current real-time absolute timestamp. Indicates the first A feature visual data package The initial enqueue timestamp of the physical queue. Represented by natural constant An exponentially decaying function with base 0; Based on the current effective retention value, the packets in the cache pool are sorted in ascending order, and the packet with the lowest current effective retention value is dequeued, and the reconstructed sending queue is output.

[0016] Furthermore, S6 includes: Based on the current Ethernet communication micro-cycle critical time window, the updated dynamic gating control list is written in batches into the control register of the TSN switching chip through the system high-speed bus, triggering the synchronous update of the working register; After the gating control list is updated, the scheduling engine implements deterministic dequeue scheduling for multi-priority queues based on the updated scheduling schedule. For sudden preemption scenarios, based on the reconstructed transmission queue, when the high-speed traffic gating time window is open and valid data is cached, if the low-priority queue is transmitting a giant frame, the underlying MAC layer activates the IEEE 802.1Qbu hardware-level frame preemption mechanism. Based on the preemption result, when the start delimiter of the data frame arrives at the physical layer reference plane, the hardware engine collects the hardware-level transmission timestamp and writes it back to the transmission descriptor, completing the shaping transmission and preemption processing.

[0017] The present invention also provides an edge node traffic reconstruction and deterministic scheduling control device, comprising: The first processing module is used to extract key defect areas from the naked video stream and generate a continuous pixel-level semantic value field when a large video frame arrives at the local network port. The second processing module is used to extract and reassemble high-value Region of Interest (ROI) pixels into independent ROI stream data packets based on the generated pixel-level value field and the original payload frame data of the system kernel state residing in the edge nodes, and to mark the high-value ROI stream data packets with the highest priority. The third processing module is used to input heterogeneous data streams with service priority labels into the underlying physical queue based on the labeling results, and to use hardware probes to perform high-frequency monitoring and report queue status and overall physical cache occupancy over-limit alarms in real time. The fourth processing module is used to fine-tune the opening and closing times of the local gating queue based on the monitoring results and the fluctuation of the region of interest (ROI), and to generate a gating control list. The fifth processing module is used to reconstruct the local gated queue and output the reconstructed sending queue when there is extreme congestion. The sixth processing module is used to perform deterministic hardware-level shaping and preemption processing of feature streams based on the gating control list and the reconstructed sending queue. The seventh processing module is used to perform end-to-end latency assessment based on the processing results of the sixth processing module, and to reversely adjust the threshold of feature confidence in the first processing module to complete edge node traffic reconstruction and deterministic scheduling control.

[0018] The beneficial effects of this invention are: This invention discloses a dynamic shaping process for machine vision ROI streams and a DS-TT local queue scheduling process deployed within industrial edge computing nodes (i.e., DS-TT devices with local computing power). It leverages the hardware and software collaboration capabilities of the edge gateway to achieve a breakthrough, with its core technical approach being "computing power-driven shaping and semantic-guided scheduling." This innovation fundamentally changes the traditional "store-forward" model of machine vision data handling in industrial edge gateways, successfully upgrading it to a deep content-aware forwarding architecture of "perception-deconstruction-reshaping-scheduling." This invention has at least the following beneficial effects: (1) By using DS-TT edge computing power to extract features of the Region of Interest (ROI) and classify traffic online, the visual flow is dynamically dissected into heterogeneous packets, thereby reducing the peak demand for deterministic bandwidth of TSN from the source. (2) A pixel-level accurate labeling is achieved by using the cross-layer collaborative mapping algorithm from image spatial coordinates to network layer priority, ensuring that core visual features are preferentially routed to the highest priority gated queue of TSN; (3) By using the TSN 802.1Qbv gating dynamic fine-tuning mechanism based on the load volatility of the region of interest (ROI), the rigidity of static configuration is overcome, and the visual transmission efficiency is maximized without interfering with other key services. (4) By using the visual semantic value gradient-based anti-congestion active drop algorithm, the indiscriminate tail packet drop strategy is abandoned, ensuring that core Region of Interest (ROI) data frames can still pass through the TSN network without loss under extreme congestion. Attached Figure Description

[0019] Figure 1 This is a flowchart of the method of the present invention.

[0020] Figure 2 This is a schematic diagram of the device structure of the present invention. Detailed Implementation

[0021] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0022] Example 1 This invention discloses a feature-driven traffic reconstruction and deterministic scheduling control method deployed within industrial edge computing nodes (i.e., DS-TT devices with local computing power). In specific industrial vision implementation scenarios, this invention leverages the hardware and software collaboration capabilities of the edge gateway to achieve a breakthrough. Its core technical approach is "computing power-driven shaping and semantic-guided scheduling." This innovation fundamentally changes the traditional "store-forward" model of machine vision data for industrial edge gateways, successfully upgrading it to a deep content-aware forwarding architecture of "perception-deconstruction-reshaping-scheduling."

[0023] In the description of this invention, to make the logic of this solution more universal, the following terms are defined: Features, or key features, refer to the set of data extracted from the raw payload stream that is crucial for business decisions. In the industrial vision implementation scenario described below, features are represented as regions of interest (ROIs) in an image. The raw payload refers to the data stream to be processed that is connected to the edge node (in the industrial vision implementation scenario described below, it is represented by the raw video frames output by the industrial camera).

[0024] A payload unit refers to the smallest logical component that makes up the original payload (such as a pixel in a video frame).

[0025] Feature-driven refers to resource allocation and scheduling based on the semantic value distribution of data payloads.

[0026] Those skilled in the art should understand that although the following detailed description uses industrial vision and ROI as examples, the traffic reconstruction and deterministic scheduling logic of the present invention is also applicable to other multimodal data streams with non-uniform value distribution, such as audio, vibration, and point clouds.

[0027] In the core execution phase of dynamic shaping and local queue scheduling, this invention constructs a software-hardware collaborative control closed loop running within DS-TT through seven steps. First, when a giant video frame arrives at the local network port, the system uses zero-copy technology to directly connect it to the end-side NPU. Through lightweight inference, it accurately locates product defects or key outlines and constructs a continuous visual value matrix field, completing the transformation from disordered pixels to structured semantics with extremely low overhead. Subsequently, the system performs image splitting and reassembly in kernel mode, breaking the traditional linear packetization logic. Based on the value matrix, it separates and aggregates high-value ROI pixels separately, and forcibly marks the highest-priority VLAN PCP tag in the Ethernet frame header, thereby deconstructing the original indiscriminate image into a high-priority "ROI burst stream" and a best-effort "background stream". After data is pushed into the underlying TSN switching platform, the queue backlog depth and dequeue latency of each priority level are polled at a high frequency of nanoseconds. At this time, the required physical dequeue bandwidth for the next moment is predicted by autoregression based on the ROI scale of the previous few frames. The gating opening and closing time of IEEE 802.1Qbv is dynamically fine-tuned through the "same-period bandwidth borrowing" mechanism to forcibly squeeze slots out of the background queue to ensure that sudden ROI packets do not overflow. In the event of a critical moment of local memory congestion, the computing power-driven queue reconstruction mechanism will be triggered. The system not only considers the original features of the image, but also introduces a residence time decay factor to evaluate the real-time timeliness of the packets. It accurately targets and destroys the lowest value and longest queued low-timeliness background packets from the underlying cache, prioritizing the reliable transmission and priority scheduling of core ROI data. In the final physical transmission stage, the macro-level shaping strategy is transformed into a microsecond-level atomic refresh of the underlying MAC register. When a high-priority feature packet arrives, the underlying hardware automatically activates the IEEE 802.1Qbu preemption logic, interrupting the transmission of the massive background frame to prioritize the passage of critical data and clear local line head congestion. Finally, the system feeds back the actual physical dequeue delay as a KPI to the edge computing layer. Once persistent congestion is detected in the underlying queuing, the computing layer immediately and adaptively increases the AI's feature clustering threshold, proactively optimizing the feature extraction range and accuracy in subsequent payloads (such as reducing the ROI extraction area in visual scenarios), further reducing network queuing pressure from the source, ultimately forming an edge-side self-evolutionary closed loop of "computing power driving shaping, congestion controlling computing power".

[0028] like Figure 1 As shown, this invention provides a method for edge node traffic reconstruction and deterministic scheduling control, the implementation of which is as follows: S1. When a large video frame arrives at the local network interface, key defect areas are extracted from the naked video stream to generate a continuous pixel-level semantic value field. The implementation method is as follows: When a large video frame arrives at the local network port, it is directly connected to the edge neural network processing unit (NPU). Obtain a set of Region of Interest (ROI) bounding boxes containing defect targets and key feature identifiers from the naked video stream, and extract the associated geometric pixel coordinates and feature confidence scores. Based on the extracted geometric pixel coordinates and feature confidence, discrete bounding boxes are transformed into continuous pixel-level semantic value fields.

[0029] In this embodiment, the key feature perception and value field construction based on edge computing power are as follows: Input data: Raw payload data streams (such as raw video frames from an industrial camera) accessed via the Data Plane Development Kit (DPDK) or Direct Memory Access (DMA) zero-copy technology. Output data: A "two-dimensional continuous visual value matrix" with spatial coordinates and absolute timestamps corresponding to the original image resolution, which serves as the basis for data extraction in S2.

[0030] Operation: The edge NPU computing engine loads a lightweight object detection model, performs forward inference on the raw payload in shared memory, and outputs a set of bounding boxes for regions of interest (ROIs) containing defective targets and key feature identifiers. It also extracts the associated geometric pixel coordinates and feature confidence scores. Based on a multi-Gaussian superposition attenuation model, the discrete bounding boxes are transformed into a continuous visual value weight field.

[0031] In this embodiment, the core of this step lies in utilizing the heterogeneous computing power built into the edge gateway (such as the deep integration of CPU and NPU or FPGA architecture) to break the traditional "extensive store-forward" mechanism, completing the dimensionality reduction and transformation from unordered payload data (such as the original pixel matrix) to a structured feature semantic stream with extremely low system clock overhead. In traditional network devices, the access of massive amounts of data is often accompanied by frequent kernel mode and user mode switching. However, when gigabit or 10-gigabit industrial cameras physically arrive at the DS-TT local Ethernet port, this invention abandons the severe millisecond-level latency caused by interrupt handling and multiple memory copies in the traditional Linux kernel network protocol stack (such as the TCP / IP stack). The underlying network card driver relies heavily on the Data Plane Development Kit (DPDK) or high-speed PCIe Direct Memory Access (DMA) technology, pre-allocating contiguous physical large pages of memory (Hugepages) during the operating system boot phase to minimize the miss rate of the Translation Lookahead Buffer (TLB). The underlying hardware maps the data frame descriptors in the network card's receive circular buffer directly to the dedicated shared memory space of the Neural Processing Unit (NPU) through a circular queue. In the physical transient of data being written to disk, the hardware MAC engine immediately captures the absolute high-precision timestamp of the arrival of the first bit (SFD) of the data frame and tightly binds it to the base address pointer of the original image in memory, thereby establishing an absolutely immutable time base for all subsequent scheduling involving microsecond-level timeliness.

[0032] Within microseconds of the memory data being ready, the edge computing engine rapidly loads a lightweight object detection or instance segmentation model that has undergone deep pruning, quantization, and optimization for a specific Tensor Processing Unit (TPU). This model performs extremely fast forward inference on the massive panoramic image. Its fundamental purpose is not to consume computing power to identify every detail of the entire image, but to accurately output a set of multiple candidate ROI bounding boxes containing product defects, key alignment marks, or core mechanical contours. Each bounding box not only outputs strict geometric pixel coordinates but also includes a feature confidence score, normalized by the Softmax function, representing the severity or confidence level of the defect. To prevent the high-frequency spatial information of feature edges from being fragmented or lost due to rigid rectangular physical segmentation during subsequent packet and network shaping transmission, the edge computing module does not simply call the image cropping function but constructs a two-dimensional continuous "visual value matrix field" corresponding to the original image resolution. For any pixel coordinate (x, y) in the two-dimensional plane of an image, its absolute semantic value v(x, y) is not a simple binary determination of zero or one, but rather a mathematically calculated extremely smooth value using a multi-Gaussian superposition decay model based on the confidence level of the computational output.

[0033] in, This represents the contribution score of each pixel in the image space to the underlying task. This represents the index of the candidate region of interest (ROI) bounding box. This represents the total number of candidate Region of Interest (ROI) bounding boxes obtained. Indicates the first The feature confidence score associated with the bounding box of each Region of Interest (ROI). This represents the x-axis coordinate of the pixel whose semantic value is to be calculated in the two-dimensional coordinate system of the image. Indicates the first The absolute x-axis coordinates of the geometric center of the bounding box of a region of interest (ROI) in the two-dimensional coordinate system of the image. This represents the ordinate of the pixel whose semantic value is to be calculated in the two-dimensional coordinate system of the image. Indicates the first The absolute vertical coordinates of the geometric center of the bounding box of a region of interest (ROI) in the two-dimensional coordinate system of the image. Indicates the first The variance control parameter corresponding to the bounding box of each Region of Interest (ROI) is used to adjust the physical decay gradient of the semantic value weight of a pixel as it expands outward with spatial distance.

[0034] In the above formula, the variable v(x,y) defines the contribution score of each pixel in the image space to the underlying task (such as defect classification or visual source tracing). When multiple overlapping or adjacent ROIs (Regions of Interest) exist in an image, it serves to significantly mask and fuse them. By taking the maximum value rather than summing, it effectively avoids the problem of value overflow (exceeding 1.0) in overlapping regions of multiple targets, ensuring the normalization properties of the matrix field. Parameters This parameter reflects the degree of certainty the end-side model has regarding the target. It acts as a filter, reducing the likelihood of artifacts or low-confidence interference. It automatically lowers the potential energy of the entire local field, thereby preventing unnecessary background noise from consuming valuable network communication resources. The exponential decay term exp(...) in the core function of the formula transforms the rigid rectangular boundary into a continuous, differentiable, smooth curve. This measures the physical distance of any point (x, y) in the image from the center of the defect; the greater the distance, the larger the value. 2 The variance control term determines the steepness of the value drop, ensuring that the weight decreases (decays from the center to the edge) rather than diffuses as distance increases.

[0035] S2. Based on the generated pixel-level value field and the original payload frame data of the system kernel state residing at the edge nodes, high-value Region of Interest (ROI) pixels are stripped and recombined into independent ROI stream data packets, and the high-value ROI stream data packets are marked with the highest priority. The implementation method is as follows: Read the continuous pixel-level semantic value field residing in shared memory, as well as the raw payload frame data residing in the system kernel mode; The pixel-level semantic value field is scanned based on a preset bidirectional dynamic threshold, and the scan results are used as a spatial mapping index to match the original payload frame data. Based on the matching results, the corresponding high-value region of interest (ROI) pixel set is located in the physical memory space, and the absolute spatial offset of the ROI pixel block in the original two-dimensional image coordinate system and the original video frame sequence number to which it belongs are obtained. Based on the positioning results, the scatter-aggregate DMA hardware mechanism is invoked to extract and aggregate the discrete high-value Region of Interest (ROI) pixel sets in the physical memory space, and inject the absolute spatial offset and the original video frame sequence number into the custom application layer header to reassemble them into independent ROI stream data packets. The payload average semantic value of the reconstructed Region of Interest (ROI) flow packets is calculated and mapped to the physical memory descriptor of the packets as the initial semantic value. At the same time, the standard Linux flow control mapping table is bypassed directly, and the IEEE 802.1Q VLAN PCP priority label in the Ethernet MAC frame header is forcibly rewritten at the physical memory descriptor level of the ROI flow packets to mark the high-value ROI flow packets with defects with the highest priority.

[0036] In this embodiment, the input data consists of the two-dimensional continuous visual value matrix field output by S1 and the original payload frame data residing in the kernel state. The output data consists of the highly condensed heterogeneous data stream after decomposition and reconstruction (high-optimal ROI burst stream and low-optimal background stream), which is directly pushed into the underlying TSN exchange matrix monitored by S3.

[0037] Operational Procedure: The system scans the pixel-level semantic value field based on a preset bidirectional dynamic threshold, precisely dividing the original pixels into high-value ROI pixel sets, secondary contour pixel sets, and low-value background pixel sets. It invokes the Scatter-GatherDMA hardware mechanism to break linear packetization, extracting and aggregating the discrete high-value ROI pixel sets in physical memory space (close to the MTU size). The system then forcibly injects the absolute spatial offset (OffsetX, OffsetY) of the pixel block in the original two-dimensional image coordinate system and the original video frame sequence number into a custom application layer header to support seamless remote restoration. The system calculates the average semantic value of the reconstructed data packets in real time and directly bypasses the Linux standard flow control mapping table, forcibly rewriting the IEEE 802.1Q VLAN PCP priority label in the Ethernet MAC frame header at the physical memory descriptor level. High-value ROI stream packets containing defects are marked with the highest priority (e.g., PCP=7 or 6), while background stream packets are marked with a best-effort low-level label (PCP=0).

[0038] In this embodiment, the feature stream extraction and cross-layer semantic label mapping steps are implemented in the system kernel state of the edge node to reorganize the payload stream, bridging the gap between the application layer image semantics and the data link layer Ethernet frame in the OSI seven-layer model. This formally strips away and reshapes the key feature stream (represented as ROI data stream in a visual scene) that requires the highest level of bandwidth guarantee. The system first reads the continuous value field matrix residing in shared memory from the previous step, as well as the original payload frame data residing in the system kernel state. Based on the configuration file or global controller, it issues instructions to dynamically configure a rigorous bidirectional threshold control system. This invention scans the pixel-level semantic value field according to a preset bidirectional dynamic threshold and uses the scan results as a spatial mapping index to match from the original payload frame data. Based on the matching results, it locates the corresponding high-value region of interest (ROI) pixel set in the physical memory space and obtains the absolute spatial offset of the high-value ROI pixel block in the original two-dimensional image coordinate system and its corresponding original video frame sequence number. Based on the location results, it calls the scatter-aggregate DMA hardware mechanism to extract and aggregate the discrete high-value ROI pixel sets in the physical memory space.

[0039] The millions of pixels in the entire original image are precisely divided into three camps based on these dynamic thresholds: pixel clusters whose semantic value is strictly higher than the high threshold are classified as high-value ROI pixel sets; the buffer zone with value between the high and low thresholds is classified as secondary contour pixel sets; and all other low-frequency areas are ruthlessly classified as useless background pixel sets. To ensure that the remote cloud server or edge vision controller can effectively and completely restore the fragmented image after receiving fragmented data packets, when extracting these high-value pixel blocks, the system will forcibly inject the absolute spatial offset (Offset X, Offset Y) of the pixel block in the original two-dimensional image coordinate system and the original video frame sequence number to which it belongs into the custom application layer header of each Ethernet data payload.

[0040] Traditional network protocol stacks typically slice and package data in a rigid and illogical manner according to linear memory address order. This approach easily leads to a complete defect feature being scattered across dozens of different network data packets. This module, however, uses a highly customized Scatter-Gather DMA hardware mechanism to extract and aggregate discrete but semantically valuable Region of Interest (ROI) pixel sets in physical memory space. These are packaged into independent data packets close to the standard Ethernet Maximum Transmission Unit (MTU, e.g., 1500 bytes), and the absolute spatial offset and the original video frame sequence number are injected into a custom application layer header, reassembling them into independent ROI stream data packets. This operation instantly creates a pure, highly concentrated, and extremely valuable ROI burst stream on the physical link. During the heterogeneous reassembly process, the system also uses an arithmetic logic unit to calculate and record the "payload average semantic value" of each newly generated data packet in real time and writes it into the extended header. This serves as the absolute basis for subsequent congestion-prevention drop algorithms to determine whether a packet is viable or not. When these data packets, carrying different fates, descend from kernel mode to the local physical network card and enter the final encapsulation stage, the system, based on their value set affiliation, directly bypasses the standard flow control mapping table of the Linux system and forcibly rewrites the IEEE 802.1Q priority tag in the Ethernet MAC frame header at the physical memory descriptor level of the data packet. High-value ROI stream data packets containing fatal flaws are unconditionally marked with the highest priority (e.g., PCP=7 or 6) and directly pushed into the high-speed control gating queue of the DS-TT underlying TSN switching chip; while background streams, which account for the vast majority of the data volume and contain huge conveyor belts or completely black fields, are marked with a best-effort low-level tag (PCP=0) and pushed into the lowest-level low-priority queue, waiting for a transmission opportunity only in absolutely idle network time slots.

[0041] S3. Based on the labeling results, the heterogeneous data stream with service priority tags is input into the underlying physical queue. Hardware probes are used for high-frequency monitoring and real-time reporting of queue status and overall physical cache occupancy exceeding limits. The implementation method is as follows: Based on the labeling results, heterogeneous data streams with service priority labels are input into the underlying physical queue; Using hardware probes, the absolute depth of current byte accumulation, header message delay, overall physical buffer occupancy, and real instantaneous throughput of the physical medium at each priority level are periodically read to construct a multi-dimensional perception matrix of micro-queue status. The multi-dimensional perception matrix of the micro-queue state is compared with the preset security threshold, and the overall physical cache occupancy rate is compared with the preset saturation threshold. If the queuing delay of the high-speed queue header message approaches the failure threshold, or if a backpressure signal is detected at the underlying level, or if the overall physical cache occupancy exceeds the preset saturation threshold, the hardware probe will trigger a non-maskable hardware interrupt through the interrupt pin and report an alarm for the overall physical cache occupancy exceeding the limit and a real-time queuing status data matrix to the system kernel.

[0042] In this embodiment, the input data for this step is: the real-time hardware queue status (byte backlog, dequeue pipeline status, etc.) inside the TSN switching chip. The output data is: an absolutely true, zero-latency quantized queue congestion warning signal and a real-time queuing status data matrix, which are used by S4 for shaping and adjustment or to trigger the defense mechanism of S5.

[0043] Operation: The status monitoring probe is mounted on a PCIeGen4 or dedicated MDIO bus, abandoning high-latency software polling and using extremely high clock frequencies (microseconds or even nanoseconds) to read the hardware statistics register group of the underlying TSNMAC chip. The absolute depth of the current byte stack, header message latency, and the actual instantaneous throughput of the physical medium's exit are extracted for each priority level to construct a micro-level queue status multi-dimensional perception matrix. This matrix is ​​compared with security thresholds. If the queuing latency of the high-speed queue header message approaches the failure threshold (e.g., 250 microseconds), or a back-pressure signal is detected, or the overall physical cache occupancy exceeds a preset saturation threshold, the hardware probe will trigger a non-maskable hardware interrupt (NMI) via a dedicated pin and report an overall physical cache occupancy over-limit alarm and a real-time queue status data matrix to the system kernel, forcibly waking up S4 or S5 to intervene with the highest priority.

[0044] In this embodiment, the local physical queue state awareness and high-frequency monitoring steps act as an indispensable low-level hardware physical probe in the entire dynamic shaping system. They are responsible for accurately converting the invisible and rapidly changing physical electronic flow state into a mathematical input matrix that can be directly quantified and calculated by the upper-level scheduling algorithm. The state monitoring unit in the system is directly mounted on the high-speed system mainline inside the DS-TT (such as a PCIe Gen4 interface or a dedicated MDIO management data input / output bus), abandoning the high-latency approach of relying on kernel network interrupts or timer context switching to obtain the state, as such software-level polling is already inadequate for handling microsecond-level industrial communication. This state monitoring unit directly reads the transmit descriptor ring and hardware statistics register group inside the underlying TSN MAC chip at extremely high hardware clock frequencies of microseconds or even nanoseconds, thereby obtaining absolutely real, zero-latency physical link feedback that is not filtered by any operating system cache.

[0045] The monitoring probe's scope extends beyond the overall port throughput; it constructs an extremely detailed micro-level congestion profile of the eight underlying physical egress queues based on priority. The system extracts and maintains a core indicator matrix containing multi-dimensional states in real time. These indicators include, but are not limited to: the absolute depth of byte stacking in a specific priority queue, the queuing latency of packets at the header pointer since enqueuing, and the actual instantaneous throughput of the physical medium layer's egress and the underlying link error / retransmission count. Based on this underlying physical data, the system establishes a forward-looking early warning model based on latency gradients and sets extremely stringent tolerance limits. If the probe detects within a polling cycle that a high-priority ROI-assigned high-speed queue's header packet queuing latency is approaching a safety threshold (e.g., 250 microseconds) that could lead to industrial control failure, or detects a back-pressure bounce signal from an external network physical layer chip, the system immediately skips the regular polling cycle mechanism. The low-level probe will trigger a non-maskable local hardware congestion interrupt (NMI) via a dedicated interrupt pin. This interrupt will forcibly suspend the normal computing tasks on the current CPU core and instantly wake up the dynamic shaping unit that is in a dormant or background computing state, allowing it to intervene with the highest system priority, thereby preventing congestion from spreading from the physical layer to the application layer.

[0046] S4. Based on the monitoring results and the fluctuation of the Region of Interest (ROI), fine-tune the opening and closing times of the local gating queue to generate a gating control list. The implementation method is as follows: Based on the Region of Interest (ROI), predict the amount of feature dequeue bandwidth compensation required by the high-speed control queue in real time when the original payload physically arrives in the next cycle. ; Based on feature-based outbound bandwidth compensation Recalculate the dynamic door opening time of the high-priority fast queue; Based on the dynamic door opening time and using the monitoring results as a reference variable for dynamically fine-tuning the door control bandwidth, an updated door control list (GCL) is dynamically generated.

[0047] In this embodiment, the input data includes: ROI-scale time-series data from the preceding period in S1, and queue idle / congestion status feedback provided by S3. The output data includes: new IEEE 802.1Qbv gated control list (GCL) parameters, which are then passed to the underlying hardware registers in S6 for updating.

[0048] Implementation: Using a first-order autoregressive moving average (ARMA) model or an exponential smoothing filter algorithm incorporating a momentum term, the actual physical dequeue bandwidth compensation amount required by the rapid control queue is predicted based on historical sequences when the original load arrives in the next cycle. Without compromising the absolute stability of the TSN global scheduling cycle, the system dynamically reduces the effective opening time of the gated best-effort background queue based on a highly sophisticated "bandwidth borrowing within the same cycle" mechanism, and recalculates the dynamic gate opening time of the high-priority high-speed queue. Based on the above calculation results, the system dynamically generates an updated gate control list (GCL).

[0049] In this embodiment, the dynamic shaping and gated bandwidth allocation steps based on feature bursts aim to address the core pain point of the rigid design of traditional TSN networks: the physical contradiction of large amounts of idle bandwidth or instantaneous queuing overflow caused by the IEEE 802.1Qbv Static Time-Aware Shaper (TAS) when facing non-periodic, highly bursty traffic like industrial vision. Because the physical size, location, and complexity of defects in similar product frames running continuously on industrial production lines typically do not change abruptly, but rather exhibit strong Markov time autocorrelation, the system scheduler will not indiscriminately wait for data to accumulate before reacting, unlike traditional routers. Instead, the system maintains a sliding time window, extracting the historical time series of the total amount of key feature data parsed from the edge computing power of previous cycles. The system uses a first-order autoregressive moving average model (ARMA) or an exponential smoothing filter algorithm incorporating a momentum term to proactively predict, in the time domain, the total physical dequeue bandwidth throughput actually required by the rapid control queue when the original load arrives in the next cycle.

[0050] When the mathematical prediction algorithm astutely detects that the next frame may be exceptionally complex, or that a sudden, uncontrollable surge in high-value ROI data is imminent, the pre-statically allocated door opening time window for the high-speed queue will be insufficient to clear the data within a single scheduling cycle. Therefore, without compromising the absolute stability of the TSN global scheduling cycle, the system implements a highly sophisticated bandwidth borrowing mechanism within the DS-TT system. The system dynamically reconstructs the gating control list for the next time cycle, dynamically reducing the effective gating time of the best-effort background queue by issuing new time slot configurations to the underlying hardware, and seamlessly borrowing the freed-up microsecond-level time slots for the high-speed queue. Let the prediction model determine that the high-speed queue needs to increase its door opening time compensation by... Dynamically updated express queue opening time The calculation follows extremely strict mathematical constraints:

[0051] in, This indicates the effective door-opening time window dynamically allocated to the highest priority fast queue within the current scheduling period. This indicates the system's preset minimum bandwidth opening time reserved for the highest priority high-speed queue. This indicates the pre-allocated bandwidth for the lowest priority queue. This indicates the minimum safe operating limit.

[0052] parameter This parameter reflects the actual available bandwidth weight of the highest priority queue (usually queue 7) within the current scheduling cycle; it directly determines the preemption capability of critical visual data (such as high-value ROI streams) in the physical link. Within the system's preset baseline bandwidth, this parameter serves as a safety net, ensuring that even under extreme transmission loads with full network congestion, core tasks have at least this threshold of transmission resources, preventing the interruption of real-time control information. Parameter This parameter reflects the instantaneous idle redundancy of current network traffic. It acts as a regulating valve, limiting the upper limit of a single compensation increment and preventing network jitter caused by excessive bandwidth borrowing. This is the pre-allocated bandwidth for the lowest priority queue (usually queue 0, i.e., normal background traffic), defining the total amount of resource pool that can be "levied". Parameters It is the minimum safe operating limit that must be maintained. By setting a bottom line value, it is ensured that even when bandwidth is borrowed, basic non-real-time services (such as management messages and ordinary logs) can still maintain basic connectivity and will not be paralyzed. The trade-off logic between demand-based allocation and safety avoidance, in terms of compensation amount Seeking and remaining available resources - The minimum value is taken between these two values ​​to ensure that the bandwidth compensation behavior maximizes the performance enhancement of core high-value flows without compromising the overall stability of the system.

[0053] This compensation calculation ensures that the additional microsecond-level transmission time required can be reduced from the original door opening time of the background queue. A smooth transition is implemented. Simultaneously, this transition process is subject to system-level security baselines. Strict constraints are in place to prevent the excessive extraction of underlying bandwidth from disrupting other fundamental network maintenance protocols (such as ARP or clock synchronization messages) due to prolonged starvation in low-priority queues, thereby causing system-wide network paralysis. This prediction-based dynamic gating mechanism ensures, from a physical transmission perspective, that high-value ROI messages are sent all at once, preventing fatal secondary congestion queuing within the local gateway.

[0054] S5. When extreme congestion occurs, reconstruct the local gated queue and output the reconstructed sending queue. The implementation method is as follows: In response to an over-limit alarm reported by S3 indicating that the overall physical cache utilization rate exceeds a preset saturation threshold, the global cache area is locked through atomic operations; Extract the initial semantic value of each message marked in S2, and combine it with the queuing time of the messages in the system fed back by S3 (determined by the real-time reported queue status) to perform high-speed traversal of massive congested messages, and dynamically calculate the first... j The current effective retention value of each characteristic data packet; Based on the current effective retention value, the packets in the cache pool are sorted in ascending order, and the packet with the lowest current effective retention value is dequeued, and the reconstructed sending queue is output.

[0055] In this embodiment, the input data includes: underlying local buffer data encountering non-steady physical layer link congestion, and the initial semantic value of the packets marked in stage S2 and the timeliness feedback in stage S3. The output data is the reconstructed sending queue after removing inefficient and outdated packets, prioritizing the forwarding resources of high-timeliness core ROI data.

[0056] Operational Implementation: When S3 reports that the overall physical buffer occupancy rate exceeds a saturation threshold (e.g., 85%), the system employs a lock-free programming mechanism (e.g., RCU) or lightweight spinlock atomic operations to lock the global buffer area, forcibly suspending subsequent Ethernet link packet enqueue operations. It leverages parallel computing instruction sets such as SIMD to perform high-speed traversal of massive congested packets and utilizes a value assessment model incorporating a time decay penalty factor to dynamically calculate the... Current effective retention value of each feature data packet Based on current effective retention value The calculation results are sorted in ascending order of the packets in the cache pool. The memory management unit (MMU) instructions are invoked to perform selective discarding operations starting from the packet with the lowest current effective retention value (such as a low-value background or a severely timed-out packet) until the queue cache level is restored to below the safe threshold.

[0057] In this embodiment, the semantic-driven feature-based time-sensitive defense and queue reconstruction steps are the final-state protection and self-healing mechanism when DS-TT local memory encounters non-steady physical layer congestion triggered by physical layer link failures (such as unexpected uplink fiber interruption, interface rate degradation, or a sharp drop in physical transmission rate caused by strong electromagnetic interference). This mechanism abandons the coarse-grained strategies used by traditional network interface cards (NICs) such as Weighted Random Early Detection (WRED) and Tail-drop, which rely solely on queue length decisions and lack data content awareness. When the overall physical occupancy rate of the underlying cache exceeds a preset saturation threshold (such as 85% of the total cache pool capacity), the system kernel will immediately report an emergency alarm of memory resource exhaustion to the upper layer.

[0058] To ensure data structure consistency, the system employs lock-free programming mechanisms (such as Read-Copy-Update) or lightweight spinlocks. It locks the global local cache area through atomic operations and triggers a physical layer circuit breaker, forcibly suspending all subsequent Ethernet link packet enqueue operations. This creates a static and consistent scanning environment for subsequent fine-grained cache cleanup. After achieving exclusive control over the physical cache area, this defense mechanism fully demonstrates the deep manipulation and semantic-level dominance of the underlying network queue by the heterogeneous computing power on the edge side. The edge computing unit not only evaluates the feature weights of the original packet payload and performs targeted cleanup based on timeliness requirements, but also comprehensively considers the absolute residence time of packets in the queue, adhering to strict real-time constraints. The system leverages parallel computing instruction sets such as SIMD to perform high-speed traversal of massive congested packets in the cache. By introducing a value evaluation model with a time penalty factor, it calculates the current effective retention value of each packet. This provides a quantitative basis for subsequent selective cleanup.

[0059] set up The first element being traversed in the queue Each characteristic data packet, its current effective remaining value The exponential decay penalty formula is defined as follows:

[0060] in, Indicates the first A feature visual data package The effective surplus value at the current moment. Represents visual data packets The initial semantic value is generated at the moment of its creation. Indicates the value decay coefficient. This represents the system's current real-time absolute timestamp; Indicates the first A feature visual data package The initial enqueue timestamp of the physical queue. Represented by natural constant An exponential decay function with base is used to construct an automated filtering mechanism that decreases with dwell time.

[0061] parameter This is used to guide the system on whether to continue occupying cache space or to implement a proactive discarding policy after a severe timeout. The initial semantic value of the data packet at the moment of its generation (i.e., the original weight calculated by the algorithm) serves as a benchmark, determining the highest priority of the data packet at the beginning of its lifecycle. Reflecting the system's current real-time time, this parameter is provided by a high-precision synchronization protocol (such as gPTP) and serves as a globally unified calculation benchmark, ensuring consistency in value assessment across devices. It is the absolute lifespan of a data packet in the system. As the dwell time increases, the timeliness of the data packet continues to decline, and its reference significance for control decisions also weakens. This represents the preset value decay coefficient, which serves to adjust the sensitivity. The larger the value, the more sensitive the business is to latency; data that is even slightly outdated becomes worthless, indicating a higher value decay coefficient. A smaller value indicates that the service has a certain tolerance for latency. `exp(...)` is used to characterize the physical characteristic that the value of data packets decays exponentially over time, and it serves as the system's automated filtering logic. This exponential term simulates the natural growth process of "information entropy" in real-time industrial systems, enabling dynamic scheduling and adaptation between stale data and newly added real-time data. This allows stale data to automatically give way to newly generated real-time data in bandwidth contention, thus effectively solving the technical problem of low-timeliness data backlog in industrial communication scenarios at the hardware level.

[0062] The key semantic value of defects contained in a message at the time of its generation The value is high, but if it waits in the local queue for too long, causing its real-time performance to fail to meet the control dead zone requirements of downstream industrial robots (e.g., 100 milliseconds have passed), its final value to the entire industrial closed loop will decrease with the value decay coefficient over time. The cache value rapidly decays exponentially to zero. Subsequently, the system rapidly sorts all pending packets in the cache pool in ascending order of their final value and directly invokes a forced release instruction at the Memory Management Unit (MMU). Starting with packets with the lowest absolute final value (often meaningless plain black backgrounds or severely expired, high-value packets), the system relentlessly executes targeted destruction and dequeue operations, much like a sophisticated garbage collector, until the total cache occupancy safely falls below the threshold. This extremely brutal yet highly rational semantic discarding mechanism fiercely protects the survival of the freshest and most controllable ROI data remaining at the core of the queue.

[0063] S6. Based on the gated control list and the reconstructed transmission queue, deterministic hardware-level shaping transmission and preemption processing of the feature stream are performed. The implementation method is as follows: Based on the current Ethernet communication micro-cycle critical time window, the updated dynamic gating control list is written in batches into the control register of the TSN switching chip through the system high-speed bus, triggering the synchronous update of the working register; After the gating control list is updated, the scheduling engine implements deterministic dequeue scheduling for multi-priority queues based on the updated scheduling schedule. For sudden preemption scenarios, based on the reconstructed transmission queue, when the high-speed traffic gating time window is open and valid data is cached, if the low-priority queue is transmitting a giant frame, the underlying MAC layer activates the IEEE 802.1Qbu hardware-level frame preemption mechanism. Based on the preemption result, when the start delimiter of the data frame arrives at the physical layer reference plane, the hardware engine collects the hardware-level transmission timestamp and writes it back to the transmission descriptor, completing the shaping transmission and preemption processing.

[0064] In this embodiment, the input data includes: the dynamic GCL timetable generated in S4 and the core payload data reconstructed in S5. The output data includes: the Ethernet serial bitstream after physical medium conversion and the end-to-end high-precision exit timestamp used for feedback calculation in S7.

[0065] Operational Procedure: Within the critical time window of the current Ethernet communication micro-cycle, the updated dynamic GCL is written in batches to the control register of the TSN switching chip via the system high-speed bus, triggering synchronous updates of the working register and completing the deterministic switching of the scheduling state machine. For sudden preemption scenarios, when the high-speed traffic gating time window is open and valid data is buffered, if a low-priority queue is transmitting a jumbo frame, the underlying MAC layer will activate the IEEE 802.1Qbu hardware-level frame preemption mechanism. Low-priority frame fragmentation is performed, and a preemption start delimiter (SMD-I) is inserted, prioritizing the scheduling of high-speed characteristic flows. After the high-speed flow transmission is completed, a recovery delimiter (SMD-C) is inserted to continue transmitting low-priority fragments, effectively eliminating the head-of-line blocking effect. When the data frame start delimiter (SFD) reaches the physical layer (PHY) reference plane, the PTP hardware engine collects the hardware-level transmission timestamp and writes it back to the transmission descriptor.

[0066] In this embodiment, the deterministic hardware-level shaping and preemption stage of the feature flow is the final hardware execution unit for the Time-Sensitive Networking (TSN) scheduling algorithm game model and system-level software scheduling strategy. Its core function is to map the reconstructed feature flow to physical layer level transitions on Ethernet twisted-pair or fiber optic transmission media without bias and with deterministic determination, based on the global traffic scheduling and gating decisions of the operating system kernel. Within the critical time window of hundreds of nanoseconds before the end of the current Ethernet communication microcycle, the underlying hardware driver module adapted to the TSN switching chip, through the high-speed system interconnect bus, forcibly refreshes the updated traffic shaping gate control list (GCL) dynamically generated and validated in S4 to the management and control hardware register group of the TSN switching chip using a batch register direct write mode. The driver then immediately triggers the hardware synchronization update instruction from the shadow register to the working register, ensuring that the hardware achieves seamless, jitter-free switching of the gate state machine at the absolute start of the next cycle of the nanosecond-precision clock, avoiding physical layer abnormal packet loss and timing violations caused by asynchronous state machine switching.

[0067] After the Gate Control List (GCL) configuration is updated, the MAC layer scheduling engine of the TSN switching chip / NIC strictly implements deterministic dequeue scheduling of multi-priority queues based on the updated scheduling schedule. The physical layer (PHY) chip synchronously completes the level signal mapping conversion from the serial bit stream to the Ethernet twisted-pair or fiber optic transmission medium. In highly dynamic and interference-prone industrial field network environments, typical deterministic scheduling conflict scenarios are as follows: When a low-priority preemptible queue is transmitting non-real-time large-load frames or jumbo frames with a length reaching the Ethernet standard MTU (1500 bytes), the gate window of the high-priority express traffic queue opens on time according to the preset scheduling plan, and the queue has already buffered high-value characteristic service data, underlying clock synchronization messages, and other urgent frames waiting to be transmitted. In the traditional Ethernet store-and-forward architecture, waiting for the current non-real-time frame to complete its full transmission will introduce transmission blocking latency of up to hundreds of microseconds, which cannot meet the core performance requirements of microsecond-level deterministic latency and low jitter in TSN networks. In this scenario, the TSN hardware scheduling engine automatically assesses the remaining transmission time of the current frame and triggers a hardware-level frame preemption mechanism based on the IEEE 802.1Qbu and IEEE 802.3br specifications. The MAC layer and physical layer work together to fragment the low-priority preemptable packet being transmitted, inserting a standard-defined start-of-preemption delimiter (SMD-I) at the truncation point to mark the fragmentation boundary. Subsequently, the high-priority express packet is transmitted completely. After the express packet transmission is completed, the hardware strictly adheres to the minimum inter-frame spacing (IFG) requirement specified by IEEE 802.3, inserting a start-of-recovery-frame delimiter (SMD-C) to resume the transmission of the remaining fragments of the truncated preemptable frame. This hardware-level frame preemption mechanism fundamentally solves the Head-of-Line Blocking (HoL) problem caused by non-real-time high-payload frame transmission, compressing the latency interference of non-real-time traffic on deterministic high-speed traffic to the sub-microsecond level, thus ensuring the end-to-end deterministic transmission capability of the TSN network. Finally, at the moment the Start Frame Delimiter (SFD) of a data frame leaves the physical layer (PHY) reference point, the Precision Time Protocol (PTP) engine, conforming to the IEEE 1588 standard, will automatically trigger, accurately capturing the frame's exit hardware timestamp and automatically filling the timestamp value back into the network card's transmit completion descriptor, serving as the timing verification and closed-loop control benchmark for end-to-end deterministic scheduling.

[0068] S7. Based on the processing results of S6, perform end-to-end latency assessment and reverse adjust the threshold of feature confidence in S1 to complete edge node traffic reconstruction and deterministic scheduling control.

[0069] In this embodiment, the input data includes: the high-precision hardware exit timestamp backfilled in S6, and the statistical data (total number of bytes and frequency) of background packets targeted for discarding in the S5 stage. The output data includes: dynamically corrected inference model threshold parameters, forming a system-level adaptive closed loop of "lower-level network state controlling the upper-level AI source flow rate".

[0070] Operational Implementation: The feedback control module calculates the actual dwell time of core data packets within the gateway node by combining enqueue and dequeue timestamps, and applies a weighted moving average filtering algorithm for statistical smoothing. It then generates a node health status report based on packet loss frequency and latency statistics. If, after exhausting dynamic bandwidth allocation (S4) and proactive cache cleanup (S5) mechanisms, the queuing latency of high-priority queues continues to deteriorate, the current physical egress bandwidth is deemed to be facing irreversible overload. The system control plane, through a cross-layer communication mechanism, invokes a Remote Procedure Call (RPC) interface to issue instructions to the AI ​​perception computing module (S1) to dynamically increase the confidence threshold for image feature clustering extraction. By filtering secondary edge features and focusing on extracting high-confidence core areas, the network access throughput is proactively reduced from the data generation source.

[0071] In this embodiment, in the feature-aware self-evolutionary closed-loop feedback step of computing power and scheduling, the system is not a one-way open-loop processing pipeline that terminates intervention after simply completing data forwarding. Instead, it constructs a reverse closed-loop control logic through rigorous review and in-depth analysis of the execution results of the local queue, achieving deep coupling between the feature generation source and the physical transmission state. This dynamically corrects the feature extraction parameters of the top-level computing power, thereby endowing the DS-TT edge gateway with excellent environmental adaptability and network self-evolutionary characteristics. During this stage, the feedback control module continuously collects the accurate egress timestamps reported by the underlying hardware engine in S6. Through precise calculation, it obtains the actual end-to-end dwell time experienced by the core feature flow packets within the edge gateway. This delay encompasses both the packet computation and processing delay and the queue queuing delay, providing a quantitative basis for subsequent parameter correction. To suppress the interference of occasional spike data on the accuracy of delay statistics, the system uses a weighted moving average filtering algorithm to smooth the original delay data, ensuring the stability and reliability of the delay statistics results.

[0072] Meanwhile, the system comprehensively counts the total number of background packet bytes generated during this communication cycle due to the semantic active discarding strategy triggered by the worst-case congestion scenario defined by S5, as well as the frequency of discarding events. Based on the above statistical data, a local network health status monitoring report is generated, which can provide important reference for subsequent system parameter optimization and congestion prediction. If the analysis results of the feedback control module show that even if the underlying TSN queue has exhausted all scheduling methods, activated the maximum gating bandwidth borrowing mechanism within the same cycle, and implemented the most stringent low-priority packet targeted discarding strategy, the average queuing delay of core ROI packets still shows an irreversible deterioration trend, then from the perspective of physical transmission laws, it can be uniquely determined that the ROI area extracted by the current computing power module is still too large, and the data throughput it generates has exceeded the absolute carrying threshold of the underlying physical bandwidth of the local area network.

[0073] To address the extreme physical bandwidth challenges that cannot be resolved through network layer scheduling, the system control plane will decisively bypass architectural layers, directly penetrate the network protocol stack, and invoke the pre-exposed edge computing power configuration application programming interface (API) in S2. The system uses Remote Procedure Call (RPC) commands within the Controller Area Network (CAN) to forcibly and dynamically increase the image feature clustering threshold. This top-down feedback control action enables the edge NPU computing power to employ a more stringent feature selection strategy when processing the next frame of the original image input. The algorithm will automatically filter edge regions with confidence levels in the critical range, extracting only extremely high-confidence, minimal central regions representing core critical defects, and strategically discarding the extraction and transmission of secondary contour edges and blurred features. Through this source-level control method, the system directly and significantly reduces the total data traffic entering the local network queue from the source of edge computing power data generation, quickly alleviating congestion pressure on the underlying physical queue. This mechanism ultimately constructs a complete software and hardware collaborative self-evolving closed loop that guides and regulates the accuracy of AI computing power and the breadth of feature extraction from the underlying hardware physical congestion state, ensuring the absolute reliability of core industrial control services under worst-case network transmission conditions.

[0074] In summary, the present invention has the following beneficial effects: (1) A method for constructing a continuous feature semantic value matrix based on edge computing power: This invention breaks through the limitations of traditional static hard segmentation of payloads. The protection point is to use edge heterogeneous computing power (such as NPU) to output the target confidence and construct a two-dimensional continuous "semantic value field". The core protection point is: through the multi-Gaussian superposition attenuation algorithm to calculate the dimensionality reduction process of the absolute semantic value of each payload unit, the discrete AI inference is transformed into a fine-grained weight view that can be calculated by the underlying network queue scheduling, providing a mathematical basis and data foundation for subsequent traffic shaping.

[0075] (2) Heterogeneous reassembly and tag rewriting mechanism across application layer and link layer: The key point is to break the linear packet logic of the operating system standard, protect the coverage, and separately strip high-value key feature payloads based on value thresholds, and embed the original spatial offset coordinates in the data payload to support accurate remote restoration. At the same time, it focuses on protecting the bypass of the standard network QoS static mapping table, and directly rewrites the IEEE 802.1Q VLAN PCP priority tag of the Ethernet MAC frame header across layers based on the average semantic value of the payload, so as to realize the ultra-fast low-level mapping of pure key feature burst flows.

[0076] (3) Dynamic shaping mechanism for burst traffic with complex characteristics: This invention solves the problems of link bandwidth waste and packet loss caused by static gating configuration of TSN. The protection point is: based on the autoregressive model, the historical throughput of characteristic traffic is predicted in time series, and the IEEE 802.1Qbv standard gating control list (GCL) is dynamically reconstructed. The core protection point is: without breaking the global baseline scheduling period constraint of TSN, the effective opening time of the gating of the low priority background queue is dynamically compressed, and the released microsecond-level time slots are seamlessly reallocated to the high priority high-speed control queue, forming an adaptive bandwidth allocation mechanism to ensure lossless deterministic transmission of burst critical characteristic packets.

[0077] (4) Time-decay-based targeted semantic dropping and end-side self-evolutionary congestion defense mechanism: This mechanism abandons the indiscriminate tail drop strategy in traditional networks. The protection points include: when the queue buffer reaches the limit saturation level, the final retention value of the packet is calculated by using an exponential decay penalty formula that integrates "packet queuing time" and "initial semantic value", and then low-value and time-out packets are targeted for dropping. The core protection point is: the underlying real physical dequeue latency is fed back to the computing power layer as the core KPI. Once the queue congestion state deteriorates, the AI ​​clustering threshold is dynamically increased (reducing the output of high-quality features), and a cross-layer self-evolutionary control closed loop that reduces the total traffic from the source is constructed.

[0078] Example 2 like Figure 2 As shown, the present invention provides an edge node traffic reconstruction and deterministic scheduling control device for executing any of the edge node traffic reconstruction and deterministic scheduling control methods described in Embodiment 1, comprising: The first processing module is used to extract key defect areas from the naked video stream and generate a continuous pixel-level semantic value field when a large video frame arrives at the local network port. The second processing module is used to extract and reassemble high-value Region of Interest (ROI) pixels into independent ROI stream data packets based on the generated pixel-level value field and the original payload frame data of the system kernel state residing in the edge nodes, and to mark the high-value ROI stream data packets with the highest priority. The third processing module is used to input heterogeneous data streams with service priority labels into the underlying physical queue based on the labeling results, and to use hardware probes to perform high-frequency monitoring and report queue status and overall physical cache occupancy over-limit alarms in real time. The fourth processing module is used to fine-tune the opening and closing times of the local gating queue based on the monitoring results and the fluctuation of the region of interest (ROI), and to generate a gating control list. The fifth processing module is used to reconstruct the local gated queue and output the reconstructed sending queue when there is extreme congestion. The sixth processing module is used to perform deterministic hardware-level shaping and preemption processing of feature streams based on the gating control list and the reconstructed sending queue. The seventh processing module is used to perform end-to-end latency assessment based on the processing results of the sixth processing module, and to reversely adjust the threshold of feature confidence in the first processing module to complete edge node traffic reconstruction and deterministic scheduling control.

[0079] In this embodiment, the present invention achieves local closed-loop operation on the DS-TT device, and its core execution logic is composed of multiple decoupled hardware and software underlying units working seamlessly together. The system first relies on the edge-side feature semantic perception unit (first processing module) to extract key defects or contour regions from the raw video stream, generating a continuous pixel-level semantic value field. Subsequently, the cross-layer feature stream reconstruction and mapping unit (second processing module) breaks the traditional linear packetization, stripping and recombining high-value pixels into independent Region of Interest (ROI) stream data packets, and forcibly mapping them to the underlying core queue. At the underlying layer, the local physical queue monitoring unit (third processing module) acts as a hardware probe, frequently polling the queue backlog and delay status, which is then handled by the dynamic shaping unit (fourth processing module) to fine-tune the opening and closing times of the local gated queue based on ROI fluctuations. When facing extreme congestion, the computing power-driven local queue reconstruction unit (fifth processing module) takes over the buffer to execute the time-decay discard algorithm. Finally, the feature stream deterministic hardware execution unit (sixth processing module) transforms all strategies into atomic write operations to the underlying MAC register, strictly triggering physical transmission according to the clock.

[0080] In the overall workflow, when the industrial video stream physically arrives at the DS-TT Ethernet interface, the gateway kernel first intercepts the data stream using zero-copy technology and sends it directly to the end-side processing pipeline. Instead of performing traditional full-frame compression encoding, the computing unit performs millisecond-level lightweight object detection or contour extraction inference. Through this process, the originally flat, semantically meaningless pixel matrix is ​​endowed with a semantic value weight field with clear spatial coordinates. Core areas containing product defects and key alignment marks are designated as high-value ROIs, while large areas of the conveyor belt background are designated as low-value or even zero-value areas.

[0081] After value identification, the system bridges the gap between the application layer and the MAC layer. The packet unit abandons the common logic of packing according to linear memory addresses, instead "extracting" and aggregating high-value ROI pixels, and tagging them with the highest priority VLAN PCP label in the Ethernet frame header; while the vast amount of low-value background pixels are tagged with a best-effort label. The difficult-to-control massive video stream is precisely surgically dissected and transformed into a highly compatible heterogeneous stream for the local underlying TSN switching matrix.

[0082] Once the local queue scheduling phase begins, the system does not statically and rigidly execute priority queuing. The dynamic shaping unit uses autoregression to predict the actual physical bandwidth needed by the next moment's control queue based on the ROI scale extracted from the computing power of the previous few frames. If the payload content is complex and causes a sudden surge in characteristic traffic, the gateway will fine-tune the IEEE 802.1Qbv gating control list at the underlying level, utilizing slots from the background queue opening time to ensure that ROI packets do not overflow. At the same time, the underlying hardware frame preemption mechanism based on IEEE 802.1Qbu is activated. When the gateway egress is sending a giant background image data packet of up to 1500 bytes, if an urgent ROI packet or an underlying hardware synchronization signal arrives, the underlying physical layer will immediately interrupt the giant background frame to prioritize the transmission of the emergency control flow, eliminating local linehead congestion.

[0083] To address extreme network transmission scenarios with continuously deteriorating link quality, the system constructs a highly robust congestion prevention mechanism and an edge-side self-evolving closed loop. When local cache resources are nearing exhaustion, the computing power-driven local queue reconstruction unit does not employ a simple tail-end packet drop strategy, but instead initiates a semantic discard algorithm based on dual decay of feature value and queuing time. The system prioritizes clearing pure black background packets with no valid information from the cache, as well as expired packets that have exceeded the control cycle due to overdue retention, prioritizing the reliable transmission and priority scheduling of core ROI data. Simultaneously, the underlying hardware feeds back the actual physical dequeue delay to the computing power layer in real time; if the underlying queue congestion is detected to worsen, the computing power layer will adaptively increase the AI ​​feature clustering threshold, proactively reducing the ROI extraction range in subsequent frames. This cross-layer collaborative closed loop, where underlying physical congestion reverses the adjustment of upper-layer computing power accuracy, enables the edge gateway to still guarantee microsecond-level deterministic transmission of core defect features even in scenarios with extremely limited end-side LAN bandwidth, maximizing the value of visual control under deterministic bandwidth constraints.

[0084] In this embodiment, the edge-side feature semantic perception unit (also known as the edge-side computing power perception unit) completes the extraction from the original payload stream to the key feature distribution and generates a semantic value field. For example, it extracts the key defect / contour ROI region from the raw video stream and generates a pixel-level value field.

[0085] Feature Stream Reconstruction and Mapping Unit (also known as ROI Stream Reshaping and Cross-Layer Mapping Unit): This unit strips and reassembles high-value payloads into independent feature stream data packets and maps them to the underlying priority queue. For example, it breaks the traditional linear packet structure, stripping and reassembling high-value pixels into independent "ROI stream" data packets and forcibly mapping them to the underlying L2 priority core queue.

[0086] Physical queue status awareness probe (also known as local physical queue monitoring unit): As a hardware probe, it frequently polls the backlog depth and local dequeue latency of each priority queue in the underlying switching chip.

[0087] Feature-driven dynamic shaping unit (also known as dynamic shaping unit for ROI bursts): Combines feature fluctuations with hardware feedback to dynamically generate and fine-tune the opening and closing times of gating queues. For example, by combining the ROI fluctuations given by the computing layer with the congestion level fed back by the hardware layer, the opening and closing times of local 802.1Qbv gating queues can be dynamically generated and fine-tuned to achieve traffic shaping.

[0088] Semantic-driven feature time-sensitive defense unit (also known as computing power-driven local queue reconstruction unit): When local memory faces extreme congestion, it executes a time-decaying discard algorithm based on semantic value.

[0089] Feature Flow Deterministic Hardware Execution Unit (also known as Local TSN Gated Hardware Execution Unit): Transforms the strategy into atomic write operations to the underlying MAC register, and strictly triggers physical transmission according to the clock.

[0090] The technical solution of this invention has an extremely high probability of being implemented, possessing a highly complete modern industrial edge gateway hardware foundation and mature underlying software communication ecosystem support. Currently, heterogeneous SoC architectures are widely used in industrial edge computing gateways, providing ample physical computing power for edge AI sensing and real-time control. Simultaneously, underlying Ethernet switching chips supporting the TSN core standard are in mass production, directly providing hardware register-level physical interfaces for dynamic gating and microsecond-level preemption. The excellence of this solution lies in its ability to complete the entire link scheduling closed loop through the underlying hardware and software collaboration within the gateway device, without requiring any modification to the extremely expensive and closed external 5G communication base stations or core network signaling. Its engineering implementation difficulty is extremely low, possessing enormous commercial transformation value and large-scale industrial deployment potential. Its feasibility is mainly reflected in the following aspects: AI computing power infrastructure is highly mature: mainstream industrial edge gateways are generally equipped with heterogeneous NPU or FPGA acceleration modules, which can easily support lightweight visual inference models and output feature coordinates and confidence in milliseconds, thus eliminating hardware obstacles to computing power.

[0091] TSN physical switching chips are now in full production: mainstream underlying TSN chips natively support the 802.1Qbv and 802.1Qbu standards. Their high-speed physical bus interface allows for nanosecond-level reading of queuing status and dynamic rewriting of the underlying gating table, meeting hardware execution requirements.

[0092] A complete cross-layer network programming software ecosystem: With the help of the mature DPDK data plane suite and high-speed PCIe DMA passthrough technology, the system can achieve zero-copy capture, heterogeneous packet reassembly, and forced tampering of VLAN priorities with extremely low CPU overhead.

[0093] The advantage of zero-modification and low cost of external network: All semantic awareness and dynamic queue scheduling operations are strictly restricted to a closed loop within the local area network of the DS-TT gateway, avoiding the need to modify the operator's 5G basic network equipment and greatly reducing the resistance to implementation in industrial sites.

[0094] like Figure 2 The edge node traffic reconstruction and deterministic scheduling control device provided in the embodiment shown can execute the technical solution shown in the edge node traffic reconstruction and deterministic scheduling control method in the above method embodiment. Its implementation principle and beneficial effects are similar, and will not be repeated here.

[0095] In this embodiment, the functional units can be divided according to the edge node traffic reconstruction and deterministic scheduling control method. For example, each function can be divided into a separate functional unit, or two or more functions can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this invention is illustrative and only represents a logical division; other division methods may be used in actual implementation.

[0096] In this embodiment, the edge node traffic reconstruction and deterministic scheduling control device, in order to achieve the principles and beneficial effects of Embodiment 1, includes hardware structures and / or software modules corresponding to the execution of various functions. Those skilled in the art should readily recognize that, in conjunction with the illustrative units and algorithm steps described in the embodiments disclosed herein, this invention can be implemented in hardware and / or a combination of hardware and computer software. Whether a function is executed by hardware or computer software depends on the specific application and design constraints of the technical solution. Different methods can be used to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

Claims

1. A method for edge node traffic reconstruction and deterministic scheduling control, characterized in that, Includes the following steps: S1. When a large video frame arrives at the local network port, extract the key defect area from the naked video stream and generate a continuous pixel-level semantic value field. S2. Based on the generated pixel-level value field and the original payload frame data of the system kernel state residing in the edge node, the high-value region of interest (ROI) pixels are stripped and recombined into independent ROI stream data packets, and the high-value ROI stream data packets are marked with the highest priority. S3. Based on the labeling results, the heterogeneous data stream with service priority labels is input into the underlying physical queue. Hardware probes are used for high-frequency monitoring and real-time reporting of queue status and overall physical cache occupancy over-limit alarms. S4. Based on the monitoring results and the fluctuation of the region of interest (ROI), fine-tune the opening and closing times of the local gating queue and generate a gating control list. S5. When extreme congestion exists, reconstruct the local gating queue and output the reconstructed sending queue. S6. Based on the gating control list and the reconstructed sending queue, perform deterministic hardware-level shaping and preemption processing of feature streams; S7. Based on the processing results of S6, perform end-to-end latency assessment and reverse adjust the threshold of feature confidence in S1 to complete edge node traffic reconstruction and deterministic scheduling control.

2. The edge node traffic reconstruction and deterministic scheduling control method according to claim 1, characterized in that, S1 includes: When a large video frame arrives at the local network port, it is directly connected to the edge neural network processing unit (NPU). Obtain a set of Region of Interest (ROI) bounding boxes containing defect targets and key feature identifiers from the naked video stream, and extract the associated geometric pixel coordinates and feature confidence scores. Based on the extracted geometric pixel coordinates and feature confidence scores, the discrete bounding box is transformed into a continuous pixel-level semantic value field, where the expression for the absolute semantic value of each pixel is as follows: in, This represents the contribution score of each pixel in the image space to the underlying task. This represents the index of the candidate region of interest (ROI) bounding box. This represents the total number of candidate Region of Interest (ROI) bounding boxes obtained. Indicates the first The feature confidence score associated with the bounding box of each Region of Interest (ROI). This represents the x-axis coordinate of the pixel whose semantic value is to be calculated in the two-dimensional coordinate system of the image. Indicates the first The absolute x-axis coordinates of the geometric center of the bounding box of a region of interest (ROI) in the two-dimensional coordinate system of the image. This represents the ordinate of the pixel whose semantic value is to be calculated in the two-dimensional coordinate system of the image. Indicates the first The absolute vertical coordinates of the geometric center of the bounding box of a region of interest (ROI) in the two-dimensional coordinate system of the image. Indicates the first The variance control parameters corresponding to the bounding boxes of each Region of Interest (ROI).

3. The edge node traffic reconstruction and deterministic scheduling control method according to claim 1, characterized in that, S2 includes: Read the continuous pixel-level semantic value field residing in shared memory, as well as the raw payload frame data residing in the system kernel mode; The pixel-level semantic value field is scanned based on a preset bidirectional dynamic threshold, and the scan results are used as a spatial mapping index to match the original payload frame data. Based on the matching results, the corresponding high-value region of interest (ROI) pixel set is located in the physical memory space, and the absolute spatial offset of the ROI pixel block in the original two-dimensional image coordinate system and the original video frame sequence number to which it belongs are obtained. Based on the positioning results, the scatter-aggregate DMA hardware mechanism is invoked to extract and aggregate the discrete high-value Region of Interest (ROI) pixel sets in the physical memory space, and inject the absolute spatial offset and the original video frame sequence number into the custom application layer header to reassemble them into independent ROI stream data packets. The payload average semantic value of the reconstructed Region of Interest (ROI) flow packets is calculated and mapped to the physical memory descriptor of the packets as the initial semantic value. At the same time, the standard Linux flow control mapping table is bypassed directly, and the IEEE 802.1Q VLAN PCP priority label in the Ethernet MAC frame header is forcibly rewritten at the physical memory descriptor level of the ROI flow packets to mark the high-value ROI flow packets with defects with the highest priority.

4. The edge node traffic reconstruction and deterministic scheduling control method according to claim 3, characterized in that, S3 includes: Based on the labeling results, heterogeneous data streams with service priority labels are input into the underlying physical queue; Using hardware probes, the absolute depth of current byte accumulation, header message delay, overall physical buffer occupancy, and real instantaneous throughput of the physical medium at each priority level are periodically read to construct a multi-dimensional perception matrix of micro-queue status. The multi-dimensional perception matrix of the micro-queue state is compared with the preset security threshold, and the overall physical cache occupancy rate is compared with the preset saturation threshold. If the queuing delay of the high-speed queue header message approaches the failure threshold, or if a backpressure signal is detected at the underlying level, or if the overall physical cache occupancy exceeds the preset saturation threshold, the hardware probe will trigger a non-maskable hardware interrupt through the interrupt pin and report an alarm for the overall physical cache occupancy exceeding the limit and a real-time queuing status data matrix to the system kernel.

5. The edge node traffic reconstruction and deterministic scheduling control method according to claim 1, characterized in that, S4 includes: Based on the Region of Interest (ROI), predict the amount of feature dequeue bandwidth compensation required by the high-speed control queue in real time when the original payload physically arrives in the next cycle. ; Based on feature-based outbound bandwidth compensation Recalculate the dynamic door opening time of the high-priority fast queue; Based on the dynamic door opening time and using the monitoring results as a reference variable for dynamically fine-tuning the door control bandwidth, an updated door control list (GCL) is dynamically generated.

6. The edge node traffic reconstruction and deterministic scheduling control method according to claim 5, characterized in that, The expression for the dynamic door opening time is as follows: in, This indicates the effective door-opening time window dynamically allocated to the highest priority fast queue within the current scheduling period. This indicates the system's preset minimum bandwidth opening time reserved for the highest priority high-speed queue. This indicates the pre-allocated bandwidth for the lowest priority queue. This indicates the minimum safe operating limit.

7. The edge node traffic reconstruction and deterministic scheduling control method according to claim 4, characterized in that, S5 includes: In response to an over-limit alarm reported by S3 indicating that the overall physical cache utilization rate exceeds a preset saturation threshold, the global cache area is locked through atomic operations; Extract the initial semantic value of each message marked in S2, and combine it with the queuing time of the messages in the system fed back by S3 to perform high-speed traversal of massive congested messages, and dynamically calculate the first... j The current effective retention value of each feature data packet, where the expression for the current effective retention value is as follows: in, Indicates the first A feature visual data package The effective surplus value at the current moment. Represents visual data packets The initial semantic value is generated at the moment of its creation. Indicates the value decay coefficient. This represents the system's current real-time absolute timestamp. Indicates the first A feature visual data package The initial enqueue timestamp of the physical queue. Represented by natural constant An exponentially decaying function with base 0; Based on the current effective retention value, the packets in the cache pool are sorted in ascending order, and the packet with the lowest current effective retention value is dequeued, and the reconstructed sending queue is output.

8. The edge node traffic reconstruction and deterministic scheduling control method according to claim 1, characterized in that, S6 includes: Based on the current Ethernet communication micro-cycle critical time window, the updated dynamic gating control list is written in batches into the control register of the TSN switching chip through the system high-speed bus, triggering the synchronous update of the working register; After the gating control list is updated, the scheduling engine implements deterministic dequeue scheduling for multi-priority queues based on the updated scheduling schedule. For sudden preemption scenarios, based on the reconstructed transmission queue, when the high-speed traffic gating time window is open and valid data is cached, if the low-priority queue is transmitting a giant frame, the underlying MAC layer activates the IEEE 802.1Qbu hardware-level frame preemption mechanism. Based on the preemption result, when the start delimiter of the data frame arrives at the physical layer reference plane, the hardware engine collects the hardware-level transmission timestamp and writes it back to the transmission descriptor, completing the shaping transmission and preemption processing.

9. An edge node traffic reconstruction and deterministic scheduling control apparatus, used to execute the edge node traffic reconstruction and deterministic scheduling control method according to any one of claims 1-8, characterized in that, include: The first processing module is used to extract key defect areas from the naked video stream and generate a continuous pixel-level semantic value field when a large video frame arrives at the local network port. The second processing module is used to extract and reassemble high-value Region of Interest (ROI) pixels into independent ROI stream data packets based on the generated pixel-level value field and the original payload frame data of the system kernel state residing in the edge nodes, and to mark the high-value ROI stream data packets with the highest priority. The third processing module is used to input heterogeneous data streams with service priority labels into the underlying physical queue based on the labeling results, and to use hardware probes to perform high-frequency monitoring and report queue status and overall physical cache occupancy over-limit alarms in real time. The fourth processing module is used to fine-tune the opening and closing times of the local gating queue based on the monitoring results and the fluctuation of the region of interest (ROI), and to generate a gating control list. The fifth processing module is used to reconstruct the local gated queue and output the reconstructed sending queue when there is extreme congestion. The sixth processing module is used to perform deterministic hardware-level shaping and preemption processing of feature streams based on the gating control list and the reconstructed sending queue. The seventh processing module is used to perform end-to-end latency assessment based on the processing results of the sixth processing module, and to reversely adjust the threshold of feature confidence in the first processing module to complete edge node traffic reconstruction and deterministic scheduling control.

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