Methods and apparatus for determining arrays

Abstract

This invention provides a method and apparatus for determining an array. One method for determining an array includes: determining, via a processor of a device, a plurality of cores of an array associated with resource allocation, wherein the array is configured such that: the half-power beamwidth of a point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the peak sidelobe level (PSL) of the PSF associated with the array is below a first threshold; and transmitting or receiving a plurality of signals via the processor based on the resource allocation associated with the array. By utilizing this invention, array determination can be improved.

Description

Technical Field

[0001] This invention generally relates to communication-aware integration (ISAC) systems, and more specifically to determining arrays associated with resource allocation within an ISAC system. Background Technology

[0002] Unless otherwise stated, the methods described in this section are not considered prior art in the claims, nor are they considered prior art by virtue of their inclusion in this section.

[0003] In new radio (NR) mobile communications, in some network environments associated with radar engineering, the detection of surrounding objects can often be achieved by measuring signal delay and Doppler shift. Radio signals, transmitted in the frequency, time, and / or spatial domains for communication purposes, exhibit radio characteristics similar to those used in sensing applications. These characteristics can be reused to achieve dual communication and sensing functions. The design and implementation of multidimensional, large-scale sparse arrays may represent a key research area in the field of communication-sensing integration, as such arrays provide a foundation for optimizing performance, reducing resource overhead, and addressing the challenges associated with simultaneous sensing and communication requirements. However, the design of these large-scale arrays can be so complex that computational complexity can increase significantly.

[0004] Accordingly, developing an array design scheme that minimizes computational complexity has become a key consideration in the development of modern wireless communication networks. Therefore, there is an urgent need for effective solutions to achieve a simpler and more efficient array design process. Summary of the Invention

[0005] The following overview is illustrative only and is not intended to be limiting in any way. That is, it is provided to introduce the concept, key points, benefits, and advantages of the novel and non-obvious techniques described in this invention. Selected implementations are further described in the detailed description below. Therefore, the following overview is not intended to identify essential features of the claimed subject matter, nor is it intended to define the scope of the claimed subject matter.

[0006] One objective of this invention is to propose a solution or approach to address the problem of determining resource allocation arrays associated with devices in an ISAC system.

[0007] This invention provides a method for determining an array, comprising: determining, by means of a processor of a device, a plurality of cores of an array associated with resource allocation, wherein the array is configured such that: the half-power beamwidth of a point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the peak sidelobe level (PSL) of the PSF associated with the array is below a first threshold; and transmitting or receiving a plurality of signals by means of the processor based on the resource allocation associated with the array.

[0008] This invention provides a method for determining an array, comprising: determining, by a processor of a device, a plurality of cores of an array associated with resource allocation, wherein the plurality of cores includes a first core and a second core, and the array is configured such that: the half-power beamwidth of a point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; the number of non-zero elements of the first core is associated with a first value, and the number of non-zero elements of the second core is associated with a second value; and transmitting or receiving a plurality of signals by the processor based on the resource allocation associated with the array.

[0009] This invention provides an apparatus comprising: at least one of a transmitter and a receiver, for wirelessly communicating with a wireless network during operation; and a processor communicatively coupled to at least one of the transmitter and receiver, the processor being configured to perform the following operations: determining a plurality of cores of an array associated with resource allocation, wherein the array is configured such that: the half-power beamwidth of a point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the peak sidelobe level (PSL) of the PSF associated with the array is below a first threshold; and transmitting or receiving a plurality of signals via the transmitter or via the receiver based on the resource allocation associated with the array.

[0010] This invention provides an apparatus comprising: at least one of a transmitter and a receiver, for wirelessly communicating with a wireless network during operation; and a processor communicatively coupled to at least one of the transmitter and receiver, the processor being configured to perform the following operations: determining a plurality of cores of an array associated with resource allocation, wherein the plurality of cores includes a first core and a second core, and the array is configured such that: the half-power beamwidth of a point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the number of non-zero elements of the first core is associated with a first value, and the number of non-zero elements of the second core is associated with a second value; and transmitting or receiving a plurality of signals via the transmitter or via the receiver based on the resource allocation associated with the array.

[0011] It is worth noting that while the descriptions provided herein can be used in the context of certain radio access technologies, networks, and network topologies, such as LTE, LTE Advanced, LTE Advanced Pro, 5G, NR, IoT, NB-IoT, IIoT, B5G, and 6G, the proposed concepts, schemes, and any variations / derivatives thereof can be implemented in, used in, and by other types of radio access technologies, networks, and network topologies. Therefore, the scope of the invention is not limited to the examples described herein. Attached Figure Description

[0012] The accompanying drawings contain information for a further understanding of the invention and are incorporated into and constitute a part of the invention. These drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. It is worth noting that the drawings are not necessarily drawn to scale, as some components may be shown out of proportion to actual dimensions in order to clearly illustrate the concepts of the invention.

[0013] Figure 1A This is an example scenario according to an embodiment of the present invention.

[0014] Figure 1B This is an example scenario according to an embodiment of the present invention.

[0015] Figure 2 This is an example scenario according to an embodiment of the present invention.

[0016] Figure 3 This is an example scenario according to an embodiment of the present invention.

[0017] Figure 4 This is an example communication device according to an embodiment of the present invention.

[0018] Figure 5 This is an example process according to an embodiment of the present invention.

[0019] Figure 6 This is an example process according to an embodiment of the present invention. Detailed Implementation

[0020] This invention discloses detailed embodiments and implementations of the claimed subject matter. However, it should be understood that the inventive embodiments and implementations are merely illustrative of the claimed subject matter, which can be implemented in various forms. Moreover, the invention can be implemented in many different forms and should not be construed as limited to the exemplary embodiments and implementations set forth herein. Rather, these exemplary embodiments and implementations are provided to make the specification of this invention comprehensive and complete, and to fully convey the scope of the invention to those skilled in the art. In the following description, details of known features and techniques may be omitted to avoid unnecessarily obscuring the presented embodiments and implementations.

[0021] Overview Embodiments of the present invention relate to various techniques, methods, schemes, and / or solutions for array determination related to resource allocation of devices in an ISAC system. According to the present invention, many possible solutions can be implemented individually or in combination. That is, although these possible solutions may be described separately below, two or more of these possible solutions may be implemented in one or another combination.

[0022] Figure 1A This is an example scenario 100A according to an embodiment of the present invention. In some network scenarios, a device (e.g., a user equipment (UE) or a network node) can act as a transmitter (TX), and a device (e.g., a UE or a network node) can act as a receiver (RX). The TX and RX can exchange necessary network parameters.

[0023] Then, the TX device and the RX device can each determine multiple kernels of an array associated with resource allocation, wherein the array can satisfy certain conditions. After determining the array, based on the array associated with resource allocation, the TX device can send a signal to the sensing target, and the RX device can receive the signal reflected from the sensing target (e.g., for sensing and communication purposes in a dual-station sensing network scenario).

[0024] Figure 1B This is an example scenario 100B according to an embodiment of the present invention. In some network scenarios, a device (e.g., a user equipment (UE) or a network node) can act as both TX and RX simultaneously.

[0025] The device can then determine multiple cores of an array associated with resource allocation. The array can satisfy certain conditions. After determining the array, based on the array associated with resource allocation, the device can send or receive signals (e.g., for sensing targets and communicating with other network nodes in a single-site sensing network scenario).

[0026] Based on the determination of the array's cores, the array design problem can be simplified to a minor design problem involving several cores, which can significantly reduce computational complexity. Therefore, an effective solution can be provided to make the array design process simpler and more efficient.

[0027] More specifically, multi-layer array structures (i.e., array structures composed of kernels) can be introduced for the design of multi-dimensional arrays (e.g., large-scale sparse arrays). By using multi-layer array structures, the array design problem can be simplified to a few kernel design problems. Multi-layer array structures can inherently realize the system construction of multi-dimensional array styles, significantly reducing the computational complexity of array selection (e.g., sparse array selection) and saving required storage space, and may even eliminate the need for storage altogether.

[0028] Furthermore, multi-layer array structures can be used for low-overhead, high-performance sensing resource allocation in orthogonal frequency division multiplexing (OFDM) ISAC systems, sparse transceiver antenna array design for beamforming in massive MIMO systems, and other applications requiring large-scale sparse arrays. This method is universally applicable to any resource grid used as a sampling instance; therefore, it is not limited to OFDM resource element (RE) planes but is also suitable for heterogeneous time division multiplexing (TDM) radars.

[0029] In some embodiments, TX / RX can determine multiple cores of an array associated with resource allocation. The array can be configured such that (i.e., it can be determined that) the following condition is met: (1) the half-power beamwidth (i.e., the half-power main lobe beamwidth) of the point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension (e.g., in a two-dimensional scene, the half-power beamwidth of the PSF associated with the array is within a threshold in the first dimension). Within, in the second dimension, at the threshold (1) (2) The sidelobe level of the PSF associated with the array is suppressed, specifically, the peak sidelobe level (PSL) of the PSF associated with the array is below a first threshold.

[0030] After the array is determined, TX / RX can transmit or receive signals based on the array associated with resource allocation. For example, a UE acting as TX can transmit signals to a network node acting as RX. A network node acting as TX can transmit signals to a UE acting as RX. Devices acting as TX and RX (e.g., network nodes or UEs) can transmit and receive signals for sensing and communication purposes.

[0031] In some implementations, multiple kernels may include a first kernel and a second kernel. This array can be the Kronecker product of the first and second kernels according to the following formula: in It could be this array, It can be the first kernel. It can be a second core. Furthermore, the size of the array can be... , The size can be , The size can be , It can be equal to , It can be equal to .

[0032] More specifically, It can represent a size of The array pattern. When designed as and At that time, the size was array The size can be determined by the following method: (1) The first core, at the same time The size of (2) is The second kernel, at the same time , represented as In a size of In the first kernel, there may be in the first dimension. There are elements in the second dimension. elements. In a size of _ elements. In the second kernel, there may be in the first dimension. A first kernel, in the second dimension The first kernel.

[0033] Figure 2 This is an example scenario 200 according to an embodiment of the present invention. For example, Figure 2 The image shows a one-dimensional dual-core array. Specifically, the first core is... The second kernel is The array (i.e., a one-dimensional dual-core array) is .

[0034] Figure 3 This is an example scenario 300 according to an embodiment of the present invention. For example, Figure 3 The image shows a two-dimensional dual-core array. Specifically, the first core is... The second kernel is The array (i.e., a two-dimensional dual-core array) is .like Figure 3 As shown, regarding the array determined by the first and second cores, at a size of In the first kernel, there may be in the first dimension. There are elements in the second dimension. elements; in a size of In the second kernel, there may be in the first dimension. A first kernel, in the second dimension The first kernel.

[0035] In some cases, array The array factor can be determined according to the following formula, and at the same time express The number of non-zero elements in , yes The number of non-zero elements in: in It can be the array factor of the array. It can be an array The row and number Column elements, It can be in The active element when the value is 1, and It may not be in The active element when its value is 0.

[0036] In some cases, the first kernel The array factor can be determined according to the following formula: in It can be the first kernel array factor, It can be the first kernel The row and number Column elements, It can be in The active element when the value is 1, and It may not be in The active element when its value is 0. This can be represented as... .

[0037] In some cases, the second kernel The array factor can be determined according to the following formula: in It can be a second kernel array factor, It can be a second kernel of lines and Column elements, It can be in The active element when it is 1, and It can be in It is not an active element when the value is 0.

[0038] In some cases, array First kernel Second kernel The array factor can be expressed by the following formula: , Among them when equal and equal , Possibly equal to , .

[0039] More specifically, based on the above design, the array (size is) The design problem can be simplified to a two-kernel design problem (i.e., the first kernel). Size is and the second kernel Size is ).

[0040] It should be noted that the following attributes may exist that are associated with the first kernel and the second kernel. For all ,have The array factor properties of the first kernel are: (1) large unambiguous region: , And (2) wide main lobe: 3dB beamwidth , For all ,have The array factor properties of the second kernel are: (1) small unambiguous range: , And (2) fine main lobe: 3dB beamwidth , Regarding the periodicity property of the array factor of any second kernel: for any ,definition and , It can be a periodicity in the first dimension. The second dimension has a periodicity. A two-dimensional periodic function. Possibly The area exhibits periodic grating lobes, among which It can be an integer, and At least one of them can be non-zero. and .

[0041] In some implementations, the following perceived resource allocation metrics may be considered: PSF along the first and second dimensions. Half-power main lobe beamwidth, PSF The PSL, and the number of perceived resource elements (REs).

[0042] In some implementations, the goal may be to construct a sparse array (i.e., a matrix) that satisfies the following conditions. :(C1)PSF The half-power main lobe beamwidth is within the corresponding threshold in each corresponding dimension (e.g., in a two-dimensional scene, the half-power beamwidth of the PSF associated with the array is within the first dimension). The inside is at the threshold Inside, and in the second dimension Inside the threshold (inner); and (C2) PSF The PSL is below the first threshold. In some cases, the corresponding threshold and the first threshold can be specified values.

[0043] More specifically, It can represent a sidelobe region, where This may indicate an area of ​​interest. This may indicate the main lobe region. Furthermore, in relation to the second kernel... The associated external PSF factor (i.e., The multidimensional periodicity (i.e., the two-dimensional periodicity is indexed as (0,0) in these implementations) th Within ) it may be represented as , It can represent a two-dimensional main lobe region. It can represent a corresponding two-dimensional sidelobe region.

[0044] Additionally, regarding the first kernel The associated internal PSF factor (i.e., ), It may represent a two-dimensional main lobe region. It may represent a corresponding two-dimensional sidelobe region.

[0045] Based on the above region definition, a condition that satisfies PSF A two-layer sparse array (i.e., a sparse array containing a sparse inner core and a sparse outer core) with half-power main lobe beamwidth and PSL associated conditions can be constructed by the sequential process described below.

[0046] In the first stage, the sparse internal kernel (i.e., the first kernel) It can be configured to satisfy the following conditions: S1-inner, S2-inner, and S3-inner.

[0047] In some cases, the condition S1-inner can be restricted to a sparse inner kernel (i.e., the first kernel). The associated internal PSF factor (i.e., The half-power main lobe beamwidth is within the corresponding value in each corresponding dimension (e.g., in a two-dimensional scene, the condition S1-inner can limit the half-power main lobe beamwidth of the internal PSF factor associated with the sparse inner kernel in the first dimension). Internal Inside, and in the second dimension Internal Inside).

[0048] In some cases, the conditional S2-inner can be restricted to a sparse inner kernel (i.e., the first kernel). The associated internal PSF factor (i.e., In relation to the sparse outer kernel (i.e., the second kernel) The associated external PSF factor (i.e., Within the raster lobe region, in the region of interest The threshold is less than (i.e., remains below) the second threshold. In some cases, the second threshold may be less than or equal to the first threshold.

[0049] In some cases, the conditional S3-inner can be restricted to a sparse inner kernel (i.e., the first kernel). The associated internal PSF factor (i.e., In relation to the sparse internal kernel (i.e., the first kernel) Associated sidelobe regions The value is less than the predetermined value (e.g., a value of about -3 dB).

[0050] In the second phase, a sparse internal kernel (i.e., the first kernel) is configured. After that, the sparse outer kernel (i.e., the second kernel) S1-outer and S2-outer can be configured to satisfy the following conditions.

[0051] In some cases, the conditional S1-outer can be restricted to sparse arrays (i.e., arrays of...). The associated results PSF The half-power main lobe beamwidth is within the corresponding threshold in each corresponding dimension (e.g., the conditional S1-outer can limit the resulting PSF associated with the sparse array in the first dimension). Inside the threshold Inside, and in the second dimension Inside the threshold Inside).

[0052] In some cases, the conditional S2-outer can be restricted to sparse arrays (i.e., arrays of...). The associated results PSF The absolute value of the sparse outer kernel (i.e., the second kernel) is related to the sparse outer kernel. Associated sidelobe regions The value is less than the first threshold.

[0053] It should be noted that the condition S1-outer in the second phase ensures PSF. Condition (C1) is satisfied. Furthermore, condition S2-inner in the first stage ensures PSF within the grating lobe region of the external PSF factor. Below the second threshold, conditions S1-inner, S3-inner, and S2-outer ensure PSF. exist In other regions. Additionally, the external PSF factor (0,0) th The period can be aligned with the half-power main lobe region of the internal PSF factor. Due to this alignment, in Inside, with (0,0) th Compared to the periodicity, the internal PSF factor exhibits a lower amplitude within the external-internal-kernel-3dB-main lobe region of the external PSF factor. This characteristic may be utilized in the current construction. Therefore, satisfying (C1) and (C2) Sparse array (i.e., array) This can be constructed through a sequential process of configuring the sparse inner kernel and the sparse outer kernel. In some cases, the conditional S3-inner may only be applied if the selection of the second threshold is too lenient, and this may need to be verified after configuration.

[0054] In some implementations, multiple kernels may include One core. The array can be based on the following formula: Kronecker product of kernels: in It can be an array, arrive One core. Furthermore, the size of this array can be... , The size can be , Possibly equal to ,and Possibly equal to .

[0055] More specifically, It may represent a size of The array pattern of the array. When designed as and At that time, the size was array It is possible to use a size of The kernel determines this, and Represented as .

[0056] In some cases, array The array factor can be determined according to the following formula, while express The number of non-zero elements, , yes The number of non-zero elements: in It can be the array factor of the array. It can be an array The row and number Column elements, It can be in The element activated when the value is 1, and It can be in Elements that are not activated when their value is 0.

[0057] In some cases, the kernel The array factor can be determined according to the following formula: in It can be the kernel array factor, It can be the kernel The row and number Column elements, It can be in The element that is activated when its value is 1, and It can be in Elements that are not activated when their value is 0. It can be represented as... .

[0058] In some cases, array array factor, kernel arrive This can be expressed as the following formula: , Among them, for equal and equal Can be equal to , .

[0059] More specifically, based on the above design, the array (size is) The design problem of ) can be simplified to the kernel design problem (i.e., the kernel of size ). kernel arrive , ).

[0060] Based on the first criterion, the goal could be to construct a sparse array (i.e., a matrix) that satisfies the following conditions. (C1)PSF The half-power main lobe beamwidth is within the corresponding threshold in each corresponding dimension (e.g., in a two-dimensional scene, the half-power beamwidth of the PSF associated with the array is within the first dimension). Inside the threshold Inside, and in the second dimension Inside the threshold (inner); and (C2)PSF The PSL is below the first threshold. In some cases, the corresponding threshold and the first threshold can be specified values.

[0061] More specifically, in Kernel factor (i.e., )Inside, It can represent the two-dimensional main lobe region. This can represent a two-dimensional sidelobe region. It should be noted that for the first-order kernel factor, .

[0062] Array of The kernel may have Phases. In the first two phases (i.e., and The first-order and second-order kernels can be considered as the inner and outer kernels, respectively. The sequential process for the two-order case (i.e., the two-kernel case) mentioned earlier can be applied to derive the relationship between these two kernels and the corresponding thresholds (e.g., threshold values). and threshold ).

[0063] exist The Phase, from the previous A resulting two-order structure array composed of several kernels can be considered as a kernel. After configuring the kernels, a sparse structure can be configured. The kernel satisfies the following conditions MS21 and MS22.

[0064] In some cases, condition MS21 may limit The 3dB main lobe beamwidth is within the corresponding value in each corresponding dimension (e.g., for a two-dimensional scene, condition MS21 may limit...). The 3dB main lobe beamwidth in the first dimension The inner value is the first value Inside, and in the second dimension The inner value is the second value Inside).

[0065] In some cases, condition MS22 may limit Below the first threshold.

[0066] For sequential processes Hierarchical structure array The condition (C1) can be satisfied with a threshold. and threshold And condition (C2). Therefore, when enhanced resolution is needed in both dimensions, multi-stage structure arrays previously configured for sensing tasks with lower resolution requirements may be reused. In this case, the existing multi-stage structure array may be configured as the kernel, and one or more additional stages may be built in subsequent stages to further reduce the main lobe. In some implementations, this approach may eliminate the need to recompile all kernels for new sensing tasks.

[0067] In some embodiments, TX / RX can determine multiple cores of an array associated with resource allocation. These multiple cores may include a first core and a second core. The array can be configured (i.e., it can be determined that the following conditions are met): (1) the half-power beamwidth of the PSF associated with the array is within a corresponding threshold in each corresponding dimension (e.g., in a two-dimensional scene, the half-power beamwidth of the PSF associated with the array is within a threshold in the first dimension). Within, and at the threshold in the second dimension. (1) The number of non-zero elements in the first core is associated with a first value, and the number of non-zero elements in the second core is associated with a second value. In some cases, determining the number of cores of an array can reduce the PSL of the PSF associated with that array.

[0068] In some implementations, the goal may be to construct a sparse array (i.e., a matrix). The array satisfies the following condition: (C1) PSF The half-power main lobe beamwidth is within the corresponding threshold in each dimension (e.g., in a two-dimensional scene, the half-power main lobe beamwidth of the PSF is within the first dimension). Inside the threshold Inside, and in the second dimension Inside the threshold (C2') and (C2') the number of non-zero elements in the first kernel is associated with the first value, and the number of non-zero elements in the second kernel is associated with the second value.

[0069] Therefore, a two-layer sparse array (i.e., the sparse array contains a sparse kernel and a sparse outer kernel) can be constructed by the following sequential process, which satisfies the conditions associated with the half-power main lobe beamwidth and the number of non-zero elements in the kernel.

[0070] In the first stage, the sparse kernel (i.e., the first kernel) () can be configured to be in the region of interest Within, under the following conditions S11'-inner, S12'-inner, and S13'-inner, reduce the inner PSF factor (i.e., ) in the external PSF factor (i.e., The amplitude within the grating lobe region.

[0071] In some cases, the condition S11'-inner can restrict the sparse kernel (i.e., the first kernel). The number of non-zero elements in () is less than the first value. The sparse kernel can be configured to reduce the magnitude of the PSF associated with the first kernel within the raster lobe region associated with the second kernel, in the region of interest.

[0072] In some cases, the condition S12'-inner can be restricted to a sparse kernel (i.e., the first kernel). The associated internal PSF factor (i.e., The half-power main lobe beamwidth is within the corresponding value in each corresponding dimension (e.g., in a two-dimensional scene, the condition S1-inner can limit the half-power main lobe beamwidth of the inner PSF factor associated with the sparse kernel in the first dimension). Internal Inside, and in the second dimension Internal Inside).

[0073] In some cases, the conditional S3-inner can be restricted to a sparse kernel (i.e., the first kernel). The associated internal PSF factor (i.e., In the sidelobe region associated with the sparse kernel The value is less than the predetermined value (e.g., a value of about -3dB).

[0074] In the second phase, a sparse kernel (i.e., the first kernel) is configured. After that, the sparse outer kernel (i.e., the second inner kernel) It can be configured to reduce the sidelobe region associated with the sparse outer kernel under the following conditions S21'-outer and S22'-outer. The result PSF inside .

[0075] In some cases, the condition S21'-outer can be restricted to sparse arrays (i.e., arrays...). The associated results PSF The half-power main lobe beamwidth is within the corresponding threshold in each corresponding dimension (e.g., in a two-dimensional scene, condition S21'-outer can limit the half-power main lobe beamwidth of the resulting PSF associated with the sparse array in the first dimension). Inside the threshold Inside, and in the second dimension Inside the threshold Inside).

[0076] In some cases, the conditional S22'-outer can constrain the sparse outer kernel (i.e., the second kernel). The number of non-zero elements in () is less than the second value The sparse outer core can be configured to reduce the amplitude of the PSF associated with the array in the sidelobe region of the outer core, and the sidelobe region of the outer core can be located in two dimensions (0,0). th Within the sidelobe region of the cycle.

[0077] It should be noted that this array configuration method associated with non-zero element conditions can also be applied to multidimensional or one-dimensional arrays.

[0078] In some implementations, an operation can be provided to determine the active elements (i.e., elements with a value of 1) in the kernels at each stage of the multi-kernel array determination process. Specifically, to establish two kernels in a configurable manner, a sequential selection method can be used to determine the array element positions. For each kernel, a set of... Element allocation is used for pilot transmission to initiate the sequence selection algorithm. In some cases, to meet resolution requirements, each core can be initialized by selecting four elements located at the four corner positions of the available two-dimensional time-frequency array; these elements serve as the initial core or outer core.

[0079] Subsequently, for You can choose the kernel Elements. Assume allocation for perception... The number of elements is fixed; the total number of remaining elements in the kernel that are not utilized by perceived signals is [number missing]. One element (when used as a kernel) or Several elements (when used as an outer kernel) can be identified as candidate perceptual RE locations. By temporarily adding corresponding candidate elements, the PSL associated with the kernel or outer kernel can be evaluated. Then, the candidate element that produces the minimum PSL can be selected as the kernel's... Each element.

[0080] The above selection process can be repeated iteratively until one or more termination conditions are met, including: (i) the resulting PSL is below a specified threshold; (ii) further activation of additional elements no longer leads to a decrease in PSL; or (iii) the number of non-zero elements reaches a predetermined maximum value.

[0081] Given a set of parameters associated with the perception task and a set of kernel dimensions By applying a sequential selection algorithm combined with a parallel construction method, sparse arrays that satisfy conditions (C1) and (C2) (or (C2')) can be independently configured at the UE and network nodes.

[0082] In some implementations, the time-delay-Doppler response (PSF) in a cyclic prefix (CP)-OFDM system may be mathematically equivalent to the two-dimensional spectrum of the signal pattern in the frequency-time domain. Therefore, the design of low-overhead resource-aware patterns can be formulated as a sparse array design problem.

[0083] For example, consider an OFDM signal containing multiple resource blocks (RBs), these RBs are... The configuration arrangement includes 14 symbols and 12 subcarriers per RB (i.e., each RB has...). (Number of REs). Therefore, the total number of available REs is... For a subcarrier spacing of 30 kHz, the resulting transmission bandwidth is approximately 20 MHz, and the transmission duration corresponds to 10 time slots.

[0084] Employing the previously mentioned two-layer array structure, where one RB serves as the core, and has dimensions... and The outer core has dimensions The time delay and the maximum unambiguous range of Doppler are configured as follows: and First threshold Second threshold Set as dB.

[0085] In this example, the kernel includes 37 non-zero elements and the outer kernel includes 44 non-zero elements, thereby reducing the perceptual overhead to approximately 1.8% of the available RE. The results show that the PSL and 3dB main lobe width achieved by the sequential process are comparable to those obtained using the parallel construction method and the full RE allocation method.

[0086] In another example, to enhance latency and sensing resolution in the Doppler domain, the ISAC system can utilize a wider bandwidth and a longer coherent processing interval (CPI). A three-layer array is employed, with parameters configured as follows: , , , , and The total number of available REs is .

[0087] For a subcarrier spacing of 30 kHz, the resulting transmission bandwidth would likely be approximately 500 MHz, and the transmission duration would likely correspond to 50 time slots. The delay and the maximum unambiguous range of the Doppler are configured as follows: and In this example, the first-level kernel and the second-level kernel obtained through the sequential process are the same as the kernel and outer kernel in the previous example, respectively.

[0088] After configuring the first and second layer kernels, a third layer kernel is configured in a subsequent stage to further reduce the main lobe of the resulting PSF while maintaining the maximum unblurred range. In this way, enhanced perceptual resolution can be achieved without recalculating the previously built kernels.

[0089] Illustrative Implementation Figure 4 This is an example device 410 according to an embodiment of the present invention. Device 410 can perform various functions to implement the schemes, techniques, processes and methods described herein relating to array determination related to resource allocation of TX and RX in an ISAC system, including the above-described scenarios / schemes and processes 500 and 600 described below.

[0090] Device 410 may be: (1) part of an electronic device, which may be a user equipment (UE), such as a portable or mobile device, a wearable device, a wireless communication device, or a computing device; or (2) part of a network device, which may be a network node, such as a satellite, a base station, a small cell, a router, or a gateway. For example, device 410 may be implemented in a smartphone, a smartwatch, a personal digital assistant, a digital camera, or a computing device such as a tablet, a laptop, or a notebook computer. Device 410 may also be part of a machine-type device, which may be an Internet of Things (IoT), Narrowband Internet of Things (NB-IoT), or Industrial Internet of Things (IIoT) device, such as a non-movable or fixed device, a home device, a wired communication device, or a computing device. For example, device 410 may be implemented in a smart thermostat, a smart refrigerator, a smart door lock, a wireless speaker, or a home control center. For example, device 410 may be implemented in an eNB in ​​an LTE network, a 5G / NR, IoT, NB-IoT, or a gNB in ​​an IIoT network, or a satellite or base station in a 6G network. Alternatively, device 410 may be implemented as one or more integrated circuit (IC) chips, such as, but not limited to, one or more single-core processors, one or more multi-core processors, one or more Reduced Instruction Set Computing (RISC) processors, or one or more Complex Instruction Set Computing (CISC) processors. Device 410 may include Figure 4 At least some components are shown, such as processor 412. Device 410 may also include one or more other components unrelated to the embodiments of the present invention (e.g., internal power supply, display device, and / or user interface device), however, these components of device 410 are not shown in [the present invention]. Figure 4 The text shown is not described below to keep it concise and brief.

[0091] In one aspect, processor 412 may be implemented as one or more single-core processors, one or more multi-core processors, or one or more CISC processors. That is, although the singular term "processor" is used herein to refer to processor 412, according to the content of the invention, processor 412 may include multiple processors in some implementations and a single processor in others. In another aspect, processor 412 may be implemented in hardware (and optionally firmware) comprising, for example, but not limited to, one or more transistors, one or more diodes, one or more capacitors, one or more resistors, one or more inductors, one or more memristors, and / or one or more transformers, these electronic components being configured and arranged to achieve a specific purpose according to the invention. In other words, in at least some implementations, processor 412 is a dedicated machine specifically designed, arranged, and configured to perform a specific task, comprising an array associated with resource allocation in a device (e.g., represented by apparatus 410) determined according to various implementations of the invention.

[0092] In some implementations, device 410 may further include a transceiver 416 coupled to processor 412 and capable of wirelessly transmitting and receiving data. Transceiver 416 may include a transmitter and / or a receiver. In other words, processor 412 can transmit and / or receive data, such as configurations, messages, signals, information, indicators, etc., via transceiver 416. In some implementations, device 410 may further include a memory 414 coupled to processor 412 and accessible by processor 412 to store data. Therefore, device 410 can wirelessly communicate with other network nodes via transceiver 416.

[0093] In some implementations, memory 414 may include a random access memory (RAM), such as dynamic RAM (DRAM), static RAM (SRAM), thyristor RAM (T-RAM), and / or zero-capacitance RAM (Z-RAM). Alternatively, memory 414 may include a read-only memory (ROM), such as a mask ROM, programmable ROM (PROM), erasable programmable ROM (EPROM), and / or electrically erasable programmable ROM (EEPROM). Alternatively, memory 414 may include a non-volatile random access memory (NVRAM), such as flash memory, solid-state memory, ferroelectric RAM (FeRAM), magnetoresistive RAM (MRAM), and / or phase-change memory.

[0094] Explanatory process Figure 5This is an example process 500 according to an embodiment of the present invention. Process 500 may be an example of part or all of the above-described scenario / scheme involving determining an array associated with resource allocation of the present invention. Process 500 may represent one aspect of the feature implementation of device 410 as a transmitter / receiver. Process 500 may include one or more operations, actions, or functions, as shown in one or more blocks 510 and 520. Although shown as discrete blocks, the individual blocks of process 500 may be divided into more blocks, merged into fewer blocks, or eliminated depending on the desired implementation. Furthermore, the blocks of process 500 may be arranged in... Figure 5 The process 500 may be executed in the order shown, or in a different order. Process 500 may be implemented by a transmitter / receiver (e.g., device 410 or a machine-type device). For illustrative purposes only and without limitation, process 500 is described below in the context of device 410. Process 500 may begin at block 510.

[0095] In block 510, process 500 may involve processor 412 of device 410 determining multiple cores of an array associated with resource allocation. The array is configured such that: (1) the half-power beamwidth of the PSF associated with the array is within a corresponding threshold in each corresponding dimension; and (2) the PSL of the PSF associated with the array is below a first threshold. Process 500 may continue from block 510 to block 520.

[0096] In block 520, process 500 may involve processor 412 of device 410 sending or receiving multiple signals based on an array associated with resource allocation.

[0097] In some implementations, the plurality of kernels may include a first kernel and a second kernel, and the array may be a Kronecker product of the first kernel and the second kernel according to the following formula: in It can be an array, It can be the first kernel. It can be a second core. The array size can be... , The size can be , The size can be , It can be equal to ,and It can be equal to . , , , , , It is a positive integer.

[0098] In some implementations, the first core can be configured to ensure that the half-power beamwidth of the PSF associated with the first core is within the corresponding value in each corresponding dimension.

[0099] In some implementations, the first kernel can be configured such that, within the region of interest, the magnitude of the PSF associated with the first kernel is less than a second threshold within the raster lobe region associated with the second kernel.

[0100] In some implementations, the first kernel can be configured such that the magnitude of the PSF associated with the first kernel is less than a predetermined value in the sidelobe region associated with the first kernel.

[0101] In some implementations, the second threshold can be equal to or less than the first threshold.

[0102] In some implementations, the second core can be configured such that, after the first core is configured, the half-power beamwidth of the PSF associated with the array is within the corresponding threshold in each corresponding dimension.

[0103] In some implementations, the second kernel can be configured such that the absolute value of the PSF associated with the array is less than a first threshold within the sidelobe region associated with the second kernel. The sidelobe region associated with the second kernel can lie within a multidimensional period.

[0104] In some implementations, multiple kernels can include kernels. arrive And the array can be a Kronecker product of multiple kernels according to the following formula: The size of the array can be , The size can be , It can be equal to ,and It can be equal to . , , , … , … It is a positive integer. less than or equal to Positive integers.

[0105] Figure 6This is an example process 600 according to an embodiment of the present invention. Process 600 may be an example of part or all of the above-described scenario / scheme involving determining an array associated with resource allocation of the present invention. Process 600 may represent one aspect of the feature implementation of device 410 as a transmitter / receiver. Process 600 may include one or more operations, actions, or functions, as shown by one or more blocks 610 and 620. Although shown as discrete blocks, the individual blocks of process 600 may be divided into more blocks, merged into fewer blocks, or eliminated depending on the desired implementation. Furthermore, the blocks of process 600 may be arranged according to Figure 6 The process 600 may be executed in the order shown, or in a different order. Process 600 may be implemented by a transmitter / receiver such as device 410 or a machine-type device. For illustrative purposes only and without limitation, process 600 is described below in the context of device 410. Process 600 may begin at block 610.

[0106] In block 610, process 600 may involve processor 412 of device 410 determining multiple cores of an array associated with resource allocation. The multiple cores may include a first core and a second core. The array may be configured such that: (1) the half-power beamwidth of the PSF associated with the array is within a corresponding threshold in each corresponding dimension; and (2) the number of non-zero elements in the first core is associated with a first value, and the number of non-zero elements in the second core is associated with a second value. Process 600 may proceed from block 610 to block 620.

[0107] In block 620, process 600 may involve processor 412 of device 410 sending or receiving multiple signals based on an array associated with resource allocation.

[0108] In some implementations, multiple kernels may include a first kernel and a second kernel, and the array may be the Kronecker product of the first kernel and the second kernel according to the following formula: in It can be an array, It can be the first kernel. It can be a second core. The array size can be... , The size can be , The size can be , It can be equal to ,and It can be equal to . , , , , , positive integers In some implementations, the first kernel can be configured to reduce the magnitude of the PSF associated with the first kernel in the raster lobe region associated with the second kernel within the region of interest.

[0109] In some implementations, the first core can be configured to ensure that the half-power beamwidth of the PSF associated with the first core is within the corresponding value in each corresponding dimension.

[0110] In some implementations, the first kernel can be configured such that the magnitude of the PSF associated with the first kernel is less than a predetermined value in the sidelobe region associated with the first kernel.

[0111] In some implementations, the second core can be configured such that, after the first core is configured, the half-power beamwidth of the PSF associated with the array is within the corresponding threshold in each corresponding dimension.

[0112] In some implementations, the second core can be configured to reduce the magnitude of the PSF associated with the array within the sidelobe region of the second core, and the sidelobe region associated with the second core is located within a multidimensional period.

[0113] Additional notes The subject matter described in this invention sometimes illustrates different components included within or connected to other components. However, it should be understood that these depicted architectures are merely examples, and many other architectures implementing the same functionality can actually be implemented. Conceptually, any arrangement of components implementing the same function is effectively “associated” to enable the desired functionality. Therefore, regardless of architecture or intermediate components, any two components combined in this invention to achieve a specific function can be considered “associated” with each other to enable the desired functionality. Similarly, any two such associated components can also be considered “operationally connected” or “operationally coupled” to each other to achieve the desired functionality, and any two components that can be suchly associated can also be considered “operationally coupled” to each other to achieve the desired functionality. Specific examples of operationally coupled components include, but are not limited to, physically mating and / or physically interacting components and / or wirelessly interacting components and / or logically interacting and / or logically interactable components.

[0114] Furthermore, regarding any plural and / or singular terms used substantially in this invention, those skilled in the art can convert them from plural to singular and / or from singular to plural as appropriate for the content and / or application. For clarity, various singular / plural substitutions may be explicitly stated in this invention.

[0115] Furthermore, those skilled in the art will understand that, generally, the terms used in this invention, and especially in the appended claims (e.g., the body of the appended claims), are generally meant as “open-ended” terms. For example, the term “comprising” should be interpreted as “including but not limited to,” the term “having” should be interpreted as “at least having,” the term “comprising” should be interpreted as “including but not limited to,” and so on. Those skilled in the art will also understand that if a specific number of claims is intentionally listed, this intention will be explicitly listed in the claims, and the absence of such a listing will not indicate this intention. For example, to aid understanding, the appended claims may include the use of the introductory phrases “at least one” and “one or more.” However, the use of such phrases should not be construed as implying that the introduction of the indefinite article “a” or “an” limits any particular claim that includes such an introductory claim to only one embodiment of such a listing, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an,” for example, “a and / or one” should be interpreted as meaning “at least one” or “one or more,” the same applies to the use of definite articles used to introduce claims. Furthermore, even when a specific number of the introduced claims are explicitly listed, those skilled in the art will recognize that such a listing should be interpreted as meaning at least the number listed. For example, in the absence of other modifiers, the basic listing of "two listings" means at least two listings or two or more listings. Additionally, when using conventions such as "at least one of A, B, and C," it generally means, in the sense that those skilled in the art will understand, that a system having at least one of A, B, and C will include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B together, having A and C together, having B and C together, and / or having A, B, and C together. When using conventions such as "at least one of A, B, or C," it generally means, in the sense that those skilled in the art will understand, that a system having at least one of A, B, or C will include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B together, having A and C together, having B and C together, and / or having A, B, and C together. Those skilled in the art will also understand that any transitional words and / or phrases in the specification, claims, or drawings that actually indicate two or more options should be understood to include the possibility of including one, any, or both of these items. For example, the phrase "A or B" will be understood to include the possibility of "A" or "B" or "A and B".

[0116] As can be seen from the foregoing, it is understood that various embodiments of the present invention have been described for illustrative purposes, and various modifications can be made without departing from the scope and spirit of the invention. Therefore, the various embodiments disclosed in this invention are not intended to be limiting, and the true scope and spirit are determined by the appended claims.

Claims

1. A method for determining an array, comprising: The device's processor determines multiple cores of an array associated with resource allocation, wherein the array is configured such that: the half-power beamwidth of the point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the peak sidelobe level (PSL) of the PSF associated with the array is below a first threshold; and The processor sends or receives multiple signals based on the resource allocation associated with the array.

2. The method for determining the array as described in claim 1, characterized in that, The multiple cores include a first core and a second core, and the array is the Kronecker product of the first core and the second core according to the following formula: in It is this array. It is the first kernel. It is the second kernel. The size of the array is , The size is , The size is , equal ,and equal ,in , , , , , It is a positive integer.

3. The method for determining the array as described in claim 2, characterized in that, The first core is configured such that the half-power beamwidth of the PSF associated with the first core is within the corresponding value in each corresponding dimension.

4. The method for determining the array as described in claim 3, characterized in that, The first kernel is configured such that, within the region of interest, the magnitude of the PSF associated with the first kernel is less than a second threshold within the raster lobe region associated with the second kernel.

5. The method for determining the array as described in claim 4, characterized in that, The first core is configured such that, within the sidelobe region associated with the first core, the magnitude of the PSF associated with the first core is less than a predetermined value.

6. The method for determining the array as described in claim 4, characterized in that, The second threshold is equal to or less than the first threshold.

7. The method for determining an array as described in claim 2, characterized in that, The second core is configured such that, after the first core is configured, the half-power beamwidth of the PSF associated with the array is within the corresponding threshold in each corresponding dimension.

8. The method for determining an array as described in claim 7, characterized in that, The second core is configured such that, within the sidelobe region associated with the second core, the absolute value of the PSF associated with the array is less than the first threshold, wherein the sidelobe region associated with the second core is within a multidimensional period.

9. The method for determining an array as described in claim 1, characterized in that, These multiple kernels include kernels arrive And the array is the Kronecker product of the multiple kernels according to the following formula: The size of the array is , The size is , equal ,and equal , in , , , … , … It is a positive integer. less than or equal to Positive integers.

10. A method for determining an array, comprising: The device's processor determines multiple cores of an array associated with resource allocation, wherein the multiple cores include a first core and a second core, and the array is configured such that: the half-power beamwidth of the point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the number of non-zero elements of the first core is associated with a first value, and the number of non-zero elements of the second core is associated with a second value. as well as The processor sends or receives multiple signals based on the resource allocation associated with the array.

11. The method for determining an array as described in claim 10, characterized in that, The array is the Kronecker product of the first and second cores according to the following formula: in It is this array. It is the first kernel. It is the second kernel. The size of the array is , The size is , The size is , equal ,and equal ,in , , , , , It is a positive integer.

12. The method for determining an array as described in claim 11, characterized in that, The first kernel is configured to reduce the amplitude of the PSF associated with the first kernel in the raster lobe region associated with the second kernel within the region of interest.

13. The method for determining an array as described in claim 11, characterized in that, The first core is configured such that the half-power beamwidth of the PSF associated with the first core is within the corresponding value in each corresponding dimension.

14. The method for determining an array as described in claim 13, characterized in that, The first kernel is configured such that, within the sidelobe region associated with the first kernel, the magnitude of the PSF associated with the first kernel is less than a predetermined value.

15. The method for determining an array as described in claim 11, characterized in that, The second core is configured such that, after the first core is configured, the half-power beamwidth of the PSF associated with the array is within the corresponding threshold in each corresponding dimension.

16. The method for determining an array as described in claim 15, characterized in that, The second core is configured to reduce the amplitude of the PSF associated with the array within the sidelobe region of the second core, and the sidelobe region associated with the second core is located within a multidimensional period.

17. An apparatus comprising: At least one of the transmitter and receiver wirelessly communicates with a wireless network during operation; and A processor, communicatively coupled to at least one of the transmitter and receiver, is configured to perform the following operations: Multiple cores of an array associated with resource allocation are identified, wherein the array is configured such that: the half-power beamwidth of the point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the peak sidelobe level (PSL) of the PSF associated with the array is below a first threshold; and Multiple signals are sent through the transmitter or received through the receiver based on the resource allocation associated with the array.

18. The apparatus as claimed in claim 17, characterized in that, The multiple cores include a first core and a second core, and the array is the Kronecker product of the first core and the second core according to the following formula: in It is this array. It is the first kernel. It is the second kernel. The size of the array is , The size is , The size is , equal ,and equal ,in , , , , , It is a positive integer. The first core is configured such that: the half-power beamwidth of the PSF associated with the first core is within a corresponding value in each corresponding dimension; in the region of interest, the amplitude of the PSF associated with the first core is less than a second threshold in the grating lobe region associated with the second core; and in the sidelobe region associated with the first core, the amplitude of the PSF associated with the first core is less than a predetermined value. The second core is configured such that: after configuring the first core, the half-power beamwidth of the PSF associated with the array is within the corresponding threshold in each corresponding dimension; and in the sidelobe region associated with the second core, the absolute value of the PSF associated with the array is less than the first threshold, wherein the sidelobe region associated with the second core is within a multidimensional period.

19. An apparatus comprising: At least one of the transmitter and receiver communicates wirelessly with the wireless network during operation; as well as A processor, communicatively coupled to at least one of the transmitter and receiver, is configured to perform the following operations: A plurality of cores of an array associated with resource allocation are determined, wherein the plurality of cores includes a first core and a second core, and the array is configured such that: the half-power beamwidth of the point spread function (PSF) associated with the array is within a corresponding threshold in each corresponding dimension; and the number of non-zero elements of the first core is associated with a first value, and the number of non-zero elements of the second core is associated with a second value. as well as Multiple signals are sent through the transmitter or received through the receiver based on the resource allocation associated with the array.

20. The apparatus as claimed in claim 19, characterized in that, The multiple cores include a first core and a second core, and the array is the Kronecker product of the first core and the second core according to the following formula: in It is this array. It is the first kernel. It is the second kernel. The size of the array is , The size is , The size is , equal ,and equal ,in , , , , , It is a positive integer. The first core is configured to reduce the amplitude of the PSF associated with the first core in the grating lobe region associated with the second core within the region of interest; the first core is configured such that: the half-power beamwidth of the PSF associated with the first core is within a corresponding value in each corresponding dimension; and the amplitude of the PSF associated with the first core is less than a predetermined value in the sidelobe region associated with the first core. The second core is configured to reduce the amplitude of the PSF associated with the array in the sidelobe region of the second core, and the sidelobe region associated with the second core is located in a multidimensional period; the second core is configured such that, after configuring the first core, the half-power beamwidth of the PSF associated with the array is within the corresponding threshold in each corresponding dimension.

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