Component carrier and its manufacturing method

Abstract

A component carrier (100) having a stack (101) is described, wherein the stack (101) comprises: i) at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102, 140); ii) an inorganic layer structure (110) having a particularly flat main surface (111); iii) a cavity (120) located in the stack (101), the cavity being defined by a bottom (121) and a sidewall (122); and iv) at least one barrier layer (130) being at least partially disposed in or on the main surface (111) of the inorganic layer structure (110) and exposed at the bottom (121) of the cavity (120). This application also provides a method for manufacturing the component carrier (100).

Description

Technical Field

[0001] This invention relates to a component carrier having a stack, the stack comprising: at least one electrically conductive layer structure and at least one electrically insulating layer structure; an inorganic layer structure having a main surface; a cavity located in the stack and defined by a bottom and sidewalls; and at least one barrier layer disposed at least partially in the main surface of the inorganic layer structure or at least partially disposed on the main surface of the inorganic layer structure and at least partially disposed at the bottom of the cavity (where the bottom of the cavity is exposed). Furthermore, the invention also relates to a method of manufacturing such a component carrier.

[0002] Therefore, this invention relates to the technical field of component carriers such as printed circuit boards or IC substrates and their manufacture. Background Technology

[0003] With the increasing functionality of products equipped with component carriers containing one or more electronic components, the miniaturization of these electronic components, and the growing number of electronic components mounted on component carriers such as printed circuit boards, increasingly robust array-shaped components or packages with multiple electronic components are being adopted. These array-shaped components or packages have multiple contacts or connections with increasingly smaller spacing between these contacts. Simultaneously, the component carriers must be mechanically robust and electrically and magnetically reliable to operate even under harsh conditions.

[0004] In particular, when using inorganic layer structures, forming efficient and reliable stacks for component support may still be considered a challenge. From a technical and economic perspective, such inorganic layer structures are becoming increasingly attractive. For example, glass layer structures (glass cores) can offer particularly advantageous thermal properties. Because glass is not sensitive to heat, it is unlikely to change with temperature, and therefore exhibits almost no shrinkage.

[0005] Figure 3 A conventional circuit board 200 with a stack 201 is shown, the stack 201 including a glass substrate 210. Insulating layers 240 and 260 and a surface layer 270 are disposed on the top of the glass substrate 210. A cavity 220 is formed in the main surface of the glass substrate 210, and a component 250 is disposed on the bottom of the cavity 220 by an adhesive layer 251 for stabilization, the adhesive layer 251 being located between the component 250 and the cavity 220. The insulating layer 240 fills the gap in the cavity 220 between the sidewall of the component 250 and the sidewall of the cavity 220. An electrically conductive pad is present on the upper main surface of the component 250, the electrically conductive pad being connected to the upper main surface of the stack 201 through stacked buried vias. An additional electrically conductive through-connection is formed transversely to the embedded component 250, penetrating the stack 201.

[0006] Figure 5 A detailed view of the cavity 220 of this conventional circuit board 200 is shown, in which components are embedded within the cavity of a glass substrate. To accommodate the component 250, the cavity 220 must have a certain (i.e., large) dimension, in this example a depth of 70 μm. This results in a 130 μm bevel length in current technology for forming the cavity within the glass. A significant amount of glass material must subsequently be removed, leading to higher costs and a risk of damage such as breakage or cracking.

[0007] Figures 14A to 14L The conventional manufacturing process of this circuit board 200 is shown.

[0008] Figure 14A : Provide glass substrate 210.

[0009] Figure 14B For example, through hole 205 is formed by drilling from above and below.

[0010] Figure 14C The through hole 205 is filled by plating with copper.

[0011] Figure 14D For example, the remaining copper 236 on the main surface of the glass substrate 210 can be removed by etching.

[0012] Figure 14E : Form a protective film 245 to prepare for the formation of the cavity.

[0013] Figure 14F For example, by drilling holes in the glass substrate 210 (as described above) Figure 5 To form cavity 220.

[0014] Figure 14G The protective film 245 has been removed and the cavity 220 is ready.

[0015] Figure 14H An electrically conductive pad is formed at the end of the through-hole.

[0016] Figure 14I Place component 250 in cavity 220 on top of adhesive layer 251.

[0017] Figure 14J The component 250 in cavity 220 is embedded in electrical insulating material 240.

[0018] Figure 14K : Perform a layering process on another layer 282.

[0019] Figure 14L The above text provides information on... Figure 3The final circuit board 200 is described.

[0020] However, these conventional methods remove a significant amount of glass material from the glass substrate. This can lead to material waste and less manufacturing flexibility. Furthermore, there is a high risk of damage (cracks, fractures) when removing glass material from the substrate. Therefore, the original advantages of the glass substrate may be compromised and / or lost. Summary of the Invention

[0021] It may be necessary to provide component carriers with embedded components and inorganic layer structures in an efficient and reliable manner.

[0022] According to an exemplary embodiment of the present invention, a component carrier and a method are described.

[0023] According to an aspect of the present invention, a component carrier having (multi-layer) stacked members is described, wherein the stacked members include:

[0024] i) at least one electrically conductive layer structure (e.g., a copper layer) and at least one electrically insulating layer structure (e.g., a resin layer);

[0025] ii) Inorganic layer structure (especially glass layer) having a main surface, particularly having a flat main surface;

[0026] iii) A cavity located in a stack (e.g., within an electrically insulating layer structure), defined (in shape) by a bottom and sidewalls; and

[0027] iv) At least one barrier layer (e.g., a metal layer, particularly a seed layer) is disposed at least partially in or on the main surface of the inorganic layer structure and is exposed at the bottom of the cavity.

[0028] According to another aspect of the present invention, a method for manufacturing a component carrier is described, the method comprising:

[0029] i) Provide an inorganic layer structure with a main surface,

[0030] ii) Arranging at least one barrier layer at least partially in the main surface of the inorganic layer structure, or arranging at least one barrier layer at least partially on the main surface of the inorganic layer structure.

[0031] iii) Forming an electrically insulating layer structure and an electrically conductive layer structure on the main surface of the inorganic layer structure to provide a stack, and

[0032] iv) A cavity defined by a bottom and sidewalls is formed in the stack, wherein a barrier layer is disposed at the bottom of the cavity.

[0033] In the context of this document, the term "component carrier" may specifically refer to any support structure on which and / or in which one or more components can be housed to provide mechanical support and / or electrical and / or thermal connections. In other words, a component carrier can be constructed as a carrier for the mechanical and / or electronic or thermal needs of a component. In particular, a component carrier can be one of a printed circuit board (PCB), an organic interposer, and an integrated circuit (IC) substrate. A component carrier can also be a hybrid board composed of different types of component carriers of the types described above.

[0034] In the context of this application, the term "stack" may specifically refer to a flat or planar sheet. For example, a stack can be a multilayer stack, particularly a laminated or wound multilayer stack. Such lamination can be formed by joining multiple layers together by applying mechanical pressure and / or heat. Preferably, the multiple layers are aligned vertically parallel to each other. The stack may include an electrically conductive structure and at least one electrically insulating structure.

[0035] In the context of this application, the term "layer structure" may specifically refer to a continuous layer, a patterned layer, or a plurality of discontinuous islands (discontinuous elements) within a common plane, and the term "layer structure" may perform the functions of electrical conduction and / or electrical insulation. A layer structure may also include interconnect structures projecting from the flat surface of the layer structure.

[0036] In this context, the term "inorganic layer structure" can specifically refer to a layer structure comprising or composed of inorganic materials. An inorganic layer structure can be part of a stack of components that support other components. Inorganic materials can include, for example, ceramics, glass, metals, or other non-organic substances; specifically, inorganic materials do not contain carbon-hydrogen bonds. In the example, the inorganic layer structure has a particularly flat main surface, meaning that the main surface is flat and uniform. This flat surface can provide a stable and consistent base for other layers and components in the stack. Compared to organic materials, the use of inorganic materials in this layer can provide improved thermal stability, mechanical strength, and resistance to environmental factors.

[0037] In the examples, the inorganic carrier layer may include semiconductor materials such as silicon and / or germanium and / or silicon oxide and / or germanium oxide and / or silicon carbide and / or gallium nitride. In another embodiment, the inorganic layer structure may include (particularly basic) metals and / or one or more metal alloys, such as copper and / or tin and / or brass. In yet another embodiment, the inorganic layer structure may include inorganic materials not listed in the above examples, such as MoS2, CuGaO2, AgAlO2, LiGaTe2, AgInSe2, CuFeS2, and BeO.

[0038] In this context, "barrier layer" can refer to a specific layer within the stacked structure of a component carrier, particularly a specific layer formed in or on an inorganic layer structure. Preferably, the barrier layer can be formed in a recess located in the main surface of the inorganic layer structure. The barrier layer can be used to limit or block material removal processes (e.g., etching or drilling) during cavity formation. Therefore, the presence of the barrier layer can ensure precise control over the depth and dimensions of the cavity, thereby improving the accuracy and reliability of the manufacturing process. The barrier layer can also help maintain the structural integrity of the component carrier and prevent over-removal, which could otherwise lead to defects or damage on other layers. The barrier layer can include one or more layers. In embodiments, the barrier layer includes metals such as copper, nickel, tungsten, silver, gold, or titanium, as well as copper or another metal that improves the adhesion between the inorganic material and copper. In some cases, the barrier layer can be at least partially removed. The barrier layer can include non-metallic materials. In examples, the barrier layer is thinner than other electrically conductive layers of the stack, for example, the barrier layer is configured as a seed layer.

[0039] In this context, "cavity" can refer to a hollow cavity or void located within a stack of component carriers. The cavity may be defined by a bottom surface and sidewalls and may be formed within a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure and / or an inorganic layer structure. The cavity is designed to accommodate at least one component. Therefore, the presence of the cavity allows components such as chips to be embedded within the stack, providing a compact and efficient design. In embodiments, the cavity may be defined / limited by a bottom and one or more sidewalls. Preferably, at least a portion of one or more sidewalls of the cavity and / or at least a portion of the bottom of the cavity may include an inorganic layer structure. In embodiments, a recess (together with a barrier layer) is part of the cavity. In another embodiment, the barrier layer (recess) may define / limit the bottom of the cavity.

[0040] According to an exemplary embodiment, the present invention can be based on the concept that, when a component is embedded in a cavity located in an electrically insulating layer structure of a stack, a component carrier having an embedded component and an inorganic layer structure can be provided in an efficient and reliable manner, wherein an exposed barrier layer exists at the bottom of the cavity on / within the main surface of the inorganic layer structure. In other words, practically only a thin barrier layer is embedded in the inorganic layer structure, not the component itself. The component is embedded in a cavity formed on top of the barrier layer and the inorganic layer structure.

[0041] In this way, components can be precisely and reliably embedded into the stack of component carriers while maintaining the structural integrity and inherent properties of the inorganic layer structure. This invention minimizes the amount of inorganic material (particularly glass) removed during cavity formation, thereby reducing the risk of breakage and damage during processing, and also provides straighter cavity sidewalls. This method also allows for high (Young's) modulus, low warpage, and low breakage risk, which are crucial for the durability and performance of the component carrier.

[0042] Other advantages can include increased design flexibility, such as reduced gaps between components and electrical connections due to the narrower cavity bevel. This allows for more compact and efficient designs. The reduced cavity area helps maintain the structural properties of inorganic materials. Efficient and proven methods, such as laminated cavities, can be used during manufacturing, ensuring compatibility with existing high-volume manufacturing processes.

[0043] The advantages of this configuration also include precise control over the formation of cavities within the stack, which facilitates component embedding. Barrier layers can help define the depth and boundaries of the cavities, resulting in precise and consistent cavity formation.

[0044] Detailed description of exemplary implementation schemes

[0045] In the following sections, further exemplary embodiments of the component carrier and the method will be described.

[0046] In one embodiment, the barrier layer (at least partially) is embedded in a recess within the inorganic layer structure (specifically, the upper main surface of the barrier layer is flush with the top of the recess). In another embodiment, the recess comprises a height of 10 μm or less. This embedding within the recess ensures that the barrier layer is securely positioned and protected, potentially reducing the risk of displacement or damage during manufacturing or in the operating environment. The recess provides precise and controlled space for the barrier layer, ensuring minimal deviation and maintaining the integrity of the main surface of the inorganic layer structure. Preferably, the recess has a height of 10 μm or less, particularly 5 μm or less; in other words, the recess (and the corresponding barrier layer) is very thin. (Conventional cavity in a glass substrate - contrast) Figure 5 This includes much larger thicknesses, such as 70 mm or more. Furthermore, the amount of inorganic material (especially glass) removed during cavity / recess formation can reduce the risk of breakage and damage during processing and / or save material (cost).

[0047] In this embodiment, the barrier layer is constructed as a metallic layer and / or an electrically conductive structure. This provides the advantage that the barrier layer can be provided in a simple manner using established component carrier manufacturing techniques (i.e., within the same manufacturing process). In this embodiment, the barrier layer comprises a copper layer and / or a titanium layer, or is composed of a copper layer and / or a titanium layer. This layer can be provided by established sputtering processes and / or e-less plating processes. In this embodiment, this Cu / Ti layer is applied as a (very thin) seed layer. In this embodiment, the barrier layer can serve not only as a physical barrier and stabilizing structure, but also as an electrical pathway, which is advantageous for the functionality of the component carrier. Copper is widely used in the electronics industry due to its high electrical conductivity, while titanium is known for its strength and corrosion resistance, or as a bonding promoter for copper layers and inorganic materials such as glass.

[0048] In some embodiments, the barrier layer is a single layer or multiple layers (e.g., Cu / Ti). In some embodiments, the thickness of the single layer or one of the multiple layers is less than the thickness of one or more of the other electrically conductive layer structures in the stack. In some embodiments, the barrier layer is a seed layer. In some embodiments, only a portion of the seed layer is configured as a barrier layer. In some embodiments, the seed layer comprises titanium and / or copper or other metals or other inorganic coatings or sputtered layers. Therefore, adhesion between the inorganic material and the metal / copper can be improved. A “seed layer” is typically used to promote the growth of another layer (particularly by plating) on ​​its surface, which is typically an electrically conductive layer.

[0049] In one embodiment, the barrier layer is a continuous layer. In another embodiment, the barrier layer covers the entire bottom of the cavity or the four sidewall regions of the cavity. In yet another embodiment, the barrier layer is a discontinuous layer. In another embodiment, the barrier layer may include at least two separated barrier layer portions. When the barrier layer is composed of a continuous layer, the manufacturing of the component carrier can be simplified because fewer process steps are required. When the barrier layer is composed of a discontinuous layer, material, such as copper, can be saved. Furthermore, the various design options not only provide the barrier layer with the function of forming a cavity in an inorganic layer structure, but also offer the flexibility to design the barrier layer in accordance with the design of the entire component carrier based on the desired application, to achieve different functions in different situations.

[0050] In this embodiment, at least a portion of a main surface of the barrier layer is flat and / or includes low roughness. Preferably, the main surface may be opposite to the bottom of the cavity. This ensures reliable mechanical and / or electrical contact between the barrier layer and the component.

[0051] In one embodiment, the at least two barrier layers cover two or more edge portions (particularly the corners) of the bottom of the cavity (see contrast). Figure 11A Components can be placed reliably, but only a small amount of barrier layer material (and very small recesses) is required. In an embodiment, the at least two barrier layer portions cover only one or more edge portions of the cavity (entirely). This design offers the advantage of removing very little inorganic material from the surface of the inorganic layer structure, minimizing the risk of cracking or damage to the inorganic layer structure. Furthermore, the size of the barrier layer made of metal can be minimized, thus it is a dielectric layer that is more directly laminated onto the surface of the inorganic layer structure, rather than the entire seed layer deposited on the inorganic layer structure, and can be used as a buffer layer between the inorganic layer structure and one or more other metal layers located in the redistribution layer.

[0052] In one embodiment, the at least two barrier layers partially cover two or more side (edge) portions of the bottom of the cavity (as opposed to) Figure 10B The components can be reliably and efficiently placed on these lateral barrier layer portions. This design allows for higher tolerances in cavity formation, ensuring alignment between the portion of the cavity in the inorganic layer structure and the portion of the cavity in other layers.

[0053] In one embodiment, the at least two barrier layer portions (uniformly or non-uniformly) are distributed on the bottom of the cavity (see reference). Figure 11B This approach allows for flexible design, and / or each barrier layer can be used for the connection / stabilization of a single component. In the example, this barrier layer distribution can be used as an interconnect structure with components. Furthermore, this barrier layer distribution can also provide heat dissipation.

[0054] In this embodiment, the at least two barrier layers are configured as a frame-type electrically conductive structure (see reference). Figure 10A This frame-type conductive structure is grounded or capable of being grounded. In the example, the / all (four) side portions and the / all (four) edge portions can be covered by a barrier layer to form a frame structure. Constructing the barrier layer as a grounded frame-type conductive structure can enhance the grounding capability of the component carrier, thereby improving the overall electrical performance and stability of the component carrier. Furthermore, the grounded frame can be used to detect electrical contacts, for example, by using a milling bit, thus achieving a barrier function.

[0055] In this implementation, the barrier layer may be an all-metal layer that completely covers the bottom of the cavity (see contrast). Figure 10CBoth designs allow for higher tolerances, enabling the metal barrier layer to be fabricated in a more controlled manner via plating, as the frame is a continuous pattern. Furthermore, the frame offers the benefit of cavity formation when using laser drilling in glass materials. Because glass is transparent, laser energy can be transferred from one surface to the opposite surface, causing thermal damage to the other surface. Therefore, the frame, located along the entire edge of the cavity, acts as a barrier layer, resisting laser ablation, which is then absorbed by the frame without penetrating the entire glass core.

[0056] These configurations offer various mechanisms for the interaction between the barrier layer and the cavity and inorganic layer structures. Continuous layers ensure uniform coverage and can potentially enhance the structural integrity and electrical performance of the component carrier, while also preventing laser beams from penetrating the entire glass layer structure and causing damage to the other side. In contrast, discontinuous layers allow for greater design flexibility, enabling coverage of specific areas of the cavity. Isolated barrier layer portions can be strategically placed to reinforce certain parts of the cavity or provide specific electrical pathways. Covering the edge portions of the cavity can help prevent material degradation or electrical interference at these critical points. Distributing barrier layer portions at the bottom of the cavity can optimize the overall performance of the component carrier.

[0057] In one embodiment, the barrier layer includes a protrusion that defines a portion of the cavity sidewall and / or protrudes from another portion (particularly a flat portion) of the barrier layer. In another embodiment, the barrier layer is electrically connected to or capable of being electrically connected to at least one electrically conductive layer structure of the stack, particularly via an electrically conductive through-connection. Therefore, various electrical connections / functions can be provided in a flexible manner. The barrier layer can also partially prevent damage to other materials of the sidewall caused by laser ablation reflected to the sidewall, because the protrusion of the barrier layer covering a portion of the sidewall can absorb energy from the laser, preventing laser ablation of other materials that have completely reached the sidewall.

[0058] In this implementation, the barrier layer is connected to the inorganic layer structure at the same horizontal level as the main surface and extends horizontally beyond the bottom of the cavity. This extension provides additional surface area for bonding or connection purposes, potentially enhancing the mechanical anchoring of the barrier layer within the cavity and improving the overall stability and durability of the component carrier. Furthermore, when the barrier layer is configured for electrical conduction, it can be directly connected to the electrical conduction structure at the same horizontal level as the surface of the inorganic layer structure, thereby shortening the signal path.

[0059] In an embodiment, the component carrier includes a component that is at least partially disposed within a cavity and at least partially disposed on a barrier layer, particularly directly disposed on the barrier layer. In one example, the component is placed directly on the barrier layer, while in another example, an adhesive layer is disposed between the component and the barrier layer. In an embodiment, the component may be (electrically) connected to the barrier layer. The component may have a smaller, equal (flush), or larger height / thickness compared to the cavity. This means that the cavity is primarily formed in the dielectric layer rather than primarily formed in the inorganic layer structure. Therefore, the cavity can be formed in a way that minimizes the risk of damage to the inorganic layer structure while achieving embedding functionality in a component carrier having an inorganic layer structure. Ultimately, an integrated package with a fine-line structure can be solved without the problem of breakage.

[0060] In this embodiment, the component is at least partially encapsulated in an electrically insulating material (e.g., an encapsulation / molding material such as (uncured) resin). Encapsulating the component in an electrically insulating material represents a protective mechanism that electrically isolates the component, thereby ensuring that the component is insulated from other electrically conductive elements within the stack. This encapsulation also provides mechanical stability and protection against environmental factors.

[0061] In one embodiment, the component is attached to the bottom of the cavity by an adhesive portion, specifically an adhesive layer disposed on the bottom of the cavity (or on the bottom of the component). In particular, the adhesive portion covers the bottom of the cavity and / or bonds it to at least a portion of the cavity's sidewalls. In another embodiment, the component is attached to the bottom of the cavity by sintering onto a barrier layer. The connection between the component and the cavity bottom (barrier layer) can be achieved by an adhesive portion, which can be an adhesive layer disposed on the bottom of the cavity. It is particularly noteworthy that this adhesive layer is capable of covering the bottom of the cavity and / or bonding it to at least a portion of the cavity's sidewalls. Alternatively, the connection can be achieved by a sintering process on the barrier layer. Therefore, it can be ensured that the component is securely attached to the bottom of the cavity. This can enhance the reliability and stability of the component carrier by providing specific techniques for component attachment.

[0062] In an embodiment, the component carrier further includes an encapsulation layer structure (particularly an electrically insulating layer structure) that contacts at least one of the following: a component, particularly its side and / or top side; a cavity sidewall; a cavity bottom; an adhesive portion; a barrier layer; and an inorganic layer structure. In an embodiment, the encapsulation layer structure defines a layer structure on top of the main surface of the inorganic layer structure. The encapsulation layer structure can be used to protect the component, thereby potentially enhancing the durability and reliability of the component carrier. When in contact with multiple parts of the component carrier, the encapsulation layer structure can ensure a more robust and reliable connection between the individual components. This feature can also help to better manage thermal and mechanical stresses within the component carrier, thereby enhancing the overall reliability of the component carrier.

[0063] In one embodiment, the component carrier further includes an electrically insulating layer, particularly an electrically insulating layer structure of a stack, disposed on an inorganic layer structure, wherein a cavity is at least partially formed within the electrically insulating layer. In another embodiment, the cavity extends within the electrically insulating layer above the main surface of the inorganic layer structure. In an example, the electrically insulating layer structure is configured not only as a layer accommodating the component but also as a buffer layer between the inorganic layer structure of the component carrier and the electrically conductive layer of the RDL or stack, to improve adhesion between the inorganic material and the overlying metal layer. In another embodiment, an encapsulation layer structure is at least partially disposed on the electrically insulating layer. This provides the advantage that the cavity can be formed in a simple and reliable manner, for example, by drilling / etching. The barrier layer can therefore serve as an effective element for controlling the process / depth of cavity formation. The arrangement facilitates the formation of the cavity at least partially within the electrically insulating layer. For example, this provides more precise and controlled cavity formation compared to drilling into a glass substrate. In an example, the bottom of the cavity may not contain material from the electrically insulating layer.

[0064] In one embodiment, the component carrier further includes a redistribution layer (RDL) structure disposed on the inorganic layer structure and / or on the component. In this embodiment, the redistribution layer structure facilitates electrical connections and pathways within the component carrier, thereby enhancing the functionality and integration capabilities of the component carrier. For example, the RDL structure can transform small pads (small pitch) embedded in the component into large pads (large pitch), such as solder balls, on the outer surface of the stacked component. In an example, the RDL structure can be implemented using vertically stacked vias and / or electrical connections (pads). Such an RDL structure can be manufactured using established lamination processes starting from the inorganic layer structure, electrical insulating layer, and / or component, and can be formed with a high-density, fine-line structure supported by the inorganic layer structure. In an example, the redistribution structure may include at least two electrical insulating layer structures.

[0065] In one embodiment, the cavity extends toward a main surface of the outermost layer of the stack. In another embodiment, the cavity extends vertically beyond multiple layers of the stack or just one layer, particularly beyond just one electrically insulating layer. By extending the cavity toward the main surface of the outermost layer of the stack, this design facilitates easier access to the cavity for subsequent processing steps, such as inserting components or applying coatings. The ability to extend the cavity beyond multiple layers enables more complex and versatile designs because different layers can be customized to provide different electrical, thermal, or mechanical properties, particularly for RDL structures. With this invention, deeper cavities can be formed in component carriers with inorganic layered structures by forming cavities in one or more layered structures as needed.

[0066] In this implementation, the insulating layer above the surface of the inorganic layer structure can have a greater thickness compared to other insulating layer structures in the RDL, thereby allowing for the formation of deeper cavities within a single layer. In this implementation, the insulating layer above the inorganic layer structure can be formed of a photosensitive dielectric material, thus enabling more efficient cavity formation via exposure or excimer laser.

[0067] In one embodiment, the sidewall is defined solely by an electrically insulating layer. In another embodiment, the sidewall is defined by a structure of both an electrically insulating layer and an inorganic layer. In yet another embodiment, the sidewall is (at least partially) defined by an electrically insulating layer. In yet another embodiment, the sidewall is (at least partially) defined by a barrier layer. These different embodiments regarding sidewall definition allow for customized solutions to meet specific application requirements, thus providing design flexibility and optimization of component carrier performance characteristics. Flexible design can provide manufacturing tolerances for cavity formation.

[0068] In one embodiment, the cavity includes at least two sidewall portions (e.g., connected in the vertical / extending direction). In one embodiment, the first sidewall portion is formed in an electrically insulating layer structure. In one embodiment, the second sidewall portion is formed in an electrically conductive layer structure or, in particular, is formed by a barrier layer (e.g., a contrast layer). Figure 6B In the first example, the sidewalls of the cavity may be formed solely of an electrically insulating layer. In the second example, the sidewalls of the cavity may be formed by a portion of a barrier layer and the electrically insulating layer. In the latter case, the cavity may extend into the recess (and / or the barrier layer may not completely fill the recess). Such implementations may be advantageous for specific applications and provide design flexibility and manufacturing tolerances.

[0069] In this implementation, the third sidewall portion is formed of an inorganic layer structure (see, for example, [link to implementation]). Figure 6AIn the example, the top surface, edge, or sidewall of the recess in the inorganic layer structure can serve as a third sidewall portion of the cavity, especially when the recess is not completely filled by the barrier layer. This can provide the option to make the recess in the inorganic layer structure larger depending on the application.

[0070] In an embodiment, the first sidewall portion and / or the third sidewall portion are recessed relative to the vertical direction via a recessed portion (recess) (see example...). Figure 8 This allows for very good alignment of different portions of the cavity. In one embodiment, at least a portion of the recess is arranged parallel to the bottom of the cavity. In another embodiment, the recess is at least partially filled with the material of the encapsulation layer structure. In yet another embodiment, the encapsulation material contacts at least a portion of the sidewalls defining the recess. This recess can provide a cavity, for example, a cavity between a protrusion of the electrical insulating layer and the inorganic layer structure in the vertical direction. This embodiment offers the advantages that the encapsulation material can enter the recess, thereby providing a stable and reliable embedding. The component can be confined in a tight area, and the encapsulation material can firmly hold the component in the recess, thus the alignment of the component with the component carrier structure can be controlled and made more reliable.

[0071] In this implementation, the first sidewall portion, the second sidewall portion, and / or the third sidewall portion have different inclinations. Therefore, variations in geometry can be provided to optimize the cavity for a specific application, potentially improving the performance and efficiency of the component carrier. These differences can reflect different manufacturing processes, such as forming cavities in an electrically insulating layer and forming recesses in an inorganic layer structure (e.g., through different processes and / or different geometries). This design can provide higher manufacturing tolerances and reduce manufacturing complexity.

[0072] In one embodiment, the cavity extends through the barrier layer. In another embodiment, at least a portion of the sidewalls and / or bottom of the cavity is defined by the barrier layer. According to one embodiment, the barrier layer may form part of the cavity. While in one example the barrier layer may form the bottom of the cavity, in another example the barrier layer may extend at least partially into the cavity. In yet another example, particularly when the recess is not completely filled by the barrier layer, the cavity may extend into the recess. By extending the cavity through the barrier layer, the structural integrity and precision of the cavity can be enhanced because the barrier layer provides a well-defined and stable boundary. Furthermore, depending on the material composition of the barrier layer, a barrier layer defining at least a portion of the sidewalls and / or bottom of the cavity can help improve material properties, such as increased wear resistance or chemical stability.

[0073] In this embodiment, the cavity is disposed within at least two different electrically insulating materials. Preferably, the at least two different electrically insulating materials may comprise corresponding electrically insulating layer structures. Additionally or alternatively, the at least two different electrically insulating materials may be free of ceramic materials. In an example, one of the at least two electrically insulating materials may comprise a polymeric organic material, such as epoxy resin, while the other of the at least two electrically insulating materials may comprise glass. This can provide the advantage of combining and / or imparting physical and / or mechanical properties, such as Young's modulus and / or surface energy, to the component carrier, and thus enabling the manufacture of component carriers with high quality.

[0074] In this embodiment, the other main surface of the inorganic layer structure is not damaged by the cavity and / or does not come into contact with the electrically insulating layer structure.

[0075] In one embodiment, the cavity is formed by drilling / etching. In another embodiment, the barrier layer is an etching / drilling barrier layer. In yet another embodiment, the barrier layer is configured to (trigger) block the drilling / etching process. With this invention, cavities can be formed more simply by drilling / etching within a component carrier having an inorganic layer structure, compared to cavities formed solely in an inorganic layer structure. In another embodiment, the barrier layer is configured to define the depth of the cavity.

[0076] In embodiments, the barrier layer may include (high) roughness, particularly in the edge region between the sidewalls and the bottom wall. In embodiments, the sidewalls of the cavity may also include some roughness. In embodiments, the barrier layer may include an undercut. These structural features may be formed, for example, by performing a laser drilling process in the edge region (e.g., contrast). Figure 12J ).

[0077] In one embodiment, the height of the cavity sidewalls, particularly the height of the recesses in the inorganic layer structure, is greater than the thickness of the electrically conductive layer structure of the stacked component. In another embodiment, the height of the cavity sidewalls, particularly the height of the recesses in the inorganic layer structure, is in the range of 1.5 to 3 times the thickness. In yet another embodiment, the height of the cavity sidewalls, particularly the height of the recesses in the inorganic layer structure, is 10 μm or less. This ensures that the cavity is deep enough to accommodate various components or materials that need to be embedded within it, thereby potentially improving the functionality and versatility of the component carrier.

[0078] In embodiments, the sidewalls of the recesses in the inorganic layer structure include a bevel width of 40 μm or less, particularly 30 μm or less, and especially 25 μm or less. In embodiments, the sidewalls of the recesses in the inorganic layer structure are (substantially) straight and / or linear, e.g., not curved. This provides the advantages of less inorganic material needing to be removed, thus saving cost and effort, and reducing the risk of material damage. Furthermore, the recesses can be effectively adapted to current requirements. In embodiments, the sidewalls of the recesses can be substantially straight and well aligned with the insulating layer structure of the RDL, because small recesses can be formed by straight sidewalls, and the cavity regions in the insulating layer can be formed in a straight manner. Substantially straight sidewalls can be achieved as long as alignment is ensured.

[0079] In this embodiment, the component carrier also includes a stepped region located at the junction of the electrical insulating layer and the inorganic layer structure (see, for example...). Figure 6A This stepped portion can be provided, for example, by the edge of the inorganic layer structure, especially when the edge is not completely covered by the electrical insulation layer. The stepped region enhances the mechanical stability of the component carrier by providing a more robust connection between the electrical insulation layer and the inorganic layer structure. This stepped region can also facilitate higher tolerances for layer alignment and positioning during the manufacturing process. The presence of the stepped region at the joint can also contribute to the distribution of mechanical stress, thereby enhancing overall durability and reliability. In embodiments, the stepped portion can be within misalignment tolerances. In embodiments, the stepped portion is perfectly aligned at the joint and / or has different tapers for the insulation layer and the inorganic layer.

[0080] In embodiments, forming cavities (and / or recesses) includes drilling, particularly laser drilling or mechanical drilling (e.g., milling or grinding). In embodiments, laser drilling can be performed using a CO2 laser or a picosecond laser. In embodiments, the formation of the cavity is blocked based on the effect of the blocking layer, particularly by blocking laser drilling or forming electrical contacts. In an example, the CO2 laser can be blocked at a metal / copper layer, allowing the blocking layer to be used effectively and precisely to control the drilling process. In another example, the blocking layer can be electrically connected such that electrical contact between a mechanical drill bit (e.g., a milling head) and the blocking layer can indicate and / or block the drilling process. Again, in this case, the blocking layer can be used effectively and precisely to control the drilling process. In yet another example, the cavity can be formed by etching, and the blocking layer can be formed as an etch-resistant layer.

[0081] In some embodiments, the method further includes placing the component in the cavity and placing the component on the barrier layer, particularly placing the component directly on the barrier layer or placing the component on the barrier layer via an intervening adhesive layer. In some embodiments, the method further includes encapsulating the component in the cavity, particularly encapsulating the component in the cavity by lamination. In some embodiments, the method further includes forming a redistribution layer structure on top of the inorganic layer structure and / or the component. These features (see also details above) can provide an efficient embedding process.

[0082] In embodiments, the method further includes providing temporary structures on the barrier layer, and particularly on the inorganic layer structure and between a first portion and a second portion of the barrier layer, the temporary structures being particularly printing inks. Such temporary structures are useful for forming discontinuous barrier layers, such as two or more separated barrier layer portions (see, for example...). Figures 13A to 13L This is particularly effective for [the purpose of] [the application of] [the method ...

[0083] In one embodiment, the method further includes removing a portion of the main surface of the inorganic layer structure to provide a recess, particularly by drilling and / or etching (e.g., etching or laser-etching). In another embodiment, the method includes distributing a barrier layer at least partially within the recess, particularly by sputtering (as a seed layer) and / or by plating. This provides the advantage that efficient and established component carrier manufacturing techniques can be directly applied to form the recess and / or the barrier layer.

[0084] In one embodiment, the component carrier is configured as one of a printed circuit board, a substrate (particularly an IC substrate), and an interposer.

[0085] In the context of this application, the term "printed circuit board" (PCB) can specifically refer to a plate-shaped component carrier formed by laminating multiple electrically conductive layer structures and multiple electrically insulating layer structures, for example, by applying pressure and / or providing heat. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, while the electrically insulating layer structures may include resin and / or glass fiber, so-called prepreg, or FR4 material. The various electrically conductive layer structures can be connected to each other in a desired manner by forming holes through the laminate, for example, by laser drilling or mechanical drilling, and partially or completely filling the holes with an electrically conductive material (particularly copper), thereby forming vias or any other through-hole connections. The filled holes connect the entire stack (extending through multiple layers or the entire stack as through-hole connections), or the filled holes connect at least two electrically conductive layers, i.e., so-called vias. Similarly, optical interconnects can be formed through the various layers of the stack to receive electro-optical circuit boards (EOCBs). Printed circuit boards (PCBs) are typically configured to house one or more components on one or both opposite surfaces of a board-shaped PCB. The one or more components can be soldered to their respective main surfaces. The dielectric portions of the PCB may include resin with reinforcing fibers (such as glass fiber).

[0086] In the context of this application, the term "substrate" can specifically refer to a small component carrier, particularly an IC substrate. An IC substrate can be a relatively small component carrier relative to a PCB, on which one or more components can be mounted, and which can serve as a connection medium between one or more chips and another PCB. For example, an IC substrate can have approximately the same dimensions as the components (particularly electronic components) to be mounted thereon (e.g., in the case of a chip-scale package (CSP)). More specifically, an IC substrate can be understood as a carrier for electrical connections or electrical networks, and a component carrier with a relatively high density of lateral and / or vertically arranged connectors, comparable to a printed circuit board (PCB). Lateral connectors are, for example, conductive paths, while vertical connectors can be, for example, drilled holes. These lateral and / or vertical connectors can be particularly arranged within the IC substrate and can be used to provide electrical, thermal, and / or mechanical connections between accommodated or unaccommodated components (e.g., bare wafers), particularly IC chips, and printed circuit boards or intermediate printed circuit boards.

[0087] In the context of this application, the term "substrate" specifically facilitates electrical connectivity and / or heat dissipation and / or provides mechanical strength. Therefore, the term "substrate" is specifically used as a synonym for "IC substrate" in the context of this application. It must be noted that the term "substrate" should not be confused with the term "substrate" in particular, as "substrate" is generally used in the context of wafers, where "substrate" typically refers to a substrate material used as a base material in wafer fabrication, on which devices or circuits are built, and on which the base material forms a foundation layer supporting the electronic or photonic structures integrated into the wafer. This is not the meaning of "substrate" in the context of this application.

[0088] The substrate or interlayer may include or be composed of at least one of the following: glass; silicon (Si) and / or a photosensitive or dry-etchable organic material, such as an epoxy-based laminate (e.g., an epoxy-based laminate film); or a polymer compound (which may or may not include photosensitive and / or thermosensitive molecules), such as polyimide or polybenzoxazole.

[0089] In embodiments, at least one electrically insulating layer structure comprises at least one of the following: resins or polymers, such as epoxy resins, cyanate ester resins, benzocyclobutene resins; melamine derivatives, polybenzoxazole (PBO), bismaleimide triazine resins; polyphenylene derivatives (e.g., based on polyphenylene ether, PPE), polyimide (PI), polyamide (PA), liquid crystal polymers (LCP), polytetrafluoroethylene (PTFE), bisbenzocyclobutane (BCB), and / or combinations thereof. Reinforcing structures made of, for example, glass (multilayer glass)—such as meshes, fibers, spheres, or other types of filler particles—can also be used to form composites. The semi-cured resin combined with the reinforcing agent, such as fibers impregnated with the aforementioned resins, is called a prepreg. These prepregs are typically named according to their properties, such as FR4 or FR5, which describe their flame-retardant properties. While prepregs, particularly FR4, are generally preferred for rigid PCBs, other materials, particularly epoxy-based laminates (e.g., epoxy-based films) or photosensitive dielectrics, can also be used. For high-frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and / or cyanate resins are preferred. In addition to these polymers, low-temperature co-fired ceramics (LTCC) or other low, very low, or ultra-low DK materials can be used as electrical insulation structures in component carriers.

[0090] In an embodiment, at least one electrically conductive layer structure comprises at least one of the following: copper, aluminum, nickel, silver, gold, palladium, tungsten, titanium, and magnesium. While copper is generally preferred, other materials or their coating schemes, particularly those coated with superconducting materials or conductive polymers, are also possible, such as graphene or poly(3,4-ethylenedioxythiophene) (PEDOT).

[0091] At least one additional component (particularly an embedded component) that can be surface-mounted on and / or embedded in a component carrier can be selected from the following: non-electrically conductive inlays, electrically conductive inlays (e.g., metallic inlays, preferably copper or aluminum), heat transfer units (e.g., heat pipes), optical guiding elements (e.g., optical waveguides or optical conductor connectors), electronic components, or combinations thereof. The inlay can be, for example, a metal block (IMS inlay) with or without an insulating material coating, which can be surface-mounted to facilitate heat dissipation. Suitable materials are defined by their thermal conductivity, which should be at least 2 W / mK. Such materials are typically based on, but not limited to, metals, metal oxides, and / or ceramics, such as copper, alumina (Al₂O₃), or aluminum nitride (AlN). Other geometries with increased surface area are also frequently used to improve heat exchange capacity. In addition, components can be active electronic components (having at least one implemented pn junction), passive electronic components (such as resistors, inductors, or capacitors), electronic chips, storage devices (such as DRAM or other data memories), filters, integrated circuits (such as field-programmable gate arrays (FPGAs), programmable array logic (PALs), general-purpose array logic (GALs), and complex programmable logic devices (CPLDs)), signal processing components, power management components (such as field-effect transistors (FETs), metal-oxide-semiconductor field-effect transistors (MOSFETs), complementary metal-oxide-semiconductor (CMOS) transistors, junction field-effect transistors (JFETs), or insulators. Gate field-effect transistors (IGFETs), all based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (InGaAs), and / or any other suitable inorganic compound, are used in optoelectronic interface elements, light-emitting diodes, optical connectors, voltage converters (e.g., DC / DC or AC / DC converters), cryptographic components, transmitters and / or receivers, electromechanical transducers, sensors, actuators, microelectromechanical systems (MEMS), microprocessors, capacitors, resistors, inductors, batteries, switches, cameras, antennas, logic chips, and energy harvesting units. However, other components can be surface-mounted onto component carriers. For example, magnetic elements can be used as components. Such magnetic elements can be permanent magnets (e.g., ferromagnetic, antiferromagnetic, multiferroic, or ferrimagnetic elements, such as ferrite cores) or paramagnetic elements. However, the component can also be an IC substrate, an interposer, or another component carrier, such as a board-in-board configuration. Components can be surface-mounted onto component carriers. In addition, other components, especially those that generate and emit electromagnetic radiation and / or are sensitive to electromagnetic radiation propagating from the environment, may also be used as components.

[0092] In one embodiment, the component carrier is a laminated component carrier. In this embodiment, the component carrier is a multilayer composite structure that is stacked and connected together by applying pressure and / or heat.

[0093] After the internal layer structure of the component carrier has been treated, one or more additional electrically insulating and / or electrically conductive layer structures can be used (particularly by lamination) to symmetrically or asymmetrically cover one or both opposing main surfaces of the treated layer structure. In other words, lamination can continue until the desired number of layers is obtained.

[0094] After the stacked structure of the electrical insulation layer and the electrical conductivity layer is formed, the surface of the obtained layer structure or component carrier can be treated.

[0095] Specifically, regarding surface treatment, an electrically insulating solder mask can be applied to one or both opposing main surfaces of the laminate or component carrier. For example, such a solder mask can be formed across the entire main surface and subsequently patterned to expose one or more electrically conductive surface portions that will be used to electrically connect the component carrier to electronic peripherals. The surface portions of the component carrier still covered by the solder mask, particularly those containing copper, can be protected against oxidation or corrosion.

[0096] Regarding surface treatment, a surface treatment portion can be selectively applied to the exposed electrically conductive surface portion of the component carrier. This surface treatment portion can be an electrically conductive covering material on the exposed electrically conductive layer structure (e.g., pads, conductive traces, etc., particularly including or made of copper) on the surface of the component carrier. If this exposed electrically conductive layer structure is not protected, the exposed electrically conductive component carrier material (especially copper) may oxidize, resulting in lower reliability of the component carrier. The surface treatment portion can then be formed as a joint between, for example, a surface-mount component and the component carrier. The surface treatment portion functions to protect the exposed electrically conductive layer structure (especially copper circuitry) and enables a connection process with one or more components, for example, by soldering. Examples of suitable materials for the surface treatment portion are organic solderable corrosion inhibitors (OSP), electroless nickel immersion gold (ENIG), electroless nickel immersion palladium immersion gold (ENIPIG), gold (especially hard gold), electroless tin, nickel-gold, nickel-palladium, etc.

[0097] The above-defined aspects and other aspects of the present invention will become apparent from the examples of embodiments which are described below, and will be explained with reference to these examples of embodiments. Attached Figure Description

[0098] Figure 1A component carrier with a continuous barrier layer is shown according to an exemplary embodiment of the present invention.

[0099] Figure 2 A component carrier with a discontinuous barrier layer is shown according to an exemplary embodiment of the present invention.

[0100] Figure 3 A standard circuit board is shown.

[0101] Figure 4 A detailed view of a cavity according to an exemplary embodiment of the present invention is shown.

[0102] Figure 5 The conventional cavity is shown in detail.

[0103] Figure 6A , Figure 6B , Figure 7 and Figure 8 Details of the component carrier according to an exemplary embodiment of the present invention are shown respectively.

[0104] Figure 9 , Figure 10A , Figure 10B , Figure 10C , Figure 11A and Figure 11B The configurations of the barrier layers according to exemplary embodiments of the present invention are shown respectively.

[0105] Figures 12A to 12L A method for manufacturing a component carrier having a continuous barrier layer according to an exemplary embodiment of the present invention is shown.

[0106] Figures 13A to 13L A method for manufacturing a component carrier having a discontinuous barrier layer according to an exemplary embodiment of the present invention is shown.

[0107] Figures 14A to 14L The standard manufacturing process is shown. Detailed Implementation

[0108] Figure 1A component carrier 100 according to an exemplary embodiment of the present invention is shown. The component carrier 100 has a stack 101 having at least one electrically conductive layer structure 104 and at least one electrically insulating layer structure 102, 140. An inorganic layer structure 110 having a flat main surface 111 is also part of the stack 101. In the stack 101, a cavity 120 is defined by a bottom 121 and sidewalls 122. At least one barrier layer 130 is at least partially disposed on or in the main surface 111 of the inorganic layer structure 110 and is exposed at the bottom 121 of the cavity 120.

[0109] A barrier layer 130 is embedded in a recess 116 of the inorganic layer structure 110, wherein the recess 116 has a height of, for example, 10 μm or less. In the example, the recess 116 may have a height in the range of 0.1 μm to 10 μm. In this example, the barrier layer 130 is constructed as a metallic layer, particularly as a copper layer or a copper and titanium layer. In this example, the barrier layer 130 is also a continuous single layer, the thickness of which is less than the thickness of the electrically conductive layer structure 104 of the stack 101, for example, the continuous single layer is constructed as a seed layer. The barrier layer 130, as a continuous layer, covers the entire bottom 121 of the cavity 120. The cavity 120 is formed in the electrically insulating layer structures 102, 140. Although in one example, the recess 116 can be understood as part of the cavity 120, in another example, the cavity 120 may be defined only within the electrically insulating layer structures 102, 140.

[0110] Component 150 (e.g., an active or passive component) is at least partially disposed within cavity 120 and directly disposed on barrier layer 130. Alternatively, at least two components 150 may be at least partially disposed within cavity 120 and directly disposed on barrier layer 130. Component 150 is further encapsulated in the electrically insulating material of electrically insulating layers 102, 140 and encapsulation layer structure 160.

[0111] In the example, the electrical insulation layer structures 102, 140 and the encapsulation layer structure 160 may comprise organic polymer materials, such as epoxy resin. Preferably, the encapsulation layer structure 160 may be fiber-free, while the electrical insulation layer structures 102, 140 may comprise glass fiber. The component 150 is attached to the bottom 121 of the cavity 120 by an adhesive portion 151, specifically, the adhesive portion being an adhesive layer that (partially) covers the bottom 121 of the cavity 120.

[0112] In this example, the adhesive portion 151 may be attached to the component 150 and disposed together with the component 150 in the cavity 120. Alternatively, the adhesive portion 151 may be applied via a 3D printing process and / or a dispensing process. The adhesive portion 151 may include an organic adhesive material, such as glue.

[0113] The material of the encapsulation layer structure 160 is in contact with the components 150 (sidewalls and top wall), the sidewall 122 of the cavity 120, the bottom 121 of the cavity 120, the adhesive portion 151, and the barrier layer 130. An electrical insulating layer 140 is disposed on the inorganic layer structure 110, wherein the cavity 120 is at least partially formed in the electrical insulating layer 140. The cavity 120 extends in the electrical insulating layer 140 above the main surface 111 of the inorganic layer structure 110. The encapsulation layer structure 160 defines a layer structure on top of the electrical insulating layer 140 in the thickness direction Z. In other words, the electrical insulating layer structure 140 can be disposed between the encapsulation layer structure 160 and the inorganic layer structure 110.

[0114] A surface layer 170 (e.g., solder resist and / or surface treatment) is disposed on top of the encapsulation layer structure 160. A redistribution layer structure 180 is formed in the encapsulation layer structure 160 and the surface layer 170. In this example, the redistribution layer structure 180 is implemented via an electrical via connection 182, which is in particular a stacked buried via. Here, an electrically conductive layer structure 104 is disposed between electrically insulating layer structures 102. In this example, the via connection 182 connects the corresponding electrically conductive layer structures 104 vertically. In this way, electrical contacts located on top of the embedded component 150 can be electrically connected via the via connection 182 to electrical connections (here, solder balls) located on top (outer surface) of the stack 101. Therefore, electrical connections or wiring of the component 150 are further distributed in the RDL 180 through the vias 182 connected to the component 150. Furthermore, the electrical through-connection 115 (through-hole) extending through the inorganic layer structure 110 is further connected to the redistribution layer structure 180.

[0115] In the example, similar to a stacked component made of a multilayer structure, the redistribution layer structure 180 includes electrically insulating layer structures 102, 140 and / or electrically conductive layer structure 104. In other words, a multilayer component with an internal wiring structure. The redistribution structure can serve as an electrical junction between a larger electrically conductive structure (such as a PCB characterized on one side of an inorganic carrier) and a smaller electrically conductive structure of a surface-mount component.

[0116] Figure 2 An exemplary embodiment of the present invention is shown. Figure 1 The component carrier is similar to component carrier 100. However, Figure 2The component carrier 100 includes a barrier layer 130, which is configured as a discontinuous layer comprising at least two spaced-apart barrier layer portions 130a and 130b. The at least two barrier layer portions 130a and 130b cover two or more edge portions 123 of the bottom 121 of the cavity 120. Therefore, the barrier layer 130 only covers the edge portions of the cavity 120 (shown here as the left and right sides). Between the barrier layer portions 130a and 130b, the component 150 (particularly the adhesive layer 151) is in direct contact with the inorganic layer structure 110. Furthermore, in this example, the barrier layer 130 is configured as a multilayer component, which here comprises two (or more) layers.

[0117] Figure 4 Details of a component carrier 100 according to an exemplary embodiment of the present invention are shown. The inorganic layer structure 110 includes a recess 116 located in a main surface 111. A barrier layer 130 is arranged on top of the inorganic layer structure 110 and in the recess 116. In this example, the recess 116 has a height of 10 μm, while the projected distance of the slope of the sidewall is approximately 30 μm. In this embodiment, the barrier layer 130 may also cover at least a portion of the main surface 111 of the inorganic layer structure 110.

[0118] Figure 6A Details of a component carrier 100 according to an exemplary embodiment are depicted. An inorganic layer structure 110 has a recess 116 located in a main surface 111, and a cavity 120 is formed in an electrically insulating layer 140. As can be seen, the cavity 120 includes the recess 116. A barrier layer 130 is at least partially disposed in the main surface 111 (recess 116) of the inorganic layer structure 110. A first sidewall portion 122a of the electrically insulating layer 140 and a third sidewall portion 122b of the recess 116 have different slopes relative to the thickness direction (along z), specifically inclined and straight slopes. In other words, the first sidewall portion 122a is slightly offset relative to the third sidewall portion 122b (in a direction away from the recess 116). The recess 116 is filled by a continuous barrier layer 130. In this example, the barrier layer 130 only partially fills the recess 116 in the vertical direction. However, in one part, the barrier layer 130, having protrusions starting from the surface of the barrier layer, is flush with the main surface 111 of the inorganic layer structure 110, while in another part, the barrier layer 130 is not flush with the main surface 111; in particular, the barrier layer 130 is lower than the main surface 111. In this example, the barrier layer 130 also includes sloping sidewalls.

[0119] Figure 6B Details of a component carrier 100 according to an exemplary embodiment are depicted. This example is related to... Figure 6AThe example is similar; however, the first sidewall portion 122a is offset toward the recess 116, and the first sidewall portion 122a has the same slope as the second sidewall portion 122c of the barrier layer 130. Therefore, the first sidewall portion 122a and the second sidewall portion 122c together form a continuous sidewall, and thus the first sidewall portion 122a and the second sidewall portion are aligned. The electrical insulating layer 140 (and the first sidewall portion 122a) overlaps with / covers the inorganic layer structure 110. In this example, the barrier layer 130 is in direct contact with the electrical insulating layer structure 140, specifically the first sidewall portion 122a of the insulating layer structure is in direct contact with the second sidewall portion 122c.

[0120] Figure 7 Details of a component carrier 100 according to another exemplary embodiment are depicted. The barrier layer 130 is arranged in a discontinuous manner (with...). Figure 2 Compared to the cavity 120, the component 150 is higher (thicker) and the material of the encapsulation layer structure 160 fills the space between the sidewalls of the electrical insulating layer 140, the sidewalls (and top) of the component 150, and the top of the barrier layer 130 (and the sidewalls of the adhesive layer 151). An electrical pad / via connection 182 is arranged on the top of the component 150 (to... Figure 2 compared to).

[0121] Figure 8 Further details of a component carrier 100 according to another exemplary embodiment are shown. This example is related to... Figure 6B The example is similar; however, a recessed portion 125 is formed in the electrically insulating layer 140 (first sidewall portion 122a) located on top of the barrier layer 130 and the main surface 111. At least a portion of the recessed portion 125 is arranged parallel to the bottom of the cavity. In another example (not shown), the recessed portion 125 is at least partially filled with the material of the encapsulation layer structure. In this example, the main surface 111 and the upper surface of the barrier layer 130 are flush. Furthermore, the recessed portion 125 extends along the main surface 111 in a direction perpendicular to the thickness direction (along z).

[0122] Figure 9 A barrier layer 130 is shown at the bottom 121 of cavity 120 and in recess 116 within inorganic layer structure 110, according to an exemplary embodiment of the invention. In this example, barrier layer 130 has a cross-section where the upper portion is wider than the lower portion. It can also be seen that recess 116 has tapered sidewalls, while the sidewalls of cavity 120 in electrical insulating layer structure 140 are straight. The lower edge of the sidewall located in electrical insulating layer structure 140 is aligned (flush) with the top edge of recess 116 without offset.

[0123] Figure 10AA top view of the component carrier 100 is shown, wherein a continuous barrier layer 130 covers the entire side portion and edge portion 123 of the cavity 120 located at the bottom 121. The covered edge portion 123 thereby forms a barrier layer frame 135.

[0124] Figure 10B A top view of a component carrier 100 with a discontinuous barrier layer 130 is shown, the discontinuous barrier layer 130 including at least two spaced-apart barrier layer portions 130a and 130b, which respectively cover opposing side portions 123 in cavity 120.

[0125] Figure 10C A top view of the component carrier 100 is shown, in which a continuous barrier layer 130 covers the entire bottom 121 of the cavity 120. Therefore, the full pattern of the barrier layer provides large tolerances for cavity formation during manufacturing. This allows for a larger window and easier control over the manufacturing process.

[0126] Figure 11A A top view of a component carrier 100 with a discontinuous barrier layer 130 is shown. The discontinuous barrier layer 130 includes four spaced-apart barrier layer portions 130a, 130b, with one barrier layer portion 130a, 130b in each edge portion 124 (and one barrier layer portion 130a, 130b in each corner).

[0127] Figure 11B A top view of a component carrier 100 with a discontinuous barrier layer 130 is shown, the discontinuous barrier layer 130 including a plurality of isolated barrier layer portions 130a and 130b distributed on the bottom 121 of the cavity 120.

[0128] Figures 12A to 12L The process of manufacturing a component carrier 100 having a continuous barrier layer 130 according to an exemplary embodiment of the present invention is shown.

[0129] Figure 12A Provides an inorganic layer structure 110 with a main surface 111.

[0130] Figure 12B : A through hole 105 (a through hole through the glass) is formed in the inorganic layer structure 110. In particular, the through hole 105 is formed in the inorganic layer structure 110 (preferably made of glass) by laser drilling to change the material properties and the bonding chains of the material; then the through hole can be formed in the laser-induced area by etching away the material from above and from below.

[0131] Figure 12CA protective film 145, which may be a photosensitive material, is provided at the top and bottom of the inorganic layer structure 110. Openings are provided in the protective film 145 for forming recesses 116 by exposure, etching, or laser.

[0132] Figure 12D A recess 116 is formed in the main surface 111 not covered by the protective film 145, for example by laser-induced material modification and then etching away the material. Due to the laser-induced processing and etching, the bottom wall and sidewalls of the recess 116 can therefore have a roughness different from that of the main surface.

[0133] Figure 12E Protective film 145 has been removed (peeled).

[0134] Figure 12F The through-hole 105, the main surface of the inorganic layer structure 110, and the recess 116 are filled / covered by sputtering or electroless plating of a seed layer and / or barrier layer on the inner surface of the through-hole and the recess, and on the outer surface of the inorganic layer structure, followed by electroplating with a metal, such as copper and / or other metals. Thus, a through-hole 115 penetrating the glass and an electrically conductive material layer 136 are formed.

[0135] Figure 12G For example, the electrically conductive material layer 136 can be removed by grinding to leave only the barrier layer 130 in the recess 116.

[0136] Figure 12H An electrically insulating layer 140 is formed (laminated) on top of the inorganic layer structure 110. The electrically insulating layer may be a liquid material coated on the inorganic layer structure 110. The electrically insulating layer may be ABF or other resins or photosensitive dielectric materials.

[0137] Figure 12I Via 104 is formed by passing through the electrical insulation layer 140.

[0138] Figure 12JA cavity 120 is formed in the electrically insulating layer 140, for example by laser, exposure, or etching, thereby exposing the barrier layer 130 located at the bottom of the cavity 120. An undercut may be formed between the barrier layer 130 and the electrically insulating layer 140. Furthermore, different roughnesses can be provided on the edge regions of the barrier layer 130 by laser drilling that ablates the barrier layer 130 to which light reaches. Reflection of the laser beam may also ablate the surfaces of the sidewalls of the electrically insulating layer structure 140; this means that the roughness of the cavity sidewalls in the electrically insulating layer structure 140 can differ from the surface roughness of the electrically insulating layer structure 140. If the electrically conductive layer 104 is formed of a photosensitive dielectric material, the cavity 120 can be formed by exposure, and there may be no undercut or different roughnesses in the barrier layer 130.

[0139] Figure 12K Component 150 is placed in cavity 120 and onto barrier layer 130 (chip bonding).

[0140] Figure 12L Further layering is performed to provide, for example, for... Figure 1 The described component is the carrier 100.

[0141] Figures 13A to 13L The process of manufacturing a component carrier 100 having a discontinuous barrier layer 130 according to an exemplary embodiment of the present invention is shown.

[0142] Figure 13A : Executed with Figures 12A to 12G The process steps are the same as those in the process. However, instead of forming a continuous barrier layer 130, spaced-apart barrier layer portions 130a, 130b are formed in the corresponding recesses in the main surface 111 of the inorganic layer structure 110.

[0143] Figure 13B A temporary structure 146 (e.g., loose ink printing) is applied to the isolated barrier layer portions 130a, 130b.

[0144] Figure 13C : To modify the temporary structure 146 (e.g., using a laser).

[0145] Figure 13D An electrically insulating layer 140 is formed (laminated) on top of the inorganic layer structure 110.

[0146] Figure 13E Via 104 is formed by passing through the electrical insulation layer 140.

[0147] Figure 13FThe cavity 120 is formed by first cutting into the electrical insulating layer 140, and the cavity 120 can be formed as follows: Figure 12J As shown.

[0148] Figure 13G The cavity 120 is further formed by removing the portion of the electrical insulation layer 140 located on top of the temporary structure 146.

[0149] Figure 13H Cavity 120 is now provided with barrier layer portions 130a, 130b exposed at the bottom of cavity 120.

[0150] Figure 13I Component 150 is placed in cavity 120 and onto barrier layer portions 130a, 130b (chip bonding).

[0151] Figure 13J The embedded component 150 is encapsulated in the cavity 120 by the encapsulation material 160.

[0152] Figure 13K The additional layers are deposited using the via connection 182.

[0153] Figure 13L Further layering is performed to provide, for example, for... Figure 2 The described component is the carrier 100.

[0154] Figure Labels

[0155] 100 component carriers

[0156] 101 Stacked Components

[0157] 102 Electrical insulation layer structure

[0158] 104 Electrically Conductive Layer Structure

[0159] 105 holes

[0160] 110 Inorganic layer structure

[0161] 111 First Primary Surface

[0162] 112 Second Main Surface

[0163] 115 Electrical connection section

[0164] 116. A recess or part of a cavity in an inorganic layer structure.

[0165] 120 chambers

[0166] Bottom of cavity 121

[0167] 122 sidewalls

[0168] 122a First sidewall portion, insulating layer structure

[0169] 122b Third sidewall portion, inorganic layer structure

[0170] 122c Second sidewall portion, barrier layer

[0171] 123 Side section

[0172] 124 Edge section

[0173] 125 Recessed portion

[0174] 126 Stepped sections

[0175] 130 barrier layer

[0176] 130a / b Barrier Layer Section

[0177] 135 Barrier Layer Frame

[0178] 136 Electrically Conductive Materials

[0179] 140 Electrical insulation layer

[0180] 145 Protective Film

[0181] 146 Temporary Structure

[0182] 150 parts

[0183] 151 Adhesive Part

[0184] 160 Packaging material, packaging layer structure

[0185] 170 Outer surface layer, solder resist / surface treatment section

[0186] 180 Redistribution Layer Structure

[0187] 181 Electrical connection part

[0188] 182 Through-hole connection.

Claims

1. A component carrier (100) having stacked members (101), wherein, The stacked component (101) includes: At least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102, 140); An inorganic layer structure (110) having a main surface (111), particularly, the inorganic layer structure (110) having a flat main surface (111); A cavity (120) located in the stack (101), the cavity (120) being defined by a bottom (121) and a sidewall (122); and At least one barrier layer (130) is disposed at least partially in or on the main surface (111) of the inorganic layer structure (110), and the barrier layer (130) is exposed at the bottom (121) of the cavity (120).

2. The component carrier (100) according to claim 1, in, The barrier layer (130) is embedded in the recess (116) of the inorganic layer structure (110). Specifically, the recess (116) has a height of 10 μm or less.

3. The component carrier (100) according to claim 1 or 2, in, The barrier layer (130) is configured as a metal layer and / or an electrically conductive structure. Specifically, the barrier layer (130) is configured as a copper layer and / or a titanium layer.

4. The component carrier (100) according to any one of the preceding claims, in, The barrier layer (130) may be a single layer or multiple layers. Specifically, the thickness of a single layer or the thickness of one of the plurality of layers is less than the thickness of the electrically conductive layer structure (104) of the stack (101). More specifically, the barrier layer (130) is a seed layer.

5. The component carrier (100) according to any one of the preceding claims, in, The barrier layer (130) is a continuous layer, and in particular, the barrier layer (130) covers the entire bottom (121) of the cavity (120); or The barrier layer (130) is a discontinuous layer, and in particular, the barrier layer (130) includes at least one of the following features: At least two barrier layer sections (130a, 130b) are isolated; The at least two barrier layer portions (130a, 130b) cover two or more edge portions (123) of the bottom (121) of the cavity (120); The at least two barrier layer portions (130a, 130b) cover two or more side edge portions (124) of the bottom (121) of the cavity (120); The barrier layer (120) covers only the edge portion of the cavity (120), and in particular, the barrier layer (120) covers only the entire edge portion of the cavity (120); Wherein, at least two portions (130a, 130b) of the barrier layer (130) are distributed on the bottom (121) of the cavity (120); The barrier layer (120) is constructed as a frame-type electrical conductive structure (135), and in particular, the frame-type electrical conductive structure (135) is grounded / can be grounded.

6. The component carrier (100) according to any one of the preceding claims, in, The barrier layer (130) includes a protrusion that defines a portion of the sidewall (122) of the cavity, and / or the protrusion protrudes from another portion of the barrier layer (130), particularly from a flat portion of the barrier layer (130). And / or The barrier layer (120) is electrically connected to or can be electrically connected to at least one electrically conductive layer structure (104) of the stack (101). In particular, the barrier layer (120) is electrically connected to or can be electrically connected to at least one electrically conductive layer structure (104) of the stack (101) through an electrically conductive through-connection or via an electrically conductive through-connection. And / or The barrier layer (120) is connected to the inorganic layer structure (110) at the same horizontal height as the main surface (111); And / or The barrier layer (120) extends beyond the bottom (121) of the cavity (120) in the horizontal direction (x, y).

7. The component carrier (100) according to any one of the preceding claims, wherein the component carrier (100) further comprises: A component (150) is at least partially disposed in the cavity (120) and at least partially disposed on the barrier layer (130), particularly, the component (150) is at least partially disposed directly on the barrier layer (130). Specifically, the component (150) is at least partially encapsulated in an electrically insulating material (102, 140, 160).

8. The component carrier (100) according to claim 7, in, The component (150) is attached to the bottom (121) of the cavity (120) by an adhesive portion (151), specifically, the adhesive portion (151) is an adhesive layer, the adhesive portion (151) is disposed on the bottom (121) of the cavity, specifically, the adhesive portion (151) covers the bottom (121) of the cavity (120), and / or the adhesive portion (151) is bonded to at least a portion of the sidewall (122) of the cavity (120); or The component (150) is attached to the bottom (121) of the cavity (120) by sintering on the barrier layer (130).

9. The component carrier (100) according to any one of the preceding claims, wherein the component carrier (100) further comprises: An encapsulation layer structure (160) is in contact with at least one of the following: the component (150); the sidewall (122) of the cavity (120), particularly the side and / or top side; the bottom (121) of the cavity (120); the adhesive portion (151); the barrier layer (130); the inorganic layer structure (110), Specifically, the encapsulation layer structure (160) defines a layer structure on top of the main surface (111) of the inorganic layer structure (110).

10. The component carrier (100) according to any one of the preceding claims, wherein the component carrier (100) further comprises: An electrical insulating layer (140), specifically, the electrical insulating layer (140) is an electrical insulating layer structure (102) of the stack (101), the electrical insulating layer (140) being disposed on the inorganic layer structure (110), wherein the cavity (120) is at least partially formed in the electrical insulating layer (140). Specifically, the cavity (120) extends within the electrical insulating layer (140) and above the main surface (111) of the inorganic layer structure (110).

11. The component carrier (100) according to any one of the preceding claims, wherein the component carrier (100) further comprises: A redistribution layer structure (180) is arranged on the inorganic layer structure (110) and / or on the component (150).

12. The component carrier (100) according to any one of the preceding claims, in, The cavity (120) extends toward one of the main surfaces of the outermost layer of the stack (101); and / or The cavity (120) extends vertically beyond multiple layer structures (102, 104) of the stack (101), or the cavity (120) extends vertically beyond only one layer structure of the stack (101). In particular, the cavity (120) extends vertically beyond only one electrically insulating layer structure of the stack (101).

13. The component carrier (100) according to any one of the preceding claims, in, The sidewall (122) is defined by one of the following: only the electrical insulating layer (140); the electrical insulating layer (140) and the inorganic layer structure (110); the electrical insulating layer (140); the barrier layer (130).

14. The component carrier (100) according to any one of the preceding claims, in, The cavity (120) includes at least two sidewall portions (122a, 122b, 122c); in particular, Wherein, the first sidewall portion (122a) is formed in the electrically insulating layer structure (102, 140); and / or The second sidewall portion (122c) is formed in the electrically conductive layer structure (104) or is formed by the barrier layer (130).

15. The component carrier (100) according to any one of the preceding claims, in, The third sidewall portion (122b) is formed by the inorganic layer structure (110); In particular, Wherein, the first sidewall portion (122a) and / or the third sidewall portion (122b) are recessed relative to the vertical direction (z) via a recessed portion (125); and / or The first sidewall portion (122a) and the second sidewall portion (122c) or the third sidewall portion (122b) have different inclinations.

16. The component carrier (100) according to any one of the preceding claims, in, The cavity (120) extends through the barrier layer (130), Specifically, at least a portion of the sidewall (122) of the cavity (120) and / or at least a portion of the bottom (121) is defined by the barrier layer (130).

17. The component carrier (100) according to any one of the preceding claims, in, The height of the sidewall (122) of the cavity (120) is greater than the thickness of the electrically conductive layer structure (104) of the stack (101). In particular, the height of the sidewall (122) of the cavity (120) is 1.5 to 3 times the thickness of the electrically conductive layer structure (104) of the stack (101). In particular, the height of the recess (116) in the inorganic layer structure (110) is greater than the thickness of the electrically conductive layer structure (104) of the stack (101). In particular, the height of the recess (116) in the inorganic layer structure (110) is 1.5 to 3 times the thickness of the electrically conductive layer structure (104) of the stack (101); and / or The height of the sidewall (122) of the cavity (120) is 10 μm or less, and in particular, the height of the recess (116) in the inorganic layer structure (110) is 10 μm or less.

18. The component carrier (100) according to any one of the preceding claims, in, The sidewalls of the recess (116) in the inorganic layer structure (110) include a slope width of 30 μm or less; specifically, the sidewalls of the recess (116) in the inorganic layer structure (110) include a slope width of 25 μm or less; and / or The sidewalls of the recess (116) in the inorganic layer structure (110) are substantially straight.

19. The component carrier (100) according to any one of the preceding claims, wherein the component carrier (100) further comprises: A stepped region (126) located at the junction of the electrical insulating layer (140) and the inorganic layer structure (110).

20. A method for manufacturing a component carrier (100), the method comprising: An inorganic layer structure (110) with a main surface (111) is provided; At least one barrier layer (130) is disposed at least partially in the main surface (111) of the inorganic layer structure (110), or at least one barrier layer (130) is disposed at least partially on the main surface (111) of the inorganic layer structure (110). An electrically insulating layer structure (102) and an electrically conductive layer structure (104) are formed on the main surface (111) of the inorganic layer structure (110) to provide a stack (101); and A cavity (120) is formed in the stack (101), the cavity (120) being defined by a bottom (121) and a sidewall (122), wherein the barrier layer (130) is disposed at the bottom (121) of the cavity (120).

21. The method according to claim 20, wherein, Forming the cavity (120) includes: Laser drilling or mechanical drilling, particularly laser drilling using a CO2 laser, and particularly mechanical drilling using milling or grinding; and / or The formation of the cavity is blocked based on the effect of the blocking layer (130), and in particular, the formation of the cavity is blocked based on the effect of the blocking layer (130).

22. The method according to claim 20 or 21, further comprising: The component (150) is placed in the cavity (120) and the component (150) is placed on the barrier layer (130), in particular, the component (150) is placed directly on the barrier layer (130); And / or The component (150) is encapsulated in the cavity (120), and in particular, the component (150) is encapsulated in the cavity (120) by lamination; And / or A redistribution layer structure (180) is formed on the top of the inorganic layer structure (110) and / or on the top of the component (150); And / or A temporary structure (146) is provided on the barrier layer (130, 130a, 130b), and in particular, the temporary structure (146) is provided on the inorganic layer structure (110), and in particular, the temporary structure (146) is printing ink; And / or A portion of the main surface (111) of the inorganic layer structure (110) is removed to provide a recess (116), specifically by etching to remove a portion of the main surface (111) of the inorganic layer structure (110) to provide a recess (116), and a barrier layer (130) is at least partially disposed in the recess (116), specifically by plating to provide a barrier layer (130) at least partially disposed in the recess (116).

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