A method for fabricating PCBs with embedded ceramic blocks
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-28
- Publication Date
- 2026-08-14
AI Technical Summary
本发明的优点在于:本发明的方法工艺实现了埋陶瓷镭射盲技术在PCB上的实现,可以为客户提供一种AI设计中高功率线路板集成化设计,BGA平整度可以达到≤50μm,在散热方面的需求,同时陶瓷基上增加镭射盲实现跨层导通,设计更加集成化。陶瓷基板的DK/Df及膨胀系数,表现优于目前的普遍使用的高速材料,为AI的在PCB设计方面提供了有效可靠的方案。
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Figure CN122579466A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of printed circuit board (PCB) manufacturing technology, and more specifically, to a processing method for a PCB with a built-in ceramic block for high-frequency, high-speed mixed voltage, and with laser blind conduction on the ceramic block to other layer signals. This method is applicable to communication base station RF modules, high-end server motherboards, automotive electronic devices, etc., addressing heat dissipation issues in high-power scenarios while incorporating a laser blind embedding solution on the ceramic block. It achieves a better balance between heat dissipation, cost, and design flexibility. Based on the characteristics of the materials and processing design, the embedded ceramic block laser blind design addresses the current dual challenges of integration and high power, better meeting the design requirements of AI for PCBs. Background Technology
[0002] Against the backdrop of rapid development in AI technology, PCB design faces unprecedented demands for higher power, higher energy consumption, higher integration, and higher flatness. Ceramic materials exhibit a significantly higher thermal conductivity than ordinary PCB substrates (reducing temperature rise by approximately 42°C over 200–400 mA). Furthermore, copper layers can be sputtered onto the surface of ceramic blocks. If laser-blind vias (i.e., laser-blind holes) can be implemented on these sputtered copper layers, PCB design can become more integrated. This feature offers significant advantages over other metal substrates: insulation resistance and extremely low dielectric loss, ensuring the highest possible purity and stability of signal transmission in the current AI technology context. Based on these requirements, adding laser-blind vias to embedded ceramic technology has become a viable area for technological exploration and research, and is highly likely to become a major future development trend. Summary of the Invention
[0003] The technical problem to be solved by this invention is to address the shortcomings of existing technologies by providing a method for processing PCBs with embedded ceramic blocks. This method aims to overcome the challenges of adding laser-blind designs to PCBs on high-frequency, high-speed mixed-voltage embedded ceramic blocks and the associated processing difficulties. Through innovative ceramic block graphic design and PCB process optimization, the method enables the processing of laser-blind PCBs on embedded ceramic blocks under existing PCB main processes and equipment conditions, fulfilling the requirements of design integration and reliability, and promoting the continuous advancement of high-end electronic manufacturing technology.
[0004] The present invention discloses a method for processing embedded ceramic blocks in PCBs, which includes the following steps: S1. Perform windowing on the FR4 core board and PP sheet of the target size, and simultaneously create the inner layer pattern on the FR4 core board. Select a suitable ceramic block according to the windowing size of the FR4 core board. S2. Pre-stack the FR4 core board and PP sheet after opening the window in sequence; S3. Place the ceramic block into the windowed area of the pre-stacked FR4 core board and PP sheet to obtain the inner core of the PCB board; S4. Perform a pressing process on the inner core of the PCB board; S5. Drill holes and apply copper plating to the inner core of the laminated PCB board, and then fabricate the outermost layer pattern to obtain a semi-finished PCB board with a bottom pad on the ceramic block. S6. After browning and stacking, the PCB semi-finished board is subjected to a second pressing process. S7. Create laser holes on the laminated PCB semi-finished board so that the bottom pad in the laser holes is exposed; S8. The laser holes are filled with copper to make the bottom Pad connected to the outer copper foil on the PCB semi-finished board. S9. Create the outer layer pattern on the PCB semi-finished board obtained in step S8 to obtain the finished PCB board.
[0005] Preferably, in step S1, the window size of the FR4 core board and the PP sheet is 3mil to 6mil larger than the single-side size of the ceramic block; the window of the FR4 core board and the PP sheet is a rectangular window, and the four corners of the rectangular window are all set as arcs with a radius of 0.6mm to 0.8mm.
[0006] Preferably, the ceramic block comprises, from top to bottom, a copper layer, a titanium layer, a ceramic block core, a titanium layer, and a copper layer.
[0007] Preferably, in step 4, after the PCB core is pressed once, 800-1200 grit sandpaper is used to polish the pressed PCB core to remove the glue overflowing from the joint between the ceramic block and the FR4 board in the PCB core.
[0008] Preferably, in step S5, after the PCB semi-finished board is produced, the PCB semi-finished board is immersed in a titanium removal solution for titanium removal treatment.
[0009] Preferably, the immersion time for titanium removal treatment of the PCB semi-finished board is 10s to 30s.
[0010] Preferably, the titanium removal solution contains: 15%–25% hydrogen peroxide, 10%–25% acidic ammonium fluoride, less than 10% sulfuric acid, and the remainder is water.
[0011] Preferably, in step S6, the stacked layer structure of the PCB semi-finished board is as follows: copper foil, PP, PCB semi-finished board, PP, copper foil.
[0012] Preferably, in step S7, the edge of the laminated PCB semi-finished board is first milled, and then laser hole positions are made.
[0013] Beneficial effects The advantages of this invention are as follows: The method and process of this invention realize the application of buried ceramic laser blind technology on PCBs, providing customers with an integrated design for high-power circuit boards in AI design. BGA flatness can reach ≤50μm, meeting heat dissipation requirements. Simultaneously, the addition of laser blinds on the ceramic substrate enables cross-layer conduction, resulting in a more integrated design. The DK / Df ratio and coefficient of thermal expansion of the ceramic substrate outperform currently used high-speed materials, providing an effective and reliable solution for AI in PCB design.
[0014] Furthermore, this method has strong process compatibility and can be seamlessly integrated into the upgrading and transformation of existing PCB production lines. It provides a mature solution for the industry to overcome the key challenges of laser blind design on high-frequency, high-speed mixed-voltage embedded ceramic blocks, and realizes the industry's development needs for greater integration based on the original advantages of embedded ceramic block design. Attached Figure Description
[0015] Figure 1 This is a schematic diagram of the PCB layered structure of the embedded ceramic block of the present invention; Figure 2 This is a schematic diagram of the PCB cross-sectional structure of the embedded ceramic block of the present invention; Figure 3 This is a schematic diagram of the TOP surface, BOT surface, L2 layer, and L7 layer in the embedded ceramic block PCB of the present invention.
[0016] Among them: 1-L1 layer (or TOP surface), 2-L8 layer (or BOT surface), 3-FR4 core board, 4-PP sheet, 5-ceramic block, 6-laser blind. Detailed Implementation
[0017] The present invention will be further described below with reference to embodiments, but this does not constitute any limitation on the present invention. Any limited modifications made by any person within the scope of the claims of the present invention are still within the scope of the claims of the present invention. See Figures 1-3 The present invention discloses a method for processing embedded ceramic blocks in PCBs, the method comprising the following steps: S1. Perform windowing on the FR4 core board 3 and PP sheet 4 of the target size, and simultaneously create the inner layer pattern on the FR4 core board 3; select a suitable ceramic block 5 according to the window size.
[0018] The windowing process involves using a milling machine to create window openings on the FR4 core board 3 and PP sheet 4 to embed the ceramic block 5. The window openings on the FR4 core board 3 and PP sheet 4 must align to ensure the ceramic block 5 is correctly installed. Before creating the window, positioning holes for the window openings on the FR4 core board 3 and PP sheet 4 need to be drilled using an X-ray machine.
[0019] Furthermore, the window openings of the FR4 core board 3 and PP sheet 4 are 4 mil larger than the ceramic block 5 on each side, thus providing sufficient embedding space for the ceramic block 5. To ensure the reliable bonding between the ceramic block 5 and the FR4 core board 3, the window openings of the FR4 core board 3 and PP sheet 4 are rectangular, and their four corners are preferably rounded with a radius of 0.75 mm.
[0020] In this embodiment, the structure of the FR4 core board 3 (double-sided) sequentially includes: a first copper layer, PP, and a second copper layer, wherein the first and second copper layers have the same thickness and correspond to the thickness of the copper layers on both sides of the ceramic block 5. The FR4 core board 3 has a high Tg (glass transition temperature), specifically, Tg ≥ 170℃, which provides sufficient stability. The FR4 core board 3 can first undergo inner layer pattern fabrication. According to the design parameters, the FR4 core board 3 is fabricated through processes such as lamination, exposure, development, and etching to create inner layer patterns such as L2 / 3, L4 / 5, and L6 / 7 in an 8-layer PCB board. During the inner layer pattern fabrication process, the L2 and L7 copper layers must be protected to prevent them from being etched during etching.
[0021] In this embodiment, PP sheet 4 refers to PP sheet with an adhesive content of more than 65%, which can effectively bond the two FR4 core boards 3 with strong adhesion.
[0022] Regarding ceramic block 5, its layered structure from top to bottom includes: a copper layer, a titanium layer, a ceramic block core, a titanium layer, and another copper layer. That is, both sides of ceramic block 5 are copper layers of the same thickness, and its central part is ceramic material. In this embodiment, ceramic block 5 is preferably a DPC (Direct Copper Plated) type ceramic block, which is suitable for the heat dissipation scenario of the PCB board in this invention, and has advantages such as good heat dissipation performance and low manufacturing cost. The dimensional tolerance of ceramic block 5 is ±3mil, and the flatness is ≤25μm. For the incoming ceramic block 5, in order to increase the bonding force between ceramic block 5 and PP and the reliability of the laser blind 6, ceramic block 5 needs to undergo browning treatment. The concentration range of the chemical solution required for browning is consistent with the maintenance range of ordinary boards, but the browning speed is reduced by 20% from the existing level.
[0023] Furthermore, in terms of design, the ceramic block 5 is 0.1mm thicker than the FR4 core board 3. In addition, the copper layers on both sides of the ceramic block 5 are the same thickness as the copper layers on both sides of the FR4 core board 3. For example, if the copper thickness of the core board is 1oz, the copper thickness of the ceramic block 5 must also be 1oz. This ensures consistency during subsequent graphic design and other processing.
[0024] S2. Pre-stack the FR4 core board 3 and PP sheet 4 prepared in step S1 in sequence.
[0025] S3. Place the ceramic block 5 into the windowed area of the FR4 core board 3 and the PP sheet 4 to obtain the inner core of the PCB board.
[0026] S4. The lamination process is performed in the following order: steel plate, aluminum sheet, release liner, PCB core, release liner, aluminum sheet, and steel plate. In this step, a core-board slotting lamination method is used to embed the ceramic. The release liner is a high-temperature resistant resin-resistant release liner used to prevent resin overflow and contamination of the board surface. After lamination, it is preferable to use 800-1200 grit (e.g., 1000 grit) sandpaper to polish the PCB board to remove excess adhesive overflowing at the junction of the ceramic block 5 and the FR4 board.
[0027] S5. Drill holes and perform copper plating on the core of the laminated PCB board. Then, the PCB board is processed by lamination, exposure, development and etching to create the outermost layer pattern. Specifically, the above PCB board is processed by lamination, exposure, development and etching to create the L2 and L7 layer patterns, as well as the bottom pad of the laser blind 6 on the ceramic block 5, in accordance with the design parameters, thereby obtaining the PCB semi-finished board.
[0028] In this embodiment, a 1.0mm circular bottom pad is used as the positioning pattern. After the bottom pad is manufactured, the PCB semi-finished board needs to be immersed in a titanium removal solution. The purpose of immersing the PCB board in the titanium removal solution is to remove the titanium layer at the bottom of the ceramic block 5. Through immersion treatment, the 100-200 nm thick titanium layer at the bottom (i.e., both the top and bottom surfaces) of the AlN ceramic block is removed to prevent its residue from causing a short circuit.
[0029] In this embodiment, the soaking time is preferably kept between 10 and 30 seconds to remove the 5100-200 nm titanium layer of the ceramic block and avoid short circuits caused by titanium metal residue.
[0030] Titanium removal solution refers to a chemical polishing slurry that selectively etches titanium and inhibits the etching rate of copper. Its main components are a mixture of hydrogen peroxide and inorganic acids. Specifically, by mass percentage, titanium removal solution contains: 15-25% hydrogen peroxide, 10-25% acidic ammonium fluoride (ammonium hydrogen fluoride and ammonium difluoride), less than 10% sulfuric acid, and the remainder is water.
[0031] S6. The above-mentioned PCB semi-finished board, after browning and stacking, undergoes secondary lamination. The secondary lamination adopts a stacked design of copper foil + PP + PCB semi-finished board + PP + copper foil, thereby creating L1 layer 1 and L8 layer 2 on the basis of the original PCB board.
[0032] S7. After the second lamination is completed, the PCB board is milled, and then laser blind vias are created using UV+CO2 technology. Corresponding laser holes (and laser blind vias 6) are created on ceramic block 5, exposing the copper foil pads on the laser holes. The diameter of the laser blind via 6 is 4 mil, with an AR ratio of 0.8.
[0033] After S8 and laser blind 6 are fabricated, VCP electroplating line is used to fill the laser blind 6 with copper, thereby realizing the network link between ceramic block 5 and outer layer pattern, that is, realizing the conduction of signal lines.
[0034] S9. After copper embedding is completed, graphics can be created according to the customer's wiring design. Specifically, the corresponding outer layer graphics are created on the outer layer corresponding to ceramic block 5. The PCB board is then subjected to solder masking, text, surface treatment, and molding treatment in sequence to form the final PCB board product.
[0035] S10. If the customer has other requirements, the stacking design can be redesigned based on this.
[0036] Based on the above method, the method of the present invention will be described in detail below through a specific embodiment.
[0037] Step 1: Cutting materials.
[0038] Select a double-sided FR4 core board 3 and PP sheet 4 with high Tg (Tg≥170℃) and cut them according to the design dimensions; select a ceramic block 5, the thickness of the ceramic block 5 is 0.1mm thicker than the FR4 core board 3, the copper thickness of the ceramic block 5 is the same as the copper thickness of the FR4 core board 3, and the size is 7mm×7mm.
[0039] Step 2: Creating the inner layer graphics.
[0040] The FR4 core board 3 is fabricated according to the design parameters through processes such as coating, exposure, development, and etching to create L2 / 3, L4 / 5, and L6 / 7 layer patterns. During the fabrication of the inner layer patterns, the L2 and L7 copper layers must be protected to prevent them from being etched during the etching process.
[0041] Step 3: X-RAY Drilling Target: Use an X-RAY machine to drill positioning holes for opening windows in the FR4 core board 3 and PP sheet 4.
[0042] Step 4: Open windows in FR4 core board 3 and PP sheet 4.
[0043] The FR4 core board 3 and PP sheet 4 are machined to form the shape of the ceramic block 5 to be embedded. The window size of the FR4 core board 3 and PP sheet 4 is designed to be 75μm larger on each side than the embedded AlN ceramic block 5. To ensure the reliability of the bonding between the ceramic block 5 and the FR4 core board 3, the four corners of the window of the FR4 core board 3 and PP sheet 4 are designed to be rounded with a radius of 0.75mm.
[0044] Step 5: Pressing.
[0045] The FR4 core board 3 is pre-stacked in the order of FR4 core board, PP sheet, and FR4 core board. Then, the ceramic block 5 is placed in the window area of the FR4 core board 3 and PP sheet 4. After pre-stacking, the steel plate, aluminum sheet, release liner, PCB core, release liner, aluminum sheet, and steel plate are placed into the press for pressing. After pressing, the excess adhesive that overflows at the joint between the ceramic block 5 and the FR4 board is sanded off with 1000-grit sandpaper. Step 6: Create the outermost layer graphic.
[0046] The core of the laminated PCB board is drilled and copper plating is applied according to the design parameters. Then, the PCB board is processed according to the design parameters to create the L2 and L7 layer patterns through processes such as film lamination, exposure, development, and etching. After etching, the PCB board is immersed in a titanium removal solution for 10 seconds to remove the 150 nm titanium layer at the bottom of ceramic block 5, avoiding short circuits caused by titanium residue.
[0047] Step 7: Secondary pressing process.
[0048] The aforementioned PCB semi-finished board undergoes browning, stacking (copper foil, PP, PCB semi-finished board, PP, copper foil), and lamination to complete the outer layer's target milling. Then, laser blind vias are fabricated using UV+CO2 technology to create corresponding laser holes on ceramic block 5. These laser holes are then filled with electroplating to achieve signal connection between the outer layer and the ceramic block 5 substrate.
[0049] Step 8: Create the external graphics.
[0050] The PCB semi-finished board after the above-mentioned secondary lamination is processed through processes such as film lamination, exposure, development, and etching to create the outer layer pattern. Then, it undergoes solder masking, texting, surface treatment, and molding to form the final PCB finished product.
[0051] The invention also provides a PCB board manufactured using the PCB board manufacturing method described above.
[0052] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several modifications and improvements without departing from the structure of the present invention, and these will not affect the effectiveness of the implementation of the present invention or the practicality of the patent.
Claims
1. A method for fabricating a PCB with an embedded ceramic block, characterized in that, The method includes the following steps: S1. Perform windowing on the FR4 core board and PP sheet of the target size, and simultaneously create the inner layer pattern on the FR4 core board. Select a suitable ceramic block according to the windowing size of the FR4 core board. S2. Pre-stack the FR4 core board and PP sheet after opening the window in sequence; S3. Place the ceramic block into the windowed area of the pre-stacked FR4 core board and PP sheet to obtain the inner core of the PCB board; S4. Perform a pressing process on the inner core of the PCB board; S5. Drill holes and apply copper plating to the inner core of the laminated PCB board, and then fabricate the outermost layer pattern to obtain a semi-finished PCB board with a bottom pad on the ceramic block. S6. After browning and stacking, the PCB semi-finished board is subjected to a second pressing process. S7. Create laser holes on the laminated PCB semi-finished board so that the bottom pad in the laser holes is exposed; S8. The laser holes are filled with copper to make the bottom Pad connected to the outer copper foil on the PCB semi-finished board. S9. Create the outer layer pattern on the PCB semi-finished board obtained in step S8 to obtain the finished PCB board.
2. The PCB fabrication method for embedded ceramic blocks according to claim 1, characterized in that, In step S1, the window size of the FR4 core board and PP sheet is 3mil to 6mil larger than the single-side size of the ceramic block; the window of the FR4 core board and PP sheet is a rectangular window, and the four corners of the rectangular window are all set as arcs with a radius of 0.6mm to 0.8mm.
3. The method for processing embedded ceramic blocks into PCBs according to claim 1, characterized in that, The ceramic block comprises, from top to bottom, a copper layer, a titanium layer, a ceramic block core, a titanium layer, and a copper layer.
4. The method for processing embedded ceramic blocks into PCBs according to claim 1, characterized in that, In step 4, after the PCB core is pressed together once, 800-1200 grit sandpaper is used to polish the pressed PCB core to remove the glue overflowing from the joint between the ceramic block and the FR4 board in the PCB core.
5. A method for processing embedded ceramic blocks into PCBs according to claim 1, characterized in that, In step S5, after the PCB semi-finished board is produced, it is immersed in a titanium removal solution for titanium removal treatment.
6. A method for processing embedded ceramic blocks into PCBs according to claim 5, characterized in that, The immersion time for titanium removal treatment of the PCB semi-finished board is 10s to 30s.
7. A method for processing embedded ceramic blocks into PCBs according to claim 5, characterized in that, The titanium removal solution contains: 15%–25% hydrogen peroxide, 10%–25% acidic ammonium fluoride, less than 10% sulfuric acid, and the remainder is water.
8. A method for processing embedded ceramic blocks into PCBs according to claim 1, characterized in that, In step S6, the stacked layer structure of the PCB semi-finished board is as follows: copper foil, PP, PCB semi-finished board, PP, copper foil.
9. A method for processing embedded ceramic blocks into PCBs according to claim 1, characterized in that, In step S7, the edge of the laminated PCB semi-finished board is first milled, and then laser holes are made.