A novel SiC MOSFET device with low reverse turn-on voltage and fast recovery speed

Abstract

This invention relates to a novel SiC MOSFET device with low reverse turn-on voltage and fast recovery speed, belonging to the field of semiconductor power device technology. The device integrates a heterojunction diode composed of a heterojunction, a P-base region, and an N+ source. The device has the following advantages: (1) In reverse, the heterojunction causes band bending, resulting in a significant reduction in reverse turn-on voltage and a greatly shortened reverse recovery time, while also significantly reducing and shortening the Miller plateau. (2) In forward conduction, the turn-on threshold voltage of the conventional trench-gate SiC MOSFET is slightly reduced compared to the conventional trench gate MOSFET, due to the addition of a channel via the heterojunction. Furthermore, the device structure shows a significant increase in saturation current compared to the conventional design.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology and relates to a novel SiC MOSFET device with low reverse turn-on voltage and fast recovery speed. Background Technology

[0002] With the continuous development of power electronics technology, especially in fields such as electric vehicles, power electronics, rail transportation, and high-efficiency power supplies, the demand for high-efficiency, high-frequency, and high-temperature power semiconductor devices is increasing. Silicon (Si) has long dominated the traditional power semiconductor field, but due to the limitations of its physical properties (such as lower breakdown voltage, higher on-resistance, and poorer high-temperature performance), its performance cannot meet the requirements of modern power electronic systems under high-voltage, high-temperature, and high-frequency operating environments. Therefore, wide-bandgap semiconductor materials, such as silicon carbide (SiC) and gallium nitride (GaN), are gradually becoming emerging alternatives to traditional silicon materials due to their wider bandgap, higher breakdown voltage, and lower on-resistance.

[0003] SiC, as a semiconductor material with excellent high-temperature and high-pressure characteristics, has received widespread attention in the field of power electronics in recent years. SiC MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) have become ideal devices for achieving high-efficiency, high-frequency switching power supplies and high-power conversion due to their high breakdown voltage, low on-resistance, excellent thermal conductivity, and high-frequency characteristics. While SiC MOSFETs have performed well in many areas, they still face some technical bottlenecks, particularly the excessively high body diode turn-on voltage drop under reverse conduction conditions, leading to high losses and bipolar degradation. This affects the device's performance in high-efficiency, high-frequency applications.

[0004] To address this technical challenge, this paper proposes a SiC MOSFET device structure with low reverse turn-off voltage drop and fast recovery characteristics. By optimizing the device's structural design and doping process, the reverse recovery time is significantly shortened, and the turn-off voltage in the third quadrant is reduced, thereby improving the device's performance in high-frequency, high-efficiency applications. Summary of the Invention

[0005] In view of this, the purpose of this invention is to provide a SiC MOSFET device with low reverse turn-on voltage and fast recovery. This device incorporates a heterojunction into the structure of a conventional trench MOSFET. During forward conduction and reverse freewheeling, a positive voltage is applied to the source trench gate. Due to the contact between the homojunction and heterojunction, the potential barrier at the heterojunction is naturally very small during reverse conduction, forming a reverse conduction channel. This avoids the bipolar degradation effect caused by the conduction of the body diode and improves the reverse recovery rate.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A novel SiC-MOSFET device with high reliability and long short-circuit time is disclosed. The device can be divided into two parts based on its structural characteristics: a traditional trench gate MOSFET structure and an embedded heterojunction structure. The device comprises a drain 1, an N+SUB 2, an N-Drift 3, an HJ heterojunction 4, a right-side source N+ region 5, a Pbase2 region 6, a source 7, a right-side N+ source region 8, a gate silicon dioxide oxide layer 9, a trench gate 10, and a Pbase1 region.

[0008] A traditional MOSFET structure consists of a drain 1, an N+SUB 2, an N-Drift 3, a P-base 4, a right-side source P+ region 5, a planar gate 6, a planar gate oxide layer 7, and a left-side N+ source 10.

[0009] The drain (1) is located on the lower surface of N+SUB (2); The N+SUB (2) is located on the lower surface of the N-Drift (3) and the upper surface of the drain (1);

[0010] The N-Drift (3) is located on the upper surface of N+SUB (2) and the lower surface of Pbase1 region (11);

[0011] The Pbase2 (6) and Pbase1 (11) regions are divided into left and right symmetrical parts. P-base (1) is located on the lower surface of the N+ source (8), and Pbase2 (6) is located on the upper surface of the N-Drift (3) and the lower surface of the N+ source (8).

[0012] The trench gate (10) is encapsulated in a silicon dioxide layer (10), and the left and right sides are in contact with the P-base1 region (11) to form a trench;

[0013] The HJ heterojunction (4), together with the top N+ source (5) and the adjacent Pbase2 region (6), forms a reverse channel, which operates in reverse.

[0014] The source N+ region (8) is located on the upper surface of the P-base2 region (6), and its left side is in contact with the oxide layer of the trench gate;

[0015] Furthermore, the Pbase2 region 6, the N+ heavily doped HJ heterojunction 4, and the N+ source 5 together form a heterojunction freewheeling diode operating in reverse. Under reverse operation, the heterojunction makes it easy for band bending electrons to cross the conduction band to the valence band. The turn-on voltage drop is about 1.5V, which is much lower than the 2.7V of the body diode, resulting in the formation of a significant current channel in reverse operation. This leads to a significant reduction in turn-on voltage drop, reduced switching power consumption, and a significant shortening of the reverse recovery time.

[0016] The beneficial effects of this invention are as follows: The device of this invention embeds a heterojunction into the structure of a traditional trench-gate MOSFET. During reverse operation, the N+ MOSFET works in conjunction with the heterojunction, reducing the fanx1 turn-on voltage, thereby decreasing the reverse recovery time and solving the bipolar degradation problem. In summary, by designing a SiC MOSFET device with low turn-on voltage drop and fast recovery time, the switching power consumption of power devices is greatly reduced. Attached Figure Description

[0017] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein:

[0018] Figure 1 A schematic diagram of the overall structure of the SiC MOSFET device of this invention;

[0019] Figure 2 A comparison of the output characteristic curves of the device of the present invention and a conventional trench gate SiC MOSFET when the gate voltage is 15V and the current path diagram of the SiC MOSFET of the present invention when it is operating in the first quadrant.

[0020] Figure 3 The graph shows a comparison of the transfer characteristic curves of the device of the present invention and the conventional trench gate SiC MOSFET. The device of the present invention is slightly better than the conventional device.

[0021] Figure 4 The reverse characteristic curves show a comparison of the third quadrant curves of the device of this invention and a conventional planar gate SiC MOSFET when the gate voltage is -5V.

[0022] Figure 5 The reverse recovery curves show a comparison between the reverse recovery characteristics of the device of this invention and a conventional trench gate SiC MOSFET.

[0023] Figure 6 A comparison of the gate charge characteristics of the device of the present invention and that of a conventional trench gate SiC MOSFET;

[0024] Figure reference numerals: Drain 1, N+SUB 2, N-Drift 3, HJ heterojunction 4, right source N+ region 5, Pbase2 region 6, source 7, right N+ source region 8, gate silicon dioxide oxide layer 9, trench gate 10, Pbase1 region. Detailed Implementation

[0025] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0026] The accompanying drawings are for illustrative purposes only and are schematic diagrams, not actual pictures. They should not be construed as limiting the invention. To better illustrate the embodiments of the invention, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0027] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components. In the description of the present invention, it should be understood that if terms such as "upper," "lower," "left," "right," "front," and "rear" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting the present invention. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0028] Example 1:

[0029] like Figure 1 As shown, this embodiment improves upon traditional planar gate devices by providing a SiC MOSFET device with low reverse recovery voltage and fast recovery. The device comprises a drain 1, an N+SUB 2, an N-Drift 3, an HJ heterojunction 4, a right-side source N+ region 5, a Pbase2 region 6, a source 7, a right-side N+ source region 8, a gate silicon dioxide oxide layer 9, a trench gate 10, and a Pbase1 region.

[0030] Figure 2The diagram shows the IdVd characteristic curve. During forward conduction, the total current density increases because the heterojunction diode also participates in conduction, thus optimizing the forward characteristics.

[0031] Figure 3 The diagram shows the transfer characteristics of the device, in which the threshold voltage of the new device is slightly lower than that of the conventional device; the introduction of a heterojunction causes the band to bend, allowing a small number of electrons to pass through the side heterojunction channel.

[0032] Figure 4 The diagram shows a comparison of their reverse characteristics. The reverse characteristics of the two devices differ significantly because the traditional device relies on a body diode for freewheeling, resulting in a turn-on voltage of 2.76V. In contrast, the structure of this invention relies on a heterojunction for freewheeling, reducing the turn-on voltage drop by about half, approximately 1.5V.

[0033] Figure 5 The diagram shows a comparison of reverse recovery characteristics. It is evident that the gate charge during reverse recovery of a conventional trench gate is 2.13 μC, while the reverse recovery charge of the device in this invention is greatly reduced to approximately half that of the conventional device, at 1.29 μC, due to the embedded heterojunction diode. This results in a significant reduction in recovery time.

[0034] Figure 6 Due to the introduction of the heterojunction, the reverse characteristics of the device in this invention are optimized, resulting in a significant reduction in the Miller platform.

[0035] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A novel SiC-MOSFET device with low reverse turn-on voltage and fast recovery speed. The device can be divided into two parts according to its structural characteristics: a traditional trench MOSFET structure and an embedded heterojunction structure. The device includes a drain (1), N+SUB (2), N-Drift (3), HJ heterojunction (4), right source N+ region (5), Pbase2 region (6), source (7), right N+ source region (8), gate silicon dioxide oxide layer (9), trench gate (10), and Pbase1 region (11). The traditional planar MOSFET structure consists of a drain 1, N+SUB2, N-Drift3, P-base4, right source P+ region 5, planar gate 6, planar gate oxide layer 7, and left N+ source 10.

2. The drain (1) is located on the lower surface of N+SUB (2); N+SUB (2) is located on the lower surface of N-Drift (3) and the upper surface of drain (1); N-Drift (3) is located on the upper surface of N+SUB (2) and the lower surface of Pbase1 region (11); Pbase2 (6) and Pbase1 region (11) are divided into left and right symmetrical parts. P-base (1) is located on the lower surface of N+ source (8), Pbase2 region (6) is located on the upper surface of N-Drift (3), and the lower surface of N+ source (8); the trench gate (10) is wrapped in silicon dioxide layer (10), and the left and right sides are in contact with P-base1 region (11) to form a channel; the HJ heterojunction (4), together with the top N+ source (5) and the adjacent Pbase2 region (6), forms a reverse channel and works in reverse; the source N+ region (8) is located on the upper surface of P-base2 region (6), and the left side is in contact with the oxide layer of the trench gate; furthermore, Pbase2 region 6, N+ heavily doped HJ heterojunction 4, and N+ source 5 together form a heterojunction freewheeling tube that works in reverse.

3. A novel SiC MOSFET device with low reverse turn-on voltage and fast recovery according to claim 1, characterized in that: The Pbase2 region (6), N+ heavily doped polysilicon (4), and N+ source (5) form an embedded heterojunction freewheeling diode. When it is in reverse conduction, the band bending caused by the heterojunction can conduct under a small turn-on voltage drop to form a conductive path without relying on a body diode. This not only solves the bipolar degradation effect but also greatly reduces the switching loss.

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