Adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module and its packaging method

Abstract

This invention discloses an adjustable negative voltage bootstrap interface heterogeneously integrated gallium nitride (GaN) power module and its packaging method, including a DBC substrate on which a silicon LV-MOSFET chip is mounted for high current conduction. The DBC substrate integrates a programmable negative voltage direct drive chip and a GaN power chip through heterogeneous packaging technology. This structure achieves adjustable negative voltage drive through a bootstrap interface, minimizing parasitic inductance in the GaN power circuit while ensuring efficient heat dissipation of the LV-MOSFET. Programmable negative voltage: VNEG_SELECT1 / 2 adapts to the turn-off voltage requirements of different GaN chips. Low inductance drive: Three chips are packaged together on the DBC substrate, minimizing the drive circuit area. Excellent heat dissipation: Direct mounting on the DBC results in low thermal resistance. Fault protection: The FAULT pin of the programmable negative voltage direct drive chip provides real-time monitoring, improving system reliability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor power module technology, specifically to an adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module and its packaging method. Background Technology

[0002] Enhancement-mode / depletion-mode gallium nitride (GaN) power devices require reliable negative voltage turn-off capability to avoid false turn-on. In existing technologies, external negative voltage power supply wiring is long and has large parasitic parameters. Furthermore, different GaN chips have different turn-off negative voltage requirements (-10V to -18V), resulting in poor compatibility with fixed negative voltage drive chips. Additionally, excessively high inductance in the drive circuit limits the switching frequency.

[0003] To address this, a heterogeneous integrated gallium nitride power module with an adjustable negative voltage bootstrap interface and its packaging method are proposed. Summary of the Invention

[0004] The purpose of this invention is to provide an adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module and its packaging method to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: an adjustable negative voltage bootstrap interface heterogeneously integrated gallium nitride power module, including a DBC substrate, on which a silicon LV-MOSFET chip is mounted to carry high current conduction, and the DBC substrate integrates a programmable negative voltage direct drive chip and a gallium nitride power chip through heterogeneous packaging technology.

[0006] This structure achieves adjustable negative voltage drive through a bootstrap interface, minimizing the parasitic inductance of the gallium nitride power circuit while ensuring efficient heat dissipation of the LV-MOSFET.

[0007] The LV_GATE pin of the programmable negative voltage direct drive chip is electrically connected to the gate of the silicon LV-MOSFET chip, the VNEG pin of the programmable negative voltage direct drive chip is electrically connected to the gate of the gallium nitride power chip, the drain of the silicon LV-MOSFET chip is electrically connected to the source of the gallium nitride power chip, the source of the silicon LV-MOSFET chip is connected to power ground, and the drain of the gallium nitride power chip is led out as the power drain port of the module.

[0008] The programmable negative voltage direct drive chip is used to receive external PWM control signals through the IN pin, output drive signals through the LV_GATE pin to control the on / off state of the silicon LV-MOSFET chip, thereby adjusting the gate-source voltage of the gallium nitride power chip, and simultaneously output a programmable adjustable negative voltage through the VNEG pin to provide a negative voltage turn-off bias for the gallium nitride power chip.

[0009] Preferably, the programmable negative voltage direct drive chip is further provided with VNEG_SELECT1 pin and VNEG_SELECT2 pin. The VNEG_SELECT1 pin and VNEG_SELECT2 pin are used to set the output negative voltage value of the VNEG pin by means of an external level or configuration resistor. The selectable range of the output negative voltage value is -10V to -18V.

[0010] Preferably, the programmable negative voltage direct drive chip also has RDRV pin, FAULT pin, LPM pin, BBSW pin, VDD pin and LDO5V pin;

[0011] The RDRV pin is grounded through an external resistor and is used to configure the output drive strength of the internal drive stage of the programmable negative voltage direct drive chip.

[0012] The FAULT pin is led out to the outside of the module for outputting a fault status signal;

[0013] The LPM pin is used to configure the module's low-power mode;

[0014] The BBSW pin is the switching node of the internal Buck-boost circuit, and the external inductor is connected to the power ground.

[0015] The VDD pin is connected to an external 12V power supply;

[0016] The LDO5V pin is connected to a 0.22µF capacitor to ground.

[0017] Preferably, the bonding wire length between the drain of the silicon LV-MOSFET chip and the source of the gallium nitride power chip is no more than 3 mm.

[0018] The packaging method for the heterogeneous integrated gallium nitride power module with adjustable negative voltage bootstrap interface as described above includes the following steps:

[0019] S1. Substrate pretreatment: Patterned etching is performed on the copper layer on the upper surface of the DBC substrate to delineate the chip mounting area.

[0020] S2, Chip mounting and sintering: The silicon LV-MOSFET chip is mounted and sintered on the chip mounting area of ​​the DBC substrate.

[0021] S3, bonding interconnection, uses copper wire bonding technology to complete the electrical connection between chips and between chips and pin pads;

[0022] S4. Injection molding sealing: The DBC substrate, chip, bonding wire and passive components are encapsulated by injection molding using epoxy molding compound, with only the external pins exposed.

[0023] Preferably, step S3 specifically includes:

[0024] S3.1 Connect the LV_GATE pin of the programmable negative voltage direct drive chip to the gate of the silicon LV-MOSFET chip via bonding.

[0025] S3.2 Connect the VNEG pin of the programmable negative voltage direct drive chip to the gate of the gallium nitride power chip via bonding.

[0026] S3.3 Bond the drain of the silicon LV-MOSFET chip to the source of the gallium nitride power chip.

[0027] Compared with the prior art, the beneficial effects of the present invention are:

[0028] 1. Programmable negative voltage: VNEG_SELECT1 / 2 adapts to the turn-off voltage requirements of different GaN chips.

[0029] 2. Low inductance drive: Three chips are packaged together on the DBC substrate, minimizing the drive circuit area.

[0030] 3. Excellent heat dissipation: DBC direct surface mounting results in low thermal resistance.

[0031] 4. Fault protection: The FAULT pin of the programmable negative pressure direct drive chip is monitored in real time to improve system reliability. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the power module of the present invention;

[0033] Figure 2 This is a pin diagram of the product of the present invention;

[0034] Figure 3 This is an internal wiring diagram of the present invention. Detailed Implementation

[0035] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0036] Please see Figure 1-3 This invention provides a technical solution: an adjustable negative voltage bootstrap interface heterogeneously integrated gallium nitride power module, the core of which includes a DBC substrate, a silicon LV-MOSFET chip mounted on the DBC substrate, and a programmable negative voltage direct drive chip and a gallium nitride power chip integrated through heterogeneous packaging technology. This achieves programmable negative voltage shutdown control of the gallium nitride power device, low-inductance drive circuit design, and optimizes the module's heat dissipation performance and operational reliability.

[0037] The programmable negative pressure direct drive chip is equipped with LV_GATE pin, VNEG pin, IN pin, VNEG_SELECT1 pin, VNEG_SELECT2 pin, RDRV pin, FAULT pin, LPM pin, BBSW pin, VDD pin, LDO5V pin, and SOURCE pin.

[0038] The LV_GATE pin of the programmable negative voltage direct drive chip is electrically connected to the gate of the silicon LV-MOSFET chip, and is used to output a drive signal to control the on / off state of the silicon LV-MOSFET chip. The VNEG pin of the programmable negative voltage direct drive chip is electrically connected to the gate of the gallium nitride (GaN) power chip, and is used to output a programmable adjustable negative voltage to provide a negative voltage turn-off bias for the GaN power chip. The drain of the silicon LV-MOSFET chip is electrically connected to the source of the GaN power chip, the source of the silicon LV-MOSFET chip is connected to power ground, and the drain of the GaN power chip is led out as the power drain port of the module.

[0039] The IN pin of the programmable negative voltage direct drive chip is used to receive external PWM control signals, serving as the logic control input of the module. The VNEG_SELECT1 and VNEG_SELECT2 pins are used to set the output negative voltage value of the VNEG pin via an external level or configuration resistor. The selectable range of the output negative voltage value is -10V to -18V, adaptable to the turn-off voltage requirements of different gallium nitride power chips. The RDRV pin is grounded through an external resistor and is used to configure the output drive strength of the internal drive stage of the programmable negative voltage direct drive chip. The FAULT pin is led out to the outside of the module for fault status signal output, enabling real-time monitoring and fault protection of the module's operating status. The LPM pin is used to configure the module's low-power mode. The BBSW pin is the switching node of the internal Buck-boost circuit of the chip, connected to an external inductor for power ground. The VDD pin is connected to an external 12V power supply, providing the main power input for the module. The LDO5V pin is connected to ground with a 0.22µF capacitor to achieve a 5V linear regulated output and also provides pull-up power to the IN pin. A 2.2µF capacitor is connected to ground to the VNEG pin to ensure the stability of the negative voltage output.

[0040] The bonding wire length between the drain of the silicon LV-MOSFET chip and the source of the gallium nitride power chip is no more than 3mm, which further reduces the parasitic parameters of the power circuit and the drive circuit and increases the upper limit of the module's switching frequency.

[0041] The adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module uses a silicon LV-MOSFET chip as a negative voltage transfer switch and level shifter, and works in conjunction with a programmable negative voltage direct drive chip to achieve precise drive control of the gallium nitride power chip. The specific working principle is as follows:

[0042] Turn-off process: When the PWM control signal received by the IN pin of the programmable negative voltage direct drive chip is high, the internal drive stage of the chip outputs a high-level drive signal to the gate of the silicon LV-MOSFET chip through the LV_GATE pin, turning on the silicon LV-MOSFET chip. At this time, the source of the gallium nitride power chip is pulled to the power ground potential through the turned-on silicon LV-MOSFET chip. Simultaneously, the programmable negative voltage direct drive chip outputs a preset negative voltage value to the gate of the gallium nitride power chip through the VNEG pin, so that the gate-source voltage of the gallium nitride power chip forms a negative voltage difference, realizing the reliable negative voltage turn-off of the gallium nitride power chip and avoiding the device from being mistakenly turned on.

[0043] Start-up process: When the PWM control signal received by the IN pin of the programmable negative voltage direct drive chip is low, the internal drive stage of the chip outputs a low-level drive signal to the gate of the silicon LV-MOSFET chip through the LV_GATE pin, causing the silicon LV-MOSFET chip to turn off; at this time, the gate of the gallium nitride power chip is pulled to a positive voltage potential through the pull-up path, so that a positive voltage difference is formed between the gate and source voltages of the gallium nitride power chip, realizing the reliable start-up of the gallium nitride power chip.

[0044] This embodiment also discloses a packaging method for the above-mentioned adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module, specifically including the following steps:

[0045] S1. Substrate pretreatment: Patterned etching is performed on the copper layer on the upper surface of the DBC substrate to delineate the chip mounting area.

[0046] S2. Chip mounting and sintering: The silicon LV-MOSFET chip is mounted on the DBC substrate, and the chip is fixed to the copper layer of the DBC substrate through a sintering process.

[0047] S3. Interconnect bonding: Copper wire bonding is used to complete the electrical connection between chips and between chips and pin pads. The specific bonding steps include:

[0048] S3.1 Connect the LV_GATE pin of the programmable negative voltage direct drive chip to the gate of the silicon LV-MOSFET chip via bonding.

[0049] S3.2 Connect the VNEG pin of the programmable negative voltage direct drive chip to the gate of the gallium nitride power chip via bonding.

[0050] S3.3, Bond the drain of the silicon LV-MOSFET chip to the source of the gallium nitride power chip;

[0051] S4. Passive component mounting: Mount the passive components, such as the 0.22µF capacitor for the LDO5V pin, the 2.2µF capacitor for the VNEG pin, the inductor for the BBSW pin, and the configuration resistor for the RDRV pin, onto the corresponding pad areas on the DBC substrate and complete the electrical connection.

[0052] S5. Injection molding and sealing: The DBC substrate, chip, bonding wire and passive components are encapsulated by injection molding using epoxy molding compound, exposing only the external pins of the module, thus completing the encapsulation of the power module.

[0053] The pin definitions after the overall package is completed are shown in the table below.

[0054]

[0055] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. An adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module, including a DBC substrate, characterized in that: A silicon LV-MOSFET chip is mounted on the DBC substrate to carry high current conduction. The DBC substrate integrates a programmable negative voltage direct drive chip and a gallium nitride power chip through heterogeneous packaging technology. This structure achieves adjustable negative voltage drive through a bootstrap interface, minimizing the parasitic inductance of the gallium nitride power circuit while ensuring efficient heat dissipation of the LV-MOSFET. The LV_GATE pin of the programmable negative voltage direct drive chip is electrically connected to the gate of the silicon LV-MOSFET chip, the VNEG pin of the programmable negative voltage direct drive chip is electrically connected to the gate of the gallium nitride power chip, the drain of the silicon LV-MOSFET chip is electrically connected to the source of the gallium nitride power chip, the source of the silicon LV-MOSFET chip is connected to power ground, and the drain of the gallium nitride power chip is led out as the power drain port of the module. The programmable negative voltage direct drive chip is used to receive external PWM control signals through the IN pin, output drive signals through the LV_GATE pin to control the on / off state of the silicon LV-MOSFET chip, thereby adjusting the gate-source voltage of the gallium nitride power chip, and simultaneously output a programmable adjustable negative voltage through the VNEG pin to provide a negative voltage turn-off bias for the gallium nitride power chip.

2. The adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module according to claim 1, characterized in that: The programmable negative voltage direct drive chip also has a VNEG_SELECT1 pin and a VNEG_SELECT2 pin. The VNEG_SELECT1 pin and the VNEG_SELECT2 pin are used to set the output negative voltage value of the VNEG pin by means of an external level or a configuration resistor. The selectable range of the output negative voltage value is -10V to -18V.

3. The adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module according to claim 1, characterized in that: The programmable negative pressure direct drive chip also has RDRV pin, FAULT pin, LPM pin, BBSW pin, VDD pin and LDO5V pin; The RDRV pin is grounded through an external resistor and is used to configure the output drive strength of the internal drive stage of the programmable negative voltage direct drive chip. The FAULT pin is led out to the outside of the module for outputting a fault status signal; The LPM pin is used to configure the module's low-power mode; The BBSW pin is the switching node of the internal Buck-boost circuit, and the external inductor is connected to the power ground. The VDD pin is connected to an external 12V power supply; The LDO5V pin is connected to a 0.22µF capacitor to ground.

4. The adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module according to claim 1, characterized in that: The bonding wire length between the drain of the silicon LV-MOSFET chip and the source of the gallium nitride power chip is no more than 3 mm.

5. The packaging method for the adjustable negative voltage bootstrap interface heterogeneous integrated gallium nitride power module according to any one of claims 1-4, characterized in that, Includes the following steps: S1. Substrate pretreatment: Patterned etching is performed on the copper layer on the upper surface of the DBC substrate to delineate the chip mounting area. S2, Chip mounting and sintering: The silicon LV-MOSFET chip is mounted and sintered on the chip mounting area of ​​the DBC substrate. S3, bonding interconnection, uses copper wire bonding technology to complete the electrical connection between chips and between chips and pin pads; S4. Injection molding sealing: The DBC substrate, chip, bonding wire and passive components are encapsulated by injection molding using epoxy molding compound, with only the external pins exposed.

6. The packaging method according to claim 5, characterized in that: Step S3 specifically includes: S3.1 Connect the LV_GATE pin of the programmable negative voltage direct drive chip to the gate of the silicon LV-MOSFET chip via bonding. S3.2 Connect the VNEG pin of the programmable negative voltage direct drive chip to the gate of the gallium nitride power chip via bonding. S3.3 Bond the drain of the silicon LV-MOSFET chip to the source of the gallium nitride power chip.

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