A high-stability photovoltaic module and its preparation method

Abstract

This invention relates to the field of photovoltaic cell technology, and in particular to a high-stability photovoltaic module and its preparation method. In the high-stability photovoltaic module of this invention, micro-gap thermal conductive channels are provided between adjacent cells, and elastic buffer units are respectively provided at both ends of the micro-gap thermal conductive channels; a multi-point equalization busbar is connected to the cell string through at least three welding points along the length of the cell string; every 2-4 cells form an independent protection unit, and each independent protection unit corresponds to a miniature bypass diode; the upper and lower encapsulation layers contain nano-thermal conductive fillers. The high-stability photovoltaic module provided by this invention can reduce the risk of microcracks in the cells, reduce series losses, achieve rapid bypass protection, and improve heat dissipation performance, thereby improving the photovoltaic module's anti-attenuation capability, power generation stability, and long-term reliability.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic cell technology, and in particular to a high-stability photovoltaic module and its preparation method. Background Technology

[0002] Currently, the conventional mainstream structure of photovoltaic modules is as follows: a front tempered glass layer, encapsulating film, crystalline silicon solar cells, solder ribbons and busbars, a backsheet or double-glass backsheet, and a junction box, all laminated and encapsulated. The solar cells are connected in series via conventional solder ribbons to form a cell string. The cell string's output current is collected by the busbars, and bypass diodes are centrally located in the junction box to provide bypass protection for the entire cell string. However, existing photovoltaic modules have the following drawbacks: The cells are rigidly interconnected without a stress buffer structure. Under temperature cycling and mechanical loads, stress concentration can easily occur, leading to microcracks and grid breakage in the cells, resulting in power degradation.

[0003] Busbars have few and concentrated solder joints, resulting in long current paths, high series losses, severe localized heating, and accelerated aging of packaging materials.

[0004] Bypass diodes have a large protection range, but when partially blocked, the bypass response is delayed, which can easily lead to hot spots and pose a safety hazard.

[0005] Conventional encapsulation films have poor thermal conductivity, resulting in higher module operating temperatures, reduced photoelectric conversion efficiency, and accelerated degradation.

[0006] It has insufficient resistance to attenuation, and exhibits significant light-induced attenuation, damp-heat attenuation, and potential-induced attenuation, thus limiting its long-term reliability and service life.

[0007] In view of this, the present invention is hereby proposed. Summary of the Invention

[0008] The primary objective of this invention is to provide a highly stable photovoltaic module that reduces the risk of microcracks in the solar cells, decreases series losses, enables rapid bypass protection, and improves heat dissipation performance, thereby enhancing the photovoltaic module's resistance to degradation, power generation stability, and long-term reliability.

[0009] The second objective of this invention is to provide a method for preparing the aforementioned high-stability photovoltaic module.

[0010] In order to achieve the above-mentioned objectives of the present invention, the following technical solution is adopted: This invention provides a high-stability photovoltaic module, comprising a front cover plate, an upper encapsulation layer, a cell chip layer, a lower encapsulation layer, and a rear substrate stacked sequentially; the photovoltaic module also includes a busbar conductive unit and a distributed bypass unit; The battery chip layer includes several battery strings, each battery string includes several battery cells, and micro-gap heat conduction channels are provided between adjacent battery cells. Each end of the micro-gap heat conduction channel is provided with an elastic buffer unit. The current-conducting unit includes a main busbar and a multi-point equalizing busbar, wherein the multi-point equalizing busbar is connected to the battery string through at least three welding points along the length of the battery string. The distributed bypass unit includes several miniature bypass diodes. Each 2 to 4 solar cells form an independent protection unit, and each independent protection unit corresponds to one miniature bypass diode. The upper and lower encapsulation layers contain nano-thermal conductive fillers.

[0011] Furthermore, the width of the micro-gap heat conduction channel is 0.3~1.5mm; And / or, the interior of the micro-gap thermally conductive channel is filled with thermally conductive insulating adhesive.

[0012] Furthermore, the elastic buffer unit includes a polymer elastomer or a perforated metal buffer sheet.

[0013] Furthermore, several of the aforementioned micro-bypass diodes are equally spaced on the multi-point equalization busbar, and the distance between adjacent micro-bypass diodes is the total length of 2 to 4 of the aforementioned battery cells.

[0014] Furthermore, the upper encapsulation layer and the lower encapsulation layer comprise POE and / or EVA.

[0015] Furthermore, it includes at least one of the following features (1) to (3); (1) The nano-thermal conductive filler includes at least one of boron nitride, aluminum oxide and zinc oxide; (2) The particle size of the nano-thermal conductive filler is 20~100nm; (3) The content of the nano thermally conductive filler in the upper encapsulation layer and the lower encapsulation layer is 1wt%~5wt% respectively.

[0016] Furthermore, the back substrate includes a double-glass structure or an organic backsheet containing an oxygen barrier layer; And / or, the oxygen permeability of the back substrate is less than 1×10⁻⁶. -3 g·m -2 ·d -1 .

[0017] Furthermore, the front cover plate includes glass and a coating disposed on the surface of the glass; the coating includes nano-silica and nano-titanium dioxide.

[0018] The present invention also provides a method for preparing a high-stability photovoltaic module as described above, comprising the following steps: S1. Lay an encapsulation layer on the surface of the front cover plate; S2. Arrange several battery cells with gaps between them to form micro-gap heat conduction channels between adjacent battery cells. Install elastic buffer units at both ends of the micro-gap heat conduction channels and then weld them together to form a battery string. S3. Attach the multi-point equalization busbar along the main grid line of the battery string to complete the welding at at least three welding points; weld the miniature bypass diodes onto the multi-point equalization busbar so that every 2 to 4 battery cells are an independent protection unit, and each independent protection unit corresponds to a miniature bypass diode; then weld the main busbar perpendicularly to each battery string. S4. Lay out the lower encapsulation layer and the back substrate; S5. Perform lamination and encapsulation.

[0019] Furthermore, the lamination temperature of the lamination encapsulation is 130~150℃, and the time is 8~15min.

[0020] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention, through the synergistic effect of a low-stress heat dissipation structure, a multi-point balanced current-carrying structure, a distributed segmented bypass protection structure, and a high thermal conductivity and anti-aging encapsulation structure, forms a highly reliable, low-attenuation photovoltaic module. This effectively releases internal stress within the module, reducing the risk of microcracks and grid breakage in the cells; shortens the current path, reducing series losses and localized heating; enables rapid bypass protection for small cell counts, suppressing hot spot effects; improves overall heat dissipation capacity, lowers operating temperature, and slows material aging; thereby comprehensively reducing light-induced degradation, damp-heat degradation, and potential-induced degradation, significantly improving the module's long-term power generation stability, mechanical reliability, and service life. Attached Figure Description

[0021] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 This is a schematic diagram of the stacked structure of the photovoltaic module of the present invention. Detailed Implementation

[0023] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings and specific embodiments. However, those skilled in the art will understand that the embodiments described below are some embodiments of the present invention, but not all embodiments, and are only used to illustrate the present invention, and should not be regarded as limiting the scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall be followed. Where the manufacturers of reagents or instruments are not specified, they are all conventional products that can be purchased commercially.

[0024] See Figure 1 In some embodiments of the present invention, a high-stability photovoltaic module is provided. The photovoltaic module includes a front cover plate, an upper encapsulation layer, a battery chip layer, a lower encapsulation layer and a rear substrate stacked in sequence. The photovoltaic module also includes a current-conducting unit and a distributed bypass unit. The battery chip layer includes several battery strings, each battery string includes several battery cells, and micro-gap heat conduction channels are provided between adjacent battery cells. Elastic buffer units are provided at both ends of the micro-gap heat conduction channels. The current-conducting unit includes a main busbar and a multi-point equalizing busbar, which is connected to the battery string through at least three welding points along the length of the battery string. The distributed bypass unit includes several miniature bypass diodes. Each 2 to 4 solar cells form an independent protection unit, and each independent protection unit corresponds to one miniature bypass diode. The upper encapsulation layer and the lower encapsulation layer contain nano-thermal conductive fillers.

[0025] The photovoltaic module of the present invention, through a low-stress heat dissipation structure in which micro-gap heat conduction channels and elastic buffer units are simultaneously arranged between the cells, can effectively release stress, resulting in lower stress and higher reliability; it reduces the internal stress of the photovoltaic module, reduces the risk of cell microcracks and grid breakage, and improves mechanical reliability.

[0026] The photovoltaic module of the present invention optimizes the current-conducting structure by setting a multi-point balanced current-conducting strip structure with at least three uniform welding points along the length of the cell string, thereby shortening the current path and reducing series loss and local heat generation.

[0027] The photovoltaic module of the present invention uses distributed micro-bypass diodes to achieve segmented protection for a small number of cells. The distributed segmented bypass protection structure, with one micro-bypass diode corresponding to every 2 to 4 cells, achieves refined segmented bypass protection, quickly responds to local shading, and suppresses hot spot effects.

[0028] The photovoltaic module of the present invention features a micro-gap thermal conductive channel combined with a high thermal conductivity and anti-aging encapsulation structure containing nano-thermal conductive filler, which improves the overall heat dissipation capacity of the module, reduces the operating temperature, and slows down material aging.

[0029] The photovoltaic module of the present invention has a high reliability and low attenuation photovoltaic module overall structure composed of low stress, low loss, distributed bypass and high thermal conductivity encapsulation, which reduces light-induced attenuation, damp heat attenuation and potential-induced attenuation, and improves long-term power generation stability and service life.

[0030] In some embodiments of the present invention, the battery chip layer includes a plurality of battery strings, which are arranged in parallel along the width direction of the photovoltaic module, and the insulation distance between adjacent battery strings is 2 to 5 mm (e.g., 2 mm, 3 mm, 4 mm or 5 mm, etc.).

[0031] In this invention, multiple battery strings are arranged in parallel along the width direction of the photovoltaic module, with an insulation gap of 2-5mm reserved between adjacent battery strings.

[0032] In some embodiments of the present invention, the battery string includes a plurality of battery cells, which are arranged in a straight line at equal intervals along the length of the photovoltaic module, and the main grid lines of adjacent battery cells in the same battery string are aligned one-to-one.

[0033] In some embodiments of the present invention, adjacent cells within the same battery string are connected in series by a solder strip; the solder strip includes a tinned copper wire braided strip or a copper strip; the thickness of the solder strip is 0.1~0.3mm (e.g., 0.1mm, 0.2mm or 0.3mm, etc.), and the width of the solder strip is the same as the width of the main grid line of the battery cell.

[0034] This invention connects adjacent solar cells in series via a solder strip. The solder strip is a flexible, low-stress conductive solder strip, comprising tin-plated copper wire braided strip or ultra-thin elastic copper strip, with a thickness of 0.1~0.3mm and a width consistent with the width of the main grid lines of the solar cell. Both ends of the solder strip are welded to the positive and negative main grid electrodes of the adjacent solar cell, respectively, achieving series conduction of the solar cells while possessing a certain deformation capacity to accommodate thermal expansion and contraction. The ultra-thin elastic copper strip is made of TU1 oxygen-free copper with a purity ≥99.99%, primarily obtained through rolling and low-temperature annealing, possessing high ductility, low stress, and fatigue resistance, thus meeting the thermal expansion and contraction requirements of the solar cells.

[0035] In some embodiments of the present invention, the width of the micro-gap heat conduction channel is 0.3 to 1.5 mm (e.g., 0.3 mm, 0.5 mm, 0.7 mm, 0.9 mm, 1.1 mm, 1.3 mm or 1.5 mm, etc.).

[0036] Within the same battery string, a micro-gap heat conduction channel with a width of 0.3~1.5mm is reserved between adjacent battery cells.

[0037] In some embodiments of the present invention, the interior of the micro-gap thermally conductive channel is filled with thermally conductive insulating adhesive.

[0038] In some embodiments of the present invention, the thermally conductive insulating adhesive includes an epoxy-based thermally conductive insulating adhesive; the epoxy-based thermally conductive insulating adhesive comprises, by weight percentage, the following components: 60% to 70% epoxy resin (e.g., 60%, 62%, 64%, 66%, 68%, or 70%, etc.), 20% to 25% boron nitride thermally conductive filler (e.g., 20%, 21%, 22%, 23%, 24%, or 25%, etc.), 1% to 3% silane coupling agent (e.g., 1%, 2%, or 3%, etc.), 5% to 9% curing agent (e.g., 5%, 6%, 7%, 8%, or 9%, etc.), and 0.5% to 1% defoamer (e.g., 0.5%, 0.6%, 0.7%, 0.8%, 0.9%, or 1%, etc.).

[0039] In some embodiments of the present invention, the filling thickness of the thermally conductive insulating adhesive is the same as the thickness of the battery cell; preferably, the filling thickness of the thermally conductive insulating adhesive and the thickness of the battery cell are both 150~200μm (e.g., 150μm, 160μm, 170μm, 180μm, 190μm, or 200μm, etc.). After filling, the thermally conductive insulating adhesive is flush with the surface of the battery cell.

[0040] In some embodiments of the present invention, elastic buffer units are respectively provided at both ends of the micro-gap heat conduction channel. The elastic buffer units are symmetrically arranged at both ends of the micro-gap heat conduction channel and are seamlessly connected with the micro-gap heat conduction channel to jointly form an integrated structure for stress release and heat dissipation.

[0041] In some embodiments of the present invention, the elastic buffer unit includes a polymer elastomer or a perforated metal buffer sheet.

[0042] In some embodiments of the present invention, the polymeric elastomer includes silicone rubber, fluororubber, or thermoplastic polyurethane elastomer. Preferably, the polymeric elastomer includes methyl vinyl silicone rubber, which exhibits aging resistance and high elasticity. Preferably, the polymeric elastomer has a Shore hardness of 40-60A and possesses excellent high and low temperature elastic recovery properties.

[0043] In some embodiments of the present invention, the hollow metal buffer sheet includes a circular hollow structure, a square hollow structure, or a wavy hollow structure; the hollow ratio of the hollow metal buffer sheet is 30% to 50% (e.g., 30%, 35%, 40%, 45%, or 50%); the thickness of the hollow metal buffer sheet is the same as the thickness of the battery cell; thus ensuring structural strength while absorbing stress through the hollow structure.

[0044] In some embodiments of the present invention, the main busbar is arranged along the width direction of the photovoltaic module; the main busbar is located at both ends and the middle of the battery string; the main busbar is perpendicularly connected to the parallel battery strings; it is responsible for collecting the output current of each battery string and finally connecting it to the junction box to realize the overall current output of the module.

[0045] In some embodiments of the present invention, the multi-point equalization busbar is attached to the surface of the main grid line of the battery cell along the length direction of the battery string; the multi-point equalization busbar is along the length direction of the battery string, each main grid line of the battery cell corresponds to 1 to 2 welding points (e.g., one welding point or two welding points), and each battery string corresponds to at least three welding points that are equally spaced.

[0046] The multi-point balancing busbar is attached to the surface of the main grid line of the battery cell along the length of the battery string and is on the same plane as the battery string. The multi-point balancing busbar covers the electrode area of ​​the entire battery string. The multi-point balancing in the multi-point balancing busbar means that the busbar is set with 1 to 2 welding points on the main grid line of each battery cell along the length of the battery string. There are at least three welding points for a single battery string, which are evenly distributed. The current flows evenly from each electrode position of the battery cell into the busbar, avoiding the current concentration at a single or a few welding points, and achieving the interconnection effect of balanced current conduction and uniform stress distribution.

[0047] In some embodiments of the present invention, a plurality of miniature bypass diodes are equally spaced on a multi-point equalization busbar, and the distance between adjacent miniature bypass diodes is the total length of 2 to 4 battery cells.

[0048] In some embodiments of the present invention, the diode chip size of the miniature bypass diode is ≤3mm×5mm, the overall package volume is ≤5mm×8mm, and the thickness is ≤1.5mm.

[0049] In some embodiments of the present invention, the miniature bypass diode is welded to the middle section of the multi-point equalization busbar, which corresponds to the middle region of 2 to 4 cell lengths.

[0050] The distributed bypass unit consists of several miniature bypass diodes; the diode chip size of the miniature bypass diode is ≤3mm×5mm, the overall package volume is ≤5mm×8mm, and the thickness is ≤1.5mm; it has the characteristics of small size, low on-state voltage drop, and fast response.

[0051] Each 2-4 solar cells form an independent protection unit. Each protection unit corresponds to a miniature bypass diode connected in parallel. The positive and negative terminals of the miniature bypass diode are connected in parallel with the positive and negative electrodes of the corresponding solar cell in the protection unit, respectively, and are directly integrated and welded to the middle section of the multi-point balancing busbar. The middle section of the multi-point balancing busbar refers to the middle area of ​​the length of 2-4 solar cells corresponding to a single multi-point balancing busbar, avoiding the edge welding area of ​​the solar cells to avoid interference with the interconnection of solar cells.

[0052] The multi-point equalization busbar and several miniature bypass diodes are modularly integrated. Multiple miniature bypass diodes are evenly distributed on the multi-point equalization busbar. The spacing between adjacent miniature bypass diodes matches the total length of 2 to 4 solar cells. Each bypass unit is independent and does not interfere with each other, forming a distributed segmented bypass protection network.

[0053] In some embodiments of the present invention, the upper encapsulation layer and the lower encapsulation layer comprise POE and / or EVA.

[0054] In some embodiments of the present invention, the thickness of the upper encapsulation layer and the lower encapsulation layer are each independently 0.4 to 1.0 mm (e.g., 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, 0.9 mm or 1.0 mm, etc.).

[0055] In some embodiments of the present invention, the upper encapsulation layer and the lower encapsulation layer are each independently made of POE film or POE-EVA composite film; wherein, the POE-EVA composite film includes a POE layer and an EVA layer, the thickness of the POE layer and the EVA layer are each independently 0.2~0.5mm (e.g., 0.2mm, 0.3mm, 0.4mm or 0.5mm, etc.), the POE layer is closer to the battery chip layer, and the EVA layer is closer to the front cover plate or the rear substrate.

[0056] The POE-EVA composite film has a double-layer co-extruded integrated structure, with a POE layer on top and an EVA layer on the bottom. The POE layer is closer to the battery chip layer, giving it advantages in high water resistance and PID resistance. The EVA layer is closer to the front cover plate or the back substrate, which improves the adhesion strength with glass and backplate. The two layers of film are composited into one through a co-extrusion process, without delamination or bubbles.

[0057] In some embodiments of the present invention, the nano-thermal conductive filler includes at least one of boron nitride, aluminum oxide, and zinc oxide.

[0058] In some embodiments of the present invention, the particle size of the nano-thermal conductive filler is 20~100nm (e.g., 20nm, 40nm, 60nm, 80nm or 100nm, etc.).

[0059] In some embodiments of the present invention, the content of the nano thermally conductive filler in the upper encapsulation layer and the lower encapsulation layer is independently 1wt% to 5wt% (e.g., 1wt%, 2wt%, 3wt%, 4wt% or 5wt%, etc.).

[0060] Nano-thermal conductive fillers, including boron nitride, aluminum oxide, or zinc oxide, with a particle size of 20~100nm, are uniformly dispersed inside the encapsulation film of the upper and lower encapsulation layers. The addition of 1%~5% by mass significantly improves thermal conductivity, anti-aging, water and oxygen barrier properties.

[0061] In some embodiments of the present invention, the back substrate includes a double-glass structure or an organic backsheet containing an oxygen barrier layer; preferably, the organic backsheet containing the oxygen barrier layer includes a backsheet and an oxygen barrier layer disposed on the backsheet, the oxygen barrier layer including an aluminum foil layer and / or silicon aluminate oxide (SiO2). x and AlO x The vapor-deposited layer has an oxygen barrier layer thickness of 20~80nm, which densely blocks water vapor and oxygen; the back sheet includes TPT back sheet (polyvinyl fluoride PVF and polyethylene terephthalate PET composite) or KPE back sheet (fluorine film and PE substrate).

[0062] In some embodiments of the present invention, the oxygen permeability of the back substrate is less than 1×10⁻⁶. -3 g·m -2 ·d -1 .

[0063] The back substrate uses a double-glass structure or an organic backsheet with an oxygen barrier layer, and the oxygen permeability is less than 1×10⁻⁶. -3 g / (m 2 ·d), enhances resistance to PID and damp heat degradation.

[0064] In some embodiments of the present invention, the front cover plate includes glass and a coating disposed on the surface of the glass; the coating includes nano-silica and nano-titanium dioxide in a mass ratio of 7:3; the coating is disposed on the outer surface of the glass, i.e. the light-facing surface, to achieve anti-reflection, hydrophobic self-cleaning and UV aging resistance.

[0065] The front cover includes a tempered glass cover with a coating on its surface. This coating is a composite coating for both anti-reflection and self-cleaning purposes. The coating material includes nano-silica and nano-titanium dioxide, and the coating thickness is 100~300nm (e.g., 100nm, 150nm, 200nm, 250nm or 300nm, etc.), forming an anti-reflection and self-cleaning functional layer.

[0066] In some embodiments of the present invention, the photovoltaic module further includes a junction box, and the junction box is connected to the main busbar.

[0067] In some embodiments of the present invention, a method for preparing the above-mentioned high-stability photovoltaic module is also provided, comprising the following steps: S1. Lay an encapsulation layer on the surface of the front cover plate; S2. Arrange several battery cells with gaps between them to form micro-gap heat conduction channels between adjacent battery cells. Install elastic buffer units at both ends of the micro-gap heat conduction channels and then weld them together to form a battery string. S3. Attach the multi-point equalization busbar along the main grid line of the battery string to complete the welding at at least three welding points; weld the miniature bypass diodes onto the multi-point equalization busbar so that every 2 to 4 battery cells are an independent protection unit, and each independent protection unit corresponds to a miniature bypass diode; then weld the main busbar perpendicularly to each battery string. S4. Lay out the lower encapsulation layer and the back substrate; S5. Perform lamination and encapsulation.

[0068] In some embodiments of the present invention, before laying the encapsulation layer in step S1, the tempered glass cover plate is further subjected to cleaning, pretreatment and coating preparation in sequence.

[0069] In some embodiments of the present invention, step S1 includes cleaning the tempered glass cover plate by sequentially spraying it with deionized water, brushing it with an alkaline cleaning agent, rinsing it with high-pressure water, and drying it with hot air to remove surface oil, dust, and impurities.

[0070] In some embodiments of the present invention, step S1 includes pretreatment including: subjecting the cleaned tempered glass cover to plasma surface activation treatment with a power of 500~800W (e.g., 500W, 600W, 700W or 800W, etc.) for 30~60s (e.g., 30s, 40s, 50s or 60s, etc.) to improve surface adhesion.

[0071] In some embodiments of the present invention, step S1, coating preparation includes: applying a coating slurry to the surface of the front cover plate; the coating slurry includes nano-silica and nano-titanium dioxide; the solid content of the coating slurry is 5%~10% (e.g., 5%, 6%, 7%, 8%, 9% or 10%); the solvent of the coating slurry includes ethanol and isopropanol in a volume ratio of 6:4, with moderate volatility, uniform film formation without shrinkage cavities; the coating thickness is 100~300nm (e.g., 100nm, 150nm, 200nm, ...). (e.g., 250nm or 300nm); the coating method includes roller coating or spin coating; after coating, it is dried at 100~120℃ (e.g., 100℃, 110℃ or 120℃, etc.) for 15~25min (to remove solvent and ensure coating density) and cured at 150~180℃ (e.g., 150℃, 160℃, 170℃ or 180℃, etc.) for 30~60min (30min, 40min, 50min or 60min, etc.) to form a coating with both anti-reflective and self-cleaning functions.

[0072] In some embodiments of the present invention, step S1, the method of laying the upper encapsulation layer includes: laying the upper encapsulation layer flat on the inner side of the front cover plate, without wrinkles or offset, and aligning the edges with the front cover plate.

[0073] In some embodiments of the present invention, step S2, the preparation of the battery string includes: arranging the battery cells with a gap of 0.3~1.5mm to form a micro-gap thermal conductive channel between adjacent battery cells; filling the micro-gap thermal conductive channel with thermally conductive insulating adhesive; installing elastic buffer units at both ends of the micro-gap thermal conductive channel; using low-temperature welding, the low-temperature welding temperature is 180~220℃ (e.g., 180℃, 190℃ or 200℃, etc.); connecting the battery cells in series with welding ribbons to form a battery string; and removing the surface welding slag after welding.

[0074] In some embodiments of the present invention, in step S3, the multi-point equalization busbar is attached along the main grid line of the battery string to complete the welding of at least three uniformly distributed welding points; then the micro bypass diode is welded to the middle section of the busbar to complete the integration of the distributed bypass unit; subsequently, the main busbar is vertically welded to each battery string to realize the parallel busbar connection of the battery strings.

[0075] In some embodiments of the present invention, step S4, the method for laying the lower encapsulation layer and the back substrate includes: laying the lower encapsulation layer adhesive on the side of the battery chip layer away from the upper encapsulation layer, and then covering the back substrate to ensure that each layer is aligned, without misalignment or air bubbles.

[0076] In some embodiments of the present invention, in step S5, the lamination temperature for lamination encapsulation is 130~150°C (e.g., 130°C, 140°C, or 150°C, etc.), and the time is 8~15 min (e.g., 8 min, 10 min, 12 min, or 15 min, etc.). In some embodiments of the present invention, in step S5, a segmented lamination process is adopted, in which the stacked components are placed into a laminator for lamination and encapsulation; the lamination and encapsulation includes a preheating stage, a lamination stage, and a cooling stage in sequence; the temperature of the preheating stage is 100~120℃, and the time is 2~3min; the temperature of the lamination stage is 130~150℃, the pressure is 80~120kPa, and the time is 8~15min; the cooling stage includes: cooling down to below 60℃; and the encapsulation is completed.

[0077] In some embodiments of the present invention, step S5 includes subsequent processing after lamination and encapsulation; the subsequent processing includes: trimming and cleaning after lamination and encapsulation, installing the junction box and connecting it to the main busbar with conductive adhesive, curing at room temperature for 2-4 hours (e.g., 2 hours, 3 hours or 4 hours) or at 80-100°C (80°C, 90°C or 100°C, etc.) for 30-60 minutes (e.g., 30 minutes, 40 minutes, 50 minutes or 60 minutes, etc.).

[0078] Example 1 The photovoltaic module provided in this embodiment includes a front cover plate, an upper encapsulation layer, a battery chip layer, a lower encapsulation layer, and a rear substrate stacked in sequence; the photovoltaic module also includes a current-conducting unit, a distributed bypass unit, and a junction box. The front cover includes glass and a coating disposed on the surface of the glass; the coating includes nano-silica and nano-titanium dioxide in a mass ratio of 7:3; the coating is disposed on the outer surface (light-facing side) of the glass. The upper encapsulation layer includes a POE-EVA composite film; the POE-EVA composite film includes a POE layer with a thickness of 0.3 mm and an EVA layer with a thickness of 0.3 mm, both the POE layer and the EVA layer contain boron nitride with a particle size of 60 nm; the boron nitride content in both the POE layer and the EVA layer is 3 wt%; the POE layer is closer to the battery chip layer, and the EVA layer is closer to the front cover plate; The battery chip layer includes several battery strings, which are arranged in parallel along the width of the photovoltaic module, and the insulation distance between adjacent battery strings is 3mm. The battery string consists of several battery cells, which are arranged in a straight line with equal spacing along the length of the photovoltaic module, and the main busbars of adjacent battery cells are aligned one-to-one; the thickness of the battery cells is 180μm. A micro-gap thermal conductive channel with a width of 0.8 mm is provided between adjacent solar cells. The micro-gap thermal conductive channel is filled with epoxy thermal conductive insulating adhesive (by mass percentage, including: 65% epoxy resin, 22% boron nitride, 3% silane coupling agent, 9% curing agent, and 1% defoamer); the filling thickness of the thermal conductive insulating adhesive is 180 μm. Elastic buffer units are symmetrically arranged at both ends of the micro-gap heat conduction channel; the elastic buffer unit is made of methyl vinyl silicone rubber with a thickness of 180μm; Adjacent solar cells are connected in series by a 0.2mm thick solder strip (tinned copper wire braided strip). The width of the solder strip is the same as the width of the main grid line of the solar cell. The two ends of the solder strip are welded to the positive and negative main grid electrodes of the adjacent solar cells, respectively. The current-conducting unit includes a main busbar and a multi-point equalizing busbar; the main busbar is arranged along the width of the photovoltaic module; the main busbar is located at both ends and the middle of the battery string; the main busbar is perpendicularly connected to the parallel battery string; the junction box is connected to the main busbar; The multi-point equalization busbar is attached to the surface of the main grid line of the battery cell along the length of the battery string and is on the same plane as the battery string. The multi-point equalization busbar covers the electrode area of ​​the entire battery string. Along the length of the battery string, each battery cell has one welding point corresponding to the main grid line, and each battery string has three welding points that are equally spaced. The distributed bypass unit includes several miniature bypass diodes. Each set of three solar cells forms an independent protection unit, and each independent protection unit corresponds to one miniature bypass diode. The miniature bypass diodes are evenly distributed on the multi-point balancing busbar, and the distance between adjacent miniature bypass diodes is the total length of the three solar cells. The miniature bypass diodes are soldered to the middle section of the multi-point balancing busbar, which corresponds to the middle area of ​​the length of the three solar cells. The diode chip size of the miniature bypass diode is ≤3mm×5mm, the overall package volume is ≤5mm×8mm, and the thickness is ≤1.5mm. The lower encapsulation layer includes a POE-EVA composite film; the POE-EVA composite film includes a POE layer with a thickness of 0.3 mm and an EVA layer with a thickness of 0.3 mm, both the POE layer and the EVA layer contain boron nitride with a particle size of 60 nm; the boron nitride content in both the POE layer and the EVA layer is 3 wt%; the POE layer is closer to the battery chip layer, and the EVA layer is closer to the back substrate layer; The back substrate includes a double-glass structure with an oxygen permeability of less than 1×10⁻⁶. -3 g·m -2 ·d -1 .

[0079] The photovoltaic module manufacturing method provided in this embodiment includes the following steps: S1. The tempered glass cover is sequentially sprayed with deionized water, brushed with alkaline cleaning agent, rinsed with high pressure water and dried with hot air. The tempered glass cover plate, after being dried by hot air, was subjected to plasma surface activation treatment with a power of 650W and a time of 45s. A coating slurry is spin-coated onto the surface of the front cover plate; the coating slurry includes nano-silica and nano-titanium dioxide in a mass ratio of 7:3; the solid content of the coating slurry is 8%, and the solvent is ethanol and isopropanol in a volume ratio of 6:4; the coating thickness is 200 nm; after spin-coating, it is dried at 110℃ for 20 min and cured at 165℃ for 45 min in sequence to form a coating. The upper encapsulation layer is laid flat on the inside of the front cover plate, without wrinkles or offset, and the edges are aligned with the front cover plate. S2. Arrange the battery cells with a gap of 0.8mm to form a micro-gap heat conduction channel between adjacent battery cells; fill the micro-gap heat conduction channel with epoxy thermal conductive insulating adhesive, and install elastic buffer units at both ends of the micro-gap heat conduction channel; use low-temperature welding at a temperature of 200℃, connect the battery cells in series with welding strips to form a battery string, and remove the surface welding slag after welding. S3. Attach the multi-point equalization busbar along the main grid line of the battery string to complete the welding of three evenly distributed welding points; then weld the miniature bypass diodes to the middle section of the busbar to complete the integration of the distributed bypass unit; subsequently, weld the main busbar vertically to each battery string to realize parallel busbar connection of the battery strings. S4. Lay the lower encapsulation layer adhesive on the side of the battery chip layer away from the upper encapsulation layer, and then cover it with the back substrate to ensure that each layer is aligned, without misalignment or air bubbles. S5. Using a segmented lamination process, the stacked components are placed into a laminator for lamination and encapsulation. The lamination and encapsulation process includes: preheating at 110℃ for 3 minutes, laminating at 140℃ and 100kPa for 12 minutes, cooling down to below 60℃, and completing the lamination and encapsulation. After lamination and encapsulation, trim and clean the edges, install the junction box, and connect it to the main busbar with conductive adhesive. Let it cure at room temperature for 3 hours.

[0080] Example 2 The photovoltaic module provided in this embodiment includes a front cover plate, an upper encapsulation layer, a battery chip layer, a lower encapsulation layer, and a rear substrate stacked in sequence; the photovoltaic module also includes a current-conducting unit, a distributed bypass unit, and a junction box. The front cover includes glass and a coating disposed on the surface of the glass; the coating includes nano-silica and nano-titanium dioxide in a mass ratio of 7:3; the coating is disposed on the outer surface (light-facing side) of the glass. The upper encapsulation layer includes a POE film; the POE film contains aluminum oxide with a particle size of 20 nm; the aluminum oxide content in the POE film is 1 wt%; The battery chip layer includes several battery strings, which are arranged in parallel along the width of the photovoltaic module, and the insulation distance between adjacent battery strings is 2mm. The battery string consists of several battery cells, which are arranged in a straight line with equal spacing along the length of the photovoltaic module, and the main busbars of adjacent battery cells are aligned one-to-one; the thickness of the battery cells is 150μm. A 0.5mm wide micro-gap thermal conductive channel is provided between adjacent solar cells. The micro-gap thermal conductive channel is filled with epoxy thermally conductive insulating adhesive (by mass percentage, including: 67.5% epoxy resin, 25% boron nitride, 2% silane coupling agent, 5% curing agent, and 0.5% defoamer); the filling thickness of the thermally conductive insulating adhesive is 150μm. The two ends of the micro-gap heat conduction channel are symmetrically provided with elastic buffer units; the elastic buffer unit includes a circular hollow copper metal buffer sheet with a hollowness of 40% and a thickness of 150μm; Adjacent solar cells are connected in series by a 0.1mm thick solder strip (tinned copper wire braided strip). The width of the solder strip is the same as the width of the main grid line of the solar cell. The two ends of the solder strip are welded to the positive and negative main grid electrodes of the adjacent solar cells, respectively. The current-conducting unit includes a main busbar and a multi-point equalizing busbar; the main busbar is arranged along the width of the photovoltaic module; the main busbar is located at both ends and the middle of the battery string; the main busbar is perpendicularly connected to the parallel battery string; the junction box is connected to the main busbar; The multi-point equalization busbar is attached to the surface of the main grid line of the battery cell along the length of the battery string and is on the same plane as the battery string. The multi-point equalization busbar covers the electrode area of ​​the entire battery string. Along the length of the battery string, each main grid line of the battery cell corresponds to 1 welding point and each battery string corresponds to 4 welding points that are equally spaced. The distributed bypass unit includes several miniature bypass diodes, with each group of four solar cells forming an independent protection unit, and each independent protection unit corresponding to one miniature bypass diode. The miniature bypass diodes are evenly distributed on the multi-point balancing busbar, with the distance between adjacent miniature bypass diodes being the total length of the four solar cells. The miniature bypass diodes are soldered to the middle section of the multi-point balancing busbar, which corresponds to the middle area of ​​the length of the four solar cells. The diode chip size of the miniature bypass diode is ≤3mm×5mm, the overall package volume is ≤5mm×8mm, and the thickness is ≤1.5mm. The lower encapsulation layer includes a POE film; the POE film contains aluminum oxide with a particle size of 20 nm; the aluminum oxide content in the POE film is 1 wt%; The back substrate includes a double-glass structure with an oxygen permeability of less than 1×10⁻⁶. -3 g·m -2 ·d -1 .

[0081] The photovoltaic module manufacturing method provided in this embodiment includes the following steps: S1. The tempered glass cover is sequentially sprayed with deionized water, brushed with alkaline cleaning agent, rinsed with high pressure water and dried with hot air. The tempered glass cover plate, after being dried by hot air, was subjected to plasma surface activation treatment with a power of 500W for 30 seconds. A coating slurry is spin-coated onto the surface of the front cover plate. The coating slurry consists of nano-silica and nano-titanium dioxide in a mass ratio of 7:3. The solid content of the coating slurry is 5%, and the solvent is ethanol and isopropanol in a volume ratio of 6:4. The coating thickness is 100 nm. After spin-coating, the coating is dried at 100°C for 20 min and cured at 150°C for 30 min in sequence to form a coating. The upper encapsulation layer is laid flat on the inside of the front cover plate, without wrinkles or offset, and the edges are aligned with the front cover plate. S2. Arrange the battery cells with a 0.5mm gap to form a micro-gap heat conduction channel between adjacent battery cells; fill the micro-gap heat conduction channel with epoxy thermal conductive insulating adhesive, and install elastic buffer units at both ends of the micro-gap heat conduction channel; use low-temperature welding at a temperature of 180℃, connect the battery cells in series with welding strips to form a battery string, and remove the surface welding slag after welding. S3. Attach the multi-point equalization busbar along the main grid line of the battery string to complete the welding of four evenly distributed welding points; then weld the miniature bypass diodes to the middle section of the busbar to complete the integration of the distributed bypass unit; subsequently, weld the main busbar vertically to each battery string to realize parallel busbar connection of the battery strings. S4. Lay the lower encapsulation layer adhesive on the side of the battery chip layer away from the upper encapsulation layer, and then cover it with the back substrate to ensure that each layer is aligned, without misalignment or air bubbles. S5. Using a segmented lamination process, the stacked components are placed into a laminator for lamination and encapsulation. The lamination and encapsulation process includes: preheating at 100℃ for 2 minutes, laminating at 130℃ and 120kPa for 15 minutes, cooling down to below 60℃, and completing the lamination and encapsulation. After lamination and encapsulation, trim and clean the edges, install the junction box, and connect it to the main busbar with conductive adhesive. Cure at 80℃ for 60 minutes.

[0082] Example 3 The photovoltaic module provided in this embodiment includes a front cover plate, an upper encapsulation layer, a battery chip layer, a lower encapsulation layer, and a rear substrate stacked in sequence; the photovoltaic module also includes a current-conducting unit, a distributed bypass unit, and a junction box. The front cover includes glass and a coating disposed on the surface of the glass; the coating includes nano-silica and nano-titanium dioxide in a mass ratio of 7:3; the coating is disposed on the outer surface (light-facing side) of the glass. The upper encapsulation layer includes a POE-EVA composite film; the POE-EVA composite film includes a POE layer with a thickness of 0.5 mm and an EVA layer with a thickness of 0.5 mm, both the POE layer and the EVA layer contain zinc oxide with a particle size of 100 nm; the zinc oxide content in both the POE layer and the EVA layer is 5 wt%; the POE layer is closer to the battery chip layer, and the EVA layer is closer to the front cover plate; The battery chip layer includes several battery strings, which are arranged in parallel along the width of the photovoltaic module, with an insulation distance of 5mm between adjacent battery strings. The battery string consists of several battery cells, which are arranged in a straight line with equal spacing along the length of the photovoltaic module, and the main busbars of adjacent battery cells are aligned one-to-one; the thickness of the battery cells is 200μm. A 1.3mm wide micro-gap thermal conductive channel is provided between adjacent solar cells. The micro-gap thermal conductive channel is filled with epoxy thermally conductive insulating adhesive (by mass percentage, including: 69.5% epoxy resin, 23% boron nitride, 2% silane coupling agent, 5% curing agent, and 0.5% defoamer); the filling thickness of the thermally conductive insulating adhesive is 200μm. Elastic buffer units are symmetrically arranged at both ends of the micro-gap heat conduction channel; the elastic buffer unit is made of methyl vinyl silicone rubber with a thickness of 200 μm; Adjacent solar cells are connected in series by a 0.3mm thick solder strip (tinned copper wire braided strip). The width of the solder strip is the same as the width of the main grid line of the solar cell. The two ends of the solder strip are welded to the positive and negative main grid electrodes of the adjacent solar cells, respectively. The current-conducting unit includes a main busbar and a multi-point equalizing busbar; the main busbar is arranged along the width of the photovoltaic module; the main busbar is located at both ends and the middle of the battery string; the main busbar is perpendicularly connected to the parallel battery string; the junction box is connected to the main busbar; The multi-point equalization busbar is attached to the surface of the main grid line of the battery cell along the length of the battery string and is on the same plane as the battery string. The multi-point equalization busbar covers the electrode area of ​​the entire battery string. Along the length of the battery string, each battery cell has one welding point corresponding to the main grid line, and each battery string has three welding points that are equally spaced. The distributed bypass unit includes several miniature bypass diodes. Each set of three solar cells forms an independent protection unit, and each independent protection unit corresponds to one miniature bypass diode. The miniature bypass diodes are evenly distributed on the multi-point balancing busbar, and the distance between adjacent miniature bypass diodes is the total length of the three solar cells. The miniature bypass diodes are soldered to the middle section of the multi-point balancing busbar, which corresponds to the middle area of ​​the length of the three solar cells. The diode chip size of the miniature bypass diode is ≤3mm×5mm, the overall package volume is ≤5mm×8mm, and the thickness is ≤1.5mm. The lower encapsulation layer includes a POE-EVA composite film; the POE-EVA composite film includes a POE layer with a thickness of 0.5 mm and an EVA layer with a thickness of 0.5 mm, both the POE layer and the EVA layer contain zinc oxide with a particle size of 100 nm; the zinc oxide content in both the POE layer and the EVA layer is 5 wt%; the POE layer is closer to the battery chip layer, and the EVA layer is closer to the back substrate layer; The back-end substrate includes a TPT backplane and silicon aluminum oxide (SiO2) disposed on the TPT backplane. x and AlO x The thickness of the silicon aluminum oxide vapor deposition layer is 40 nm.

[0083] The photovoltaic module manufacturing method provided in this embodiment includes the following steps: S1. The tempered glass cover is sequentially sprayed with deionized water, brushed with alkaline cleaning agent, rinsed with high pressure water and dried with hot air. The tempered glass cover plate, after being dried by hot air, was subjected to plasma surface activation treatment with a power of 800W and a time of 60s. A coating slurry is roller-coated onto the surface of the front cover plate; the coating slurry includes nano-silica and nano-titanium dioxide in a mass ratio of 7:3; the solid content of the coating slurry is 10%, and the solvent is ethanol and isopropanol in a volume ratio of 6:4; the coating thickness is 300 nm; after spin coating, it is dried at 150℃ for 20 min and cured at 180℃ for 60 min in sequence to form a coating. The upper encapsulation layer is laid flat on the inside of the front cover plate, without wrinkles or offset, and the edges are aligned with the front cover plate. S2. Arrange the battery cells with a 1.3mm gap to form a micro-gap heat conduction channel between adjacent battery cells; fill the micro-gap heat conduction channel with epoxy thermal conductive insulating adhesive, and install elastic buffer units at both ends of the micro-gap heat conduction channel; use low-temperature welding at a temperature of 220℃, connect the battery cells in series with welding strips to form a battery string, and remove the surface welding slag after welding. S3. Attach the multi-point equalization busbar along the main grid line of the battery string to complete the welding of three evenly distributed welding points; then weld the miniature bypass diodes to the middle section of the busbar to complete the integration of the distributed bypass unit; subsequently, weld the main busbar vertically to each battery string to realize parallel busbar connection of the battery strings. S4. Lay the lower encapsulation layer adhesive on the side of the battery chip layer away from the upper encapsulation layer, and then cover it with the back substrate to ensure that each layer is aligned, without misalignment or air bubbles. S5. Using a segmented lamination process, the stacked components are placed into a laminator for lamination and encapsulation. The lamination and encapsulation process includes: preheating at 120℃ for 2 minutes, laminating at 150℃ and 120kPa for 8 minutes, cooling down to below 60℃, and completing the lamination and encapsulation. After lamination and encapsulation, trim and clean the edges, install the junction box, and connect it to the main busbar with conductive adhesive. Cure at 100℃ for 30 minutes.

[0084] Comparative Example 1 The photovoltaic module and its preparation method provided in this comparative example refer to Example 1, except that there are no gaps between adjacent cells, no elastic buffer units, the upper and lower encapsulation layers are EVA films and do not contain boron nitride, there is a centralized busbar, and the junction box has a whole string of bypass diodes built in.

[0085] Experimental Example 1 The photovoltaic modules of Example 1 and Comparative Example 1 were subjected to mechanical load tests, including 2400Pa static pressure and temperature cycling from -40℃ to 85℃ for 200 cycles.

[0086] The photovoltaic module of Example 1 has a cell microcrack rate of 0.2% and a grid breakage rate of 0.1%; the photovoltaic module of Comparative Example 1 has a cell microcrack rate of 3.5% and a grid breakage rate of 2.8%. The elastic buffer unit and micro-gap heat conduction channel of the present invention can effectively release stress, significantly reduce the risk of cell microcracks and grid breakage, and greatly improve mechanical reliability.

[0087] The overall equivalent thermal conductivity of the component was tested using the laser flare method (LFA); standard test conditions (STC: 1000W / m). 2 At 25℃ (AM1.5), an infrared thermal imager continuously monitored the steady-state operating temperature of the module; according to the IEC 61215 standard, the steady-state output power stability of the module was tested for 1000 hours; the overall thermal conductivity of the photovoltaic module in Example 1 was 0.82 W / (m·K), which is more than 41.4% higher than that of Comparative Example 1 (0.58 W / (m·K); the module operating temperature under standard conditions was 43℃, which is 9℃ lower than that of Comparative Example 1 (52℃), avoiding power loss caused by high temperature; the power fluctuation of Example 1 was ≤±2.2%, while that of Comparative Example 1 was ≥±17.5%, representing a 15.3% improvement in power output stability compared to Comparative Example 1. This invention, through micro-gap thermal conductive channels combined with an encapsulation layer containing nano-thermal conductive fillers, can achieve stronger heat dissipation and lower operating temperature.

[0088] Busbar testing using the four-probe method The contact resistance at the cell welding points was measured to obtain the welding contact resistance; under STC conditions, the highest steady-state operating temperature of the module was collected by infrared thermal imaging to obtain the module's highest temperature rise; the current path of the photovoltaic module in Example 1 was shortened by 30% compared to Comparative Example 1; the welding contact resistance of Example 1 was 12.4 mΩ, which was 24.8% lower than that of Comparative Example 1 (16.5 mΩ); the series loss decreased from 2.12% in Comparative Example 1 to 0.79%; the module in Example 1 had a temperature rise of 18°C ​​above the ambient temperature, while the module in Comparative Example 1 had a temperature rise of 26°C above the ambient temperature, and the highest temperature rise of the module in Example 1 was 8°C lower than that of Comparative Example 1; the present invention significantly improves the local heating problem through a multi-point balanced current collection structure.

[0089] The oscilloscope monitors the conduction response time of the bypass diode after shading to obtain the response time; with 50% of the solar cells partially shaded, the steady-state maximum temperature is tested by infrared thermal imaging to obtain the hot spot temperature; distributed micro bypass diodes realize segmented protection for a small number of cells. The bypass response time of the photovoltaic module in Example 1 is 0.72ms, while that in Comparative Example 1 is ≥15ms; under partial shading conditions, the maximum hot spot temperature of the module is 61℃, which is 18℃ lower than 79℃ in Comparative Example 1, and far below the preset target of 15℃, completely eliminating the hot spot safety hazard.

[0090] Reliability testing showed that the module in Example 1 exhibited a degradation of 0.78% in the first year, an average annual degradation of 0.22%, and a power retention rate of ≥82% after 30 years. In contrast, the module in Comparative Example 1 showed a degradation of 2.2% in the first year and an average annual degradation of 0.55%. The photovoltaic module in Example 1 has a lifespan exceeding 30 years. This invention achieves lower degradation and a longer lifespan through the synergistic effect of a high thermal conductivity, high oxygen barrier, and low-stress structure.

[0091] Although the present invention has been illustrated and described with specific embodiments, it should be understood that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; those skilled in the art should understand that modifications can be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein, without departing from the spirit and scope of the present invention; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention; therefore, this means that all such substitutions and modifications that fall within the scope of the present invention are included in the appended claims.

Claims

1. A high-stability photovoltaic module, characterized in that, The photovoltaic module includes a front cover plate, an upper encapsulation layer, a battery chip layer, a lower encapsulation layer, and a rear substrate, which are stacked in sequence; the photovoltaic module also includes a current-conducting unit and a distributed bypass unit; The battery chip layer includes several battery strings, each battery string includes several battery cells, and micro-gap heat conduction channels are provided between adjacent battery cells. Each end of the micro-gap heat conduction channel is provided with an elastic buffer unit. The current-conducting unit includes a main busbar and a multi-point equalizing busbar, wherein the multi-point equalizing busbar is connected to the battery string through at least three welding points along the length of the battery string. The distributed bypass unit includes several miniature bypass diodes. Each 2 to 4 solar cells form an independent protection unit, and each independent protection unit corresponds to one miniature bypass diode. The upper and lower encapsulation layers contain nano-thermal conductive fillers.

2. The high-stability photovoltaic module according to claim 1, characterized in that, The width of the micro-gap heat conduction channel is 0.3~1.5mm; And / or, the interior of the micro-gap thermally conductive channel is filled with thermally conductive insulating adhesive.

3. The high-stability photovoltaic module according to claim 1, characterized in that, The elastic buffer unit includes a polymer elastomer or a perforated metal buffer sheet.

4. The high-stability photovoltaic module according to claim 1, characterized in that, Several of the aforementioned miniature bypass diodes are evenly spaced on the multi-point equalization busbar, and the distance between adjacent miniature bypass diodes is the total length of 2 to 4 of the aforementioned battery cells.

5. The high-stability photovoltaic module according to claim 1, characterized in that, The upper encapsulation layer and the lower encapsulation layer include POE and / or EVA.

6. The high-stability photovoltaic module according to claim 5, characterized in that, Includes at least one of the following features (1) to (3); (1) The nano-thermal conductive filler includes at least one of boron nitride, aluminum oxide and zinc oxide; (2) The particle size of the nano-thermal conductive filler is 20~100nm; (3) The content of the nano thermally conductive filler in the upper encapsulation layer and the lower encapsulation layer is 1wt%~5wt% respectively.

7. The high-stability photovoltaic module according to claim 1, characterized in that, The back substrate includes a double-glass structure or an organic backsheet containing an oxygen barrier layer. And / or, the oxygen permeability of the back substrate is less than 1×10⁻⁶. -3 g·m -2 ·d -1 .

8. The high-stability photovoltaic module according to claim 1, characterized in that, The front cover plate includes glass and a coating disposed on the surface of the glass; the coating includes nano-silica and nano-titanium dioxide.

9. The method for preparing a high-stability photovoltaic module according to any one of claims 1 to 8, characterized in that, Includes the following steps: S1. Lay an encapsulation layer on the surface of the front cover plate; S2. Arrange several battery cells with gaps between them to form micro-gap heat conduction channels between adjacent battery cells. Install elastic buffer units at both ends of the micro-gap heat conduction channels and then weld them together to form a battery string. S3. Attach the multi-point equalization busbar along the main grid line of the battery string to complete the welding at at least three welding points; weld the miniature bypass diodes onto the multi-point equalization busbar so that every 2 to 4 battery cells are an independent protection unit, and each independent protection unit corresponds to a miniature bypass diode; then weld the main busbar perpendicularly to each battery string. S4. Lay out the lower encapsulation layer and the back substrate; S5. Perform lamination and encapsulation.

10. The method for preparing a high-stability photovoltaic module according to claim 9, characterized in that, The lamination temperature for the lamination encapsulation is 130~150℃, and the time is 8~15min.

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