InGaAs near-infrared detector structure, its array structure, and applications

Abstract

This application discloses an InGaAs near-infrared detector structure, its array structure, and its applications. The detector structure includes, from bottom to top, a first inversion layer, a second inversion layer, a first semiconductor doped layer, an active region, a second semiconductor doped layer, and a capping layer; the second inversion layer can form PN junctions with the first inversion layer and the first semiconductor doped layer, respectively. The array structure includes multiple array elements arranged in an array, and each array element includes the detector structure. By employing the design of inverted junctions and inversion layers, this application can effectively suppress circuit-level and device-level electrical signal crosstalk in the detector array, realizing a simple row-column addressing architecture of InGaAs near-infrared detector array with no crosstalk. The circuit structure is simple, highly controllable, and low in cost.

Description

Technical Field

[0001] This application specifically relates to an InGaAs near-infrared detector structure, its array structure, and its applications, belonging to the field of optoelectronic device technology. Background Technology

[0002] InGaAs near-infrared detector arrays are important optoelectronic devices, forming the basis for near-infrared imaging, spectral detection, spectral imaging, and polarization imaging. The performance of each element and the array size determine its overall performance. To improve integration and reduce packaging complexity, detector arrays typically share a single substrate, with different elements fabricated on the same substrate. Each element has at least two electrodes, through which the output electrical signal of each element can be read out. One electrode lead-out method is flip-chip bonding, requiring M×N+1 electrodes for an M×N detector array, where all elements share a single electrode, resulting in technical complexity and low yield. Another method involves fanning out the electrodes of each element onto the periphery of the detector array on-chip, forming an electrical connection with the readout circuitry. For an M×N detector array, this also requires M×N+1 electrodes, with all elements sharing a single electrode. This technique increases the difficulty of in-plane electrode wiring and reduces fill factor, making it particularly difficult to implement for large array configurations. In comparison, the row-column cross-addressing readout method is the simplest. For an M×N detector array, only M+N electrodes are needed, with each row and column element sharing one electrode. When the external circuit simultaneously selects a row electrode and a column electrode, the electrical signal of the element connected to both electrodes is read out. Other elements are not read out because their two connected electrodes are not simultaneously selected. However, this shared row and column electrode architecture suffers from crosstalk problems due to parallel bypass electrical signals between elements. In practical applications, complex readout currents and corresponding algorithms are often required to reduce crosstalk. Summary of the Invention

[0003] The main objective of this application is to provide an InGaAs near-infrared detector structure, its array structure, and its applications to overcome the shortcomings of the prior art.

[0004] To achieve the aforementioned objectives, the technical solution adopted in this application includes:

[0005] The first aspect of this application provides an InGaAs near-infrared detector structure, which includes a first inversion layer, a second inversion layer, a first semiconductor doped layer, an active region, a second semiconductor doped layer, and a capping layer arranged sequentially from bottom to top; wherein the first inversion layer and the first semiconductor doped layer are of a first conductivity type, the second inversion layer, the second semiconductor doped layer, and the capping layer are of a second conductivity type, and the second inversion layer can form a PN junction with the first inversion layer and the first semiconductor doped layer, respectively.

[0006] In one embodiment, the detector structure has a stepped structure, wherein the upper platform is located on the top surface of the detector structure and the lower platform is located on the surface of the second inversion layer.

[0007] In one embodiment, a first electrode and a second electrode are respectively provided on the upper and lower platforms of the stepped structure.

[0008] In one embodiment, the first inversion layer includes an N-InP layer, the second inversion layer includes a P-InP layer, the first semiconductor doped layer includes an N-InP layer, the active region includes an i-InGaAs layer, the second semiconductor doped layer includes a P-InP layer, and the capping layer includes a P-InGaAs layer.

[0009] In one embodiment, the first inversion layer, the second inversion layer, the first semiconductor doped layer, the active region, the second semiconductor doped layer, and the capping layer are sequentially stacked on a substrate, and the substrate has a first conductivity type.

[0010] In some cases, the first conductivity type and the second conductivity type can be P-type and N-type, respectively.

[0011] A second aspect of this application provides an InGaAs near-infrared detector array structure, comprising multiple array elements arranged in an array; the array elements include the InGaAs near-infrared detector structure described above.

[0012] In one embodiment, in any InGaAs near-infrared detector structure, at least the structural layers from the first semiconductor doped layer to the capping layer are spaced apart from the corresponding structural layers in other InGaAs near-infrared detector structures.

[0013] In one embodiment, multiple second inversion layers in multiple InGaAs near-infrared detector structures arranged in the same row of the array structure are spaced apart from each other, while multiple second inversion layers in multiple InGaAs near-infrared detector structures arranged in the same column of the array structure are interconnected.

[0014] In one embodiment, the first inversion layer extends continuously among the plurality of InGaAs near-infrared detector structures. In some cases, the first inversion layer in each InGaAs near-infrared detector structure may also be spaced apart from the first inversion layers in other InGaAs near-infrared detector structures.

[0015] In one embodiment, a plurality of the array elements are arranged on the surface of the same substrate. In some cases, if the substrate is also of the first conductivity type, the first inversion layer may be omitted, or the substrate may be used as the first inversion layer.

[0016] The third aspect of this application provides an InGaAs near-infrared detector array structure comprising multiple array elements arranged in an array, each array element including an InGaAs near-infrared detector structure; the multiple InGaAs near-infrared detector structures are all formed within a semiconductor material layer, the semiconductor material layer comprising, from bottom to top, a first inversion layer, a second inversion layer, a first semiconductor doped layer, an active region, a second semiconductor doped layer, and a capping layer, wherein the first inversion layer and the first semiconductor doped layer are of a first conductivity type, the second inversion layer, the second semiconductor doped layer, and the capping layer are of a second conductivity type, and the second inversion layer can form PN junctions with the first inversion layer and the first semiconductor doped layer, respectively; furthermore, the semiconductor material layer also provides multiple isolation structures for isolating the multiple InGaAs near-infrared detector structures from each other, the isolation structures extending at least from the top of the semiconductor structure layer to the surface or interior of the first inversion layer.

[0017] In one embodiment, the isolation structure is a platform isolation structure, wherein the upper platform and the lower platform are respectively disposed on the top surface of the InGaAs near-infrared detector structure and the surface of the second inversion layer, and the upper platform and the lower platform of the stepped structure are respectively provided with a first electrode and a second electrode.

[0018] In one embodiment, the first inversion layer includes an N-InP layer, the second inversion layer includes a P-InP layer, the first semiconductor doped layer includes an N-InP layer, the active region includes an i-InGaAs layer, the second semiconductor doped layer includes a P-InP layer, and the capping layer includes a P-InGaAs layer.

[0019] In one embodiment, the semiconductor material layer is disposed on a substrate, and the substrate has a first conductivity type. In this case, the first inversion layer may also be omitted, and the substrate may be used in place of the first inversion layer.

[0020] A fourth aspect of this application provides a near-infrared detection module, comprising:

[0021] In the InGaAs near-infrared detector array structure, one of the capping layer and the second inversion layer of each InGaAs near-infrared detector structure is electrically connected to the first electrode, and the other is electrically connected to the second electrode.

[0022] The row and column addressing electrode structure includes multiple row electrodes and multiple column electrodes;

[0023] In this array, the first electrode of each of the multiple array elements arranged in the same row of the array structure is connected to a row electrode, and the second electrode of each of the multiple array elements arranged in the same column of the array structure is connected to a column electrode.

[0024] In one embodiment, the capping layer and the second inversion layer of the InGaAs near-infrared detector structure are electrically connected to the first electrode and the second electrode, respectively.

[0025] The fifth aspect of this application provides a method for fabricating an InGaAs near-infrared detector array structure, which can be implemented based on semiconductor device fabrication processes known in the art, such as wafer-level semiconductor device fabrication processes.

[0026] Compared with existing technologies, this application can effectively suppress circuit-level and device-level electrical signal crosstalk in the detector array by adopting the design of reverse junction and inversion layer, realizing a simple row-column cross-addressing architecture of InGaAs near-infrared detector array without crosstalk. The circuit structure is simple, highly controllable, and low in cost. Attached Figure Description

[0027] Embodiments of this application are illustrated in conjunction with the accompanying drawings, which are incorporated in and form part of this specification, and together with the specification are used to explain this application and enable those skilled in the art to make and use this application.

[0028] Figure 1 This is a schematic diagram of a row-column cross-addressing electrode architecture for an 8×8 detector array in a typical implementation of this application;

[0029] Figure 2a This is a schematic diagram of the basic structure of an InGaAs pin detector in the prior art;

[0030] Figure 2b This is a schematic diagram of the basic structure of an InGaAs pin detector array in the prior art;

[0031] Figure 3 yes Figure 2b The image shows the photoelectric response test diagram of the detector array under illumination.

[0032] Figure 4a This is a schematic diagram of the basic structure of an improved InGaAs pin detector array;

[0033] Figure 4b This is a schematic diagram of the basic structure of another improved InGaAs pin detector array;

[0034] Figure 5a This is a schematic diagram of the basic structure of an InGaAspin detector in a typical implementation case of this application;

[0035] Figure 5b This is a schematic diagram of the basic structure of an InGaAspin detector array in a typical implementation case of this application. Detailed Implementation

[0036] Although specific configurations and arrangements have been discussed, it should be understood that this is for illustrative purposes only. Therefore, other configurations and arrangements may be used without departing from the scope of this application. Furthermore, this application can also be employed in a variety of other applications. The functional and structural features described in this application can be combined, adjusted, and modified with each other and in various ways not specifically shown in the accompanying drawings, such combinations, adjustments, and modifications being within the scope of this application.

[0037] Generally, terms can be understood at least in part according to their usage in the context. For example, the term "one or more" as used in this specification, depending at least in part on the context, can be used to describe any component, structure, or feature in the singular, or to describe a combination of components, structures, or features in the plural. Similarly, terms such as "a," "an," or "the" can also be understood, depending at least in part on the context, to convey either a singular or a plural usage. Furthermore, the term "based on..." can be understood not necessarily to convey an exclusive set of factors, but rather, depending at least in part on the context, may alternatively allow for the presence of additional factors that do not necessarily have to be explicitly described.

[0038] It should be readily understood that the meanings of “on,” “above,” and “on top of” in this application should be interpreted in the broadest sense, such that “on” means not only “directly on something,” but also “on something” including the presence of an intermediate component or layer between the two, and that “on something” or “above something” means not only “on something” or “above something,” but also “on something” or “above something” where no intermediate component or layer between the two exists.

[0039] Furthermore, for ease of description, spatial relative terms such as "below," "under," "lower," "above," and "upper" may be used in this specification to describe the relationship of one element or component to another element or component shown in the accompanying drawings. In addition to the orientations described in the figures, spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or otherwise), and the spatial relative descriptive terms used in this specification may be interpreted accordingly.

[0040] As used in this specification, the term "layer" refers to a portion of material comprising a region of a certain thickness. A layer may extend over the entirety of an underlying or upper layer structure, or may have a extent smaller than that of the underlying or upper layer structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure, with a thickness less than that of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically, and / or along a tapered surface. A substrate may be a single layer, which may include one or more layers, and / or may have one or more layers on, above, and / or below it. A single layer may include multiple layers. For example, a semiconductor material layer may include one or more doped or undoped semiconductor material layers, and may have the same or different materials.

[0041] Please see Figure 1 The image illustrates an InGaAs detector array with a row-column interleaved addressing electrode architecture. The array comprises multiple elements arranged in an 8x8 grid, each element including an InGaAs detector structure.

[0042] Figure 1 The diagram shows the row-column interleaved addressing electrode architecture of an 8×8 detector array. Electrodes 11, 12, 13, ..., 18 are column electrodes, and electrodes 21, 22, 23, ..., 28 are row electrodes. During operation, by selecting any pair of row and column electrodes, the electrical signal of the array element connected by the two electrode leads can be read. For example, connecting row electrode 11 and column electrode 21 brings up the upper left element in the array, where the electrical connections are as follows... Figure 1 As indicated by the blue arrow in the middle.

[0043] If the array element uses a conventional InGaAs pin detector, its material structure is as follows: Figure 2a As shown, from bottom to top, the N-type InP substrate consists of an N-type InP layer, an intrinsic InGaAs layer, a P-type InP layer, and a highly doped P-type InnGaAs layer. The intrinsic InGaAs layer is the active region, generating photogenerated carriers under illumination. The device structure of adjacent elements in the same row of the detector array is shown below. Figure 2bAs shown, the top electrode (also called the "first electrode") is on the upper surface of the highly doped P-type InGaAs layer, and the bottom electrode (also called the "second electrode") is on the upper surface of the N-type InP layer. Considering that in actual processes, mesa etching is difficult to perfectly stop on the upper surface of the N-type InP layer and may penetrate into the N-type InP layer, the bottom electrode can also be lower than the upper surface of the N-type InP layer, in short, it is located below the etched mesa. The N-type InP layer between adjacent array elements is etched out, the top electrode of the array elements in the same row is shared, and the bottom electrode of the array elements in the same column is shared. In this case, when the incident light irradiates the detector array, the active region of each array element generates photogenerated carriers. When the left array element is selected by row and column addressing, this array element will form a path between the upper and lower electrodes, and the electrical signal will be read out.

[0044] However, due to the presence of the N-type substrate, although the N-type InP layer between adjacent array elements is etched, the N-type InP layers of the two array elements are still electrically connected. This causes the upper electrode of the adjacent right array element to be connected to the lower electrode on the left array element through the N-type InP layer and the substrate. Consequently, the carriers generated in the undoped InGaAs layer of the right array element also contribute to the sampling signal, forming device-level crosstalk and affecting the normal operation of the detector array.

[0045] Figure 3 Showing Figure 2b The diagram compares three operating modes of the detector array. In the first mode, both array elements are illuminated, the substrate is conductive, and the photocurrent generated at -0.4V is approximately 20 μA, with photogenerated carriers from both elements being collected. In the second mode, only the left array element is illuminated, while the right array element has no photogenerated carriers; the substrate is conductive, and the photocurrent generated at -0.4V is approximately 10 μA. In the third mode, both array elements are illuminated, the substrate is not conductive, and the photocurrent generated at -0.4V is approximately 10 μA. It can be seen that... Figure 2b In the detector array structure shown, the substrate conduction design leads to significant signal crosstalk.

[0046] It should be noted that although there is no crosstalk current in the second and third cases mentioned above, the second case is impossible because the incident light would illuminate all array elements. The third case is also impractical because the substrate is generally not an insulating medium.

[0047] To address the aforementioned shortcomings of existing detector arrays, one improvement is to first epitaxially layer a P-type inversion layer (e.g., ...) on an N-type InP substrate. Figure 4a (as shown), or replace the N-type InP substrate with a P-type substrate (such as...). Figure 4b (As shown). These two improved structures form back-to-back NPN junctions between the bottom electrodes of adjacent array elements, thereby suppressing device-level crosstalk. However, in practice, for Figure 1The simple row and column addressing electrical connection shown still suffers from circuit-level crosstalk in this improved scheme.

[0048] Specifically, regarding this improvement plan, such as Figure 1 As shown, when row electrode 11 and column electrode 21 are connected, besides the main electrical signal path indicated by the blue arrow leading to the upper left array element, there are many other parallel circuits, such as the parallel circuit shown by the red dashed line. This parallel circuit passes through three array elements with coordinates (11, 22), (12, 22), and (12, 21) in sequence. The array elements with coordinates (11, 22) and (12, 21) have the same bias polarity, which is the same as the bias polarity of the array element with coordinates (11, 21) in the blue arrow electrical path, but opposite to the polarity of the array element with coordinates (12, 22). Since PN diodes conduct under both forward and reverse bias under illumination, current can also pass through the path shown by the red dashed line. Its photocurrent contribution is theoretically consistent with that of the path shown by the blue arrow, thus forming significant circuit-level crosstalk.

[0049] As can be seen, crosstalk is an unavoidable problem in all of the above schemes. The presence of crosstalk severely affects functions that rely on the detector array, such as imaging, spectral detection, spectral imaging, and polarization imaging.

[0050] See Figures 5a-5b A typical embodiment of this application proposes an InGaAs near-infrared detector and its array, which can effectively suppress the aforementioned inter-element crosstalk at both the device level and circuit level. This detector is an InGaAs pin detector. Compared to... Figure 4a The detector structure shown in this embodiment adds an N-type InP inversion layer below the bottommost P-type InP layer. The bottommost P-type InP layer is etched between elements in the same row, but not between elements in the same column. The top electrode is on the surface of the highly doped P-type InGaAs layer, and the bottom electrode is on the surface of the bottommost P-type InP layer. In this detector structure, when both the row and column electrodes of an element are selected simultaneously, the PIN junction operates in conventional detector mode under reverse bias, and the NP junction below it is also turned on, thus selecting the element. From a crosstalk perspective, the presence of the bottommost N-type InP inversion layer in this detector structure creates back-to-back PNP junctions between the bottom electrodes of adjacent elements in the same row. This blocks the transport of photogenerated carriers generated in the active region through the substrate between adjacent elements, preventing the aforementioned device-level crosstalk between adjacent elements. Furthermore, Figure 1In this embodiment, circuit-level crosstalk in the red parallel circuit shown is also suppressed. This parallel circuit passes sequentially through three array elements with coordinates (11, 22), (12, 22), and (12, 21). The two array elements with coordinates (11, 22) and (12, 21) have the same bias polarity, which is the same as the bias polarity of the array element with coordinate (11, 21) in the blue arrow path, but opposite to the polarity of the array element with coordinate (12, 22). For the positively biased array element, although the PIN junction is conducting, the incident light is depleted by the PIN junction, causing the NP junction below to not conduct, thus preventing the array element from conducting and suppressing the parallel circuit current. Not only the parallel circuit shown by the red dashed line, but all other parallel circuits are also non-conductive due to the presence of positively biased array elements.

[0051] Obviously, compared with the prior art, the detector, detector array and the corresponding row and column addressing electrode structure of this embodiment have the advantages of simple and easy-to-use circuit and low crosstalk between array elements, and are especially suitable for row and column addressing lead-out electrode architecture.

[0052] The InGaAs near-infrared detector array of this embodiment can be fabricated using conventional semiconductor processes. For example, it can be fabricated first using methods such as metal-organic chemical vapor deposition (MOCVD) or plasma-enhanced chemical vapor deposition (PECVD) on the InGaAs substrate. + On an InP substrate (N+-InP sub), an N-InP layer (first inversion layer), a P-InP layer (second inversion layer), an N-InP layer, an i-InGaAs layer (active region), a P-InP layer, and a highly doped P-InGaAs layer (Pi) are epitaxially grown sequentially. + - An InGaAs layer (i.e., capping layer) is formed to create a semiconductor material layer. Then, this semiconductor material layer is etched using processes such as dry / wet etching to form multiple mesa isolation structures, which isolate multiple InGaAs near-infrared detector structures from each other. The etching can start from the surface of the capping layer and end at the surface or inside of the first inversion layer. Afterward, first electrodes and second electrodes can be fabricated on each InGaAs near-infrared detector structure using processes such as metal evaporation and sputtering. Finally, conductive lines can be fabricated using processes such as printing, evaporation, and sputtering, or multiple first electrodes and multiple second electrodes can be electrically connected to the corresponding row electrodes and column electrodes through lead connections, thereby forming a near-infrared detection module.

[0053] It should be understood that the above embodiments are merely illustrative of the technical concept and features of this application, and are intended to enable those skilled in the art to understand the content of this application and implement it accordingly. They should not be construed as limiting the scope of protection of this application. All equivalent changes or modifications made in accordance with the spirit and essence of this application should be included within the scope of protection of this application.

Claims

1. An InGaAs near-infrared detector structure, characterized in that, It includes a first inversion layer, a second inversion layer, a first semiconductor doped layer, an active region, a second semiconductor doped layer, and a capping layer arranged sequentially from bottom to top; wherein the first inversion layer and the first semiconductor doped layer are of the first conductivity type, the second inversion layer, the second semiconductor doped layer, and the capping layer are of the second conductivity type, and the second inversion layer can form a PN junction with the first inversion layer and the first semiconductor doped layer, respectively.

2. The InGaAs near-infrared detector structure according to claim 1, characterized in that: The detector structure has a stepped structure, wherein the upper platform is located at the top surface of the detector structure and the lower platform is located on the surface of the second inversion layer. And / or, the first inversion layer includes an N-InP layer, the second inversion layer includes a P-InP layer, the first semiconductor doped layer includes an N-InP layer, the active region includes an i-InGaAs layer, the second semiconductor doped layer includes a P-InP layer, and the capping layer includes a P-InGaAs layer; And / or, the first inversion layer, the second inversion layer, the first semiconductor doped layer, the active region, the second semiconductor doped layer and the capping layer are sequentially stacked on the substrate, and the substrate has a first conductivity type.

3. The InGaAs near-infrared detector structure according to claim 2, characterized in that: The upper and lower platforms of the stepped structure are respectively provided with a first electrode and a second electrode.

4. An InGaAs near-infrared detector array structure, comprising multiple array elements arranged in an array, characterized in that: The array element comprises the InGaAs near-infrared detector structure according to any one of claims 1-3.

5. The InGaAs near-infrared detector array structure according to claim 4, characterized in that: In any InGaAs near-infrared detector structure, at least the structural layer from the first semiconductor doped layer to the capping layer is spaced apart from the corresponding structural layer in other InGaAs near-infrared detector structures. And / or, multiple array elements are arranged on the surface of the same substrate.

6. The InGaAs near-infrared detector array structure according to claim 5, characterized in that: Multiple second inversion layers in multiple InGaAs near-infrared detector structures arranged in the same row of the array structure are spaced apart from each other, while multiple second inversion layers in multiple InGaAs near-infrared detector structures arranged in the same column of the array structure are interconnected.

7. An InGaAs near-infrared detector array structure, comprising multiple array elements arranged in an array, wherein each array element comprises an InGaAs near-infrared detector structure, characterized in that: Multiple InGaAs near-infrared detector structures are formed within a semiconductor material layer. The semiconductor material layer includes, from bottom to top, a first inversion layer, a second inversion layer, a first semiconductor doped layer, an active region, a second semiconductor doped layer, and a capping layer. The first inversion layer and the first semiconductor doped layer are of a first conductivity type, and the second inversion layer, the second semiconductor doped layer, and the capping layer are of a second conductivity type. The second inversion layer can form a PN junction with the first inversion layer and the first semiconductor doped layer, respectively. Furthermore, the semiconductor material layer also contains multiple isolation structures for isolating the multiple InGaAs near-infrared detector structures from each other. The isolation structures extend at least from the top of the semiconductor structure layer to the surface or interior of the first inversion layer.

8. The InGaAs near-infrared detector array structure according to claim 7, characterized in that: The isolation structure is a platform isolation structure, wherein the upper platform and the lower platform are respectively located on the top surface of the InGaAs near-infrared detector structure and the surface of the second inversion layer, and the upper platform and the lower platform of the stepped structure are respectively provided with a first electrode and a second electrode. And / or, the first inversion layer includes an N-InP layer, the second inversion layer includes a P-InP layer, the first semiconductor doped layer includes an N-InP layer, the active region includes an i-InGaAs layer, the second semiconductor doped layer includes a P-InP layer, and the capping layer includes a P-InGaAs layer; And / or, the semiconductor material layer is disposed on the substrate, and the substrate has a first conductivity type.

9. A near-infrared detection module, characterized in that, include: The InGaAs near-infrared detector array structure according to any one of claims 4-8, wherein one of the capping layer and the second inversion layer of each InGaAs near-infrared detector structure is electrically connected to the first electrode and the other is electrically connected to the second electrode. The row and column addressing electrode structure includes multiple row electrodes and multiple column electrodes; In this array, the first electrode of each of the multiple array elements arranged in the same row of the array structure is connected to a row electrode, and the second electrode of each of the multiple array elements arranged in the same column of the array structure is connected to a column electrode.

10. The near-infrared detection module according to claim 9, characterized in that: The capping layer and the second inversion layer of the InGaAs near-infrared detector structure are electrically connected to the first electrode and the second electrode, respectively.

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