830 nm led epiwafer for improving aged dark zone and method of manufacturing the same
Patent Information
- Application Number
- CN202611015831.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-09
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2046-07-09
AI Technical Summary
由于其需要在N型欧姆接触层GaAs和粗化层AlGaAs之间插入一层电极过渡层GaInP材料,受材料晶格匹配度和GaInP外延生长成核的特点影响,其晶格的成核点较少,因此当此GaInP材料生长厚度到达一定晶格临界厚度后,并继续生长粗化层AlGaAs时,会由于GaInP成核位置的不均,导致Al原子提前占据点缺陷凹坑位置,从而形成线缺陷向之后的外延层延伸
1、本发明通过在常规的830nm LED外延结构中,引入无序化界面过渡层,改善了常规结构与技术中GaInP过渡层材料上生长AlGaAs粗化层过程中,容易产生的线缺陷延伸问题;同时,采用无序化外延生长工艺,通过稀释度控制预反应速率达到无序化生长工艺的目的,扩大接触层材料与粗化层之间的势垒带隙差,从而防止老化过程中的电子泄漏发光效率衰减,可明显改善局部老化暗区。
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Figure CN122579780B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of LED technology, specifically to an 830nm LED epitaxial wafer with improved dark areas during aging and its preparation method. Background Technology
[0002] Near-infrared LEDs with an emission wavelength of 830nm possess both penetrability and photobiological modulatory effects, earning them the reputation of "skin-healing light" or "golden wavelength for deep repair" in the medical aesthetics field. Thanks to the unique characteristics of this emission wavelength and light power, after being absorbed by the mitochondria of cells, the light source enhances cellular energy metabolism and promotes tissue repair and regeneration, giving 830nm near-infrared LEDs a vast application market. The commonly used light power density for 830nm near-infrared LED applications is 75mW / cm². 2 ~100mW / cm 2 The brightness of an LED chip determines the intensity of energy emitted by the light source on and within the skin, as well as its penetrating power. In existing technology, the epitaxial structure of a conventional 830nm near-infrared LED chip is as follows: Figure 1As shown, from bottom to top, the structure includes a GaAs substrate 100, a buffer layer 101, an etching stop layer 102, an N-type ohmic contact layer 103, an electrode transition layer 104, a roughening layer 105, an N-type confinement layer 106, a multi-quantum-well light-emitting layer 107, a P-type confinement layer 108, a P-type extension layer 109, and a P-type window layer 110. Because an electrode transition layer GaInP needs to be inserted between the N-type ohmic contact layer GaAs and the roughening layer AlGaAs, the nucleation points in the GaInP lattice are relatively few due to the influence of the material's lattice matching degree and the characteristics of GaInP epitaxial growth nucleation. Therefore, when the GaInP material reaches a certain critical lattice thickness and the roughening layer AlGaAs continues to grow, the unevenness of the GaInP nucleation sites causes Al atoms to prematurely occupy point defect pits, thus forming line defects that extend into the subsequent epitaxial layer. This chip is highly susceptible to LED brightness decay and aging under continuous power-on or high-temperature environments. The continuous expansion of positional defects damages crystal quality, reduces luminous efficiency, and creates localized dark areas within the chip, ultimately leading to chip failure. Furthermore, conventional 830nm LEDs typically use GaAs as the quantum well and AlGaAs as the quantum barrier layer. During growth, to ensure the crystal quality of the epitaxial layer, the molar ratio of As to Ga atoms in the quantum well is very high. This leads to a pre-reaction at the well-barrier interface due to the presence of arsenic-rich vacancies. Al atoms prematurely react with arsenic atoms on the quantum well surface, forming unstable lattice defects or surface contamination, creating potential leakage channels. Under continuous power-on or high-temperature environments, leakage current is generated in some well-barrier interfaces as the junction temperature rises. This uniform current congestion reduces the potential barrier height between the quantum well and quantum barrier due to band distortion, causing a drop in the turn-on voltage of the 830nm LED and triggering "subthreshold turn-on." This anomaly is caused by the presence of a local leakage current channel, which manifests as local dark areas and low turn-on voltage during chip use, ultimately leading to brightness failure. Through dissection and analysis of the LED chip, it was found that there are local dark areas after aging, resulting in severe brightness decay.
[0003] Therefore, developing an 830nm LED that can improve local dark areas and aging phenomena that occur during operation is of great significance to the field of medical aesthetics applications. Summary of the Invention
[0004] To address the shortcomings of existing technologies, this invention provides an 830nm LED epitaxial wafer with improved aging dark areas and its preparation method. The 830nm LED epitaxial wafer maintains stable and normal chip illumination before and after aging, and the luminous efficiency decay or local dark areas are effectively improved.
[0005] The first objective of this invention is to provide an 830nm LED epitaxial wafer with improved dark areas during aging. Starting from the GaAs substrate, from bottom to top, the wafer consists of a buffer layer, an etching stop layer, an N-type ohmic contact layer, an electrode transition layer, a roughening layer, an N-type confinement layer, a symmetrical 5:3 ratio light-emitting region, a P-type confinement layer, a P-type extension layer, and a P-type window layer. The electrode transition layer comprises a first disordered transition layer, a second disordered transition layer, and a third disordered transition layer, all of which are grown using a disordered epitaxial process. The symmetrical 5:3 ratio light-emitting region is a cyclic structure formed by alternating quantum barrier layers and quantum well layers; the quantum well layer consists of a pre-placed quantum well layer, an arsenic-rich quantum well layer, and a post-coated quantum well layer, all of which are grown using an epitaxial process with complementary upper and lower pipelines.
[0006] This invention introduces a disordered interface transition layer to replace the original GaInP electrode transition layer in a conventional 830nm LED epitaxial structure, and employs a disordered epitaxial growth process. This reduces the risk of defect extension during the backward lattice growth of the original ordered GaInP transition layer. Furthermore, the introduction of this disordered interface transition layer can address the issue of micro-leakage current in the surface contact layer by leveraging the barrier height, thereby improving localized leakage current dimming and light decay during aging. Simultaneously, the introduction of a symmetrical 5:3 ratio light-emitting region structure and a complementary upper and lower pipeline epitaxial growth process solves the problem of localized bandgap distortion caused by arsenic-rich vacancies at the well / barrier interface during aging, improving the decrease in turn-on voltage during aging. The resulting 830nm LED exhibits strong brightness, good stability, no dark areas during power-on aging, and normal turn-on voltage.
[0007] Furthermore, the material of the first disordered transition layer is (Al) 0.8 Ga 0.2 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm, uses SiH4 as the N-type dopant with a doping concentration of 2×10⁻⁶. 18 cm -3 ~3×10 18 cm -3 The material of the second disordered transition layer is (Al). 0.5 Ga 0.5 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm, uses SiH4 as the N-type dopant with a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm -3 The material of the third disordered transition layer is (Al). 0.2 Ga 0.8 )0.5 In 0.5 P, with a thickness of 20nm–40nm, uses SiH4 as the N-type dopant with a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm -3 This invention employs a disordered epitaxial growth process to grow a transition layer, effectively avoiding the subsequent defect propagation problem caused by abnormal nucleation points of surface defects in the originally ordered GaInP layer material. The randomized atomic arrangement on the surface of the disordered AlGaInP material does not belong to the same crystal order structure as the subsequently grown AlGaAs and other materials, thus preventing defect propagation. Simultaneously, the AlGaInP transition layer material used in the disordered layer has a larger band gap, making it less likely for micro-leakage currents near the surface contact layer to pass through the underlying epitaxial layer material, improving crystal quality and mitigating the problem of dark areas caused by light decay during aging.
[0008] Furthermore, the cyclic number of the symmetrical 5:3 ratio light-emitting region is 4 pairs.
[0009] Furthermore, the material of the pre-placed quantum well layer is GaAs, with a thickness of 1.0 nm to 1.5 nm and a 5:3 molar ratio of 4.0 to 8.0; the material of the arsenic-rich quantum well layer is GaAs, with a thickness of 2.5 nm to 3.5 nm and a 5:3 molar ratio of 60 to 80; and the material of the post-coating quantum well layer is GaAs, with a thickness of 1.0 nm to 1.5 nm and a 5:3 molar ratio of 4.0 to 8.0. In each group of periodic luminescent quantum well / quantum barrier structures, the symmetrical 5:3 ratio luminescent region of this invention comprises a pre-placed quantum well layer, an arsenic-rich quantum well layer, and a post-coating quantum well layer. The 5:3 ratio refers to the molar concentration ratio of arsenic atoms (group V source material) to gallium atoms (group III source material). Because the 5:3 molar ratios on both sides (the pre-placed quantum well layer and the post-coating quantum well layer) are lower and the same, a symmetrical quantum well structure is formed, hence the name symmetrical 5:3 ratio luminescent region.
[0010] The second objective of this invention is to provide a method for preparing an 830nm LED epitaxial wafer with improved dark areas during aging, comprising the following steps: using an MOCVD device, epitaxially growing, from bottom to top, a buffer layer, an etching stop layer, an N-type ohmic contact layer, a first disordered transition layer, a second disordered transition layer, a third disordered transition layer, a roughening layer, an N-type confinement layer, a symmetrical 5:3 ratio light-emitting region, a P-type confinement layer, a P-type extension layer, and a P-type window layer; The first, second, and third disordered transition layers are all grown using a disordered epitaxial growth process. The disordered epitaxial growth process of this invention is a pre-reaction front-end dilution technique. The source material PH3 participating in the growth of the epitaxial layer is introduced into the MOCVD reaction chamber through an upper pipeline. At the same time, H2 participating in the pre-reaction front-end dilution is introduced into the MOCVD reaction chamber through a lower pipeline. This allows the group V source material PH3 and the group III source materials TMAl, TMGa, and TMIn to be diluted by the H2 in the lower pipeline before the pre-reaction. By controlling the pre-reaction rate through dilution, the purpose of the disordered growth process can be achieved. In this way, the micro-leakage current problem of the surface contact layer can be improved by utilizing the barrier height, thereby improving the local leakage current dimming and light decay during the aging process.
[0011] The pre-placed quantum well layer, arsenic-rich quantum well layer, and post-coated quantum well layer in the symmetrical 5:3 ratio light-emitting region are all grown using a complementary upper and lower pipeline epitaxial growth process. In this invention, the complementary upper and lower pipeline epitaxial growth process involves simultaneously introducing the group V source material AsH3 used in the quantum well layer into the MOCVD reaction chamber through both the upper and lower pipelines. The total flow rate of AsH3 introduced through the upper and lower pipelines is a fixed value. The flow rate of AsH3 introduced through the lower pipeline gradually increases as growth progresses, while the flow rate of AsH3 introduced through the upper pipeline gradually decreases, but the total flow rate remains constant. Hence, it is called the complementary upper and lower pipeline epitaxial growth process. Through this complementary 5:3 ratio concentration process, the nucleation reaction of gallium and arsenic atoms in the well layer can be more precisely controlled from the perspective of flow rate adjustment, resulting in a smoother quantum well / barrier interface and avoiding the "subthreshold turn-on" anomaly during the aging process of 830nm LEDs.
[0012] Furthermore, the first disordered transition layer is grown using disordered epitaxial growth: the source material PH3 participating in the growth is introduced into the MOCVD reaction chamber through the upper pipeline, and the flow rate of PH3 is controlled at 300 sccm to 600 sccm; simultaneously, H2 participating in the pre-reaction front-end dilution is introduced into the MOCVD reaction chamber through the lower pipeline, and the flow rate of H2 is controlled at 2000 sccm to 3000 sccm; the second disordered transition layer is grown using disordered epitaxial growth: the source material PH3 participating in the growth is introduced into the MOCVD reaction chamber through the upper pipeline, and the flow rate of PH3 is controlled at 600 sccm. The flow rate of H2 participating in the pre-reaction front-end dilution is set to be 2500 sccm to 3500 sccm. The third disordered transition layer adopts disordered epitaxial growth: the source material PH3 participating in the growth is set to be introduced into the MOCVD reaction chamber through the upper pipeline, and the flow rate of PH3 is controlled to be 900 sccm to 1200 sccm. At the same time, the H2 participating in the pre-reaction front-end dilution is set to be introduced into the MOCVD reaction chamber through the lower pipeline, and the flow rate of H2 is controlled to be 3000 sccm to 4000 sccm.
[0013] Furthermore, the growth steps of the symmetrical 5:3 ratio light-emitting region are as follows: TMAl, TMGa, and AsH3 are introduced into the N-type confinement layer to grow the quantum well and quantum barrier, respectively, which are GaAs and Al. x1 Ga 1-x1 The As material has a periodic cyclic structure, and both the quantum wells and quantum barriers are undoped. A single quantum well consists of a pre-prepared quantum well layer, an arsenic-rich quantum well layer, and a post-coated quantum well layer. The thickness of the pre-prepared quantum well layer is 1.0 nm to 1.5 nm, the thickness of the arsenic-rich quantum well layer is 2.5 nm to 3.5 nm, the thickness of the post-coated quantum well layer is 1.0 nm to 1.5 nm, and the thickness of a single quantum barrier layer is 15 nm to 20 nm. The value of x1 ranges from 0.1 to 0.2.
[0014] Furthermore, the pre-formed quantum well layer is grown using a complementary upper and lower pipeline process: the flow rate of AsH3 entering the lower pipeline is set to S1, and the flow rate of AsH3 entering the upper pipeline is set to S2, and the sum of S1 and S2 is a fixed value of 80 sccm; from the start of growth, S1 gradually increases with growth, with an initial setting of 40 sccm, and then increasing from 40 sccm to 60 sccm during the growth process; correspondingly, S2 is linked to S1, and S2 gradually decreases as S1 increases, decreasing from 40 sccm to 20 sccm.
[0015] Furthermore, the arsenic-rich quantum well layer is grown using a complementary upper and lower pipeline process: the flow rate of AsH3 flowing into the lower pipeline is set to S3, and the flow rate of AsH3 flowing into the upper pipeline is set to S4, with the sum of S3 and S4 being a fixed value of 800 sccm; from the start of growth, S3 gradually increases with growth, with an initial setting of 400 sccm, and then increasing from 400 sccm to 600 sccm during the growth process; correspondingly, S4 is linked to S3, and S4 gradually decreases as S3 increases, decreasing from 400 sccm to 200 sccm.
[0016] Furthermore, the post-coated quantum well layer is grown using a complementary upper and lower pipeline process: the flow rate of AsH3 entering the lower pipeline is set to S5, and the flow rate of AsH3 entering the upper pipeline is set to S6, and the sum of S5 and S6 is a fixed value of 80 sccm; from the start of growth, S5 gradually increases with growth, with an initial setting of 40 sccm, and then increasing from 40 sccm to 60 sccm during the growth process; correspondingly, S6 is linked to S5, and S6 gradually decreases as S5 increases, decreasing from 40 sccm to 20 sccm.
[0017] Compared with the prior art, the present invention has the following advantages: 1. This invention improves the line defect extension problem that is easily generated during the growth of AlGaAs roughening layer on GaInP transition layer material in conventional structures and technologies by introducing a disordered interface transition layer into the conventional 830nm LED epitaxial structure. At the same time, by adopting a disordered epitaxial growth process, the purpose of disordered growth process is achieved by controlling the pre-reaction rate through dilution, thereby expanding the potential barrier band gap difference between the contact layer material and the roughening layer, thus preventing electron leakage and luminous efficiency decay during aging process, and significantly improving local aging dark areas.
[0018] 2. This invention optimizes the light-emitting region by introducing a symmetrical 5:3 ratio light-emitting region structure, which solves the problem of local band distortion caused by arsenic-rich vacancies at the well / barrier interface during aging and improves the voltage drop during the aging process. At the same time, through the complementary epitaxial growth process of the upper and lower pipelines, the nucleation reaction of gallium atoms and arsenic atoms in the well layer can be more precisely controlled from the perspective of flow regulation, resulting in a smoother quantum well / quantum barrier interface. It can also eliminate leakage current abnormalities at the well / barrier interface during the energized aging process. Attached Figure Description
[0019] Figure 1 This is a schematic diagram of the structure of a conventional 830nm LED epitaxial wafer; Figure 2 This is a schematic diagram of the structure of the 830nm LED epitaxial wafer of the present invention; Figure 3 This is a schematic diagram of the symmetrical 5:3 ratio light-emitting region of the present invention; Figure 4 The images show a comparison of the light emission of a conventional 830nm LED chip before and after power-on aging, where a is the light emission image before power-on aging and b is the light emission image after power-on aging. Figure 5 The image shows a comparison of the light emission of the 830nm LED chip before and after power-on aging, where a is the light emission image before power-on aging and b is the light emission image after power-on aging. Figure 6 This is an IV curve of a conventional 830nm LED before and after power-on aging. Figure 7 This is an IV curve diagram of the 830nm LED before and after power-on aging according to the present invention.
[0020] Explanation of the labels in the diagram: 100. GaAs substrate; 101. Buffer layer; 102. Etching stop layer; 103. N-type ohmic contact layer; 104. Electrode transition layer; 105. Roughening layer; 106. N-type confinement layer; 107. Multi-quantum well light-emitting layer; 108. P-type confinement layer; 109. P-type extension layer; 110. P-type window layer; 401. First disordered transition layer; 402. Second disordered transition layer; 403. Third disordered transition layer; 700. Symmetrical 5:3 ratio light-emitting region; 701. Quantum barrier layer; 702. Pre-placed quantum well layer; 703. Arsenic-rich quantum well layer; 704. Post-coated quantum well layer. Detailed Implementation
[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this application or its application or use. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0022] In the description of this application, it should be understood that the use of terms such as "first" and "second" to define components is merely for the purpose of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore should not be construed as limiting the scope of protection of this application.
[0023] In the description of this application, it should be understood that the orientation or positional relationship indicated by directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" is usually based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing this application and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this application; the directional terms "inner" and "outer" refer to the inner and outer contours relative to the outline of each component itself.
[0024] Please see Figures 1 to 7 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the shape, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0025] One embodiment of the present invention provides an 830nm LED epitaxial wafer for improving aging dark areas, the structural schematic of which is shown below. Figure 2 As shown, starting from the GaAs substrate 100 and going upwards, the layers are: buffer layer 101, etching stop layer 102, N-type ohmic contact layer 103, first disordered transition layer 401, second disordered transition layer 402, third disordered transition layer 403, roughening layer 105, N-type confinement layer 106, symmetrical 5:3 ratio light-emitting region 700, P-type confinement layer 108, P-type extension layer 109, and P-type window layer 110.
[0026] In some embodiments, the symmetrical 5:3 ratio light-emitting region 700 is a cyclic structure formed by alternating quantum barrier layers 701 and quantum well layers; the quantum well layer consists of a pre-placed quantum well layer 702, an arsenic-rich quantum well layer 703, and a post-coated quantum well layer 704, as shown in the schematic diagram below. Figure 3 As shown, all of them are grown using an epitaxial process with complementary upper and lower pipelines.
[0027] In some embodiments, the N-type ohmic contact layer material is GaAs, with a thickness of 60 nm to 100 nm and a doping concentration of 2.0 × 10⁻⁶. 18 cm -3 ~5.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0028] In some embodiments, the first disordered transition layer material is (Al) 0.8 Ga 0.2 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm and a doping concentration of 2×10⁻⁶. 18 cm -3 ~3×10 18 cm -3 SiH4 was used as the N-type dopant. A disordered epitaxial growth process was adopted. The source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline at a flow rate of 300 sccm to 600 sccm. At the same time, H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline at a flow rate of 2000 sccm to 3000 sccm.
[0029] In some embodiments, the second disordered transition layer material is (Al) 0.5 Ga 0.5 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm and a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18cm -3 SiH4 was used as the N-type dopant. A disordered epitaxial growth process was adopted. The source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline, and the flow rate of PH3 was set to be 600 sccm to 900 sccm. At the same time, H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline, and the flow rate of H2 was set to be 2500 sccm to 3500 sccm.
[0030] In some embodiments, the third disordered transition layer material is (Al) 0.2 Ga 0.8 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm and a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm -3 SiH4 was used as the N-type dopant. A disordered epitaxial growth process was adopted. The source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline at a flow rate of 900 sccm to 1200 sccm. At the same time, H2 participating in the pre-reaction dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline at a flow rate of 3000 sccm to 4000 sccm.
[0031] In some embodiments, the roughening layer material is Al. y1 Ga 1-y1 As, with a thickness of 7000nm–9000nm, y1 ranging from 0.20 to 0.30, and a doping concentration of 0.5×10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0032] In some embodiments, the N-type confinement layer material is Al. y2 Ga 1-y2 As, with a thickness of 200nm–500nm, y2 ranging from 0.40 to 0.50, and a doping concentration of 1×10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0033] In some embodiments, the symmetrical 5:3 ratio light-emitting region comprises four pairs of quantum well / quantum barrier structures, wherein the quantum well layer material is GaAs and the quantum barrier layer material is Al. x1 Ga 1-x1Specifically, a single quantum well consists of a pre-placed quantum well layer, an arsenic-rich quantum well layer, and a post-coated quantum well layer. The thickness of a single quantum barrier layer is 15 nm to 20 nm, where x1 ranges from 0.1 to 0.2. Both the quantum well and the quantum barrier are undoped.
[0034] In some embodiments, the P-type confinement layer material is Al. y3 Ga 1-y3 As, with a thickness of 200nm–500nm, y3 ranging from 0.40 to 0.50, and a doping concentration of 1×10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 CCl4 was used as the P-type dopant.
[0035] In some embodiments, the P-type extended layer material is Al. y4 Ga 1-y4 As, with a thickness of 1000nm–3000nm, y4 ranging from 0.20 to 0.30, and a doping concentration of 0.5 × 10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 CCl4 was used as the P-type dopant.
[0036] In some embodiments, the P-type window layer material is GaP, with a thickness of 50 nm to 100 nm and a doping concentration of 1 × 10⁻⁶. 19 cm -3 ~8×10 19 cm -3 CCl4 was used as the P-type dopant.
[0037] Another embodiment of the present invention provides a method for fabricating an 830nm LED epitaxial wafer with improved aging dark areas, comprising using an MOCVD device to epitaxially grow, from bottom to top, a buffer layer, an etching stop layer, an N-type ohmic contact layer, a first disordered transition layer, a second disordered transition layer, a third disordered transition layer, a roughening layer, an N-type confinement layer, a symmetrical 5:3 ratio light-emitting region, a P-type confinement layer, a P-type extension layer, and a P-type window layer, specifically including the following steps: (1) Growth buffer layer: The reaction chamber temperature was set to 700℃±20℃, and TMGa and AsH3 were introduced into the GaAs substrate to grow GaAs material with a thickness of 200nm~300nm and a doping concentration of 2.0×10 18 cm -3 ~5.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0038] (2) Growth of corrosion stop layer: The reaction chamber temperature is set to 700℃±20℃. TMGa, TMIn, and PH3 are introduced into the buffer layer to grow Ga with a thickness of 50nm~200nm. 0.5 In 0.5 P material, with a doping concentration of 1.0 × 10⁻⁶ 18 cm -3 ~2.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0039] (3) Growth of N-type ohmic contact layer: The reaction chamber temperature is set to 700℃±20℃. TMGa and AsH3 are introduced into the corrosion stop layer to grow GaAs material with a thickness of 60nm~100nm and a doping concentration of 2.0×10 18 cm -3 ~5.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0040] (4) Growth of the first disordered transition layer: The reaction chamber temperature was set to 670℃±10℃. TMAl, TMGa, TMIn, PH3, and H2 were introduced into the N-type ohmic contact layer to grow a (Al) layer with a thickness of 20nm~40nm. 0.8 Ga 0.2 ) 0.5 In 0.5 P-material, using SiH4 as the N-type dopant, with a doping concentration of 2 × 10⁻⁶. 18 cm -3 ~3×10 18 cm -3 The disordered epitaxial growth process was adopted, and the source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline, with a flow rate of PH3 of 300 sccm to 600 sccm. At the same time, H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline, with a flow rate of 2000 sccm to 3000 sccm.
[0041] (5) Growth of the second disordered transition layer: The reaction chamber temperature is set to 670℃±10℃. TMAl, TMGa, TMIn, PH3, and H2 are introduced into the first disordered transition layer to grow a (Al) layer with a thickness of 20nm~40nm. 0.5 Ga 0.5 ) 0.5 In 0.5 P-material, using SiH4 as the N-type dopant, with a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm-3 The disordered epitaxial growth process was adopted, and the source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline, with a flow rate of 600 sccm to 900 sccm. At the same time, H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline, with a flow rate of 2500 sccm to 3500 sccm.
[0042] (6) Growth of the third disordered transition layer: The reaction chamber temperature is set to 670℃±10℃. TMAl, TMGa, TMIn, PH3, and H2 are introduced into the second disordered transition layer to grow a (Al) layer with a thickness of 20nm~40nm. 0.2 Ga 0.8 ) 0.5 In 0.5 P-material, using SiH4 as the N-type dopant, with a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm -3 The disordered epitaxial growth process was adopted, and the source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline at a flow rate of 900 sccm to 1200 sccm. At the same time, H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline at a flow rate of 3000 sccm to 4000 sccm.
[0043] (7) Growth of the coarsening layer: The reaction chamber temperature was set to 670℃±10℃. TMAl, TMGa, and AsH3 were introduced into the third disordered transition layer to grow Al with a thickness of 7000nm~9000nm. y1 Ga 1-y1 For As material, the value of y1 ranges from 0.20 to 0.30, and the doping concentration is 0.5 × 10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0044] (8) Growth of N-type confinement layer: Set the reaction chamber temperature to 670℃±10℃, introduce TMAl, TMGa, and AsH3 into the roughened layer, and grow Al with a thickness of 200nm~500nm. y2 Ga 1-y2 For As material, the value of y2 ranges from 0.40 to 0.50, and the doping concentration is 1×10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 SiH4 was used as the N-type dopant.
[0045] (9) Growth of a symmetrical 5:3 ratio light-emitting region: The reaction chamber temperature is set to 670℃±10℃. TMAl, TMGa, and AsH3 are introduced into the N-type confinement layer to grow quantum wells and quantum barriers of GaAs and Al, respectively. x1 Ga 1-x1 The periodic cyclic structure of As material consists of a pre-placed quantum well layer, an arsenic-rich quantum well layer, and a post-coating quantum well layer. The thickness of the pre-placed quantum well layer is 1.0 nm to 1.5 nm, with a 5:3 molar ratio of 4.0 to 8.0. The thickness of the arsenic-rich quantum well layer is 2.5 nm to 3.5 nm, with a 5:3 molar ratio of 60 to 80. The thickness of the post-coating quantum well layer is 1.0 nm to 1.5 nm, with a 5:3 molar ratio of 4.0 to 8.0. The thickness of a single quantum barrier layer is 15 nm to 20 nm. The value of x1 ranges from 0.1 to 0.2. There are 4 cyclic pairs, and both the quantum wells and quantum barriers are undoped.
[0046] (10) Pre-setting of quantum well layer before growth: The reaction chamber temperature is set to 670℃±10℃. TMGa and AsH3 are introduced into the quantum barrier layer to grow GaAs material with a thickness of 1.0nm~1.5nm, which is undoped. A complementary upper and lower pipeline growth process is adopted. The flow rate of AsH3 introduced into the lower pipeline is set to S1, and the flow rate of AsH3 introduced into the upper pipeline is set to S2. The sum of S1 and S2 is a fixed value of 80sccm. From the start of growth, S1 gradually increases as growth progresses. The initial setting value of S1 is 40sccm, and then during the growth process, S1 increases from 40sccm to 60sccm. Correspondingly, S2 is linked to S1. S2 gradually decreases as S1 increases, and S2 decreases from 40sccm to 20sccm.
[0047] (11) Growth of Arsenic-Rich Quantum Well Layer: The reaction chamber temperature was set to 670℃±10℃. TMGa and AsH3 were introduced into the pre-placed quantum well layer to grow GaAs material with a thickness of 2.5nm~3.5nm. A complementary upper and lower pipeline growth process was adopted. The flow rate of AsH3 introduced into the lower pipeline was set to S3, and the flow rate of AsH3 introduced into the upper pipeline was set to S4. The sum of S3 and S4 was a fixed value of 800sccm. From the start of growth, S3 gradually increased as growth progressed. The initial setting value of S3 was 400sccm, and then during the growth process, S3 increased from 400sccm to 600sccm. Correspondingly, S3 and S4 were linked. S4 gradually decreased as S3 increased, decreasing from 400sccm to 200sccm.
[0048] (12) Coating the quantum well layer after growth: The reaction chamber temperature was set to 670℃±10℃. TMGa and AsH3 were introduced into the arsenic-rich quantum well layer to grow GaAs material with a thickness of 1.0nm~1.5nm. A complementary upper and lower pipeline growth process was adopted. The flow rate of AsH3 introduced into the lower pipeline was set to S5, and the flow rate of AsH3 introduced into the upper pipeline was set to S6. The sum of S5 and S6 was a fixed value of 80sccm. From the start of growth, S5 gradually increased as growth progressed. The initial setting value of S6 was 40sccm. Then, during the growth process, S5 increased from 40sccm to 60sccm. Correspondingly, S6 and S5 were linked. S6 gradually decreased as S5 increased, from 40sccm to 20sccm.
[0049] (13) Growth of P-type confinement layer: The reaction chamber temperature was set to 670℃±10℃. TMAl, TMGa, and AsH3 were introduced into the symmetrical 5:3 ratio light-emitting region to grow an Al layer with a thickness of 200nm~500nm. y3 Ga 1-y3 For As material, the value of y3 ranges from 0.40 to 0.50, and the doping concentration is 1×10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 CCl4 was used as the P-type dopant.
[0050] (14) Growth of P-type extended layer: Set the reaction chamber temperature to 670℃±10℃, introduce TMAl, TMGa, and AsH3 into the P-type confinement layer, and grow Al with a thickness of 1000nm~3000nm. y4 Ga 1-y4 For As material, the value of y4 ranges from 0.20 to 0.30, and the doping concentration is 0.5 × 10⁻⁶. 18 cm -3 ~2.0×10 18 cm -3 CCl4 was used as the P-type dopant.
[0051] (15) Growth of P-type window layer: Set the reaction chamber temperature to 610℃±10℃, introduce TMGa and PH3 into the P-type extended layer, and grow GaP material with a thickness of 50nm~100nm, with a doping concentration of 1×10 19 cm -3 ~8×10 19 cm -3 CCl4 was used as the P-type dopant.
[0052] (16) Take out the wafer: After the growth is completed, reduce the temperature of the MOCVD reaction chamber to 110°C, then adjust the pressure to 1000 mbar, open the reaction chamber and take out the epitaxial wafer.
[0053] The present invention will be further described below through specific embodiments: Example 1 A method for preparing an 830nm LED epitaxial wafer with improved dark areas during aging specifically includes the following steps: (1) Growth buffer layer: The reaction chamber temperature was set to 700℃, and TMGa and AsH3 were introduced into the GaAs substrate to grow a GaAs material with a thickness of 220nm and a doping concentration of 3.0×10⁻⁶. 18 cm -3 SiH4 was used as the N-type dopant.
[0054] (2) Growth of corrosion stop layer: The reaction chamber temperature is set to 700℃, and TMGa, TMIn and PH3 are introduced into the buffer layer to grow Ga with a thickness of 100nm. 0.5 In 0.5 P material, with a doping concentration of 2.0 × 10⁻⁶ 18 cm -3 SiH4 was used as the N-type dopant.
[0055] (3) Growth of N-type ohmic contact layer: The reaction chamber temperature was set to 700℃, and TMGa and AsH3 were introduced into the corrosion stop layer to grow GaAs material with a thickness of 65nm and a doping concentration of 4.0×10⁻⁶. 18 cm -3 SiH4 was used as the N-type dopant.
[0056] (4) Growth of the first disordered transition layer: The reaction chamber temperature was set to 670℃, and TMAl, TMGa, TMIn, PH3, and H2 were introduced into the N-type ohmic contact layer to grow a 30nm thick Al layer. 0.8 Ga 0.2 ) 0.5 In 0.5 P-material, using SiH4 as the N-type dopant, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 The disordered epitaxial growth process was adopted, and the source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline at a flow rate of 500 sccm. At the same time, the H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline at a flow rate of 2400 sccm.
[0057] (5) Growth of the second disordered transition layer: The reaction chamber temperature is set to 670℃. TMAl, TMGa, TMIn, PH3, and H2 are introduced into the first disordered transition layer to grow a 32nm thick Al1 layer. 0.5 Ga 0.5 ) 0.5 In 0.5 The P-material uses SiH4 as the N-type dopant with a doping concentration of 1.5 × 10⁻⁶. 18 cm -3 The disordered epitaxial growth process was adopted, and the source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline at a flow rate of 800 sccm. At the same time, the H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline at a flow rate of 3200 sccm.
[0058] (6) Growth of the third disordered transition layer: The reaction chamber temperature was set to 670℃. TMAl, TMGa, TMIn, PH3, and H2 were introduced into the second disordered transition layer to grow a 36nm thick Al2 layer. 0.2 Ga 0.8 ) 0.5 In 0.5 P-material, using SiH4 as the N-type dopant, with a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm -3 The disordered epitaxial growth process was adopted, and the source material PH3 participating in the growth was set to be introduced into the MOCVD reaction chamber through the upper pipeline with a flow rate of 1000 sccm. At the same time, the H2 participating in the pre-reaction front-end dilution was set to be introduced into the MOCVD reaction chamber through the lower pipeline with a flow rate of 3600 sccm.
[0059] (7) Growth of the roughened layer: The reaction chamber temperature was set to 670℃, and TMAl, TMGa, and AsH3 were introduced into the third disordered transition layer to grow an Al layer with a thickness of 7800 nm. 0.25 Ga 0.75 As material, with a doping concentration of 1.2 × 10⁻⁶ 18 cm -3 SiH4 was used as the N-type dopant.
[0060] (8) Growth of N-type confinement layer: The reaction chamber temperature is set to 670℃, and TMAl, TMGa, and AsH3 are introduced into the roughened layer to grow an Al layer with a thickness of 400nm. 0.45 Ga 0.55 As material, with a doping concentration of 2.0 × 10⁻⁶. 18 cm -3 SiH4 was used as the N-type dopant.
[0061] (9) Growth of a symmetrical 5:3 ratio light-emitting region: The reaction chamber temperature is set to 670℃. TMAl, TMGa, and AsH3 are introduced into the N-type confinement layer to grow quantum wells and barriers of GaAs and Al, respectively. 0.2 Ga 0.8 The periodic cyclic structure of As material consists of a pre-placed quantum well layer, an arsenic-rich quantum well layer, and a post-coating quantum well layer. The pre-placed quantum well layer has a thickness of 1.0 nm and a 5:3 molar ratio of 5.0; the arsenic-rich quantum well layer has a thickness of 3 nm and a 5:3 molar ratio of 70; the post-coating quantum well layer has a thickness of 1.0 nm and a 5:3 molar ratio of 5.0; and the thickness of a single quantum barrier layer is 18 nm. There are 4 cyclic pairs, and both the quantum wells and quantum barriers are undoped.
[0062] (10) Pre-setting of quantum well layer before growth: The reaction chamber temperature was set to 670℃. TMGa and AsH3 were introduced into the quantum barrier layer to grow a GaAs material with a thickness of 1.2nm, which was undoped. A complementary upper and lower pipeline growth process was adopted. The flow rate of AsH3 introduced into the lower pipeline was set to S1, and the flow rate of AsH3 introduced into the upper pipeline was set to S2. The sum of S1 and S2 was a fixed value of 80 sccm. From the start of growth, S1 gradually increased as growth progressed. The initial setting value of S1 was 40 sccm, and then during the growth process, S1 increased from 40 sccm to 60 sccm. Correspondingly, S2 was linked to S1. S2 gradually decreased as S1 increased, and S2 decreased from 40 sccm to 20 sccm.
[0063] (11) Growth of Arsenic-Rich Quantum Well Layer: The reaction chamber temperature was set to 670℃. TMGa and AsH3 were introduced into the pre-placed quantum well layer to grow a GaAs material with a thickness of 2.9 nm. A complementary growth process with upper and lower pipelines was adopted. The flow rate of AsH3 introduced into the lower pipeline was set to S3, and the flow rate of AsH3 introduced into the upper pipeline was set to S4. The sum of S3 and S4 was a fixed value of 800 sccm. From the start of growth, S3 gradually increased as growth progressed. The initial setting value of S3 was 400 sccm, and then during the growth process, S3 increased from 400 sccm to 600 sccm. Correspondingly, S3 and S4 were linked. S4 gradually decreased as S3 increased, decreasing from 400 sccm to 200 sccm.
[0064] (12) Coating the quantum well layer after growth: The reaction chamber temperature was set to 670℃. TMGa and AsH3 were introduced into the arsenic-rich quantum well layer to grow a GaAs material with a thickness of 1.3 nm. A complementary upper and lower pipeline growth process was adopted. The flow rate of AsH3 introduced into the lower pipeline was set to S5, and the flow rate of AsH3 introduced into the upper pipeline was set to S6. The sum of S5 and S6 was a fixed value of 80 sccm. From the start of growth, S5 gradually increased as growth progressed. The initial setting value of S6 was 40 sccm. Then, during the growth process, S5 increased from 40 sccm to 60 sccm. Correspondingly, S6 and S5 were linked. S6 gradually decreased as S5 increased, from 40 sccm to 20 sccm.
[0065] (13) Growth of P-type confinement layer: The reaction chamber temperature was set to 670℃, and TMAl, TMGa, and AsH3 were introduced into the symmetrical 5:3 ratio light-emitting region to grow an Al layer with a thickness of 400nm. 0.45 Ga 0.55 As material, with a doping concentration of 1×10⁻⁶ 18 cm -3 CCl4 was used as the P-type dopant.
[0066] (14) Growth of P-type extended layer: The reaction chamber temperature was set to 670℃, and TMAl, TMGa, and AsH3 were introduced into the P-type confinement layer to grow an Al layer with a thickness of 2000 nm. 0.25 Ga 0.75 As material, with a doping concentration of 1.0 × 10⁻⁶ 18 cm -3 CCl4 was used as the P-type dopant.
[0067] (15) Growth of P-type window layer: Set the reaction chamber temperature to 610℃, introduce TMGa and PH3 into the P-type extended layer, and grow GaP material with a thickness of 80nm and a doping concentration of 5×10⁻⁶. 19 cm -3 CCl4 was used as the P-type dopant.
[0068] (16) Take out the wafer: After the growth is completed, reduce the temperature of the MOCVD reaction chamber to 110°C, then adjust the pressure to 1000 mbar, open the reaction chamber and take out the epitaxial wafer.
[0069] Comparative Example 1 A schematic diagram of a conventional 830nm LED epitaxial wafer is shown below. Figure 1 As shown, it was prepared using conventional methods.
[0070] The 830nm LEDs prepared in Example 1 and Comparative Example 1 were subjected to aging tests under power-on conditions, and the results are as follows: Figures 4 to 7 As shown. Among them, Figure 4 Images showing the light emission of a standard 830nm LED chip before and after power-on aging. Figure 5 Images of the 830nm LED chip before and after power-on aging in Embodiment 1 of the present invention are shown. It can be seen that after power-on aging, a conventional 830nm LED exhibits obvious localized dark areas, and its luminous efficiency significantly decreases, leading to chip failure. In contrast, the 830nm LED in Embodiment 1 of the present invention maintains a stable and normal illumination state before and after aging, without any decrease in luminous efficiency or localized dark areas.
[0071] Figure 6 The above are the IV (current-voltage) test curves of a standard 830nm LED before and after power-on aging. Figure 7 The images show the IV test curves of an 830nm LED before and after power-on aging in Embodiment 1 of this invention. It can be seen that the conventional 830nm LED experiences a significant decrease in turn-on voltage after aging due to leakage current, which is consistent with the light decay phenomenon in the locally dark areas. However, in Embodiment 1 of this invention, the 830nm LED, after 96 hours of power-on aging experiment, still maintains a completely overlapping and stable IV curve, without any leakage current or voltage abnormalities.
[0072] Finally, it should be emphasized that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. An 830nm LED epitaxial wafer for improving aging dark areas, characterized in that, Starting from the GaAs substrate and going up, the layers are: buffer layer, etching stop layer, N-type ohmic contact layer, electrode transition layer, roughening layer, N-type confinement layer, symmetrical 5:3 ratio light-emitting region, P-type confinement layer, P-type extension layer, and P-type window layer. The electrode transition layer sequentially comprises a first disordered transition layer, a second disordered transition layer, and a third disordered transition layer, all grown using a disordered epitaxial process. This disordered epitaxial process is a pre-reaction front-end dilution technique. The source material PH3, which participates in the growth of the epitaxial layer, is introduced into the MOCVD reaction chamber through an upper pipeline, while H2, which participates in the pre-reaction front-end dilution, is introduced into the MOCVD reaction chamber through a lower pipeline. This allows the group V source material PH3 and the group III source materials TMAl, TMGa, and TMIn to be diluted by H2 in the lower pipeline before the pre-reaction, thereby controlling the pre-reaction rate through dilution to achieve the purpose of disordered growth. The symmetrical 5 / 3 ratio light-emitting region is a cyclic structure formed by alternating quantum barrier layers and quantum well layers. The quantum well layer consists of a pre-placed quantum well layer, an arsenic-rich quantum well layer, and a post-coated quantum well layer, all grown using a complementary upper and lower pipeline epitaxial process. The complementary upper and lower pipeline epitaxial process involves simultaneously introducing the group V source material AsH3 used in the quantum well layer into the MOCVD reaction chamber through both the upper and lower pipelines. The total flow rate of AsH3 introduced through the upper and lower pipelines is a fixed value. The flow rate of AsH3 introduced through the lower pipeline gradually increases as growth progresses, while the flow rate of AsH3 introduced through the upper pipeline gradually decreases as growth progresses, but the sum of the two remains constant. The 5 / 3 ratio refers to the molar concentration ratio of arsenic atoms in the group V source material to gallium atoms in the group III source material. The 5 / 3 ratio of the pre-placed quantum well layer and the post-coated quantum well layer is lower than that of the arsenic-rich quantum well layer, and the 5 / 3 ratios of the pre-placed quantum well layer and the post-coated quantum well layer are the same, forming a symmetrical quantum well structure.
2. The 830nm LED epitaxial wafer for improving aging dark areas according to claim 1, characterized in that, The material of the first disordered transition layer is (Al) 0.8 Ga 0.2 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm, uses SiH4 as the N-type dopant with a doping concentration of 2×10⁻⁶. 18 cm -3 ~3×10 18 cm -3 The material of the second disordered transition layer is (Al). 0.5 Ga 0.5 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm, uses SiH4 as the N-type dopant with a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm -3 The material of the third disordered transition layer is (Al). 0.2 Ga 0.8 ) 0.5 In 0.5 P, with a thickness of 20nm–40nm, uses SiH4 as the N-type dopant with a doping concentration of 1×10⁻⁶. 18 cm -3 ~2×10 18 cm -3 .
3. The 830nm LED epitaxial wafer for improving aging dark areas according to claim 1, characterized in that, The symmetrical 5:3 ratio light-emitting region has 4 cyclic pairs.
4. The 830nm LED epitaxial wafer for improving aging dark areas according to claim 1, characterized in that, The material of the pre-placed quantum well layer is GaAs, with a thickness of 1.0 nm to 1.5 nm and a 5:3 ratio of 4.0 to 8.0; the material of the arsenic-rich quantum well layer is GaAs, with a thickness of 2.5 nm to 3.5 nm and a 5:3 ratio of 60 to 80; the material of the post-coated quantum well layer is GaAs, with a thickness of 1.0 nm to 1.5 nm and a 5:3 ratio of 4.0 to 8.
0.
5. A method for preparing an 830nm LED epitaxial wafer with improved aging dark areas according to any one of claims 1 to 4, characterized in that, Includes the following steps: Using an MOCVD device, a buffer layer, an etching stop layer, an N-type ohmic contact layer, a first disordered transition layer, a second disordered transition layer, a third disordered transition layer, a roughening layer, an N-type confinement layer, a symmetrical 5:3 ratio light-emitting region, a P-type confinement layer, a P-type extension layer, and a P-type window layer are epitaxially grown on a GaAs substrate from bottom to top. The first disordered transition layer, the second disordered transition layer, and the third disordered transition layer are all grown using a disordered epitaxial process; The pre-formed quantum well layer, arsenic-rich quantum well layer, and post-coated quantum well layer in the symmetrical 5:3 ratio light-emitting region are all grown using an epitaxial process with complementary upper and lower pipelines.
6. The method for preparing an 830nm LED epitaxial wafer with improved aging dark areas according to claim 5, characterized in that, The first disordered transition layer is grown using disordered epitaxial growth: the source material PH3 is introduced into the MOCVD reaction chamber through the upper pipeline, and the flow rate of PH3 is controlled at 300 sccm to 600 sccm. Simultaneously, H2, which participates in the pre-reaction dilution, is introduced into the MOCVD reaction chamber through the lower pipeline, and the flow rate of H2 is controlled at 2000 sccm to 3000 sccm. The second disordered transition layer is grown using disordered epitaxial growth: the source material PH3 is introduced into the MOCVD reaction chamber through the upper pipeline, and the flow rate of PH3 is controlled at 600 sccm to 600 sccm. The flow rate of H2 participating in the pre-reaction front-end dilution is set to 900 sccm, and the flow rate of H2 is controlled to be 2500 sccm to 3500 sccm. The third disordered transition layer adopts disordered epitaxial growth: the source material PH3 participating in the growth is set to be introduced into the MOCVD reaction chamber through the upper pipeline, and the flow rate of PH3 is controlled to be 900 sccm to 1200 sccm. At the same time, the flow rate of H2 participating in the pre-reaction front-end dilution is set to be introduced into the MOCVD reaction chamber through the lower pipeline, and the flow rate of H2 is controlled to be 3000 sccm to 4000 sccm.
7. The method for preparing an 830nm LED epitaxial wafer with improved aging dark areas according to claim 5, characterized in that, The growth steps of the symmetrical 5 / 3 ratio light-emitting region are as follows: TMAl, TMGa, and AsH3 are introduced into the N-type confinement layer to grow quantum wells and quantum barriers of GaAs and Al, respectively. x1 Ga 1-x1 The As material has a periodic cyclic structure, and both the quantum wells and quantum barriers are undoped. A single quantum well consists of a pre-prepared quantum well layer, an arsenic-rich quantum well layer, and a post-coated quantum well layer. The thickness of the pre-prepared quantum well layer is 1.0 nm to 1.5 nm, the thickness of the arsenic-rich quantum well layer is 2.5 nm to 3.5 nm, the thickness of the post-coated quantum well layer is 1.0 nm to 1.5 nm, and the thickness of a single quantum barrier layer is 15 nm to 20 nm. The value of x1 ranges from 0.1 to 0.
2.
8. The method for preparing an 830nm LED epitaxial wafer with improved aging dark areas according to claim 7, characterized in that, The pre-formed quantum well layer is grown using a complementary upper and lower pipeline process: the flow rate of AsH3 entering the lower pipeline is set to S1, and the flow rate of AsH3 entering the upper pipeline is set to S2, and the sum of S1 and S2 is a fixed value of 80 sccm; from the start of growth, S1 gradually increases with growth, with an initial setting of 40 sccm, and then increasing from 40 sccm to 60 sccm during the growth process; correspondingly, S2 is linked to S1, and S2 gradually decreases as S1 increases, decreasing from 40 sccm to 20 sccm.
9. The method for preparing an 830nm LED epitaxial wafer with improved aging dark areas according to claim 7, characterized in that, The arsenic-rich quantum well layer is grown using a complementary upper and lower pipeline process: the flow rate of AsH3 flowing into the lower pipeline is set to S3, and the flow rate of AsH3 flowing into the upper pipeline is set to S4, with the sum of S3 and S4 being a fixed value of 800 sccm; from the start of growth, S3 gradually increases with growth, with an initial setting of 400 sccm, and then increasing from 400 sccm to 600 sccm during the growth process; correspondingly, S4 is linked to S3, and S4 gradually decreases as S3 increases, decreasing from 400 sccm to 200 sccm.
10. The method for preparing an 830nm LED epitaxial wafer with improved aging dark areas according to claim 7, characterized in that, The post-coated quantum well layer is grown using a complementary upper and lower pipeline process: the flow rate of AsH3 in the lower pipeline is set to S5, and the flow rate of AsH3 in the upper pipeline is set to S6, and the sum of S5 and S6 is a fixed value of 80 sccm; from the start of growth, S5 gradually increases with growth, with an initial setting of 40 sccm, and then increasing from 40 sccm to 60 sccm during the growth process; correspondingly, S6 is linked to S5, and S6 gradually decreases as S5 increases, decreasing from 40 sccm to 20 sccm.
Citation Information
Patent Citations
Light emitting diode epitaxial wafer and preparation method thereof
CN114242855A
Reversed-polarity LED with gradually-changed step-shaped coarsening layer component and preparation method of reversed-polarity LED
CN117497663A