An AlGaInP red epitaxial structure, chip, and fabrication method based on strain compensation to increase the number of quantum wells

Abstract

This application discloses an AlGaInP red-light epitaxial structure, chip, and fabrication method based on strain compensation to increase the number of quantum well pairs. By introducing at least one strain compensation structure among gradient-doped barrier layers, integrated strain compensation layers, and selectively inserted stress buffer layers into an 8-10 pair AlGaInP multi-quantum-well active layer, the lattice stress accumulation caused by the increase in the number of quantum wells is effectively offset, increasing the number of quantum well pairs from the traditional 1-5 pairs to 8-10 pairs while ensuring crystal quality. This invention significantly disperses the spatial distribution of charge carriers, suppresses Auger recombination and efficiency roll-off, and improves thermal management performance, reducing Auger recombination rate by 70%, improving efficiency roll-off by 50%, increasing external quantum efficiency by 38%, and extending device aging lifetime by 67%. The epitaxial architecture of this invention is universally compatible with various devices such as red LEDs, Micro-LEDs, and semiconductor lasers, with a wide range of applications and significant industrialization value.

Description

Technical Field

[0001] This invention relates to the field of Micro-LED chip technology, specifically to an AlGaInP red-light epitaxial structure, chip, and fabrication method based on strain compensation to increase the number of quantum wells. It can be widely used in optoelectronic devices such as red light-emitting diodes (LEDs), micro-LEDs, and semiconductor lasers. Background Technology

[0002] AlGaInP quaternary compound semiconductor materials are the core epitaxial system for fabricating optoelectronic devices in the red, orange, and yellow light bands, and have irreplaceable application value in fields such as high-definition displays, general lighting, optical communication, and laser sensing. In the current mainstream epitaxial design of AlGaInP-based devices, to avoid stress accumulation and crystal quality degradation caused by well-barrier lattice mismatch, the number of quantum well pairs in the multi-quantum-well active region is usually limited to 1-5 pairs. This design suffers from the following insurmountable technical drawbacks: 1. The carrier space is severely localized, resulting in a significant roll-off in efficiency.

[0003] Insufficient number of quantum wells leads to excessive concentration of injected carriers in a few well layers. The high carrier concentration in a single well triggers high-intensity Auger recombination (the recombination rate is proportional to the cube of the carrier concentration), causing the efficiency droop of the device to exceed 40% under high current injection, which severely limits the performance limit of high-brightness, high-power devices.

[0004] 2. Localized hot spots concentrate, significantly reducing device lifespan.

[0005] Excessive concentration of charge carriers forms localized high recombination regions, preventing the generated heat from dissipating in time and creating hotspots exceeding 120°C. This accelerates material defect proliferation and interface degradation, leading to a shortened device lifespan (T0). 50 The time it takes for optical power to decay to 50% of its initial value is reduced by up to 60%, resulting in a significant decrease in reliability.

[0006] 3. There is an inherent contradiction between trap building and stress control.

[0007] If the number of quantum well pairs is simply increased to 8-10 pairs to disperse the charge carriers, the lattice mismatch between the well and the barrier will continue to accumulate with the increase of the number of cycles, causing severe lattice warping, dislocation and defect proliferation, which will significantly degrade the crystal quality and photoelectric performance. Performance improvement cannot be achieved by simply increasing the number of wells.

[0008] Existing strain compensation technologies are mostly localized optimizations for single device types, resulting in fragmented solutions and limited compensation efficiency. They have not formed a systematic strain control architecture that can support 8 to 10 pairs of high well numbers, and they cannot be simultaneously compatible with multiple device types such as LEDs, Micro-LEDs, and semiconductor lasers, leaving a significant technological gap. Summary of the Invention

[0009] The purpose of this invention is to provide an AlGaInP red-light epitaxial structure, chip, and fabrication method based on strain compensation to increase the number of quantum well pairs. Through the synergistic effect of multiple strain compensation mechanisms, the number of quantum well pairs is stably increased to 8-10 pairs while ensuring the quality of the epitaxial crystal, solving the efficiency roll-off and thermal failure problems caused by carrier localization. At the same time, a universal epitaxial architecture is constructed to achieve compatibility with red LEDs, Micro-LEDs, and semiconductor lasers, comprehensively improving the optoelectronic performance and long-term reliability of the device.

[0010] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: An AlGaInP red-light epitaxial structure based on strain compensation to increase the number of quantum wells includes a substrate, an n-type semiconductor layer, a multi-quantum-well active layer, and a p-type semiconductor layer stacked sequentially from bottom to top. The multi-quantum-well active layer comprises 8 to 10 pairs of periodically alternating well layers and barrier layers, wherein the well layers are made of GaInP semiconductor material and the barrier layers are made of AlGaInP semiconductor material. The active layer of the multi-quantum well is provided with at least one strain compensation structure, which is one or more combinations of gradient doped barrier layer, integrated strain compensation layer, and selectively inserted stress buffer layer. The strain compensation structure is used to counteract the accumulation of lattice stress caused by the increase of the quantum well logarithm and maintain the quality of the epitaxial crystal.

[0011] In a preferred embodiment, the number of quantum well pairs in the multi-quantum-well active layer is 9-10 pairs; the thickness of the well layer is 1.5-4.5 nm, and the thickness of the barrier layer is 4-10 nm; the chemical composition of the barrier layer is (Al... x2 Ga 1-x2 ) y2 InP, where x2 takes values ​​from 0.7 to 0.9 and y2 takes values ​​from 0.5.

[0012] In a preferred embodiment, the gradient doped barrier layer specifically comprises: each period of the barrier layer is doped with at least one doping element, wherein the doping element is selected from one or more of Mg, Si, Zn, Te, As, Sb, Fe, and Bi; the doping concentration of the barrier layer increases layer by layer with the increase of the quantum well period number, and the doping concentration ranges from 1×10⁻⁶. 17 cm -3~1×10 18 cm -3 By gradient control of doping concentration, the accumulated lattice stress is released layer by layer, thus alleviating the stress superposition effect of multi-period wells.

[0013] In a preferred embodiment, the integrated strain compensation layer specifically comprises: at least one strain compensation sublayer with a gradually changing Al composition embedded within each barrier layer; the Al composition of the strain compensation sublayer continuously and gradually changes from high to low along the epitaxial growth direction, and the amplitude of the Al composition change gradually increases with the increase of the quantum well period number; the thickness of the strain compensation sublayer is 0.5~2nm, and the stress generated by the composition change offsets the lattice mismatch stress at the well-barrier interface, thereby achieving in-situ compensation of the stress in each period.

[0014] In a preferred embodiment, the selective insertion of the stress buffer layer specifically involves inserting at least one stress buffer layer after the barrier layer growth is completed for the 2nd, 5th, and 8th pairs of quantum wells, or after the barrier layer growth is completed for the 3rd, 6th, and 9th pairs of quantum wells. The stress buffer layer is an AlGaInP semiconductor material with low lattice mismatch and a thickness of 5-15 nm. It is used to release stress concentration in local areas of the multi-quantum-well active layer at specific points and suppress crystal defects caused by stress accumulation.

[0015] In a preferred embodiment, the n-type semiconductor layer comprises, from bottom to top, an n-type GaAs buffer layer, an n-type AlGaInP etch stop layer, an n-type GaAs ohmic contact layer, and an n-type AlGaInP confinement layer; the p-type semiconductor layer comprises, from bottom to top, a p-type AlGaInP spacer layer, a p-type AlInP electron blocking layer, and a p-type GaP ohmic contact layer; the specific parameters of each layer are as follows: The n-type doping concentration of the n-type GaAs buffer layer is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 100~300nm; The chemical composition of the n-type AlGaInP etch stop layer is (Al x Ga 1-x )ᵧInP, where x takes values ​​from 0.1 to 0.4, y takes values ​​from 0.5, and the doping concentration is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 100~300nm; The doping concentration of the n-type GaAs ohmic contact layer is 3.0 × 10⁻⁶. 18 ~5.0×10 18 cm -3 The thickness is 10~50nm; The chemical composition of the n-type AlGaInP confinement layer is (Al x1 Ga 1-x1 ) y1 InP, where x1 ranges from 0.7 to 1, y1 is 0.5, and the doping concentration is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 150~500nm; The chemical composition of the p-type AlGaInP spacer layer is (Al x3 Ga 1-x3 ) y3 InP, where x3 takes values ​​of 0.8 to 0.9, y3 takes values ​​of 0.5, and the p-type doping concentration is 1.0 × 10⁻⁶. 18 ~2.0×10 18 cm -3 The thickness is 30~100nm; The chemical composition of the p-type AlInP electron blocking layer is Al x4 In 1-x4 P, where x4 is 0.5 and the doping concentration is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 200~900nm; The doping concentration of the p-type GaP ohmic contact layer is 3.0 × 10⁻⁶. 18 ~5.0×10 18 cm -3 The thickness is 50~300nm.

[0016] The present invention also provides a strain-compensated AlGaInP red light semiconductor optoelectronic chip, comprising the aforementioned AlGaInP red light epitaxial structure; the semiconductor optoelectronic chip is any one of a front-mounted red light LED chip, a flip-chip red light LED chip, a red light Micro-LED display chip, an edge-emitting red light semiconductor laser chip, or a vertical-cavity surface-emitting red light laser chip.

[0017] The present invention also provides an AlGaInP red light Micro-LED chip based on strain compensation, including the AlGaInP red light epitaxial structure, and further including a p-type transparent conductive layer, a bonding metal layer, a Si-based CMOS driving circuit, a sidewall passivation layer, an n-type transparent conductive interconnect layer, and an n-type metal electrode. The p-type transparent conductive layer is deposited on the upper surface of the p-type GaP ohmic contact layer of the epitaxial structure; The bonding metal layer includes a first bonding metal layer and a second bonding metal layer. The first bonding metal layer is deposited on the upper surface of the p-type transparent conductive layer, and the second bonding metal layer is deposited on the front side of the Si-based CMOS driving circuit. The epitaxial structure and the Si-based CMOS driving circuit are mechanically fixed and electrically connected through the metal interfusion of the first bonding metal layer and the second bonding metal layer. After the GaAs substrate of the epitaxial structure is removed by wet etching, the surface of the n-type GaAs ohmic contact layer is exposed. The sidewall passivation layer covers the sidewall surface of the Micro-LED platform;

[0018] The n-type transparent conductive interconnect layer is deposited on the exposed n-type GaAs ohmic contact layer surface, and the n-type metal electrode is fabricated in the preset electrode region of the n-type transparent conductive interconnect layer.

[0019] In a preferred embodiment, both the p-type transparent conductive layer and the n-type transparent conductive interconnect layer are made of indium tin oxide material with a thickness of 100~200nm; The bonding metal layer is a Cr / Pt / Au stacked structure with a total thickness of 500~1000nm; The sidewall passivation layer is made of silicon dioxide and has a thickness of 10~100nm. The Micro-LED platform is square or circular, with a horizontal dimension of 1~50μm and a pixel pitch of 2~75μm between adjacent platforms; The n-type metal electrode has a Cr / Pt / Au stacked structure with a thickness of 300~800nm.

[0020] This invention also provides a method for preparing the AlGaInP red-light epitaxial structure, which uses a metal-organic chemical vapor deposition system for epitaxial growth, specifically including the following steps: S1, Substrate pretreatment: The GaAs substrate is placed in the MOCVD reaction chamber, vacuumed and heated to 620~700℃, and hydrogen is introduced as a carrier gas for substrate surface heat treatment. S2, n-type buffer layer growth: Maintaining the growth temperature at 620~700℃, using trimethylgallium as the gallium source, hydrogen arsine as the arsenic source, and disilane as the n-type doping source, an n-type GaAs buffer layer is grown on a GaAs substrate, with the growth rate controlled at 0.2~0.7nm / s; S3, n-type functional layer growth: The reaction chamber is heated to 700~780℃, and trimethylaluminum, trimethylgallium, and trimethylindium are used as group III reaction sources, phosphine is used as group V reaction source, and silane is used as n-type doping source. The n-type AlGaInP etch stop layer, n-type GaAs ohmic contact layer, and n-type AlGaInP confinement layer are grown sequentially. S4, Strain-compensated multi-quantum-well growth: Maintaining a growth temperature of 700~780℃, GaInP well layers and AlGaInP barrier layers are grown alternately for a total of 8~10 cycles; during the barrier layer growth process, a strain-compensated structure is introduced by gradient-controlled doping concentration, embedding strain-compensated sublayers with gradually changing Al composition, or inserting stress buffer layers after a specified cycle to obtain a multi-quantum-well active layer; the growth rate of the well layer and barrier layer is controlled at 0.1~0.2nm / s; S5, p-type functional layer growth: Maintain the growth temperature at 700~780℃, use magnesia as the p-type doping source, and grow the p-type AlGaInP spacer layer and p-type AlInP electron blocking layer in sequence; then use trimethylgallium as the gallium source, phosphine as the phosphorus source, and magnesia and carbon tetrabromide as the co-doping source to grow the p-type GaP ohmic contact layer. S6, Cooling Annealing: After growth is complete, the reaction chamber is gradually cooled to room temperature, and a protective gas is introduced for in-situ annealing before the epitaxial structure is removed.

[0021] Due to the application of the above technical solution, the beneficial effects of this application compared with the prior art are as follows: 1. Significantly suppresses carrier localization and greatly improves efficiency roll-off.

[0022] By using strain compensation technology, the number of quantum well pairs is stably increased from the traditional 1-5 pairs to 8-10 pairs, effectively dispersing the spatial distribution of charge carriers, significantly reducing the carrier concentration in a single well, and reducing Auger recombination rate by up to 70%. Compared with traditional low-well-number designs, the device efficiency roll-off problem is improved by 50%, and the luminous efficiency and power limit under high current injection are significantly improved.

[0023] 2. Improve photoelectric conversion efficiency and enhance the light-emitting performance of devices.

[0024] The increase in the number of quantum wells significantly improves carrier injection efficiency and radiative recombination probability. Combined with a high-quality crystal structure maintained by strain compensation, it can drive the external quantum efficiency (EQE) of the device by 38%, achieving higher luminous brightness and photoelectric conversion performance, and meeting the needs of high-brightness displays and high-power lighting.

[0025] 3. Optimize thermal management performance and extend device lifespan.

[0026] Uniform carrier distribution effectively avoids the formation of local hot spots, significantly reduces the core operating temperature of the device, greatly improves thermal management performance, and ultimately extends the device's aging life (T). 50 The lifespan has been extended by 67%, significantly enhancing long-term operational stability and reliability.

[0027] 4. It has strong universal compatibility and is applicable to a wide range of scenarios.

[0028] The epitaxial architecture of this invention is directly compatible with various optoelectronic devices such as red LEDs, Micro-LEDs, and semiconductor lasers, without the need for large-scale epitaxial structure adjustments for different devices, thus reducing R&D and manufacturing costs and covering a wide range of application fields such as display, lighting, optical communication, and sensing. Attached Figure Description

[0029] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the AlGaInP red-light epitaxial structure based on strain-compensated quantum well described in this invention. Figure 2 The following are schematic diagrams of three strain-compensated quantum well structures of the present invention, wherein: a is a schematic diagram of a gradient-doped barrier quantum well structure; b is a schematic diagram of the integrated strain compensation layer quantum well structure; c is a schematic diagram of a quantum well structure with a selectively inserted stress buffer layer; Figure 3 This is a schematic diagram of the AlGaInP red-light Micro-LED chip structure based on strain-compensated quantum well described in this invention. Figure 4 This is a schematic flowchart of the method for preparing the AlGaInP red-light epitaxial structure according to the present invention; Among them, 1. GaAs substrate; 2. n-type GaAs buffer layer; 3. n-type AlGaInP etch stop layer; 4. n-type GaAs ohmic contact layer; 5. n-type AlGaInP confinement layer; 6. Multiple quantum well active layer; 7. p-type AlGaInP spacer layer; 8. p-type AlInP electron blocking layer; 9. p-type GaP ohmic contact layer; 10. Epitaxial structure; 11. p-type ITO transparent conductive layer; 12. Bonding metal layer; 13. Si-based CMOS driving circuit; 14. Sidewall passivation layer; 15. n-type ITO transparent conductive layer; 16. n-type metal electrode. Detailed Implementation

[0031] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0032] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0033] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing the invention and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0034] Furthermore, in addition to indicating direction or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in certain situations to indicate a dependency or connection. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0035] Furthermore, the terms "installation," "setup," "equipped with," "connection," "linking," and "socketing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0036] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0037] All epitaxial growth in the embodiments and comparative examples of this invention was performed using a commercial Thomas Swan 3×2-inch MOCVD system. The carrier gas was high-purity hydrogen, the group III sources were trimethylaluminum, trimethylgallium, and trimethylindium, the group V sources were arsine and phosphine, the n-type doping source was silane, and the p-type doping source was magnesium thiocene. The chip process was performed using standard equipment from commercial semiconductor processing lines, and performance testing was conducted using a probe station, spectrometer, integrating sphere, and high and low temperature test chamber.

[0038] Example 1 This embodiment provides an AlGaInP red-light Micro-LED epitaxial structure based on gradient doping barrier strain compensation, employing a 10-pair quantum well design. The specific structure and fabrication process are as follows:

[0039] 1.1 Extensional structure 10.

[0040] like Figure 1 and Figure 2 As shown, the epitaxial structure 10 includes, from bottom to top: GaAs substrate 1: A 4-inch n-type GaAs single crystal substrate with a thickness of 450μm and a substrate bevel angle of 10° is used; n-type GaAs buffer layer 2: The n-type dopant is Si, with a doping concentration of 2.0 × 10⁻⁶. 18 cm -3 Thickness 200nm; n-type AlGaInP etch stop layer 3: Composition is (Al 0.2 Ga 0.8 ) 0.5 In 0.5 P, n-type doping concentration 2.0 × 10⁻⁶ 18 cm -3 Thickness 200nm; n-type GaAs ohmic contact layer 4: n-type doping concentration 4.0 × 10⁻⁶ 18 cm -3 Thickness 30nm; n-type AlGaInP confinement layer 5: Composition is (Al 0.8 Ga 0.2 ) 0.5 In 0.5 P, n-type doping concentration 2.0 × 10⁻⁶ 18 cm -3 Thickness 300nm; Multi-quantum-well active layer 6: A total of 10 pairs of periodic GaInP well / AlGaInP barrier layer structures, with the well layers being Ga... 0.5 In 0.5 P, thickness 3nm; barrier layer is (Al) 0.8 Ga 0.2 ) 0.5 In 0.5 P, thickness 6nm; employs a gradient doping barrier layer design, with Si as the barrier layer dopant, and the first barrier layer doping concentration is 1×10⁻⁶. 17 cm -3 The doping concentration increases layer by layer with increasing period number, reaching 1×10⁻⁶ in the 10th barrier layer. 18 cm -3 The accumulated stress is offset layer by layer by the lattice distortion introduced by gradient doping; p-type AlGaInP spacer layer 7: Composition is (Al 0.85 Ga 0.15 ) 0.5 In 0.5 The p-type dopant is Mg, with a doping concentration of 1.5 × 10⁻⁶. 18 cm -3 Thickness 60nm; p-type AlInP electron blocking layer 8: composed of Al 0.5 In 0.5 P, p-type doping concentration 2.0 × 10⁻⁶ 18 cm -3 Thickness 500nm; p-type GaP ohmic contact layer 9: The p-type dopant is co-doped with Mg and C, with a doping concentration of 4.0 × 10⁻⁶. 18 cm -3 Thickness 200nm.

[0041] 1.2 Micro-LED chip fabrication.

[0042] A red-light Micro-LED chip is fabricated based on the aforementioned epitaxial structure 10, as shown in the figure. Figure 3 As shown, the specific process steps are as follows: (1) Preparation of p-type ITO transparent conductive layer 11: A 150 nm thick p-type ITO transparent conductive layer 11 was deposited on the surface of p-type GaP ohmic contact layer 9 by electron beam evaporation (EB) process. The indium-tin molar ratio of ITO target was 9:1 and the deposition rate was 1 nm / s. After deposition, rapid thermal annealing (RTA) was performed at high temperature of 400 °C for 180 s to form a good ohmic contact.

[0043] (2) Bonding and substrate removal: 300nm Cr / 300nm Pt / 200nm Au were sequentially deposited on the surface of the p-type ITO transparent conductive layer 11 using electron beam evaporation to form the first bonding metal layer 12; simultaneously, the same second bonding metal layer was deposited on the front side of the Si-based CMOS driving circuit 13; the front side of the epitaxial structure 10 was aligned and bonded with the front side of the Si-based CMOS driving circuit 13, and metal hot-press bonding was performed using a wafer-level bonding machine at a bonding temperature of 500℃, a bonding pressure of 4500kg, and a bonding time of 30 minutes to achieve metal fusion and stable electromechanical connection; after bonding, the GaAs substrate 1 was removed by wet etching, and the etching solution was a mixture of 10% ammonia and 10% hydrogen peroxide in a volume ratio of 4:1, with an etching time of 40 minutes, until the etching stopped at the n-type AlGaInP etching stop layer 3, and then the n-type GaAs buffer layer 2 was removed to expose the n-type GaAs ohmic contact layer 4.

[0044] (3) Micro-LED mesa fabrication: A 1500nm thick positive photoresist 5214 is spin-coated on the exposed epitaxial surface. After pre-baking and curing, it is exposed to ultraviolet light and developed with tetramethylammonium hydroxide (TMAH) aqueous solution for 120s to form a periodically arranged circular mesa mask pattern with a mesa diameter of 10μm and a pixel pitch of 15μm. The epitaxial layer of the patterned area is removed by inductively coupled plasma (ICP) etching process. The etching gas is a mixture of Cl2 and BCl3 gas. The etching is stopped when the bonding metal layer 12 is reached. After etching, the remaining photoresist is removed by sequential cleaning with acetone and isopropanol to form an independent Micro-LED mesa.

[0045] (4) Sidewall passivation and device isolation: A 50 nm thick SiO2 sidewall passivation layer 14 was deposited on the overall surface of the sample using plasma-enhanced chemical vapor deposition (PECVD). The reaction gases were N2O and SiH4, with flow rates of 1200 sccm and 300 sccm, respectively. The deposition temperature was 250 °C and the deposition rate was 1 nm / s. This was used to repair the etching damage on the mesa sidewalls and reduce non-radiative recombination. Subsequently, the SiO2 and ITO layers in the mesa gap region were etched using ion beam etching (IBE) to penetrate the bonding metal layer 12 and achieve electrical isolation between adjacent pixels. The etching power was 300 W, the etching rate was 2 nm / s, and the etching time was 600 s.

[0046] (5) n-type interconnect and electrode fabrication: A 300nm thick SiO2 mask layer was deposited using PECVD process. The n-type electrode contact window was formed by photolithography and ICP etching (etching gas CF4+Ar) to expose the n-type GaAs ohmic contact layer 4. Subsequently, an n-type ITO transparent conductive layer 15 was deposited to realize the current expansion in the n-type region. Then, a 300nm Cr / 300nm Pt / 200nm Au stack was deposited using electron beam evaporation process. The n-type metal electrode 16 was formed by lift-off process to complete the fabrication of Micro-LED chip.

[0047] 1.3 Performance Testing.

[0048] The 10-pair quantum well strain-compensated red Micro-LED chip prepared in this embodiment achieves a performance of 20 A / cm². 2 At the injected current density, the Auger recombination rate is reduced by 72% compared to traditional 5-pair quantum well chips, the efficiency roll-off is improved by 51%, the external quantum efficiency is increased by 39%, the chip core temperature is reduced by 28°C under steady-state operation, and the aging lifetime T 50 It extends the lifespan by 68%, resulting in a significant performance improvement.

[0049] Example 2 like Figure 2 As shown, this embodiment provides an AlGaInP red semiconductor laser epitaxial structure with an integrated strain compensation layer, employing a 9-pair quantum well design, as detailed below: The overall stacking order of the epitaxial structure 10 is the same as in Example 1. The core difference is that the multi-quantum-well active layer 6 adopts an integrated strain compensation layer design. The multi-quantum-well active layer consists of 9 pairs of GaInP well layers / AlGaInP barrier layers, with a well layer thickness of 3.5 nm and a barrier layer thickness of 7 nm. Each barrier layer contains an Al composition-gradient strain compensation sublayer with a thickness of 1 nm. The Al composition gradually changes from 0.85 to 0.6 along the growth direction, and the gradient amplitude gradually increases with the period number. The Al composition gradient amplitude of the compensation sublayer in the 9th barrier layer is 40% higher than that in the 1st pair. The stress generated by the composition gradient is used to in-situ offset the compressive strain of the well layer, thereby achieving dynamic compensation of stress in each period.

[0050] In this embodiment, the epitaxial structure 10 can be fabricated as an edge-emitting red semiconductor laser. Under high injection current, stress accumulation is effectively suppressed, the threshold current is reduced by 15%, the slope efficiency is increased by 22%, and the device lifespan is extended by 58%. It is suitable for red laser display, optical sensing and other fields.

[0051] Example 3 like Figure 2 As shown, this embodiment provides an AlGaInP upright red LED epitaxial structure with selectively inserted stress buffer layers, employing an 8-pair quantum well design, as detailed below: The active layer 6 consists of 8 pairs of GaInP well layers / AlGaInP barrier layers, with a well layer thickness of 4 nm and a barrier layer thickness of 8 nm. After the barrier layers of the 3rd and 6th pairs of quantum wells are grown, a 10 nm thick AlGaInP stress buffer layer is inserted. The Al composition of the buffer layer is 0.5, and the lattice mismatch with the barrier layer is less than 0.1%. This buffer layer is used to release local stress concentration at specific points and block the stress accumulation path.

[0052] In this embodiment, the epitaxial structure 10 can be fabricated into a high-power red LED chip without the need for bonding and transfer processes. The fabrication process is simple and has a high yield. Under a working current of 1A, the light output power is increased by 32%, the thermal resistance is reduced by 24%, and the aging life is extended by 62%. It is suitable for landscape lighting, automotive taillights and other fields.

[0053] Example 4 This embodiment details the MOCVD growth process of the AlGaInP red epitaxial structure 10 described above. Taking the gradient-doped quantum well structure 10 from Embodiment 1 as an example, the specific steps are as follows: S1, Substrate pretreatment: A 4-inch n-type GaAs substrate 1 is placed into the MOCVD reaction chamber, vacuumed until the chamber pressure is below 100Pa, high-purity hydrogen is introduced as the carrier gas, the temperature is raised to 650℃, and the temperature is kept constant for 10 minutes to remove the oxide layer and organic contaminants on the substrate surface.

[0054] S2, n-type GaAs buffer layer 2 growth: Maintaining the reaction chamber temperature at 650℃ and the chamber pressure at 100mbar, trimethylgallium (TMGa), hydrogen arsenide (AsH3), and silane (Si2H6) are introduced. The growth rate is controlled at 0.5nm / s to grow an n-type GaAs buffer layer 2 with a thickness of 200nm. The doping concentration is controlled at 2.0×10⁻⁶. 18 cm -3 .

[0055] S3,n-type functional layer growth: n-type AlGaInP etch stop layer 3 growth: The reaction chamber is heated to 750°C, and trimethylaluminum (TMAl), trimethylgallium, trimethylindium (TMIn), phosphine (PH3), and silane are introduced. The flow rates of each source are adjusted to control the composition (Al). 0.2 Ga 0.8 ) 0.5 In 0.5 P, growth rate 0.4 nm / s, growth thickness 200 nm, doping concentration 2.0 × 10⁻⁶ 18 cm -3 .

[0056] n-type GaAs ohmic contact layer 4 growth: The temperature was lowered to 650℃, and trimethylgallium, arsenide, and disilane were introduced. The growth rate was 0.2 nm / s, resulting in a 30 nm thick highly doped n-type GaAs layer with a doping concentration of 4.0 × 10⁻⁶. 18 cm -3 .

[0057] n-type AlGaInP confinement layer 5 growth: Temperature increased to 750℃, trimethylaluminum, trimethylgallium, trimethylindium, phosphine, and silane were introduced to control the composition (Al...). 0.8 Ga 0.2 ) 0.5 In 0.5 P, growth rate 0.3 nm / s, growth thickness 300 nm, doping concentration 2.0 × 10⁻⁶ 18 cm -3 .

[0058] S4, Strain-compensated multi-quantum-well growth: Maintaining a temperature of 750℃, alternating well layer and barrier layer growth sources are introduced for a total of 10 cycles; the well layer is Ga. 0.5 In 0.5 P, growth rate 0.15 nm / s, thickness 3 nm; barrier layer is (Al 0.8 Ga 0.2 ) 0.5 In 0.5 P, growth rate 0.15 nm / s, thickness 6 nm; during barrier layer growth, silane is simultaneously introduced for doping, with the doping concentration increasing from 1 × 10⁻⁶ in the first period. 17 cm -3 Increased cycle by cycle to 1×10 in the 10th cycle 18 cm -3 This forms a gradient doped strain compensation structure.

[0059] S5, p-type functional layer growth: p-type AlGaInP spacer layer 7 growth: Maintain 750℃, introduce trimethylaluminum, trimethylgallium, trimethylindium, phosphine and magnesia (Cp2Mg) to control the composition (Al 0.85 Ga 0.15 ) 0.5 In 0.5 P, growth rate 0.3 nm / s, growth thickness 60 nm, p-type doping concentration 1.5 × 10⁻⁶ 18 cm -3 .

[0060] p-type AlInP electron blocking layer growth: Maintain 750℃, turn off the trimethylgallium source, and introduce trimethylaluminum, trimethylindium, phosphine, and magnesium pyrocene to control the Al composition. 0.5 In 0.5P, growth rate 0.3 nm / s, growth thickness 500 nm, doping concentration 2.0 × 10⁻⁶ 18 cm -3 .

[0061] p-type GaP ohmic contact layer 9 growth: Maintain 750℃, turn off the trimethylaluminum and trimethylindium sources, and introduce trimethylgallium, phosphine, magnesia, and carbon tetrabromide (CBr4). Growth rate: 0.3 nm / s, growth thickness: 200 nm, p-type co-doping concentration: 4.0 × 10⁻⁶ 18 cm -3 .

[0062] S6, Cooling Annealing: After growth is complete, all reaction sources are turned off, and the temperature is gradually reduced to room temperature under a hydrogen atmosphere. In-situ annealing is performed for 30 minutes, and then epitaxial structure 10 is taken out to complete the preparation.

[0063] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0064] Finally, it should be noted that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An AlGaInP red-light epitaxial structure based on strain compensation to increase the number of quantum wells, comprising, from bottom to top, a substrate, an n-type semiconductor layer, a multi-quantum-well active layer, and a p-type semiconductor layer, characterized in that: The multi-quantum-well active layer comprises 8 to 10 pairs of periodically alternating well layers and barrier layers, wherein the well layers are made of GaInP semiconductor material and the barrier layers are made of AlGaInP semiconductor material. The active layer of the multi-quantum well is provided with at least one strain compensation structure, which is one or more combinations of gradient doped barrier layer, integrated strain compensation layer, and selectively inserted stress buffer layer. The strain compensation structure is used to counteract the accumulation of lattice stress caused by the increase of the quantum well logarithm and maintain the quality of the epitaxial crystal.

2. The AlGaInP red-light epitaxial structure according to claim 1, characterized in that, The number of quantum well pairs in the multi-quantum-well active layer is 9-10; the thickness of the well layer is 1.5-4.5 nm, and the thickness of the barrier layer is 4-10 nm; the chemical composition of the barrier layer is (Al... x2 Ga 1-x2 ) y2 InP, where x2 takes values ​​from 0.7 to 0.9 and y2 takes values ​​from 0.

5.

3. The AlGaInP red-light epitaxial structure according to claim 1, characterized in that, The gradient doped barrier layer specifically comprises: each period of the barrier layer is doped with at least one doping element, which is selected from one or more of Mg, Si, Zn, Te, As, Sb, Fe, and Bi; the doping concentration of the barrier layer increases layer by layer with the increase of the quantum well period number, and the doping concentration ranges from 1×10⁻⁶. 17 cm -3 ~1×10 18 cm -3 By controlling the gradient of doping concentration, the accumulated lattice stress is released layer by layer, thus alleviating the stress superposition effect of multi-period wells.

4. The AlGaInP red-light epitaxial structure according to claim 1, characterized in that, The integrated strain compensation layer specifically comprises: at least one strain compensation sublayer with a gradually changing Al composition embedded inside each barrier layer; the Al composition of the strain compensation sublayer gradually changes from high to low along the epitaxial growth direction, and the amplitude of the Al composition change gradually increases with the increase of the quantum well period number; the thickness of the strain compensation sublayer is 0.5~2nm, and the stress generated by the composition change offsets the lattice mismatch stress at the well-barrier interface, thereby achieving in-situ compensation of the stress in each period.

5. The AlGaInP red-light epitaxial structure according to claim 1, characterized in that, The selective insertion of the stress buffer layer specifically involves inserting at least one stress buffer layer after the barrier layer growth is completed for the 2nd, 5th, and 8th pairs of quantum wells, or after the barrier layer growth is completed for the 3rd, 6th, and 9th pairs of quantum wells. The stress buffer layer is an AlGaInP semiconductor material with low lattice mismatch and a thickness of 5-15 nm. It is used to release stress concentration in local areas of the multi-quantum-well active layer at specific points and suppress crystal defects caused by stress accumulation.

6. The AlGaInP red-light epitaxial structure according to claim 1, characterized in that, The n-type semiconductor layer, from bottom to top, comprises an n-type GaAs buffer layer, an n-type AlGaInP etch stop layer, an n-type GaAs ohmic contact layer, and an n-type AlGaInP confinement layer; the p-type semiconductor layer, from bottom to top, comprises a p-type AlGaInP spacer layer, a p-type AlInP electron blocking layer, and a p-type GaP ohmic contact layer; the specific parameters of each layer are as follows. The n-type doping concentration of the n-type GaAs buffer layer is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 100~300nm; The chemical composition of the n-type AlGaInP etch stop layer is (Al x Ga 1-x )ᵧInP, where x takes values ​​from 0.1 to 0.4, y takes values ​​from 0.5, and the doping concentration is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 100~300nm; The doping concentration of the n-type GaAs ohmic contact layer is 3.0 × 10⁻⁶. 18 ~5.0×10 18 cm -3 The thickness is 10~50nm; The chemical composition of the n-type AlGaInP confinement layer is (Al x1 Ga 1-x1 ) y1 InP, where x1 ranges from 0.7 to 1, y1 is 0.5, and the doping concentration is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 150~500nm; The chemical composition of the p-type AlGaInP spacer layer is (Al x3 Ga 1-x3 ) y3 InP, where x3 takes values ​​of 0.8 to 0.9, y3 takes values ​​of 0.5, and the p-type doping concentration is 1.0 × 10⁻⁶. 18 ~2.0×10 18 cm -3 The thickness is 30~100nm; The chemical composition of the p-type AlInP electron blocking layer is Al x4 In 1-x4 P, where x4 is 0.5 and the doping concentration is 1.0 × 10⁻⁶. 18 ~3.0×10 18 cm -3 The thickness is 200~900nm; The doping concentration of the p-type GaP ohmic contact layer is 3.0 × 10⁻⁶. 18 ~5.0×10 18 cm -3 The thickness is 50~300nm.

7. A strain-compensated AlGaInP red light semiconductor optoelectronic chip, characterized in that, It includes the AlGaInP red epitaxial structure as described in any one of claims 1 to 6; the semiconductor optoelectronic chip is any one of a front-mounted red LED chip, a flip-chip red LED chip, a red Micro-LED display chip, a side-emitting red semiconductor laser chip, or a vertical-cavity surface-emitting red laser chip.

8. A strain-compensated AlGaInP red micro-LED chip, characterized in that, The AlGaInP red-light epitaxial structure according to any one of claims 1 to 6 further includes a p-type transparent conductive layer, a bonding metal layer, a Si-based CMOS driving circuit, a sidewall passivation layer, an n-type transparent conductive interconnect layer, and an n-type metal electrode. The p-type transparent conductive layer is deposited on the upper surface of the p-type GaP ohmic contact layer of the epitaxial structure; The bonding metal layer includes a first bonding metal layer and a second bonding metal layer. The first bonding metal layer is deposited on the upper surface of the p-type transparent conductive layer, and the second bonding metal layer is deposited on the front side of the Si-based CMOS driving circuit. The epitaxial structure and the Si-based CMOS driving circuit are mechanically fixed and electrically connected through the metal interfusion of the first bonding metal layer and the second bonding metal layer. After the GaAs substrate of the epitaxial structure is removed by wet etching, the surface of the n-type GaAs ohmic contact layer is exposed. The sidewall passivation layer covers the sidewall surface of the Micro-LED platform; The n-type transparent conductive interconnect layer is deposited on the exposed n-type GaAs ohmic contact layer surface, and the n-type metal electrode is fabricated in the preset electrode region of the n-type transparent conductive interconnect layer.

9. The AlGaInP red Micro-LED chip according to claim 8, characterized in that: Both the p-type transparent conductive layer and the n-type transparent conductive interconnect layer are made of indium tin oxide material, with a thickness of 100~200nm; The bonding metal layer is a Cr / Pt / Au stacked structure with a total thickness of 500~1000nm; The sidewall passivation layer is made of silicon dioxide and has a thickness of 10~100nm. The Micro-LED platform is square or circular, with a horizontal dimension of 1~50μm and a pixel pitch of 2~75μm between adjacent platforms; The n-type metal electrode has a Cr / Pt / Au stacked structure with a thickness of 300~800nm.

10. A method for preparing the AlGaInP red-light epitaxial structure according to any one of claims 1 to 6, characterized in that, Epitaxial growth is performed using a metal-organic chemical vapor deposition system, specifically including the following steps: S1, Substrate pretreatment: The GaAs substrate is placed in the MOCVD reaction chamber, vacuumed and heated to 620~700℃, and hydrogen is introduced as a carrier gas for substrate surface heat treatment. S2, n-type buffer layer growth: Maintaining the growth temperature at 620~700℃, using trimethylgallium as the gallium source, hydrogen arsine as the arsenic source, and disilane as the n-type doping source, an n-type GaAs buffer layer is grown on a GaAs substrate, with the growth rate controlled at 0.2~0.7nm / s; S3, n-type functional layer growth: The reaction chamber is heated to 700~780℃, and trimethylaluminum, trimethylgallium, and trimethylindium are used as group III reaction sources, phosphine is used as group V reaction source, and silane is used as n-type doping source. The n-type AlGaInP etch stop layer, n-type GaAs ohmic contact layer, and n-type AlGaInP confinement layer are grown sequentially. S4, Strain-compensated multi-quantum-well growth: Maintaining a growth temperature of 700~780℃, GaInP well layers and AlGaInP barrier layers are grown alternately for a total of 8~10 cycles; during the barrier layer growth process, a strain-compensated structure is introduced by gradient-controlled doping concentration, embedding strain-compensated sublayers with gradually changing Al composition, or inserting stress buffer layers after a specified cycle to obtain a multi-quantum-well active layer; the growth rate of the well layer and barrier layer is controlled at 0.1~0.2nm / s; S5, p-type functional layer growth: Maintain the growth temperature at 700~780℃, use magnesia as the p-type doping source, and grow the p-type AlGaInP spacer layer and p-type AlInP electron blocking layer in sequence; then use trimethylgallium as the gallium source, phosphine as the phosphorus source, and magnesia and carbon tetrabromide as the co-doping source to grow the p-type GaP ohmic contact layer. S6, Cooling Annealing: After growth is complete, the reaction chamber is gradually cooled to room temperature, and a protective gas is introduced for in-situ annealing before the epitaxial structure is removed.

Images