A double-layer microlens structure, a high-concentration Micro-LED chip and its fabrication method

Abstract

This invention discloses a double-layer microlens structure, a high-concentration double-layer microlens Micro-LED chip, and its fabrication method. The double-layer microlens structure effectively improves light extraction efficiency and achieves high collimation light emission and high light concentration capability. The Micro-LED chip, from bottom to top, includes a metal bonding layer, a reflective layer, an ITO layer, a p-GaN layer, a multi-quantum-well active layer, an n-GaN layer, a SiO2 passivation layer, an ITO layer, a metal mesh layer, a refractive index matching and planarization layer, a primary microlens, and a secondary microlens. The core idea of ​​this innovative double-layer microlens structure is "preliminary collimation followed by light collection." By adjusting the thickness of the n-GaN layer, the refractive index matching and planarization layer, and the radius of the primary microlens array, focal length matching between the microlens and the light-emitting layer is achieved, splitting and initially converting the light emitted from the light source into multiple collimated beams. Then, a second layer of covering microlenses is used to finally converge these collimated beams and further compress their angles, thereby achieving high light extraction efficiency while obtaining a collimated output beam with a very small divergence angle.

Description

Technical Field

[0001] This invention relates to the field of semiconductor optoelectronic technology, specifically to a double-layer microlens structure, a high-concentration double-layer microlens Micro-LED chip, and its fabrication method. In particular, it relates to a double-layer microlens structure suitable for Micro-LED chips that can effectively improve light extraction efficiency and achieve high collimation light emission and high light concentration capability, a double-layer microlens Micro-LED chip with high light concentration characteristics, and its fabrication method. Background Technology

[0002] Micro-LEDs, with their high brightness, high contrast, low power consumption, long lifespan, and fast response, have shown great potential in fields such as head-up displays (HUDs), augmented / virtual reality (AR / VR) devices, micro-projectors, and high-density displays. However, when LED sizes shrink to the micrometer scale (<50μm), the total internal reflection (TIR) ​​effect caused by the huge refractive index difference at the chip-air interface is amplified dramatically, resulting in most of the light being confined inside the chip and causing severe light extraction losses. Simultaneously, optical crosstalk between tiny pixels significantly affects the light-emitting performance of Micro-LED chips.

[0003] To overcome the aforementioned problems, the industry generally adopts a strategy of integrating a single hemispherical microlens on the light-emitting surface of the chip. This lens partially suppresses TIR and improves light extraction efficiency (LEE) by providing a gradual refractive index transition and changing the incident angle of light. However, for micro-sized light sources like Micro-LEDs, the single-lens solution has fundamental physical limitations. To cover the entire light-emitting area of ​​the chip, the radius of curvature of the lens must be large enough, resulting in a focal length significantly greater than the chip thickness. Therefore, the active light-emitting area (quantum well) located near the bottom of the chip is actually far from the focal point of the lens, and the lens's main function is only to converge the beam angle to a certain extent rather than "collimating" and "efficiently focusing" the light. As a result, the emitted beam still has a wide viewing angle, making it difficult to meet the application requirements of collimated backlighting, optical waveguide coupling, and near-eye displays, which require high-directional and high-focus displays. Although some research has attempted to fabricate microlens arrays with smaller sizes and shorter focal lengths, they are usually used for homogenization rather than directly aligning with individual Micro-LED point light sources, failing to achieve fundamental control over the light-emitting characteristics of individual pixels.

[0004] CN118263381A discloses a method for fabricating a full-color Micro-LED microlens array display device. In the Micro-LED color filter microlens array display device, the microlenses can convert the light emission of quantum dots into forward light emission. Compared with the isotropic light emission of quantum dots, this improves the overall light emission efficiency of the microdisplay. By mixing red and green color filter materials in the microlenses, the accuracy of the emitted light color can be further guaranteed on the basis of improving the light emission efficiency.

[0005] CN 120857745 A discloses a Micro LED chip and its fabrication method. By forming a microlens on an LED unit, the microlens has a light-concentrating convex surface facing the LED unit, which enables the light emitted from the LED unit to be effectively focused after passing through the light-concentrating convex surface, thereby increasing the amount of light emitted from the side of the microlens away from the LED unit. This is beneficial to improving the efficiency and stability of full-color display of Micro LED chips.

[0006] All of the aforementioned patent documents designed microlens structures to regulate the light output of Micro-LEDs, but the size of the microlenses is greater than or equal to the pixel size. Among them, CN 120857745 A increases the distance between the lens and the chip pixel through a cavity structure, achieving a better light-gathering effect, but it requires the introduction of a sacrificial layer, making the fabrication process more difficult and resulting in lower overall structural strength.

[0007] Overall, the main shortcomings of existing technologies include:

[0008] 1) The inherent physical limitations of a single microlens, and the mismatch between focal length and chip size. To achieve effective beam collimation, the distance between the quantum well and the microlens must be equal to or close to the focal length of the microlens. However, for Micro-LED chips, the distance between the active layer and the microlens is typically only a few micrometers, much smaller than the focal length of a cover lens. Therefore, the quantum well layer is actually located in the near field of the lens rather than at the focal plane. The core function of the lens is merely to change the light path to improve extraction efficiency; its "collimation" function is almost lost, and the emitted light still has a large emission angle.

[0009] 2) Existing microlens array (MLA) technology is typically used in backlight modules or imaging sensors. Its lens units do not perform optical matching for individual Micro-LED light-emitting points, but rather optical processing for the entire chip light source. When applying general-purpose MLA to Micro-LEDs, some light rays may be incorrectly deflected by adjacent lens units, failing to form a uniform and efficient collimated beam, resulting in light loss and optical crosstalk.

[0010] 3) Some complex discrete optical components that can theoretically achieve better collimation effects are incompatible with the wafer-level micro-nano manufacturing process of Micro-LEDs, resulting in high costs, integration difficulties, and reduced reliability.

[0011] In summary, existing technologies lack an integrated optical solution that is compatible with Micro-LED chip processes and can fundamentally and efficiently convert divergent light from point sources into highly collimated parallel beams. Summary of the Invention

[0012] The technical problem this invention aims to solve is to overcome the shortcomings of the existing technology and provide an innovative double-layer microlens structure. Its core idea is "initial collimation followed by light collection." By adjusting the thickness of the n-GaN layer, the refractive index matching and planarization layer, and the radius of the primary microlens array, focal length matching between the microlens and the light-emitting layer is achieved, splitting and initially converting the light emitted from the light source into multiple collimated beams. Then, the second-level microlenses are used to finally converge these collimated beams and further compress their angles, thereby achieving high light extraction efficiency while obtaining a collimated output beam with an extremely small divergence angle.

[0013] The technical solution of this invention is as follows:

[0014] A dual-layer microlens Micro-LED chip with high light-gathering properties comprises, from bottom to top, a metal bonding layer, a reflective layer, an ITO layer, a p-GaN layer, a multi-quantum-well active layer, an n-GaN layer, a SiO2 passivation layer, an ITO transparent conductive layer, a metal mesh layer, a refractive index matching and planarization layer, a primary microlens, and a secondary microlens. Its unique optical structure lies in the sequential integration of the following components on top of the transparent conductive oxide layer:

[0015] 1) Refractive index matching and planarization layer: This layer is directly deposited on the transparent conductive oxide layer. Its refractive index is between that of the transparent conductive oxide and the subsequent microlens, which is used to reduce total internal reflection at the interface and provide a lithographic plane. At the same time, by changing the thickness of the refractive index matching and planarization layer, it works synergistically with the primary microlens array in 2) to control the position of the microlens focal plane.

[0016] Preferably, the refractive index matching and planarization layer is SiO2 (n≈1.48@530nm), which has a lower refractive index than ITO (n≈1.88@530nm). Alternatively, photosensitive polyimide (PSPI), benzocyclobutene (BCB), or other materials can be used as the refractive index matching and planarization layer.

[0017] 2) Primary collimating microlens array: Formed on the refractive index matching and planarization layer described in 1), this array consists of multiple micrometer-scale hemispherical lens units arranged in a close-packed manner (e.g., hexagonal or rectangular array). The period of this array and the radius of curvature of the lens units are rigorously optically designed to ensure that the luminescent center plane of the multi-quantum-well active layer is precisely located or very close to the optical focal plane of each lens unit. Each lens unit independently collimates and transforms the light emitted from its corresponding luminescent sub-region.

[0018] Preferably, the material of the primary collimating microlens array is a high refractive index medium, such as silicon nitride, titanium oxide, or high refractive index spin-coated glass (SOG). The radius of curvature R1 of the lens unit satisfies: f = R1 / (n - 1) ≈ H, where H is the physical distance from the quantum well plane to the vertex of the lens unit, n is the refractive index of the lens material, and f is the focal length of the microlens.

[0019] 3) Secondary light-collecting microlens: Monolithically integrated on the primary collimating microlens array, it is a curved lens covering the entire light-emitting image area of ​​the chip. Its function is to receive the light beams with small divergence angles after collimation by the primary array, and to perform final convergence and exit angle optimization to output a highly concentrated collimated beam.

[0020] Preferably, the secondary light-collecting microlens is made of a transparent polymer (such as epoxy resin, silicone, polymethyl methacrylate PMMA) or photoresist material, and is formed by hot reflow or molding. Its radius of curvature R2 is much larger than R1, and its focal length f2 is greater than the total thickness of the chip.

[0021] The present invention discloses a method for fabricating a Micro-LED chip with a double-layer microlens structure, using the following materials as examples: the refractive index matching and planarization layer is SiO2, the primary microlens is Si3N4, and the secondary microlens is a high-refractive-index photoresist material. The fabrication method includes:

[0022] Step 1: Define the mesa shape using ICP etching;

[0023] Step 2: Deposit one or more Al2O3 and SiO2 passivation films on the chip sidewalls using equipment such as PECVD and ALD, and define the passivation layer coverage area through photolithography and etching processes.

[0024] Step 3: Deposit a transparent common cathode conductive layer ITO using magnetron sputtering;

[0025] Step 4: Deposit a Ti / Au metal light-blocking layer using thermal evaporation deposition, electron beam evaporation deposition, or magnetron sputtering, and define the coverage area of ​​the metal light-blocking layer through photolithography and etching processes;

[0026] Step 5: Prepare a SiO2 refractive index matching and planarization layer using PECVD deposition, photolithography and etching processes. The thickness needs to cover the ITO step and match the radius of the primary microlens to provide an ideal substrate for subsequent photolithography.

[0027] Step 6: Prepare a Si3N4 layer as a primary lens material using PECVD deposition, photolithography, and etching processes;

[0028] Step 7: Spin-coat a layer of photoresist onto the surface of the Si3N4 material layer, with the photoresist thickness slightly higher than the radius of the target lens; fabricate the photoresist hemispherical array using mask lithography + thermal reflow process or grayscale lithography process;

[0029] Step 8: Using a photoresist hemispherical array as a mask, the photoresist surface morphology is transferred to the Si3N4 layer by ICP fluorine gas etching.

[0030] Step 9: Spin-coat a highly transparent photoresist as the secondary microlens material layer, covering the entire chip surface. The photoresist thickness is slightly higher than the radius of the secondary microlens. Use photolithography + reflow soldering process or nanoimprint technology to prepare a hemispherical secondary microlens array.

[0031] Mechanism and beneficial effects of the present invention

[0032] This invention employs a double-layer microlens structure that first performs preliminary collimation on the light source and then performs final convergence on the collimated beam. Strict optical coupling is achieved by placing the quantum well plane at or very close to the focal plane of each primary sub-lens. The design utilizes a synergistic approach of two layers of microlenses with a refractive index matching and planarization layer. The primary microlens are made of a high-refractive-index material with a refractive index range of 1.65–1.75, while the secondary lenses are made of a low-refractive-index material with a refractive index range of 1.5–1.6. The refractive index matching and planarization layer has a refractive index range of 1.4–1.5, resulting in an overall "low-refractive-index-low-refractive-index" structure.

[0033] The present invention aims to achieve high light extraction efficiency while obtaining a collimated output beam with a very small divergence angle. The specific effects are as follows:

[0034] 1) High collimation accuracy: By placing the quantum well at the focal plane of multiple microlenses with small radii of curvature, the most direct collimation transformation of the light source is achieved, a physical advantage that a single large lens cannot achieve due to its excessively long focal length. The double-layer structure achieves a cascaded effect of "collimation first, then light collection," which significantly reduces the divergence angle of the final emitted light.

[0035] 2) High light extraction efficiency: The primary microlens array and refractive index matching and planarization layer effectively suppress total internal reflection at the interface, improving the initial light extraction efficiency. The secondary microlens further focus all the light rays onto the front, achieving a secondary improvement in light extraction efficiency;

[0036] 3) Good process compatibility: The thin film deposition, photolithography, etching and other processes used are fully compatible with existing semiconductor micromachining processes, easy to implement at the wafer level, and suitable for large-scale production;

[0037] 4) Flexible design: By adjusting the curvature radius, spacing, material refractive index, and refractive index matching and planarization layer and n-GaN layer thickness of the lenses in the first microlens array, it is possible to flexibly adapt to Micro-LED chips of different sizes and different emission wavelengths and optimize the light focusing effect. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of the structure of the Micro-LED chip with a double-layer microlens structure of the present invention, wherein: 1-metal bonding layer; 2-metal reflective layer; 3-ITO layer; 4-p-GaN layer; 5-multiple quantum well layer; 6-n-GaN layer; 7-polar metal mesh; 8-ITO transparent conductive layer; 9-passivation layer; 10-refractive index matching and planarization layer; 11-primary microlens array; 12-secondary microlens array.

[0039] Figure 2 This is a simplified flowchart of the fabrication process for a double-layer microlens.

[0040] Figure 3 The 3D model diagram used for simulation.

[0041] Figure 4 The figure shows the relationship between the luminous flux of a pixel with an emission angle of less than 40° and the refractive index of the primary microlens obtained from the simulation.

[0042] Figure 5 This is a graph showing the relationship between the focal length and refractive index of a microlens with a radius of 1.53 μm.

[0043] Figure 6 This is a schematic diagram of a 40° field of view for light emission.

[0044] Figure 7 This is the ideal optical path diagram for a double-layer microlens chip.

[0045] Figure 8 Based on the examples provided in this invention, several structural improvements are also protected, including (a) a structural schematic diagram of changing the number and arrangement of the secondary microlens array, (b) a structural schematic diagram of depositing another planarization layer between the primary microlens and the secondary microlens, and (c) a structural schematic diagram of adjusting the coverage of the planarization layer and the radius of the secondary microlens. Detailed Implementation

[0046] Example 1

[0047] like Figure 1As shown, a dual-layer microlens Micro-LED chip with high light-gathering properties includes, from bottom to top, a metal bonding layer 1, a metal reflective layer 2, an ITO layer 3, a p-GaN layer 4, a multi-quantum-well active layer 5, an n-GaN layer 6, a SiO2 passivation layer 9, an ITO transparent conductive layer 8, a metal mesh layer 7, a refractive index matching and planarization layer 10, a primary microlens 11, and a secondary microlens 12. Its unique optical structure lies in the sequential integration of the following components on top of the transparent conductive oxide layer:

[0048] 1) Refractive index matching and planarization layer: This layer is directly deposited on the transparent conductive oxide layer. Its refractive index is between that of the transparent conductive oxide and the subsequent microlens, which is used to reduce total internal reflection at the interface and provide a lithographic plane. At the same time, by changing the thickness of the refractive index matching and planarization layer, it works synergistically with the primary microlens array described in 2) below to control the position of the microlens focal plane.

[0049] Preferably, the refractive index matching and planarization layer is SiO2 (n≈1.48@530nm), which has a refractive index lower than ITO (n≈1.88@530nm) but higher than air. Alternatively, photosensitive polyimide (PSPI), benzocyclobutene (BCB), or other materials can be used as the refractive index matching and planarization layer.

[0050] 2) Primary Collimating Microlens Array: Formed on the refractive index matching and planarization layer described in 1), this array consists of multiple micrometer-scale hemispherical lens units arranged in a close-packed manner (e.g., hexagonal or rectangular array). The period of this array and the radius of curvature of the lens units are rigorously optically designed to ensure that the luminescent center plane of the multi-quantum-well active layer is precisely located or very close to the optical focal plane of each lens unit. Each lens unit independently collimates and transforms the light emitted from its corresponding luminescent sub-region.

[0051] Preferably, the material of the primary collimating microlens array is a high refractive index medium, such as silicon nitride, titanium oxide, or high refractive index spin-coated glass (SOG). The radius of curvature R1 of the lens unit satisfies: f = R1 / (n - 1) ≈ H, where H is the physical distance from the quantum well plane to the vertex of the lens unit, n is the refractive index of the lens material, and f is the focal length of the microlens.

[0052] 3) Secondary light-collecting microlens: Monolithically integrated on the primary collimating microlens array, it is a curved lens covering the entire light-emitting image area of ​​the chip. Its function is to receive the light beams with small divergence angles after collimation by the primary array, and to perform final convergence and exit angle optimization to output a highly concentrated collimated beam.

[0053] Preferably, the secondary light-collecting microlens is made of a transparent polymer (such as epoxy resin, silicone, polymethyl methacrylate PMMA) or photoresist material, and is formed by hot reflow or molding. Its radius of curvature R2 is much larger than R1, and its focal length f2 is greater than the total thickness of the chip.

[0054] Example 2

[0055] This invention discloses a method for fabricating a Micro-LED chip with a double-layer microlens structure. Using the following materials as examples, the refractive index matching and planarization layer is SiO2, the primary microlens is Si3N4, and the secondary microlens is a high-refractive-index photoresist. The following embodiments are for illustrative purposes only and do not constitute a limitation on the scope of protection. A simplified flowchart is shown below. Figure 2 As shown, the preparation process is briefly described below:

[0056] Step 1: Define the mesa shape using ICP etching;

[0057] Step 2: Deposit one or more Al2O3 and SiO2 passivation films on the chip sidewalls using equipment such as PECVD and ALD, and define the passivation layer coverage area through photolithography and etching processes.

[0058] Step 3: Deposit a transparent common cathode conductive layer ITO using magnetron sputtering;

[0059] Step 4: Deposit a Ti / Au metal light-blocking layer using thermal evaporation deposition, electron beam evaporation deposition, or magnetron sputtering, and define the coverage area of ​​the metal light-blocking layer through photolithography and etching processes;

[0060] Step 5: Prepare a SiO2 refractive index matching and planarization layer using PECVD deposition, photolithography and etching processes. The thickness needs to cover the ITO step and match the radius of the primary microlens to provide an ideal substrate for subsequent photolithography.

[0061] Step 6: Prepare a Si3N4 layer as a primary lens material using PECVD deposition, photolithography, and etching processes;

[0062] Step 7: Spin-coat a layer of photoresist onto the surface of the Si3N4 material layer, with the photoresist thickness slightly higher than the radius of the target lens; fabricate the photoresist hemispherical array using mask lithography + thermal reflow process or grayscale lithography process;

[0063] Step 8: Using a photoresist hemispherical array as a mask, the photoresist surface morphology is transferred to the Si3N4 layer by ICP fluorine gas etching.

[0064] Step 9: Spin-coat a highly transparent photoresist as the secondary microlens material layer, covering the entire chip surface. The photoresist thickness is slightly higher than the radius of the secondary microlens. Use photolithography + reflow soldering process or nanoimprint technology to prepare a hemispherical secondary microlens array.

[0065] Example 3

[0066] according to Figure 1 and Figure 2 The image shows a Micro-LED chip with a double-layer microlens structure. A 3D model of the Micro-LED chip is constructed, as shown below. Figure 3 As shown. Optical simulation is performed on the chip model to calculate the luminous flux value within a 40° emission angle, such as... Figure 6 As shown. Figure 4 , Figure 5 For simulation results, when the refractive index of the primary microlens array is 1.7, the luminous flux reaches its maximum within 40°. At this point, the focal length of the primary microlens is approximately 2.19 μm, which is close to the distance from the actual quantum well emitting region to the primary microlens array, consistent with the "preliminary collimation" effect of the primary microlens. The radius of curvature of the secondary microlens is limited by the maximum pixel pitch, according to... Figure 7 The optical path diagram shown achieves the "composite light collection" effect.

[0067] This embodiment only describes a specific method for preparing a particular material. Depending on the material selected, the preparation process and preparation sequence may need to be adjusted accordingly.

[0068] Example 4

[0069] See Figure 8 As shown, the difference from Example 1 is that:

[0070] Figure 8 (a) To adjust the number and arrangement of the secondary microlens array according to the different sizes of Micro-LED chips.

[0071] Figure 8 (b) A planarization layer is deposited between the primary microlens and the secondary microlens to achieve optical matching between the primary microlens and the secondary microlens.

[0072] Figure 8 (c) Adjust the coverage of the planarization layer and the radius of the secondary microlens according to the different pixel pitch of the Micro-LED chip.

[0073] The above structures can all achieve similar gain effects as in Example 1.

Claims

1. A high-concentration double-layer microlens Micro-LED chip, characterized in that, From bottom to top, it includes a metal bonding layer (1), a metal reflective layer (2), an ITO layer (3), a p-GaN layer (4), a multi-quantum well active layer (5), an n-GaN layer (6), a SiO2 passivation layer (9), an ITO transparent conductive layer (8), a metal mesh layer (7), a refractive index matching and planarization layer (10), a primary collimating microlens (11), and a secondary light-collecting microlens (12). The primary collimating microlens array (11) is formed on the refractive index matching and planarization layer (10) and includes multiple micron-scale hemispherical lens units arranged periodically on the same plane in a close-packed manner. The secondary light-collecting microlens (12) is monolithically integrated on the primary collimating microlens array (11) and is a curved lens covering the entire chip light-emitting image area; The arrangement period of the primary collimating microlens array (11) and the radius of curvature of the lens unit are used to ensure that the light emission center plane of the multi-quantum well active layer is located on the optical focal plane of each lens unit, and each lens unit independently performs collimation transformation on the light emitted by its corresponding light emission sub-region. The secondary light-collecting microlens (12) is used to receive each beam of light with a small divergence angle after being collimated by the primary collimating microlens array (11), and to perform final convergence and emission angle optimization to output a highly concentrated collimated beam of light.

2. The high-concentration double-layer microlens Micro-LED chip according to claim 1, characterized in that: The refractive index matching and planarization layer (10) is directly deposited on the transparent conductive oxide layer, and its material refractive index is between that of the transparent conductive oxide and the subsequent microlens. The refractive index matching and planarization layer (10) is used to reduce total internal reflection at the interface and provide a photolithographic plane; at the same time, by changing its thickness, it works synergistically with the primary microlens array to control the position of the microlens focal plane.

3. The high-concentration double-layer microlens Micro-LED chip according to claim 1, characterized in that: The refractive index matching and planarization layer (10) is any one of SiO2, photosensitive polyimide, or benzocyclobutene.

4. The high-concentration double-layer microlens Micro-LED chip according to claim 1, characterized in that: The primary collimating microlens array (11) is made of silicon nitride, titanium oxide, or high-refractive-index spin-coated glass.

5. The high-concentration double-layer microlens Micro-LED chip according to claim 4, characterized in that: The radius of curvature R1 of the lens unit satisfies: f = R1 / (n - 1)≈H, where H is the physical distance from the quantum well plane to the vertex of the lens unit, n is the refractive index of the lens material, and f is the focal length of the microlens.

6. The high-concentration double-layer microlens Micro-LED chip according to claim 1, characterized in that: The secondary light-collecting microlens (12) is made of transparent polymer or photoresist material and is formed by hot reflow or molding. Its radius of curvature R2 is greater than R1 and its focal length f2 is greater than the total thickness of the chip.

7. The high-concentration double-layer microlens Micro-LED chip according to claim 1, characterized in that: The refractive index matching and planarization layer (10) is a two-layer structure used to achieve optical matching between the primary microlens and the secondary microlens.

8. A method for fabricating a high-concentration double-layer microlens Micro-LED chip according to any one of claims 1-7, characterized in that, Includes the following steps: Step 1: Define the mesa shape using ICP etching; Step 2: Deposit one or more Al2O3 and SiO2 passivation films on the chip sidewalls using equipment such as PECVD and ALD, and define the passivation layer coverage area through photolithography and etching processes. Step 3: Deposit a transparent common cathode conductive layer ITO using magnetron sputtering; Step 4: Deposit a Ti / Au metal light-blocking layer using thermal evaporation deposition, electron beam evaporation deposition, or magnetron sputtering, and define the coverage area of ​​the metal light-blocking layer through photolithography and etching processes; Step 5: Prepare a SiO2 refractive index matching and planarization layer using PECVD deposition, photolithography and etching processes. The thickness needs to cover the ITO step and match the radius of the primary microlens to provide an ideal substrate for subsequent photolithography. Step 6: Prepare a Si3N4 layer as a primary lens material using PECVD deposition, photolithography, and etching processes; Step 7: Spin-coat a layer of photoresist onto the surface of the Si3N4 material layer, with the photoresist thickness slightly higher than the radius of the target lens; Photoresist hemispherical arrays are fabricated using mask lithography + thermal reflow or grayscale lithography. Step 8: Using a photoresist hemispherical array as a mask, the photoresist surface morphology is transferred to the Si3N4 layer by ICP fluorine gas etching. Step 9: Spin-coat a highly transparent photoresist as the secondary microlens material layer, covering the entire chip surface. The photoresist thickness is slightly higher than the radius of the secondary microlens. Use photolithography + reflow soldering process or nanoimprint technology to prepare a hemispherical secondary microlens array.

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