A display panel and its manufacturing method

Abstract

This application provides a display panel, which includes a display area. The display area of ​​the display panel includes: a substrate, wherein the substrate has a first through-hole at the edge of the display area; an array film layer located on one side of the substrate, the array film layer including a first metal layer, a transistor, and a solar cell; a display film layer located on the side of the array film layer away from the substrate, including a light-emitting device; a second metal layer located between the array film layer and the substrate, including a first terminal electrically connected to the array film layer and a second terminal electrically connected to the solar cell; the first terminal and the second terminal at least partially cover the first through-hole in their orthogonal projections on the substrate; and an on-film chip, the on-film chip being electrically connected to the first terminal and the second terminal through an electrical connection structure.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display panel and a method for manufacturing the same. Background Technology

[0002] Organic light-emitting diode (OLED) display technology is considered the most promising next-generation display technology. Compared with liquid crystal display technology, OLED display technology has advantages such as low energy consumption, low cost, self-emissiveness, wide viewing angle, and fast response speed.

[0003] With technological advancements and rising consumer aesthetic standards, terminal displays require narrower bezels, making it crucial to further reduce the bezels of display panels. Summary of the Invention

[0004] In order to overcome the technical problems mentioned in the above technical background, this application provides a display panel that can achieve a narrow bezel and a method for manufacturing the same.

[0005] This application provides a display panel, which includes a display area. The display area of ​​the display panel includes: a substrate, wherein the substrate has a first through-hole at the edge of the display area; an array film layer located on one side of the substrate, the array film layer including a first metal layer and a transistor; a display film layer located on the side of the array film layer away from the substrate, including a light-emitting device; and a second metal layer located between the array film layer and the substrate, including a first terminal electrically connected to the array film layer, wherein the orthographic projection of the first terminal on the substrate at least partially covers the first through-hole.

[0006] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the array film layer further includes a solar cell, the solar cell including a top electrode and a bottom electrode, the top electrode and the bottom electrode being electrically connected to the second metal layer respectively, and the top electrode being located on the side of the bottom electrode away from the second metal layer.

[0007] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the bottom electrode is located on the side of the second metal layer away from the substrate, and the top electrode is located between the first metal layer and the bottom electrode; Alternatively, a portion of the second metal layer may be reused as the bottom electrode, and a portion of the first metal layer may be reused as the top electrode.

[0008] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the transistor includes a semiconductor layer, and the orthogonal projection of the top electrode on the substrate covers at least a portion of the semiconductor layer of the transistor.

[0009] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the orthogonal projection of the solar cell onto the substrate is located at one edge of the display area; the solar cell is disposed on the same layer as a portion of the transistors, or is located on the side of the transistors closer to the substrate.

[0010] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the second metal layer includes second terminals located on both sides of the first terminal, the second terminals being electrically connected to the solar cell, and the orthogonal projection of the second terminals onto the substrate at least partially covering the first through-hole.

[0011] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the first terminal and the second terminal are disposed on the same side edge of the display area, and their orthogonal projections on the substrate overlap with the solar cell.

[0012] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the second terminal includes a positive terminal and a negative terminal, the top electrode of the solar cell is electrically connected to the positive terminal, and the bottom electrode of the solar cell is electrically connected to the negative terminal.

[0013] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the number of the first terminals is greater than the number of the second terminals.

[0014] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the width of a single first terminal is less than or equal to the width of a single second terminal, and the width of all first terminals is less than the width of the second terminals.

[0015] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the width of a single first terminal is 10-30 μm, and the width of a single second terminal is 10-300 μm.

[0016] In one possible implementation, in the display panel provided in the embodiments of this disclosure, The second metal layer further includes a patterned metal layer, the patterned metal layer including a blocking portion and a metal mesh located around the metal blocking portion. The orthogonal projection of the metal barrier onto the substrate covers at least one of the transistor and the light-emitting device.

[0017] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the metal mesh includes a plurality of metal mesh holes, and the metal blocking portions are respectively located within the metal mesh holes.

[0018] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the metal blocking portion, the metal mesh, and the first terminal are located on the same layer; Alternatively, the metal barrier and the metal mesh are located on the same layer, and the first terminal is located on another layer, with the first terminal being closer to the substrate than the metal barrier and the metal mesh.

[0019] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the display panel includes an interlayer insulating layer located between the metal mesh and the first terminal, the metal mesh being electrically connected to the first terminal through a via in the interlayer insulating layer; the array film layer being electrically connected to the first terminal through the metal mesh.

[0020] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the second metal layer further includes a patterned metal layer, which is reused as the bottom electrode; preferably, the patterned metal layer, the first terminal, and the second terminal are all located on the same layer, and the patterned metal layer is electrically connected to the first terminal and the second terminal respectively; Alternatively, the patterned metal layer is located on the same layer, and the first terminal and the second terminal are located on another layer, with the first terminal and the second terminal being closer to the substrate than the patterned metal layer.

[0021] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the display panel includes an interlayer insulating layer located between the patterned metal layer and the first terminal, and the patterned metal layer is electrically connected to the first terminal and the second terminal respectively through vias in the interlayer insulating layer.

[0022] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the array film layer is electrically connected to the first terminal through the patterned metal layer; the top electrode of the solar cell is electrically connected to the second terminal, and the bottom electrode of the solar cell is electrically connected to the second terminal; the patterned metal layer includes a metal mesh, and the metal mesh is reused as the bottom electrode.

[0023] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the metal mesh is reused as the bottom electrode.

[0024] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the metal blocking portion, the metal mesh, the first terminal, and the second terminal are all located on the same layer, and the metal mesh is electrically connected to the first terminal and the second terminal respectively; Alternatively, the metal barrier and the metal mesh are located on the same layer, and the first terminal and the second terminal are located on the same layer, with the first terminal and the second terminal being closer to the substrate than the metal barrier and the metal mesh.

[0025] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the display panel includes an interlayer insulating layer located between the metal mesh and the first terminal, and the metal mesh is electrically connected to the first terminal and the second terminal respectively through the vias in the interlayer insulating layer.

[0026] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the interlayer insulating layer is an inorganic layer.

[0027] In one possible implementation, in the display panel provided in the embodiments of this disclosure, a first insulating layer is provided between the substrate and the second metal layer, and the first through-hole penetrates the first insulating layer to expose the first terminal and the second terminal.

[0028] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the substrate is glass or polyimide, the first through holes are arranged in multiple columns along one side edge of the display area, and the first through holes between columns are staggered in a direction perpendicular to the column, such that the virtual connecting lines in the three first through holes of two adjacent rows form a triangle.

[0029] In one possible implementation, in the display panel provided in the embodiments of this disclosure, when the substrate is glass, the structure of the first through hole is a frustum structure; when the substrate is polyimide, the structure of the first through hole is a rectangular truncated pyramid structure.

[0030] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the end of the first through hole with a smaller aperture is closer to the first terminal, and the end with a larger aperture is located on the substrate away from the first terminal.

[0031] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the diameter of the first through hole is 5~20um.

[0032] In one possible implementation, the display panel provided in the embodiments of this disclosure further includes a chip on film disposed on the back side of the substrate, an electrical connection structure is disposed in the first through hole, and the terminals of the chip on film are electrically connected to the first terminal and the second terminal respectively through the electrical connection structure.

[0033] In one possible implementation, in the display panel provided in the embodiments of this disclosure, the electrical connection structure is conductive silver paste or conductive particles.

[0034] In one possible implementation, in the display panel provided in the embodiments of this disclosure, a protective film is provided on the side of the electrical connection structure away from the substrate.

[0035] Accordingly, this disclosure also provides a method for fabricating a display panel, used to manufacture the display panel provided in this disclosure. The method includes: providing a substrate; depositing an array film layer on the substrate to form a first metal layer and transistors; depositing a second metal layer on the substrate before depositing the array film layer, and patterning the second metal layer to form a first terminal, a second terminal, and a patterned metal layer; and laser drilling a hole on the back side of the substrate to form a first through-hole to expose the first terminal and the second terminal.

[0036] In one possible implementation, the fabrication method shown above in the embodiments of this disclosure further includes, before depositing the second metal layer on the substrate, depositing a first insulating layer on the substrate, depositing metal on the first insulating layer to form the second metal layer; and patterning the second metal layer, specifically, photolithographically patterning the second metal layer on the first insulating layer to form a first terminal and a second terminal, and a patterned metal layer located on one side of the first terminal and the second terminal, wherein the patterned metal layer includes a metal blocking portion and a metal mesh located around the metal blocking portion.

[0037] In one possible implementation, the metal mesh and metal barrier are located on the side of the first terminal and the second terminal away from the substrate; or, the metal mesh and metal barrier are located on the same layer as the first terminal and the second terminal, and the metal mesh is electrically connected to the first terminal and the second terminal respectively.

[0038] In one possible implementation, prior to depositing an array of films on the substrate to form a first metal layer and a transistor, the method further includes depositing a solar cell over a metal grid, the metal grid being reused as the bottom electrode of the solar cell, and the top electrode of the solar cell being a portion of the first metal layer.

[0039] In one possible implementation, the top electrode of the solar cell is electrically connected to the second terminal.

[0040] In one possible implementation, the top electrode of the solar cell covers the semiconductor of the transistor in the orthogonal projection onto the substrate.

[0041] In one possible implementation, a chip-on-film is disposed on the back side of the substrate, and an electrical connection structure is formed by injecting conductive silver paste or conductive particles into a first via. The first terminal and the second terminal are respectively electrically connected to the chip-on-film through the electrical connection structure. Attached Figure Description

[0042] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 This is a plan view of the display panel; Figure 2 The circuit structure for implementing electrical signals on the display panel Figure 3 This is a screenshot of the display panel; Figure 4 This is a cross-sectional view of the substrate and array film layers of the display panel. Figure 5 This is a schematic diagram of the light-emitting layer structure of a display panel; Figure 6 A top view of the second metal layer of the display panel; Figure 7 This is a schematic diagram of the back side of the substrate of the display panel; Figure 8 This is a schematic diagram illustrating the manufacturing process of a display panel. Figure 9 This is a three-dimensional schematic diagram of the display panel. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0045] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0046] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. It should be noted that, unless otherwise specified, different features in the embodiments of this application can be combined with each other.

[0047] For ease of understanding, the accompanying diagram shows the mutually orthogonal X-axis, Y-axis, and Z-axis. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction relative to the plane containing the X and Y directions. Furthermore, a view where various elements are observed parallel to the plane containing the X and Y directions is called a top view. Alternatively, the planes in the X and Y directions can be planes parallel to the display surface of the display panel, and the Z-direction can be a direction parallel to the thickness direction of the display panel.

[0048] For certain elements, terms like "above" or "overhead" are sometimes used when describing the position of an element in the Z direction, and "below" or "under" are used when describing the position of an element in the opposite direction. Furthermore, when using terms like "above," "overhead," "below," "under," or "relative" to define the positional relationship between two elements, this includes not only the state where the two elements are directly adjacent, but also the state where the two elements are separated by gaps or other elements. Additionally, terms like "first," "second," and "third" are used only for distinguishing descriptions and should not be interpreted as indicating or implying relative importance.

[0049] Figure 1 This is a schematic diagram of the structure of a display panel 1 according to one embodiment of this application. The display panel 1 can be an organic light-emitting diode (OLED) display panel or a quantum dot light-emitting diode (QLED) display panel. The display panel 1 includes a display area AA with display function.

[0050] The shape of the display area AA of the display panel 1 can be rectangular, square, circular, elliptical, or other shapes.

[0051] The display area AA includes a plurality of pixels PX arranged in the X and Y directions. Each pixel PX includes a plurality of sub-pixels SPX displaying different colors. In some embodiments, a pixel PX includes a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. For example, the first sub-pixel SPX1 is a blue sub-pixel, the second sub-pixel SPX2 is a green sub-pixel SPX2, and the third sub-pixel SPX3 is a red sub-pixel SPX3. In some embodiments, in addition to sub-pixels SPX1, SPX2, and SPX3, a pixel PX also includes sub-pixels SPX that emit white or other colors of light.

[0052] A sub-pixel (SPX) includes a pixel circuit and a light-emitting device driven by the pixel circuit to emit light of the corresponding color. The first sub-pixel (SPX1) includes a first light-emitting device, the second sub-pixel (SPX2) includes a second light-emitting device, and the third sub-pixel (SPX3) includes a third light-emitting device. One pixel circuit drives at least one light-emitting device to emit light. For example, the display area AA includes a normal display area and a light-transmitting display area. The light-transmitting display area is a display area set according to a corresponding sensor and has light-transmitting properties, while the normal display area is a display area not set according to a corresponding sensor. In the normal display area, one pixel circuit drives one light-emitting device to emit light, and in the light-transmitting display area, one pixel circuit drives one or more light-emitting devices to emit light.

[0053] In one implementation, reference Figure 2 This refers to the pixel circuit structure of the display panel.

[0054] refer to Figure 3 The display panel 1 includes a substrate 10, an array film layer 20, a display film layer 30, and an encapsulation layer 40. The array film layer 20 is located on one side of the substrate 10 and includes a first metal layer and transistors 21, a pixel circuit layer, and a planarization layer. The pixel circuit layer includes pixel circuits for driving light-emitting devices to emit light. Figure 4 A transistor 21 in a pixel circuit is shown. A via is provided in the planarization layer, and a first electrode 310 is electrically connected to the transistor 21 in the pixel circuit layer through the via. Furthermore, the pixel circuit layer includes at least one insulating layer, which may include at least one of inorganic and organic layers. Additionally, the array film layer 20 includes scan lines providing the scan signal Scan and data lines providing the data signal Data to the pixel circuit.

[0055] refer to Figure 2The pixel circuit includes a driving transistor T1 and a data transistor T2. The source of the data transistor T2 is connected to the data line that provides the data signal Data, the gate of the data transistor T2 is connected to the scan line that provides the scan signal Scan, and the drain of the data transistor T2 is connected to the gate of the driving transistor T1. The two ends of the storage capacitor C1 are respectively connected to the gate and the source of the driving transistor T1, and the drain of the driving transistor T1 is connected to the light-emitting device. Figure 2 This is one implementation of a pixel circuit; the pixel circuit described in this application is not limited to... Figure 2 The 2T1C pixel circuit shown can also be other pixel circuits, such as 7T1C, 8T1C pixel circuits, etc.

[0056] In one embodiment, the display panel 1 may further include a display film layer 30 located on the side of the array film layer 20 away from the substrate 100, including a pixel defining layer. The pixel defining layer has pixel openings, specifically, a first pixel opening, a second pixel opening, and a third pixel opening. The areas of the first pixel opening, the second pixel opening, and the third pixel opening projected onto the substrate 10 may be the same or different. The pixel defining layer is made of an inorganic or organic material. For example, if the pixel defining layer is made of an inorganic material, it can be formed using at least one inorganic insulating material selected from silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON).

[0057] The light-emitting device 300 includes a first light-emitting device, a second light-emitting device, and a third light-emitting device that emit different colors of light respectively. Each of the first, second, and third light-emitting devices includes a first electrode 310, a light-emitting structure, and a second electrode stacked together. The first electrode 310 is disposed on the array film layer 20, and a pixel defining layer covers the end of the first electrode 310. A pixel opening is provided on the pixel defining layer, through which the first electrode 310 is exposed. The light-emitting structures of the first, second, and third light-emitting devices cover the sidewall of the pixel opening of the pixel defining layer and the side of the pixel defining layer facing away from the substrate 10. Each light-emitting device 300 is located within the pixel opening and is in contact with the first electrode 310. The second electrodes of the first, second, and third light-emitting devices respectively cover the corresponding light-emitting structures.

[0058] The first electrode 310 can be an anode, and the second electrode can be a cathode. The first electrode 310 of each light-emitting device can be connected to the pixel circuit through a via, so that the pixel circuit drives the light-emitting device to emit light.

[0059] The first electrode 310 may include a multilayer structure, such as a reflective layer and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. The reflective layer can be formed, for example, using silver, a metallic material with excellent light reflectivity. Each conductive oxide layer can be formed, for example, from a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide). The second electrode can be formed, for example, from a metallic material such as an alloy of magnesium and silver (MgAg).

[0060] Figure 5 This is a schematic diagram of a light-emitting device 300 according to one embodiment of this application. The light-emitting structure of at least one of the first, second, and third light-emitting devices 300 includes a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light-emitting material layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL stacked along a direction away from the substrate 10 (i.e., the Z direction). The light-emitting structure may include a single light-emitting material layer EML, or a stacked light-emitting structure including multiple light-emitting material layers EML.

[0061] In order for the light-emitting structure to emit light, a pixel voltage is provided to the first electrode 310 and a common voltage is provided to the second electrode, forming a potential difference between the first electrode 310 and the second electrode, causing the light-emitting structure disposed between the first electrode 310 and the second electrode to emit light. In one embodiment, if a potential difference is formed between the first electrode 3310 and the second electrode of the first light-emitting device, the light-emitting material layer EML of the light-emitting structure emits blue light; if a potential difference is formed between the first electrode 310 and the second electrode of the second light-emitting device, the light-emitting material layer EML of the light-emitting structure emits green light; and if a potential difference is formed between the first electrode 310 and the second electrode of the third light-emitting device, the light-emitting material layer EML of the light-emitting structure emits red light.

[0062] refer to Figure 3-7 In one embodiment, the substrate 10 includes a substrate 100, the substrate 100 having a first through-hole 1000 at the edge of the display area AA; the substrate 10 further includes a second metal layer 102 located between the substrate 100 and the array film layer 20, the second metal layer 102 including a terminal 104; the first terminal 104 is exposed on the surface of the substrate 100 away from the array film layer 20 through the first through-hole 1000, that is, its orthogonal projection on the substrate at least partially covers the first through-hole.

[0063] The display panel 1 further includes a chip-on-film 11 disposed on the back side of the substrate 100. An electrical connection structure 12 is disposed within the first through-hole 1000, and the electrical connection structure 12 includes conductive silver paste or conductive particles. The electrical signals of the array film layer 20 are electrically connected to the terminal 104, and the terminals of the chip-on-film 11 are electrically connected to the terminal 104 through the electrical connection structure 12, thereby realizing the transmission of electrical signals between the array film layer and the chip-on-film in the display panel. This application reduces the size of the bezel area by leading the terminals of the lower bezel of the display panel to the back side of the display area, thereby achieving a bezel-less or near-zero bezel effect.

[0064] Specifically, one end of the conductive silver paste or conductive particles of the electrical connection structure 12 is electrically connected to the terminal of the on-film chip 11, and the other end of the conductive silver paste or conductive particles is electrically connected to the terminal 104 in the display panel. A protective film 13 is provided on the side of the electrical connection structure 12 away from the substrate 100 to protect the electrical connection structure 12 from the influence of water and oxygen.

[0065] refer to Figure 6 The second metal layer 102 of the substrate 10 further includes a patterned metal layer. This patterned metal layer includes metal blocking portions 1021 and metal meshes 1020 located around the metal blocking portions 1021. The metal meshes 1020 include a plurality of metal mesh openings, and the metal blocking portions 1021 are located within each of the metal mesh openings 1020. The metal blocking portions 1021, the metal meshes 1020, and the first terminal 1043 are located on the same layer; or, the metal blocking portions 1021 and the metal meshes 1021 are located on the same layer, and the first terminal 1043 is located on another layer; wherein the first terminal 1043 is closer to the substrate 100 than the metal blocking portions 1021 and the metal meshes 1020. The display panel includes an interlayer insulating layer 103, which is located between the metal mesh 1020 and the first terminal 1043. The metal mesh 1020 is electrically connected to the first terminal 1043 through a via in the interlayer insulating layer 103. The array film layer 20 is electrically connected to the first terminal 1043 through the metal mesh 1020.

[0066] The orthogonal projection of the metal barrier portion 1021 onto the substrate 100 covers at least one of the transistor 21 and the light-emitting device. The thickness of the metal barrier portion 1021 in the second metal layer 102 is 1000 Å to 3000 Å, which protects the transistors and light-emitting devices in the display area AA from laser interference during the laser etching process of creating openings on the back side of the substrate 100. The patterned metal layer is made of at least one of titanium, titanium nitride, molybdenum, tungsten, a molybdenum-tungsten alloy, or a molybdenum-niobium alloy.

[0067] In another possible implementation, the patterned metal layer of the second metal layer 102 includes a metal mesh, through which the array film layer 20 is electrically connected to the first terminal 1043.

[0068] In one implementation, reference Figure 4-6 The array film layer 20 also includes a solar cell 22, and a solar cell film layer is fabricated in the array film layer 20. The solar cell 22 is located on one side edge of the display area AA in the orthogonal projection of the substrate 100, wherein the solar cell film layer is fabricated using an array process. The solar cell 22 includes a top electrode 221 and a bottom electrode 222, and a photovoltaic material layer 220 of the solar cell located between the top electrode 221 and the bottom electrode 222. The solar cell 22 is disposed in the same layer as a portion of the transistor 21, or is located on the side of the transistor 21 closer to the substrate 100. Specifically, the top electrode 221 of the solar cell is located on the side of the bottom electrode 222 away from the second metal layer 102. The bottom electrode 222 is located on the side of the second metal layer 102 away from the substrate 100, and the top electrode 221 is located between the first metal layer and the bottom electrode; or, a portion of the second metal layer 102 is reused as the bottom electrode 222, and a portion of the first metal layer is reused as the top electrode 221. The bottom electrode and the top electrode are made of at least one of titanium, titanium nitride, molybdenum, tungsten, molybdenum-tungsten alloy, or molybdenum-niobium alloy. The thickness of the top electrode is 1000~3000 Å. When fabricating oxide TFT devices, the top electrode shares a first metal layer and is reused as the top electrode, which can simplify the number of metal layers in the array film and reduce the overall thickness of the film.

[0069] The top electrode 221 and bottom electrode 222 of the solar cell are electrically connected to the second metal layer 102. Specifically, the second metal layer 102 includes a terminal 104, which includes second terminals 1041 and 1042 located on both sides of the first terminal 1043. The first terminal 1043 and the second terminals 1041 and 1042 are disposed on the same side edge of the display area AA, and their orthogonal projections on the substrate 100 at least partially overlap with the solar cell 22. The first terminal 1043, the second terminals 1041 and 1042 all at least partially cover the first through-hole 1000 through their orthogonal projections on the substrate.

[0070] refer to Figure 6The second metal layer 102 of the substrate 10 further includes a patterned metal layer. This patterned metal layer includes metal blocking portions 1021 and metal meshes 1020 located around the metal blocking portions 1021. The metal meshes 1020 include multiple metal mesh openings, and the metal blocking portions 1021 are located within these openings. The metal mesh is reused as the bottom electrode 222.

[0071] Alternatively, the patterned metal layer of the second metal layer 102 may include a metal mesh that is reused as the bottom electrode 222.

[0072] Specifically, the patterned metal layer of the second metal layer, the first terminal 1043, and the second terminals 1041 and 1042 are all located on the same layer, and the patterned metal layer is electrically connected to the first terminal 1043 and the second terminals 1041 and 1042, respectively; or, the patterned metal layer is located on one layer, and the first terminal 1043 and the second terminals 1041 and 1042 are located on another layer, with the first terminal 1043 and the second terminals 1041 and 1042 being closer to the substrate 100 than the patterned metal layer. The display panel includes an interlayer insulating layer 103, which is located between the patterned metal layer and the first terminal 1043. The patterned metal layer is electrically connected to the first terminal 1043 and the second terminals 1041 and 1042 through vias in the interlayer insulating layer 103. Preferably, the interlayer insulating layer is an inorganic layer. The second terminal includes a positive terminal 1042 and a negative terminal 1041. The top electrode 221 of the solar cell 22 is electrically connected to the positive terminal 1042 through a via, and the bottom electrode 222 of the solar cell 22 is electrically connected to the negative terminal 1041 through a via, thereby achieving electrical connection between the second terminals 1041 and 1042 and the solar cell 22. When a portion of the first metal layer is reused as the top electrode and a portion of the second metal layer 102 is reused as the bottom electrode 222, a portion of the first metal layer is electrically connected to the positive terminal 1042, and a portion of the second metal layer is electrically connected to the negative terminal 1041, thereby achieving electrical connection between the second terminals 1041 and 1042 and the solar cell 22.

[0073] When the first metal layer is reused as the top electrode, the orthogonal projection of the top electrode 221 on the substrate 100 covers at least a portion of the semiconductor layer 210 of the transistor 21 to shield the influence of light on the stability of the transistor 21 and prevent threshold voltage shift.

[0074] The display panel 1 also includes a chip-on-film 11 disposed on the back side of the substrate 100. An electrical connection structure 12 is disposed in the first through hole 1000. The terminals of the chip-on-film 11 are electrically connected to the positive terminal 1042 and the negative terminal 1041 of the first terminal and the second terminal, respectively, through the electrical connection structure 12, so as to realize the electrical signal transmission of the solar cell and the array film layer, and realize two functions at the same time, simplifying the process and flow.

[0075] This application reduces the size of the display panel's bezel area by relocating the solar cell terminals and array film terminals, originally located on the bottom bezel of the display panel, to the back of the display area, thus achieving a bezel-less or near-zero bezel effect. Secondly, this application creatively integrates externally mounted solar cells into the screen body, increasing the overall battery life of the display panel without affecting display functionality, while reducing issues such as increased thickness, heat dissipation, and moiré patterns caused by external mounting. Furthermore, the electrical signals from the solar cells are exported through chips on the film, enabling the export of positive and negative currents from the solar cells. Essentially, this involves drawing the photocurrent from the front and back of the solar cells separately and then converging and outputting it. The ultimate goal is to export the current from the display panel, connecting it to the display device's battery storage module, thereby increasing the overall battery life of the display device (terminal).

[0076] In this embodiment, the number of first terminals 1043 is greater than the number of second terminals 1042 and 1043. The width of a single first terminal 1043 is less than or equal to the width of a single second terminal 1041, and the width of the first terminal 1043 is less than the width of the second terminals 1041 and 1043. Specifically, the width of a single first terminal is 10-30 μm, and the width of a single second terminal is 10-300 μm, with the width of the single second terminal designed to ensure the maximum power achievable by the solar cell. By differentiating the widths of the first and second terminals, it is beneficial to check the alignment after the first and second terminals are bonded to the on-film chip 11 to check for any deviations, thereby improving bonding efficiency.

[0077] The solar photovoltaic material layer 220 of the solar cell is made of one or more layers of doped amorphous silicon, which has the advantages of low cost and low toxicity compared to some other photovoltaic materials. However, it should be understood that other photovoltaic materials may be used without departing from the teachings of this invention. For example, silicon and / or micron (nano) crystalline silicon, silicon oxide, thin-film silicon, combinations thereof, etc., may be used as supplements or substitutes for amorphous silicon. Similarly, embodiments of the invention may employ perovskite and combinations of perovskite and silicone. In various embodiments, the pattern associated with the photovoltaic material is formed by first depositing one or more substantially uniform photovoltaic material layers and then removing the desired portions of the material by photolithography.

[0078] In one possible implementation, specifically, see reference. Figure 4 A first insulating layer 101 is provided between the substrate 100 and the second metal layer 102. The first through-hole 1000 penetrates the first insulating layer 101 to expose the first terminal 1043 and the second terminals 1041 and 1042. The first insulating layer 101 is made of an inorganic layer, which can be made of SiOx or other materials, with a thickness of 100~3000 Å. The main function of the inorganic layer is to increase the adhesion between the second metal layer and the substrate, making the metal film on the inorganic layer more robust, and it also has a very good effect on isolating water and oxygen.

[0079] refer to Figure 7 The substrate 100 is made of glass or polyimide. The first through-holes 1000 are arranged in multiple rows along one edge of the display area AA, and the first through-holes 1000 between rows are staggered in a direction perpendicular to the column, so that the virtual connecting lines of the three first through-holes 1000 in two adjacent rows form a triangle. When the substrate is glass, the structure of the first through-hole is a frustum structure; when the substrate is polyimide, the structure of the first through-hole is a rectangular frustum structure. The substrate adopts a triangular vertex drilling method because the substrate material is relatively brittle, and cracks should be avoided during drilling. The diameter of the first through-hole is required to be 5~20um, and the depth depends on the thickness of the substrate. The final effect is to penetrate the substrate, and then inject the electrical connection structure to connect with the terminals of the second metal layer to achieve conductivity.

[0080] Specifically, the smaller end of the first through hole 1000 is closer to the first terminal, and the larger end is located on the substrate away from the first terminal.

[0081] The display panel 1 may also include at least one film layer such as a touch layer, a polarizer, a color filter substrate, and a protective cover. This film layer may also be bonded to the display panel via an adhesive layer such as OCA (Optical Clear Adhesive).

[0082] The method for preparing the display panel 1 according to the embodiments of this application will be described below.

[0083] refer to Figure 8 The manufacturing method of display panel 1 includes: Step S11: Provide a substrate 10.

[0084] Step S12: Deposit a first insulating layer 101 on one side of the substrate 100 of the substrate 10. Step S13: Deposit a second metal layer 102 on the substrate 100, and pattern the second metal layer 102 to form a first terminal 1043, a second terminal 1041, 1042 and a patterned metal layer; Specifically, in the step of patterning the second metal layer 102, the second metal layer 102 on the first insulating layer 101 is photolithographically patterned to form a first terminal and a second terminal, and a patterned metal layer located on one side of the first terminal and the second terminal. The patterned metal layer includes a metal blocking portion and a metal mesh located around the metal blocking portion, or the patterned metal layer includes a metal mesh.

[0085] The patterned metal layer is located on the side of the first terminal and the second terminal away from the substrate; or, the patterned metal layer is located on the same layer as the first terminal and the second terminal, and the metal mesh is electrically connected to the first terminal and the second terminal respectively.

[0086] Step S14: An array film layer 20 is fabricated on the second metal layer 102 to form a first metal layer and a transistor 21.

[0087] Step S15, before depositing an array film layer on the substrate to form a first metal layer and a transistor, further includes depositing a solar cell over the patterned metal layer, wherein the metal mesh is reused as the bottom electrode of the solar cell and the top electrode of the solar cell is a part of the first metal layer.

[0088] Specifically, the top electrode and bottom electrode of the solar cell are electrically connected to the second terminal, and the top electrode of the solar cell covers at least a portion of the semiconductor layer of the transistor in the orthogonal projection onto the substrate.

[0089] Specifically, the array film layer is electrically connected to the first terminal.

[0090] Step S16: Deposit display film 30 and encapsulation film 40 over the array film layer.

[0091] Step S17: Laser drilling is performed on the back side of the substrate 100 to form a first through hole 1000 to expose the first terminal and the second terminal.

[0092] Step S18: The chip 11 is attached to the back of the substrate 100 using a non-conductive adhesive 1100.

[0093] In step S19, conductive silver paste or conductive particles are injected into the first through-hole 1000 to form an electrical connection structure 12, thereby enabling the first terminal and the second terminal to be electrically connected to the terminals of the chip 11 on the membrane through the electrical connection structure. A protective film 13 is then attached to the back of the electrical connection structure 12 to protect it from the influence of water and oxygen.

[0094] Specifically, the chip-on-film 11 includes a substrate 111, a conductive layer 112 on one side of the substrate, a protective layer 113 on the side of the conductive layer 112 away from the substrate 111, and a chip 114 on one side of the protective layer. The electrical connection structure 12 is located in the first through-hole, with one end electrically connected to the terminal 104 of the second metal layer 102 and the other end electrically connected to the conductive layer 112 of the chip-on-film 11. This enables the transmission of electrical signals between the array film layer and the solar cell and the chip-on-film, allowing the electrical signals in the solar cell and the array film layer to be transmitted from the back of the substrate to the chip-on-film 11. This can reduce the size of the border area and achieve a borderless or near-zero border effect.

[0095] In some possible implementations, refer to Figure 9 This application also provides a display device, which includes the display panel described in this application. The display device may include devices with image processing capabilities, such as mobile phones, desktop computers, laptops, tablets, automotive displays, wearable devices, etc. Because this display device includes the display panel described in this application, the electronic device has higher reliability.

[0096] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0097] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A display panel, wherein, The display panel includes a display area, which comprises: A substrate having a first through-hole at the edge of the display area; An array film layer, located on one side of the substrate, the array film layer comprising a first metal layer and a transistor; A display film layer, located on the side of the array film layer away from the substrate, includes a light-emitting device; A second metal layer, located between the array film layer and the substrate, includes a first terminal electrically connected to the array film layer, the first terminal's orthogonal projection onto the substrate at least partially covering the first via.

2. The display panel as claimed in claim 1, wherein, The array film layer also includes a solar cell, which includes a top electrode and a bottom electrode. The top electrode and the bottom electrode are electrically connected to the second metal layer, and the top electrode is located on the side of the bottom electrode away from the substrate. Preferably, the bottom electrode is located on the side of the second metal layer away from the substrate, and the top electrode is located between the first metal layer and the bottom electrode; Alternatively, a portion of the second metal layer may be reused as the bottom electrode, and a portion of the first metal layer may be reused as the top electrode; Preferably, the transistor includes a semiconductor layer, and the orthogonal projection of the top electrode onto the substrate covers at least a portion of the semiconductor layer of the transistor; Preferably, the orthographic projection of the solar cell onto the substrate is located at one edge of the display area; Preferably, the solar cell is disposed on the same layer as a portion of the transistor, or is located on the side of the transistor closer to the substrate.

3. The display panel as described in claim 2, wherein, The second metal layer includes second terminals located on both sides of the first terminal, the second terminals being electrically connected to the solar cell, and the orthographic projection of the second terminals onto the substrate at least partially covering the first via. Preferably, the first terminal and the second terminal are disposed on the same side edge of the display area, and the orthographic projections of the first terminal and the second terminal on the substrate at least partially overlap with the solar cell; Preferably, the second terminal includes a positive terminal and a negative terminal, the top electrode of the solar cell is electrically connected to the positive terminal, and the bottom electrode of the solar cell is electrically connected to the negative terminal; Preferably, the number of the first terminals is greater than the number of the second terminals. Preferably, the width of a single first terminal is less than or equal to the width of a single second terminal, and the width of the first terminal is less than the width of the second terminal; Preferably, the width of a single first terminal is 10-30 μm, and the width of a single second terminal is 10-300 μm.

4. The display panel as claimed in claim 1, wherein, The second metal layer further includes a patterned metal layer, the patterned metal layer including metal barriers and a metal mesh located around the metal barriers. The orthogonal projection of the metal barrier onto the substrate covers at least one of the transistor and the light-emitting device; Preferably, the metal mesh includes a plurality of metal mesh openings, and the metal blocking portions are respectively located within the metal mesh openings; Preferably, the metal blocking portion, the metal mesh, and the first terminal are located on the same layer; Alternatively, the metal barrier and the metal mesh are located on the same layer, and the first terminal is located on another layer, with the first terminal being closer to the substrate than the metal barrier and the metal mesh; Preferably, the display panel includes an interlayer insulating layer, which is located between the metal mesh and the first terminal, and the metal mesh is electrically connected to the first terminal through a via in the interlayer insulating layer; Preferably, the array film layer is electrically connected to the first terminal through the metal mesh; Preferably, the interlayer insulation layer is an inorganic layer.

5. The display panel as claimed in claim 3, wherein, The second metal layer further includes a patterned metal layer, which is reused as the bottom electrode; Preferably, the patterned metal layer, the first terminal, and the second terminal are all located on the same layer, and the patterned metal layer is electrically connected to the first terminal and the second terminal, respectively. Alternatively, the patterned metal layer is located on one layer, and the first terminal and the second terminal are located on another layer, with the first terminal and the second terminal being closer to the substrate than the patterned metal layer; Preferably, the display panel includes an interlayer insulating layer, which is located between the patterned metal layer and the first terminal. The patterned metal layer is electrically connected to the first terminal and the second terminal respectively through vias in the interlayer insulating layer. Preferably, the array film layer is electrically connected to the first terminal through the patterned metal layer; the top electrode of the solar cell is electrically connected to the second terminal, and the bottom electrode of the solar cell is electrically connected to the second terminal; Preferably, the patterned metal layer includes a metal mesh, which is reused as the bottom electrode.

6. The display panel as claimed in claim 3, wherein, A first insulating layer is provided between the substrate and the second metal layer, and the first through-hole penetrates the first insulating layer to expose the first terminal and the second terminal; Preferably, the first insulating layer is an inorganic layer; Preferably, the substrate is glass or polyimide, and the first through holes are arranged in multiple columns along one side edge of the display area, with the first through holes between columns being staggered in a direction perpendicular to the columns; Preferably, the substrate is glass, and the structure of the first through hole is a frustum structure; or, the substrate is polyimide, and the structure of the first through hole is a rectangular truncated pyramid structure. Preferably, the end of the first through hole with a smaller diameter is closer to the first terminal, and the end with a larger diameter is located on the side of the substrate away from the first terminal; Preferably, the diameter of the first through hole is 5~20um.

7. The display panel as claimed in claim 1, 4, or 5, wherein, The display panel also includes a chip on film disposed on the back side of the substrate, and an electrical connection structure is disposed in the first through hole. The terminals of the chip on film are electrically connected to the first terminal and the second terminal respectively through the electrical connection structure. Preferably, the electrical connection structure is conductive silver paste or conductive particles; Preferably, a protective film is provided on the side of the electrical connection structure away from the substrate.

8. A method for manufacturing a display panel, wherein, This includes providing a substrate, depositing an array of film layers on the substrate, forming a first metal layer and a transistor; Before depositing the array film layer on the substrate, a second metal layer is first deposited on the substrate, and the second metal layer is patterned to form a first terminal, a second terminal, and a patterned metal layer; A first through-hole is formed by laser drilling on the back side of the substrate to expose the first terminal and the second terminal.

9. The method for manufacturing a display panel as described in claim 8, wherein, Before depositing the second metal layer on the substrate, the method further includes depositing a first insulating layer on the substrate and depositing metal on the first insulating layer to form the second metal layer. The second metal layer is then patterned. Preferably, the second metal layer on the first insulating layer is photolithographically patterned to form a first terminal and a second terminal, and a patterned metal layer located on one side of the first terminal and the second terminal. The patterned metal layer includes a metal blocking portion and a metal mesh located around the metal blocking portion. Preferably, the metal mesh and metal barrier are located on the side of the first terminal and the second terminal away from the substrate; or, the metal mesh and metal barrier are located on the same layer as the first terminal and the second terminal. Preferably, the metal mesh is electrically connected to the first terminal and the second terminal, respectively.

10. The method for manufacturing a display panel as described in claim 9, wherein, Before depositing an array of film layers on the substrate to form a first metal layer and a transistor, the method further includes fabricating a solar cell above the patterned metal layer, wherein the patterned metal layer is reused as the bottom electrode of the solar cell, and the top electrode of the solar cell is a part of the first metal layer. Preferably, the top electrode and bottom electrode of the solar cell are electrically connected to the second terminal, respectively; Preferably, the top electrode of the solar cell has its orthogonal projection onto the substrate covering the semiconductor of the transistor; Preferably, a chip on film is disposed on the back side of the substrate, and an electrical connection structure is formed by injecting conductive silver paste or conductive particles into the first through hole. The first terminal and the second terminal are respectively electrically connected to the chip on film through the electrical connection structure.

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