MEMS ultrasonic transducer with isolation groove and sealing cavity and its fabrication method

Abstract

This invention discloses a MEMS ultrasonic transducer with isolation grooves and sealed cavities, comprising a substrate, a plurality of sealed cavities uniformly and symmetrically arranged on the top surface of the substrate, the top side of the sealed cavities being sealed by an insulating layer, and the periphery of the sealed cavities being sealed by a structural layer; the top surface of the substrate is sequentially provided with an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer; an array element is a resonant structure composed of sealed cavities and an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer perpendicular to the sealed cavities; isolation grooves are provided between adjacent array elements, the isolation grooves being arranged on the structural layer, or the isolation grooves sequentially penetrating the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer; adjacent array elements are connected by a beam structure; a second lead electrode is connected to the first electrode layer; the first lead electrode is connected to the second electrode layer. This invention also discloses a method for fabricating the MEMS ultrasonic transducer with isolation grooves and sealed cavities.

Description

Technical Field

[0001] This invention relates to the field of microelectromechanical systems (MEMS) technology, and in particular to a MEMS ultrasonic transducer with an isolation groove and a sealed cavity and its fabrication method. Background Technology

[0002] An ultrasonic transducer is a device that converts electromagnetic energy into mechanical energy (sound energy), and is usually made of piezoelectric ceramics or other magnetostrictive materials.

[0003] Traditional array-type ultrasonic transducers typically use back-side etching to form an open back cavity to construct the transducer elements. However, the above process has the following drawbacks: 1. It increases the difficulty of the process; 2. The open back cavity also places stricter requirements on the packaging structure; 3. Deep silicon etching with a thickness of 300-500um can easily lead to dimensional deviations in different transducer elements of the array, resulting in inconsistent resonant frequencies of the structure; 4. For array-type ultrasonic transducers, adjacent elements are prone to mutual coupling, which significantly reduces the electromechanical coupling efficiency. Summary of the Invention

[0004] Objective of the Invention: To address the shortcomings of the prior art, this invention provides a MEMS ultrasonic transducer with an isolation groove and a sealed cavity, and its fabrication method. The MEMS ultrasonic transducer with an isolation groove and a sealed cavity disclosed in this invention utilizes a sacrificial layer release process to form the cavity structure and array element structure, and a filling process to form the sealed cavity. Furthermore, to further improve the resonant frequency consistency between array elements and reduce crosstalk between elements, a special isolation groove structure is designed.

[0005] Technical solution: A MEMS ultrasonic transducer with an isolation groove and a sealed cavity includes a substrate, an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, a structural layer, a sealed cavity, a first lead electrode, and a second lead electrode, wherein: The top surface of the substrate is uniformly and symmetrically provided with multiple sealing cavities. The top side of the sealing cavity is sealed by an insulating layer, and the periphery of the sealing cavity is sealed by a structural layer. An insulating layer is provided on the top surface of the substrate; The top surface of the insulating layer is provided with a first electrode layer; A piezoelectric layer is provided on the top surface of the first electrode layer; A second electrode layer is provided on the top side of the piezoelectric layer; A structural layer is provided on the top side of the second electrode layer; The array element is a resonant structure consisting of a sealed cavity and an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer perpendicular to the sealed cavity; An isolation groove is provided between adjacent array elements. The isolation groove is arranged on the structural layer, or the isolation groove sequentially penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer. Adjacent array elements are connected by a beam structure; The second lead electrode is connected to the first electrode layer; The first lead electrode is connected to the second electrode layer.

[0006] The second lead electrode is connected to the external ground terminal, and the first lead electrode is connected to an external signal source or the output terminal. When the signal source is connected to the first lead electrode, the piezoelectric layer vibrates due to the direct piezoelectric effect, causing the array elements to vibrate and emit acoustic signals. When an external acoustic signal is transmitted to the piezoelectric layer, the first lead electrode is connected to the output terminal, and the piezoelectric layer vibrates due to the inverse piezoelectric effect, generating an electrical signal, and outputting a response from the output terminal. Isolation slots isolate different array elements, reducing the mutual coupling between adjacent array elements to ensure the consistency of excitation or response of large-scale arrays.

[0007] The fabrication method of the MEMS ultrasonic transducer with isolation groove and sealing cavity described in any one of the above-mentioned methods comprises the following steps: (1) Preparation of sacrificial layer: Si wafer is selected as substrate, and then a hard mask is prepared on the top surface of Si wafer. Then, a deep silicon etching machine is used to etch the top surface of Si wafer to form multiple symmetrically arranged first grooves with an etching depth of 0.5-5 μm. Then, phosphosilicate glass or undoped silicate glass is prepared in the first grooves by chemical vapor deposition. The deposition thickness is 0.3-1 μm greater than the etching depth. Then, a flat surface is obtained by chemical mechanical polishing to form a sacrificial layer in the first grooves. The thickness of the sacrificial layer after polishing is 0.5-4.5 μm. (2) An insulating layer, a first electrode layer, a piezoelectric layer, and a second electrode layer are sequentially fabricated on the top surface of the Si wafer processed in step (1), wherein: The insulating layer is prepared by chemical vapor deposition or physical vapor deposition. The first electrode layer was prepared by physical vapor deposition. The piezoelectric layer is prepared by physical vapor deposition. The second electrode layer is prepared by physical vapor deposition, and a second groove to accommodate the first blind hole is prepared on the second electrode layer by photolithography followed by etching. (3) Using reactive ion etching, the second electrode layer, piezoelectric layer, first electrode layer and insulating layer of the Si wafer treated in step (2) are etched in sequence to form a release hole. The etching of the release hole is completely left on the sacrificial layer. Using reactive ion etching, extending outward from the edge of the first groove, the second electrode layer, piezoelectric layer, first electrode layer, and insulating layer of the Si wafer treated in step (2) are sequentially etched to form the third groove, wherein: The etching of the third groove is performed on the substrate, and the width of the third groove is 10-50 μm. (4) The sacrificial layer is removed by using a sacrificial layer release solution to remove the phosphosilicate glass or undoped silicate glass in the sacrificial layer, and a cavity structure is formed in the first groove after completion; (5) A structural layer is prepared on the top side of the Si wafer treated in step (4) by chemical vapor deposition or physical vapor deposition, wherein: While preparing the structural layer, release holes are filled to form a sealed cavity. After completion, the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer form an array element. A fourth groove is formed between adjacent array elements; (6) Using reactive ion etching, the Si wafer treated in step (5) is etched to obtain a second blind hole exposing the first electrode layer and a first blind hole exposing the second electrode layer, wherein: The second blind hole is used to accommodate the first lead electrode; The first blind hole is located within the second groove, and the first blind hole is used to accommodate the second lead electrode; Au-based first lead electrode and Au-based second lead electrode were fabricated using a sacrificial layer process, or An Al-based first lead electrode and an Al-based second lead electrode are fabricated using physical vapor deposition and etching. The first lead electrode is connected to the second electrode layer, and the second lead electrode is connected to the first electrode layer but separated from it.

[0008] Furthermore, the fourth groove formed between adjacent array elements in step (5) serves as an isolation groove, or It also includes step (7), which involves etching the fourth groove of the Si wafer obtained in step (6) to form an isolation trench that penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer and is located between adjacent array elements.

[0009] Furthermore, in step (1), the hard mask is a SiO2 layer or a SiN layer. x The layer or Al2O3 layer has a thickness of 50–500 nm.

[0010] Furthermore, the first groove consists of a large cylinder, a regular square prism, or a regular octagonal prism, and four small cylinders that are tangent to and symmetrically distributed with respect to the large cylinder, regular square prism, or regular octagonal prism.

[0011] Furthermore, the inner diameter of the release hole is 5–30 μm. The orthographic projection of the release hole is located on the sacrificial layer.

[0012] This invention employs a surface etching + filling + CMP + release process to form a cavity structure with consistent dimensions. Then, a low-stress deposition process is used to fill the release holes to form a sealed cavity, simultaneously creating the array element structural layer. The surface etching process avoids excessive dimensional deviations in deep silicon etching that could lead to inconsistent resonant frequencies. Furthermore, through a special structural design, an isolation trench structure is formed simultaneously during the etching of the release holes, reducing process complexity and increasing design versatility.

[0013] Beneficial Effects: The MEMS ultrasonic transducer with isolation groove and sealing cavity disclosed in this invention and its fabrication method have the following beneficial effects: 1. The surface etching process avoids excessive dimensional deviations in deep silicon etching, which can lead to inconsistent resonant frequencies. Moreover, through a special structural design (spatial isolation between release holes and isolation trenches, with the bottom of the release hole remaining on the sacrificial layer), the isolation trench structure is formed simultaneously during the release hole etching process, reducing process difficulty and increasing design versatility. 2. The MEMS ultrasonic transducer with isolation groove and sealed cavity of the present invention has a sealed cavity, which enhances its resistance to environmental interference and increases its long-term stability; 3. The MEMS ultrasonic transducer of the present invention with isolation groove and sealing cavity has isolation groove, which reduces the coupling between array elements and improves the consistency of array element resonant frequency. Attached Figure Description

[0014] Figures 1-6 This is a process flow diagram of the fabrication method of the MEMS ultrasonic transducer with isolation groove and sealing cavity disclosed in this invention, wherein: Figures 1-6 In the figures, b represents a top view of a MEMS ultrasonic transducer with an isolation groove and a sealed cavity during its fabrication process. Figures 1-6 In the diagram, 'a' is a sectional view of A1A2 in the corresponding diagram 'b'.

[0015] Figure 7 In the figure, 'a' is a schematic diagram of the simulation effect of a MEMS ultrasonic transducer without isolation grooves prepared in comparison.

[0016] Figure 7 In the figure, b is a simulation effect diagram of the MEMS ultrasonic transducer with isolation groove and sealing cavity prepared in specific embodiment 1.

[0017] in: Detailed Implementation

[0018] The specific embodiments of the present invention are described in detail below.

[0019] The "range" disclosed in this invention is defined by a lower limit and an upper limit. A given range is defined by selecting a lower limit and an upper limit, which define the boundaries of a particular range. Ranges defined in this way can include or exclude endpoints and can be arbitrarily combined; that is, any lower limit can be combined with any upper limit to form a range. For example, if a range of 10–50 is listed for a specific parameter, it is also expected that ranges of 10–40 and 20–50 are also included. Furthermore, if the minimum range values ​​are 1 and 2, and the maximum range values ​​are 3, 4, and 5, then the following ranges are all expected: 1–3, 1–4, 1–5, 2–3, 2–4, and 2–5. In this application, unless otherwise stated, the numerical range "a–b" represents a shortened representation of any combination of real numbers between a and b, where a and b are real numbers. For example, the numerical range "0–5" means that all real numbers between "0–5" have been listed herein; "0–5" is merely a shortened representation of these numerical combinations.

[0020] Unless otherwise specified, all embodiments and optional embodiments of this application can be combined to form new technical solutions.

[0021] Unless otherwise specified, all technical features and optional technical features of this application may be combined to form new technical solutions.

[0022] Unless otherwise specified, all steps in this application may be performed sequentially or randomly, preferably sequentially. For example, the method includes steps (a) and (b), indicating that the method may include steps (a) and (b) performed sequentially, or it may include steps (b) and (a) performed sequentially. For example, the mention that the method may also include step (c) indicates that step (c) may be added to the method in any order. For example, the method may include steps (a), (b), and (c), or it may include steps (a), (c), and (b), or it may include steps (c), (a), and (b), etc.

[0023] Unless otherwise specified, the terms "comprising" and "including" as used in this application can be open-ended or closed-ended. For example, "comprising" and "including" can mean that other components not listed may also be included, or that only the listed components may be included.

[0024] Unless otherwise specified, the reaction will proceed under normal temperature and pressure conditions.

[0025] Unless otherwise specified, all parts or percentages are by weight or by weight percentage.

[0026] In this invention, all the substances used are known substances that can be purchased or synthesized by known methods.

[0027] In this invention, all the devices or equipment used are conventional devices or equipment known in the art and are readily available.

[0028] A MEMS ultrasonic transducer with an isolation groove and a sealed cavity includes a substrate, an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, a structural layer, a sealed cavity, a first lead electrode, and a second lead electrode, wherein: The top surface of the substrate is uniformly and symmetrically provided with multiple sealing cavities. The top side of the sealing cavity is sealed by an insulating layer, and the periphery of the sealing cavity is sealed by a structural layer. An insulating layer is provided on the top surface of the substrate; The top surface of the insulating layer is provided with a first electrode layer; A piezoelectric layer is provided on the top surface of the first electrode layer; A second electrode layer is provided on the top side of the piezoelectric layer; A structural layer is provided on the top side of the second electrode layer; The array element is a resonant structure consisting of a sealed cavity and an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer perpendicular to the sealed cavity; An isolation groove is provided between adjacent array elements. The isolation groove is arranged on the structural layer, or the isolation groove sequentially penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer. Adjacent array elements are connected by a beam structure; The second lead electrode is connected to the first electrode layer; The first lead electrode is connected to the second electrode layer.

[0029] The second lead electrode is connected to the external ground terminal, and the first lead electrode is connected to an external signal source or the output terminal. When the signal source is connected to the first lead electrode, the piezoelectric layer vibrates due to the direct piezoelectric effect, causing the array elements to vibrate and emit acoustic signals. When an external acoustic signal is transmitted to the piezoelectric layer, the first lead electrode is connected to the output terminal, and the piezoelectric layer vibrates due to the inverse piezoelectric effect, generating an electrical signal, and outputting a response from the output terminal. Isolation slots isolate different array elements, reducing the mutual coupling between adjacent array elements to ensure the consistency of excitation or response of large-scale arrays.

[0030] Furthermore, the insulating layer is SiN. x The insulating layer is one of an Al2O3 layer and an AlN layer, wherein the thickness of the insulating layer is 50 to 500 nm.

[0031] Furthermore, the first electrode layer is one of a Pt layer, an Au layer, and a Mo layer, and the thickness of the first electrode layer is 50–300 nm.

[0032] Furthermore, the piezoelectric layer is one of AlN layer, AlScN layer and PZT layer, and the thickness of the piezoelectric layer is 0.5~2um.

[0033] Furthermore, the second electrode layer is one of a Pt layer, an Au layer, and a Mo layer, and the thickness of the second electrode layer is 50–300 nm.

[0034] Furthermore, the structural layer is SiN. x The structure is one of the following: an Al2O3 layer, an AlN layer, and a SiO2 layer, wherein the thickness of the structure layer is 1.3 to 7.5 μm.

[0035] Furthermore, the width of the beam structure is 10–50 μm, and the length of the beam structure is 30–200 μm.

[0036] The fabrication method of the MEMS ultrasonic transducer with isolation groove and sealing cavity described in any one of the above-mentioned methods comprises the following steps: (1) Preparation of sacrificial layer: Si wafer is selected as substrate, and then a hard mask is prepared on the top surface of Si wafer. Then, a deep silicon etching machine is used to etch the top surface of Si wafer to form multiple symmetrically arranged first grooves with an etching depth of 0.5-5 μm. Then, phosphosilicate glass or undoped silicate glass is prepared in the first grooves by chemical vapor deposition. The deposition thickness is 0.3-1 μm greater than the etching depth. Then, a flat surface is obtained by chemical mechanical polishing to form a sacrificial layer in the first grooves. The thickness of the sacrificial layer after polishing is 0.5-4.5 μm. (2) An insulating layer, a first electrode layer, a piezoelectric layer, and a second electrode layer are sequentially fabricated on the top surface of the Si wafer processed in step (1), wherein: The insulating layer is prepared by chemical vapor deposition or physical vapor deposition. The first electrode layer was prepared by physical vapor deposition. The piezoelectric layer is prepared by physical vapor deposition. The second electrode layer is prepared by physical vapor deposition, and a second groove to accommodate the first blind hole is prepared on the second electrode layer by photolithography followed by etching. (3) Using reactive ion etching, the second electrode layer, piezoelectric layer, first electrode layer and insulating layer of the Si wafer treated in step (2) are etched in sequence to form a release hole. The etching of the release hole is completely left on the sacrificial layer. Using reactive ion etching, extending outward from the edge of the first groove, the second electrode layer, piezoelectric layer, first electrode layer, and insulating layer of the Si wafer treated in step (2) are sequentially etched to form the third groove, wherein: The etching of the third groove is performed on the substrate, and the width of the third groove is 10-50 μm. (4) The sacrificial layer is removed by using a sacrificial layer release solution to remove the phosphosilicate glass or undoped silicate glass in the sacrificial layer, and a cavity structure is formed in the first groove after completion; (5) A structural layer is prepared on the top side of the Si wafer treated in step (4) by chemical vapor deposition or physical vapor deposition, wherein: While preparing the structural layer, release holes are filled to form a sealed cavity. After completion, the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer form an array element. A fourth groove is formed between adjacent array elements; (6) Using reactive ion etching, the Si wafer treated in step (5) is etched to obtain a second blind hole exposing the first electrode layer and a first blind hole exposing the second electrode layer, wherein: The second blind hole is used to accommodate the first lead electrode; The first blind hole is located within the second groove, and the first blind hole is used to accommodate the second lead electrode; Au-based first lead electrode and Au-based second lead electrode were fabricated using a sacrificial layer process, or An Al-based first lead electrode and an Al-based second lead electrode are fabricated using physical vapor deposition and etching. The first lead electrode is connected to the second electrode layer, and the second lead electrode is connected to the first electrode layer but separated from it.

[0037] Furthermore, the fourth groove formed between adjacent array elements in step (5) serves as an isolation groove, or It also includes step (7), which involves etching the fourth groove of the Si wafer obtained in step (6) to form an isolation trench that penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer and is located between adjacent array elements.

[0038] Furthermore, in step (1), the hard mask is a SiO2 layer or a SiN layer. x The layer or Al2O3 layer has a thickness of 50–500 nm.

[0039] Furthermore, the first groove consists of a large cylinder, a regular square prism, or a regular octagonal prism, and four small cylinders that are tangent to and symmetrically distributed with respect to the large cylinder, regular square prism, or regular octagonal prism.

[0040] Furthermore, the inner diameter of the release hole is 5–30 μm. The orthographic projection of the release hole is located on the sacrificial layer.

[0041] In one embodiment: A MEMS ultrasonic transducer with an isolation groove and a sealed cavity includes a substrate, an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, a structural layer, a sealed cavity, a first lead electrode, and a second lead electrode, wherein: The top surface of the substrate is uniformly and symmetrically provided with multiple sealing cavities. The top side of the sealing cavity is sealed by an insulating layer, and the periphery of the sealing cavity is sealed by a structural layer. An insulating layer is provided on the top surface of the substrate; The top surface of the insulating layer is provided with a first electrode layer; A piezoelectric layer is provided on the top surface of the first electrode layer; A second electrode layer is provided on the top side of the piezoelectric layer; A structural layer is provided on the top side of the second electrode layer; The array element is a resonant structure consisting of a sealed cavity and an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer perpendicular to the sealed cavity; Isolation slots are provided between adjacent array elements, and the isolation slots are arranged on the structural layer; Adjacent array elements are connected by a beam structure; The second lead electrode is connected to the first electrode layer; The first lead electrode is connected to the second electrode layer.

[0042] Furthermore, the insulating layer is SiN. x The insulating layer has a thickness of 50 nm.

[0043] Furthermore, the first electrode layer is a Pt layer, and the thickness of the first electrode layer is 50 nm.

[0044] Furthermore, the piezoelectric layer is an AlN layer, and the thickness of the piezoelectric layer is 0.5 μm.

[0045] Furthermore, the second electrode layer is a Pt layer, and the thickness of the second electrode layer is 50 nm.

[0046] Furthermore, the structural layer is SiN. x The structural layer has a thickness of 1.3 μm.

[0047] Furthermore, the beam structure has a width of 10 μm and a length of 30 μm.

[0048] The fabrication method of the MEMS ultrasonic transducer with isolation groove and sealing cavity described in any one of the above-mentioned methods comprises the following steps: (1) Preparation of sacrificial layer: Si wafer is selected as substrate, and then a hard mask is prepared on the top surface of Si wafer. Then, a deep silicon etching machine is used to etch the top surface of Si wafer to form multiple symmetrically arranged first grooves with an etching depth of 0.5 μm. Then, phosphosilicate glass (PSG) is prepared in the first groove by chemical vapor deposition with a deposition thickness 0.3 μm greater than the etching depth. Then, a flat surface is obtained by chemical mechanical polishing (CMP) to form a sacrificial layer in the first groove, wherein: the thickness of the sacrificial layer after polishing is 0.5 μm; (2) An insulating layer, a first electrode layer, a piezoelectric layer, and a second electrode layer are sequentially fabricated on the top surface of the Si wafer processed in step (1), wherein: The insulating layer was prepared by chemical vapor deposition. The first electrode layer was prepared by physical vapor deposition. The piezoelectric layer is prepared by physical vapor deposition. The second electrode layer is prepared by physical vapor deposition, and a second groove to accommodate the first blind hole is prepared on the second electrode layer by photolithography followed by etching. (3) Using reactive ion etching, the second electrode layer, piezoelectric layer, first electrode layer and insulating layer of the Si wafer treated in step (2) are etched in sequence to form a release hole. The etching of the release hole is completely left on the sacrificial layer. Using reactive ion etching, extending outward from the edge of the first groove, the second electrode layer, piezoelectric layer, first electrode layer, and insulating layer of the Si wafer treated in step (2) are sequentially etched to form the third groove, wherein: The etching of the third groove is performed on the substrate, and the width of the third groove is 10 μm. (4) The sacrificial layer is removed by using sacrificial layer release solution (NPW solution), and a cavity structure is formed in the first groove after completion; (5) A structural layer is prepared on the top side of the Si wafer treated in step (4) by chemical vapor deposition, wherein: While preparing the structural layer, release holes are filled to form a sealed cavity. After completion, the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer form an array element. A fourth groove is formed between adjacent array elements; (6) Using reactive ion etching, the Si wafer treated in step (5) is etched to obtain a second blind hole exposing the first electrode layer and a first blind hole exposing the second electrode layer, wherein: The second blind hole is used to accommodate the first lead electrode; The first blind hole is located within the second groove, and the first blind hole is used to accommodate the second lead electrode; Au-based first lead electrode and Au-based second lead electrode are fabricated using a sacrificial layer process. The first lead electrode is connected to the second electrode layer, and the second lead electrode is connected to the first electrode layer but separated from the second electrode layer.

[0049] Furthermore, the fourth groove formed between adjacent array elements in step (5) serves as an isolation groove.

[0050] Furthermore, in step (1), the hard mask is a SiO2 layer with a thickness of 50 nm.

[0051] Furthermore, the first groove consists of a large cylinder and four smaller cylinders that are tangent to and symmetrically distributed with respect to the large cylinder.

[0052] Furthermore, the inner diameter of the release hole is 5 μm. The orthographic projection of the release hole is located on the sacrificial layer.

[0053] In another embodiment: A MEMS ultrasonic transducer with an isolation groove and a sealed cavity includes a substrate, an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, a structural layer, a sealed cavity, a first lead electrode, and a second lead electrode, wherein: The top surface of the substrate is uniformly and symmetrically provided with multiple sealing cavities. The top side of the sealing cavity is sealed by an insulating layer, and the periphery of the sealing cavity is sealed by a structural layer. An insulating layer is provided on the top surface of the substrate; The top surface of the insulating layer is provided with a first electrode layer; A piezoelectric layer is provided on the top surface of the first electrode layer; A second electrode layer is provided on the top side of the piezoelectric layer; A structural layer is provided on the top side of the second electrode layer; The array element is a resonant structure consisting of a sealed cavity and an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer perpendicular to the sealed cavity; Isolation slots are provided between adjacent array elements, and the isolation slots are arranged on the structural layer; Adjacent array elements are connected by a beam structure; The second lead electrode is connected to the first electrode layer; The first lead electrode is connected to the second electrode layer.

[0054] Furthermore, the insulating layer Al2O3 layer has a thickness of 500 nm.

[0055] Furthermore, the first electrode layer is an Au layer, and the thickness of the first electrode layer is 300 nm.

[0056] Furthermore, the piezoelectric layer is an AlScN layer, and the thickness of the piezoelectric layer is 2 μm.

[0057] Furthermore, the second electrode layer is an Au layer, and the thickness of the second electrode layer is 300 nm.

[0058] Furthermore, the structural layer is an Al2O3 layer with a thickness of 7.5 μm.

[0059] Furthermore, the beam structure has a width of 50 μm and a length of 200 μm.

[0060] The fabrication method of the MEMS ultrasonic transducer with isolation groove and sealing cavity described in any one of the above-mentioned methods comprises the following steps: (1) Preparation of sacrificial layer: Si wafer is selected as substrate, and then a hard mask is prepared on the top surface of Si wafer. Then, a deep silicon etching machine is used to etch the top surface of Si wafer to form multiple symmetrically arranged first grooves with an etching depth of 5 μm. Then, phosphosilicate glass (PSG) is prepared in the first groove by chemical vapor deposition with a deposition thickness 1 μm greater than the etching depth. Then, a flat surface is obtained by chemical mechanical polishing (CMP) to form a sacrificial layer in the first groove, wherein: the thickness of the sacrificial layer after polishing is 4.5 μm. (2) An insulating layer, a first electrode layer, a piezoelectric layer, and a second electrode layer are sequentially fabricated on the top surface of the Si wafer processed in step (1), wherein: The insulating layer was prepared by chemical vapor deposition. The first electrode layer was prepared by physical vapor deposition. The piezoelectric layer is prepared by physical vapor deposition. The second electrode layer is prepared by physical vapor deposition, and a second groove to accommodate the first blind hole is prepared on the second electrode layer by photolithography followed by etching. (3) Using reactive ion etching, the second electrode layer, piezoelectric layer, first electrode layer and insulating layer of the Si wafer treated in step (2) are etched in sequence to form a release hole. The etching of the release hole is completely left on the sacrificial layer. Using reactive ion etching, extending outward from the edge of the first groove, the second electrode layer, piezoelectric layer, first electrode layer, and insulating layer of the Si wafer treated in step (2) are sequentially etched to form the third groove, wherein: The etching of the third groove is performed on the substrate, and the width of the third groove is 50 μm. (4) The sacrificial layer is removed by using sacrificial layer release solution (NPW solution), and a cavity structure is formed in the first groove after completion; (5) A structural layer is prepared on the top side of the Si wafer treated in step (4) by chemical vapor deposition, wherein: While preparing the structural layer, release holes are filled to form a sealed cavity. After completion, the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer form an array element. A fourth groove is formed between adjacent array elements; (6) Using reactive ion etching, the Si wafer treated in step (5) is etched to obtain a second blind hole exposing the first electrode layer and a first blind hole exposing the second electrode layer, wherein: The second blind hole is used to accommodate the first lead electrode; The first blind hole is located within the second groove, and the first blind hole is used to accommodate the second lead electrode; Au-based first lead electrode and Au-based second lead electrode are fabricated using a sacrificial layer process. The first lead electrode is connected to the second electrode layer, and the second lead electrode is connected to the first electrode layer but separated from the second electrode layer.

[0061] Furthermore, the fourth groove formed between adjacent array elements in step (5) serves as an isolation groove.

[0062] Furthermore, in step (1), the hard mask is SiN. x The layer has a thickness of 500 nm.

[0063] Furthermore, the first groove consists of a regular square prism and four small cylinders that are tangent to and symmetrically distributed with respect to the regular square prism.

[0064] Furthermore, the inner diameter of the release hole is 30 μm. The orthographic projection of the release hole is located on the sacrificial layer.

[0065] In yet another embodiment: A MEMS ultrasonic transducer with an isolation groove and a sealed cavity includes a substrate, an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, a structural layer, a sealed cavity, a first lead electrode, and a second lead electrode, wherein: The top surface of the substrate is uniformly and symmetrically provided with multiple sealing cavities. The top side of the sealing cavity is sealed by an insulating layer, and the periphery of the sealing cavity is sealed by a structural layer. An insulating layer is provided on the top surface of the substrate; The top surface of the insulating layer is provided with a first electrode layer; A piezoelectric layer is provided on the top surface of the first electrode layer; A second electrode layer is provided on the top side of the piezoelectric layer; A structural layer is provided on the top side of the second electrode layer; The array element is a resonant structure consisting of a sealed cavity and an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer perpendicular to the sealed cavity; An isolation groove is provided between adjacent array elements, and the isolation groove sequentially penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer; Adjacent array elements are connected by a beam structure; The second lead electrode is connected to the first electrode layer; The first lead electrode is connected to the second electrode layer.

[0066] Furthermore, the insulating layer is an AlN layer, and the thickness of the insulating layer is 200 nm.

[0067] Furthermore, the first electrode layer is a Mo layer, and the thickness of the first electrode layer is 200 nm.

[0068] Furthermore, the piezoelectric layer is a PZT layer, and the thickness of the piezoelectric layer is 1 μm.

[0069] Furthermore, the second electrode layer is a Mo layer, and the thickness of the second electrode layer is 200 nm.

[0070] Furthermore, the structural layer is an AlN layer, and the thickness of the structural layer is 5 μm.

[0071] Furthermore, the beam structure has a width of 30 μm and a length of 100 μm.

[0072] The fabrication method of the MEMS ultrasonic transducer with isolation groove and sealing cavity described in any one of the above-mentioned methods comprises the following steps: (1) Preparation of sacrificial layer: Si wafer is selected as substrate, and then a hard mask is prepared on the top surface of Si wafer. Then, a deep silicon etching machine is used to etch the top surface of Si wafer to form multiple symmetrically arranged first grooves with an etching depth of 3 μm. Then, undoped silicate glass (USG) is prepared in the first groove by chemical vapor deposition with a deposition thickness 0.5 μm greater than the etching depth. Then, a flat surface is obtained by chemical mechanical polishing (CMP) to form a sacrificial layer in the first groove, wherein: the thickness of the sacrificial layer after polishing is 3.2 μm; (2) An insulating layer, a first electrode layer, a piezoelectric layer, and a second electrode layer are sequentially fabricated on the top surface of the Si wafer processed in step (1), wherein: The insulating layer was prepared by physical vapor deposition. The first electrode layer was prepared by physical vapor deposition. The piezoelectric layer is prepared by physical vapor deposition. The second electrode layer is prepared by physical vapor deposition, and a second groove to accommodate the first blind hole is prepared on the second electrode layer by photolithography followed by etching. (3) Using reactive ion etching, the second electrode layer, piezoelectric layer, first electrode layer and insulating layer of the Si wafer treated in step (2) are etched in sequence to form a release hole. The etching of the release hole is completely left on the sacrificial layer. Using reactive ion etching, extending outward from the edge of the first groove, the second electrode layer, piezoelectric layer, first electrode layer, and insulating layer of the Si wafer treated in step (2) are sequentially etched to form the third groove, wherein: The etching of the third groove is performed on the substrate, and the width of the third groove is 25 μm. (4) The undoped silicate glass (USG) in the sacrificial layer is removed by using a sacrificial layer release solution (VHF solution), and a cavity structure is formed in the first groove after completion; (5) A structural layer is prepared on the top side of the Si wafer treated in step (4) by physical vapor deposition, wherein: While preparing the structural layer, release holes are filled to form a sealed cavity. After completion, the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer form an array element. A fourth groove is formed between adjacent array elements; (6) Using reactive ion etching, the Si wafer treated in step (5) is etched to obtain a second blind hole exposing the first electrode layer and a first blind hole exposing the second electrode layer, wherein: The second blind hole is used to accommodate the first lead electrode; The first blind hole is located within the second groove, and the first blind hole is used to accommodate the second lead electrode; An Al-based first lead electrode and an Al-based second lead electrode are fabricated using physical vapor deposition and etching. The first lead electrode is connected to the second electrode layer, and the second lead electrode is connected to the first electrode layer but separated from the second electrode layer. (7) Etch the fourth groove of the Si wafer obtained in step (6) to form an isolation groove that penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer and is located between adjacent array elements.

[0073] Furthermore, in step (1), the hard mask is an Al2O3 layer with a thickness of 200 nm.

[0074] Furthermore, the first groove consists of a regular octagonal prism and four small cylinders that are tangent to and symmetrically distributed with respect to the regular octagonal prism.

[0075] Furthermore, the inner diameter of the release hole is 20 μm. The orthographic projection of the release hole is located on the sacrificial layer. Specific Implementation Example 1: like Figure 1-6 As shown, the fabrication method of a MEMS ultrasonic transducer with an isolation groove and a sealed cavity includes the following specific steps: (1) Preparation of sacrificial layer 101: A Si wafer is selected as the substrate 102. A 200 nm thick SiO2 hard mask is then prepared on the top surface of the Si wafer. The top surface of the Si wafer is then etched using a deep silicon etching machine to form a symmetrically arranged first groove with an etching depth of 1.8 μm. The first groove consists of a large cylinder and four small cylinders tangent to the large cylinder and symmetrically distributed. Then, phosphosilicate glass (PSG) is prepared in the first groove by chemical vapor deposition. The deposition thickness is 0.5 μm greater than the etching depth. Then, a flat surface is obtained by chemical mechanical polishing (CMP) to form the sacrificial layer 101 in the first groove. The thickness of the sacrificial layer 101 after polishing is 1.5 μm. (2) An insulating layer 201, a first electrode layer 202, a piezoelectric layer 203, and a second electrode layer 204 are sequentially fabricated on the top surface of the Si wafer processed in step (1), wherein: The insulating layer 201 is prepared by chemical vapor deposition. The insulating layer 201 is an AlN layer with a thickness of 100 nm. The first electrode layer 202 is prepared by physical vapor deposition. The first electrode layer 202 is a Mo layer and the thickness of the first electrode layer 202 is 200 nm. The piezoelectric layer 203 is prepared by physical vapor deposition. The piezoelectric layer 203 is an AlScN layer and the thickness of the piezoelectric layer 203 is 1 μm. The second electrode layer 204 is prepared by physical vapor deposition. The second electrode layer 204 is a Mo layer with a thickness of 200 nm. A second groove for accommodating the first blind hole is prepared on the second electrode layer 204 by photolithography followed by etching. (3) Using reactive ion etching, the second electrode layer 204, piezoelectric layer 203, first electrode layer 202 and insulating layer 201 of the Si wafer treated in step (2) are etched in sequence to form a release hole 302. The etching of the release hole 302 is completely stopped on the sacrificial layer 101. Using reactive ion etching, extending outward from the edge of the first groove, the second electrode layer 204, piezoelectric layer 203, first electrode layer 202, and insulating layer 201 of the Si wafer treated in step (2) are sequentially etched to form a third groove. The third groove and the release hole 302 form a spatial isolation, wherein: The etching of the third groove is performed on the substrate 102, and the width of the third groove is 40 μm. (4) The phosphosilicate glass (PSG) in the sacrificial layer 101 is removed by using a sacrificial layer release solution (NPW solution), and a cavity structure 401 is formed in the first groove after completion; (5) A structural layer 501 is prepared on the top side of the Si wafer treated in step (4) by chemical vapor deposition, wherein: While preparing the structural layer 501, the release hole 302 is filled to form a sealed cavity 502. After completion, the structural layer 501, the second electrode layer 204, the piezoelectric layer 203, the first electrode layer 202, and the insulating layer 201 form an array element 503. The structural layer 501 is a SiO2 layer with a thickness of 3 μm. A fourth groove is formed between adjacent array elements 503; (6) Using reactive ion etching, the Si wafer treated in step (5) is etched to obtain a second blind hole exposing the first electrode layer 202 and a first blind hole exposing the second electrode layer 204, wherein: The second blind hole is used to accommodate the first lead electrode 601; The first blind hole is located in the second groove and is used to accommodate the second lead electrode 602; An Al-based first lead electrode and an Al-based second lead electrode 602 are fabricated using physical vapor deposition and etching. The first lead electrode 601 is connected to the second electrode layer 204, and the second lead electrode 602 is connected to the first electrode layer 202 but is separate from the second electrode layer 204.

[0077] Furthermore, the fourth groove formed between adjacent array elements 503 in step (5) serves as an isolation groove 301.

[0078] Furthermore, the inner diameter of the release hole 302 is 8 μm.

[0079] Comparative example: The fabrication method of the MEMS ultrasonic transducer without isolation groove is roughly the same as that in specific embodiment 1, except that step (3) is different: (3) Using reactive ion etching, the second electrode layer, piezoelectric layer, first electrode layer and insulating layer of the Si wafer treated in step (2) are etched in sequence to form a release hole. The etching of the release hole is stopped on the sacrificial layer.

[0080] The MEMS ultrasonic transducer with isolation groove and sealing cavity prepared in Specific Embodiment 1 has a similar structure to the MEMS ultrasonic transducer without isolation groove prepared in the comparative example. The only difference is the presence or absence of isolation groove.

[0081] For large-scale arrays (8x8 array ultrasonic transducers), the effect of the isolation groove 301 structure is as follows: Figure 7 As shown in a and b, Figure 7 In the figure, 'a' represents a MEMS ultrasonic transducer without isolation grooves fabricated in a comparative example. The array elements at different positions show significant differences in their response to electrical or acoustic signals. Figure 7 In the example b, the MEMS ultrasonic transducer with isolation groove and sealing cavity prepared in specific embodiment 1 has isolation groove 301, which can reduce the coupling between adjacent array elements and make the array elements at different positions respond to electrical or acoustic signals in a consistent manner.

[0082] The embodiments of the present invention have been described in detail above. However, the present invention is not limited to the above embodiments, and various changes can be made within the scope of knowledge possessed by those skilled in the art without departing from the spirit of the present invention.

Claims

1. A MEMS ultrasonic transducer having an isolation groove and a sealed cavity, characterized in that, It includes a substrate, an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, a structural layer, a sealing cavity, a first lead electrode, and a second lead electrode, wherein: The top surface of the substrate is uniformly and symmetrically provided with multiple sealing cavities. The top side of the sealing cavity is sealed by an insulating layer, and the periphery of the sealing cavity is sealed by a structural layer. An insulating layer is provided on the top surface of the substrate; The top surface of the insulating layer is provided with a first electrode layer; A piezoelectric layer is provided on the top surface of the first electrode layer; A second electrode layer is provided on the top side of the piezoelectric layer; A structural layer is provided on the top side of the second electrode layer; The array element is a resonant structure consisting of a sealed cavity and an insulating layer, a first electrode layer, a piezoelectric layer, a second electrode layer, and a structural layer perpendicular to the sealed cavity; An isolation groove is provided between adjacent array elements. The isolation groove is arranged on the structural layer, or the isolation groove sequentially penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer. Adjacent array elements are connected by a beam structure; The second lead electrode is connected to the first electrode layer; The first lead electrode is connected to the second electrode layer.

2. The MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 1, characterized in that, The insulating layer is SiN x The insulating layer is one of an Al2O3 layer and an AlN layer, wherein the thickness of the insulating layer is 50–500 nm. The first electrode layer is one of Pt, Au and Mo layers, and the thickness of the first electrode layer is 50-300 nm.

3. The MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 1, characterized in that, The piezoelectric layer is one of AlN layer, AlScN layer and PZT layer, and the thickness of the piezoelectric layer is 0.5~2um; The second electrode layer is one of Pt, Au, and Mo layers, and the thickness of the second electrode layer is 50–300 nm.

4. The MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 1, characterized in that, The structural layer is SiN. x The structure is one of the following: an Al2O3 layer, an AlN layer, and a SiO2 layer, wherein the thickness of the structure layer is 1.3 to 7.5 μm.

5. The MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 1, characterized in that, The beam structure has a width of 10–50 μm and a length of 30–200 μm.

6. The method for fabricating a MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in any one of claims 1-5, characterized in that, The steps are as follows: (1) Preparation of sacrificial layer: Si wafer is selected as substrate, and then a hard mask is prepared on the top surface of Si wafer. Then, a deep silicon etching machine is used to etch the top surface of Si wafer to form multiple symmetrically arranged first grooves with an etching depth of 0.5-5 μm. Then, phosphosilicate glass or undoped silicate glass is prepared in the first grooves by chemical vapor deposition. The deposition thickness is 0.3-1 μm greater than the etching depth. Then, a flat surface is obtained by chemical mechanical polishing to form a sacrificial layer in the first grooves. The thickness of the sacrificial layer after polishing is 0.5-4.5 μm. (2) An insulating layer, a first electrode layer, a piezoelectric layer, and a second electrode layer are sequentially fabricated on the top surface of the Si wafer processed in step (1), wherein: The insulating layer is prepared by chemical vapor deposition or physical vapor deposition. The first electrode layer was prepared by physical vapor deposition. The piezoelectric layer is prepared by physical vapor deposition. The second electrode layer is prepared by physical vapor deposition, and a second groove to accommodate the first blind hole is prepared on the second electrode layer by photolithography followed by etching. (3) Using reactive ion etching, the second electrode layer, piezoelectric layer, first electrode layer and insulating layer of the Si wafer treated in step (2) are etched in sequence to form a release hole. The etching of the release hole is completely left on the sacrificial layer. Using reactive ion etching, extending outward from the edge of the first groove, the second electrode layer, piezoelectric layer, first electrode layer, and insulating layer of the Si wafer treated in step (2) are sequentially etched to form the third groove, wherein: The etching of the third groove is performed on the substrate, and the width of the third groove is 10-50 μm. (4) The sacrificial layer is removed by using a sacrificial layer release solution to remove the phosphosilicate glass or undoped silicate glass in the sacrificial layer, and a cavity structure is formed in the first groove after completion; (5) A structural layer is prepared on the top side of the Si wafer treated in step (4) by chemical vapor deposition or physical vapor deposition, wherein: While preparing the structural layer, release holes are filled to form a sealed cavity. After completion, the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer form an array element. A fourth groove is formed between adjacent array elements; (6) Using reactive ion etching, the Si wafer treated in step (5) is etched to obtain a second blind hole exposing the first electrode layer and a first blind hole exposing the second electrode layer, wherein: The second blind hole is used to accommodate the first lead electrode; The first blind hole is located within the second groove, and the first blind hole is used to accommodate the second lead electrode; Au-based first lead electrode and Au-based second lead electrode were fabricated using a sacrificial layer process, or An Al-based first lead electrode and an Al-based second lead electrode are fabricated using physical vapor deposition and etching. The first lead electrode is connected to the second electrode layer, and the second lead electrode is connected to the first electrode layer but separated from it.

7. The method for fabricating a MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 6, characterized in that, The fourth groove formed between adjacent array elements in step (5) serves as an isolation groove, or It also includes step (7), which involves etching the fourth groove of the Si wafer obtained in step (6) to form an isolation trench that penetrates the structural layer, the second electrode layer, the piezoelectric layer, the first electrode layer, and the insulating layer and is located between adjacent array elements.

8. The method for fabricating a MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 6, characterized in that, In step (1), the hard mask is a SiO2 layer or SiN. x The layer or Al2O3 layer has a thickness of 50–500 nm.

9. The method for fabricating a MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 6, characterized in that, The first groove consists of a large cylinder, a regular square prism, or a regular octagonal prism, and four smaller cylinders that are tangent to and symmetrically distributed with respect to the large cylinder, regular square prism, or regular octagonal prism.

10. The method for fabricating a MEMS ultrasonic transducer with an isolation groove and a sealed cavity as described in claim 6, characterized in that, The inner diameter of the release hole is 5–30 μm.

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