Semiconductor substrate manufacturing method and semiconductor substrate

CN122579899APending Publication Date: 2026-08-14MITSUBISHI ELECTRIC CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-01-30
Publication Date
2026-08-14

AI Technical Summary

Technical Problem

[0004]然而,上述公报中没有记载半导体基板的背面的离子注入层形成方法

Benefits of technology

[0007]根据本公开的半导体基板的制造方法,通过抑制背面上的离子注入层的未形成情况,从而能抑制漏电流的产生。

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Abstract

The method for manufacturing a semiconductor substrate (10) includes a mounting process (S1), an ion implantation process (S2), and an activation process (S3). In the mounting process (S1), a substrate body (1) having a surface (FS) on which a surface electrode (2) is formed and a back surface (RS) opposite to the surface (FS) is mounted on a platform (100) with the back surface (RS) as the upper surface. In the ion implantation process (S2), ions are implanted into the back surface (RS) of the substrate body (1) mounted on the platform (100) at an angle of 45 degrees or more and 84 degrees or less from a first direction and a second direction symmetrical to the first direction, thereby forming an ion implantation layer (3). In the activation process (S3), the ions implanted into the ion implantation layer (3) are activated by laser annealing.
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Description

Technical Field

[0001] This disclosure relates to a method for manufacturing a semiconductor substrate and a semiconductor substrate. Background Technology

[0002] In the back-side wafer fabrication of IGBTs (Insulated Gate Bipolar Transistors), foreign matter adheres to the semiconductor substrate before ion implantation is performed on the back side, which is opposite to the surface where the surface electrodes are formed. If ion implantation is performed on the back side while foreign matter is attached, ion-unimplanted areas will be formed under the foreign matter. As a result, leakage current is generated when voltage is applied.

[0003] Japanese Patent Application Publication No. 2000-188082 discloses an ion implantation method that can form an embedded oxide film layer inside a Si (silicon) wafer to compensate for defects caused by pinholes, even when particulate impurities are attached to the wafer surface. In this ion implantation method, the Si wafer is tilted, and approximately half of the total implanted ions are implanted onto the surface of the Si wafer using an oxygen ion beam. Afterward, the ion beam is stopped, and the tilt angle of the Si wafer remains unchanged. Then, the Si wafer is rotated around its center to implant the remaining approximately half of the ions.

[0004] However, the aforementioned announcement did not describe the method for forming the ion implantation layer on the back side of the semiconductor substrate. Summary of the Invention

[0005] This disclosure was made in view of the above-mentioned problems, and its object is to provide a method for manufacturing a semiconductor substrate and a semiconductor substrate that can suppress the generation of leakage current by suppressing the formation of regions where the ion implantation layer is not formed on the back side.

[0006] The semiconductor substrate manufacturing method disclosed herein includes a mounting process, an ion implantation process, and an activation process. In the mounting process, a substrate body having a surface with a surface electrode and a back surface opposite the surface is mounted on a platform with the back surface as the upper surface. In the ion implantation process, ions are implanted into the back surface of the substrate body mounted on the platform at angles of 45 degrees or more and 84 degrees or less from a first direction and a second direction symmetrical to the first direction, thereby forming an ion implantation layer. In the activation process, the ions implanted into the ion implantation layer are activated by laser annealing.

[0007] According to the semiconductor substrate manufacturing method disclosed herein, leakage current can be suppressed by suppressing the failure to form an ion implantation layer on the back side.

[0008] The above and other objects, features, aspects and advantages of the invention will become clear from the following detailed description of the invention, which can be understood with reference to the accompanying drawings. Attached Figure Description

[0009] Figure 1 This is a flowchart illustrating the manufacturing method of the semiconductor substrate according to Embodiment 1.

[0010] Figure 2 This is a cross-sectional view schematically illustrating the mounting process of the semiconductor substrate manufacturing method according to Embodiment 1.

[0011] Figure 3 This is a cross-sectional view schematically illustrating the resist preparation process in the ion implantation step of the semiconductor substrate manufacturing method according to Embodiment 1.

[0012] Figure 4 This is a cross-sectional view schematically illustrating the ion implantation process of the semiconductor substrate manufacturing method according to Embodiment 1, in which ion implantation is performed from the first direction.

[0013] Figure 5 This is a cross-sectional view schematically illustrating the ion implantation process of the semiconductor substrate manufacturing method according to Embodiment 1, in which ion implantation is performed from the second direction.

[0014] Figure 6 This is a schematic diagram illustrating the implantation angle of ion implantation in the ion implantation process of the semiconductor substrate manufacturing method according to Embodiment 1.

[0015] Figure 7 This is a cross-sectional view schematically illustrating the resist removal process in the ion implantation step of the semiconductor substrate manufacturing method according to Embodiment 1.

[0016] Figure 8 This is a cross-sectional view schematically illustrating the activation process of the semiconductor substrate manufacturing method according to Embodiment 1.

[0017] Figure 9 This is a perspective view schematically illustrating the ion implantation apparatus used in the semiconductor substrate manufacturing method according to Embodiment 1.

[0018] Figure 10 This is a cross-sectional view schematically illustrating the structure of the semiconductor substrate involved in Embodiment 1.

[0019] Figure 11 This is a cross-sectional view schematically illustrating the ion implantation process in a modified example of the semiconductor substrate manufacturing method according to Embodiment 1.

[0020] Figure 12 This is a flowchart illustrating the manufacturing method of the semiconductor substrate according to Embodiment 2.

[0021] Figure 13This is a cross-sectional view schematically illustrating the oxide film formation process of the semiconductor substrate manufacturing method according to Embodiment 2.

[0022] Figure 14 This is a cross-sectional view schematically illustrating the resist preparation process in the ion implantation step of the semiconductor substrate manufacturing method according to Embodiment 2.

[0023] Figure 15 This is a cross-sectional view schematically illustrating the ion implantation process of the semiconductor substrate manufacturing method according to Embodiment 2, in which ion implantation is performed from the first direction.

[0024] Figure 16 This is a cross-sectional view schematically illustrating the ion implantation process of the semiconductor substrate manufacturing method according to Embodiment 2, in which ion implantation is performed from the second direction.

[0025] Figure 17 This is a cross-sectional view schematically illustrating the resist removal process in the ion implantation step of the semiconductor substrate manufacturing method according to Embodiment 2.

[0026] Figure 18 This is a cross-sectional view schematically illustrating the oxide film removal process of the semiconductor substrate manufacturing method according to Embodiment 2.

[0027] Figure 19 This is a cross-sectional view schematically illustrating the activation process of the semiconductor substrate manufacturing method according to Embodiment 2.

[0028] Figure 20 This is a flowchart illustrating the manufacturing method of the semiconductor substrate according to Embodiment 3.

[0029] Figure 21 This is a cross-sectional view schematically illustrating the ion implantation process of the semiconductor substrate manufacturing method according to Embodiment 3.

[0030] Figure 22 This is a cross-sectional view schematically illustrating the removal process of the semiconductor substrate manufacturing method according to Embodiment 3.

[0031] Figure 23 This is a cross-sectional view schematically illustrating the activation process of the semiconductor substrate manufacturing method according to Embodiment 3.

[0032] Figure 24 This is a flowchart illustrating the manufacturing method of the semiconductor substrate according to Embodiment 4.

[0033] Figure 25 This is a cross-sectional view schematically illustrating the processing steps of the semiconductor substrate manufacturing method according to Embodiment 4.

[0034] Figure 26 This is a cross-sectional view schematically illustrating the removal process of the semiconductor substrate manufacturing method according to Embodiment 4.

[0035] Figure 27 This is a cross-sectional view schematically illustrating the ion implantation process of the semiconductor substrate manufacturing method according to Embodiment 4.

[0036] Figure 28 This is a cross-sectional view schematically illustrating the activation process of the semiconductor substrate manufacturing method according to Embodiment 4. Detailed Implementation

[0037] The embodiments will now be described with reference to the accompanying drawings. Furthermore, identical or equivalent parts will be labeled with the same reference numerals and will not be described repeatedly.

[0038] Implementation method 1.

[0039] Reference Figures 1 to 8 The manufacturing method of the semiconductor substrate 10 according to Embodiment 1 will be described. The manufacturing method of the semiconductor substrate 10 in this embodiment is a method for forming the back ion implantation layer in the back wafer process of IGBT (Insulated Gate Bipolar Transistor).

[0040] like Figure 1 As shown, the method for manufacturing the semiconductor substrate 10 according to Embodiment 1 includes a mounting process S1, an ion implantation process S2, and an activation process S3. Furthermore, the ion implantation process S2 includes a resist formation process S21, an ion implantation layer formation process S22, and a resist removal process S23.

[0041] like Figure 2 As shown, in the mounting process S1, the substrate body 1 has a surface FS on which the surface electrode 2 is formed and a back surface RS opposite to the surface FS. The material of the substrate body 1 is, for example, silicon (Si). The surface electrode 2 includes a gate electrode, etc., and the substrate body 1 is mounted on the platform 100 with the back surface RS as the upper surface. The semiconductor substrate 10 is mounted on the platform 100 via a protective film 11.

[0042] like Figure 3 As shown, in the ion implantation process S2, a resist formation process S21 is performed. In the resist formation process S21, a resist 12 for forming a back pattern is formed on the back surface RS of the substrate body 1. The resist 12 is formed by photolithography. Before ion implantation, foreign matter 20 such as particles may be attached to the back surface RS of the substrate body 1.

[0043] like Figure 4 and Figure 5As shown, in the ion implantation process S2, an ion implantation layer formation process S22 is performed. In the ion implantation layer formation process S22, ion implantation is performed by ion beam I irradiated from the ion implantation apparatus 200, thereby forming an ion implantation layer 3. In the ion implantation layer formation process S22, ion implantation is performed on the back surface RS of the substrate body 1 mounted on the platform 100 at an angle of 45 degrees or more and 84 degrees or less, from a first direction and a second direction symmetrical to the first direction, thereby forming the ion implantation layer 3. Figure 4 The diagram illustrates the case where ion implantation is performed on the back surface RS of the substrate body 1 from the first direction. Figure 5 The diagram shows the case where ion implantation is performed on the back surface RS of the substrate body 1 from the second direction.

[0044] Even when foreign matter 20 is present on the back surface RS of the substrate body 1, ion implantation can be performed in stages with different implantation angles to form an ion implantation layer 3 under the foreign matter 20. For example, the ion implantation layer 3 can be formed by implanting n-type impurities such as phosphorus (P) or p-type impurities such as boron (B).

[0045] like Figure 6 As shown, the width 'a' of the foreign object 20 is the dimension of the foreign object 20 in the horizontal direction of the substrate body 1. Since foreign objects larger than 1 μm and smaller than 10 μm are more common, the width 'a' of the foreign object 20 is set to be between 1 μm and 10 μm. Furthermore, the ion implantation depth 'b' is set to 1 μm. With a width 'a' of 1 μm and an implantation depth 'b' of 1 μm, the ion implantation angle 'θ' is 45 degrees (tan θ). -1 (1 / 1) = 45°). With a foreign body width a of 10 μm and an implantation depth b of 1 μm, the implantation angle θ is approximately 84 degrees (tan θ). -1 (10 / 1) = 84.29°). Therefore, by performing ion implantation on the back surface RS of the substrate body 1 at an angle of 45 degrees or more and 84 degrees or less, an ion implantation layer 3 can be formed under the foreign matter 20.

[0046] like Figure 7 As shown, in the ion implantation process S2, a resist removal process S23 is performed. In the resist removal process S23, the resist 12 is removed from the back surface RS of the substrate body 1. The resist 12 is removed before laser annealing. In addition, foreign matter 20 is also removed.

[0047] like Figure 8As shown, in the activation process S3, the ions implanted in the ion implantation layer 3 are activated by laser annealing. This causes ions to diffuse and form a diffusion layer. A high impurity concentration region is formed by laser-based heating and high-temperature heat treatment from the back surface RS of the substrate body 1, without heating the patterned surface. The ions implanted in the ion implantation layer 3 are activated, thereby maintaining the characteristics of the device.

[0048] Reference Figure 9 The ion implantation apparatus 200 used in the manufacturing method of the semiconductor substrate 10 according to Embodiment 1 will be described.

[0049] The ion implantation apparatus 200 includes an ion source 201, a gas supplier 202, an extraction electrode 203, a mass separator 204, an analytical slit 205, an accelerating tube 206, a deflector 207, a lens 208, and a scanner 209. The ion source 201 uses a feed gas supplied by the gas supplier 202 to generate ions of the target element. Ions generated by the ion source 201 are extracted by the extraction electrode 203. The ions extracted by the extraction electrode 203 are separated by the mass separator 204. The ions separated by the mass separator 204 are selected by the analytical slit 205. The ions selected by the analytical slit 205 are accelerated by the accelerating tube 206 to form an ion beam. The deflector 207 deflects the ion beam. The lens 208 shapes the ion beam. The scanner 209 operates the direction of the ion beam.

[0050] Ions are implanted onto the back surface RS of the substrate body 1 of the semiconductor substrate 10 mounted on the platform 100 by the ion implantation apparatus 200. The platform 100 is configured to be rotatable. By rotating the platform 100, ion implantation is performed on the back surface RS of the substrate body 1 of the semiconductor substrate 10 from a first direction and a second direction.

[0051] Reference Figure 10 The structure of the semiconductor substrate 10 according to Embodiment 1 will be described.

[0052] The semiconductor substrate 10 according to Embodiment 1 includes a substrate body 1, a surface electrode 2, and a collector electrode 4. The substrate body 1 has a surface FS and a back surface RS opposite to the surface FS. The surface electrode 2 is formed on the surface FS. The collector electrode 4 is formed on the back surface RS. The substrate body 1 includes a device portion 1b and a terminal portion 1a. The device portion 1b is configured to carry a main current. The terminal portion 1a is disposed outside the device portion 1b. The device portion 1b has an ion implantation layer 3 disposed on the back surface RS. The ion implantation layer 3 is formed at an angle of 45 degrees or more and 84 degrees or less relative to the back surface RS.

[0053] Next, the effects of Implementation Method 1 will be explained.

[0054] According to the semiconductor substrate 10 manufacturing method of Embodiment 1, in the ion implantation process, ion implantation is performed on the back surface RS of the substrate body 1 mounted on the platform 100 at an angle of 45 degrees or more and 84 degrees or less, from a first direction and a second direction symmetrical to the first direction, thereby forming an ion implantation layer 3. Therefore, even if there is a foreign object 20 with a width a of 1 μm or more and 10 μm or less on the back surface RS of the substrate body 1, an ion implantation layer 3 can be formed under the foreign object 20 by performing ion implantation from the first direction and the second direction. Therefore, by suppressing the failure to form the ion implantation layer 3 on the back surface RS of the substrate body 1 of the semiconductor substrate 10, the generation of leakage current can be suppressed.

[0055] Furthermore, in the activation step S3, the ions implanted into the ion implantation layer 3 are activated by laser annealing. Therefore, a diffusion layer can be formed by ion diffusion.

[0056] According to the semiconductor substrate 10 of Embodiment 1, the ion implantation layer 3 is formed at an angle of 45 degrees or more and 84 degrees or less relative to the back surface RS. Therefore, even if there is a foreign object 20 with a width a of 1 μm or more and 10 μm or less on the back surface RS of the substrate body 1, the ion implantation layer 3 can be formed under the foreign object 20 by performing ion implantation from the first direction and the second direction. Therefore, by suppressing the failure of the ion implantation layer to form on the back surface RS of the substrate body 1 of the semiconductor substrate 10, the generation of leakage current can be suppressed.

[0057] Next, refer to Figure 11 A variation of the manufacturing method of the semiconductor substrate 10 according to Embodiment 1 will be described.

[0058] In a variation of the semiconductor substrate 10 manufacturing method according to Embodiment 1, in the ion implantation step S2, the platform 100 is rotated, thereby performing ion implantation while the substrate body 1 is rotated. By rotating the platform 100, the semiconductor substrate 10 mounted on the platform 100 can be rotated 360 degrees circumferentially relative to the center. Then, ion implantation can be performed while the semiconductor substrate 10 is rotated.

[0059] According to a variation of the semiconductor substrate 10 manufacturing method according to Embodiment 1, in the ion implantation step S2, the platform 100 is rotated, thereby performing ion implantation while the substrate body 1 is rotating. Therefore, ion implantation can be performed at a 360-degree angle in the circumferential direction relative to the rotation center of the semiconductor substrate 10. Therefore, an ion implantation layer 3 can be formed even under foreign matter 20. Therefore, by suppressing the failure to form the ion implantation layer 3 on the back surface RS of the substrate body 1 of the semiconductor substrate 10, leakage current generation can be suppressed.

[0060] Implementation method 2.

[0061] Unless otherwise specified, Embodiment 2 has the same manufacturing method, structure, and effects as Embodiment 1 described above. Therefore, structures identical to those in Embodiment 1 are labeled with the same reference numerals and will not be described again.

[0062] Reference Figures 12-19 The manufacturing method of the semiconductor substrate 10 according to Embodiment 2 will be described.

[0063] like Figure 12 As shown, the manufacturing method of the semiconductor substrate 10 according to Embodiment 2 includes a mounting step S1, an ion implantation step S2, an activation step S3, an oxide film formation step S4, and an oxide film removal step S5. That is, the manufacturing method of the semiconductor substrate 10 according to Embodiment 2 further includes an oxide film formation step S4 and an oxide film removal step S5. The oxide film formation step S4 is performed before the ion implantation step S2. The oxide film removal step S5 is performed after the ion implantation step S2.

[0064] like Figure 13 As shown, in the oxide film formation process S4, before the ion implantation process S2, an oxide film 5 for capturing foreign matter 20 is formed on the back surface RS of the substrate body 1. The oxide film 5 is formed entirely on the back surface RS of the substrate body 1.

[0065] like Figure 14 As shown, in the ion implantation process S2, a resist formation process S21 is performed. In the resist formation process S21, a resist 12 for forming a back-side pattern is formed on the oxide film 5.

[0066] like Figure 15 As shown, in the ion implantation process S2, the ion implantation layer formation process S22 is performed. In the ion implantation layer formation process S22, ion implantation is performed on the back surface RS of the substrate body 1 mounted on the platform 100 from the first direction at an angle of 45 degrees or more and 84 degrees or less, thereby forming the ion implantation layer 3.

[0067] like Figure 16 As shown, ion implantation is then performed on the back surface RS of the substrate body 1 mounted on the platform from the second direction at an angle of 45 degrees or more and 84 degrees or less, thereby forming an ion implantation layer 3.

[0068] like Figure 17 As shown, in the ion implantation process S2, a resist removal process S23 is performed. In the resist removal process S23, the resist 12 is removed from the oxide film 5.

[0069] like Figure 18As shown, in the oxide film removal process S5, after the ion implantation process S2, the oxide film 5 and the captured foreign matter 20 are removed together. The oxide film 5 is removed entirely from the back surface RS of the substrate body 1.

[0070] like Figure 19 As shown, in the activation process S3, the ion implantation layer 3 is laser annealed from the back side RS of the substrate body 1 after the oxide film 5 has been removed, thereby activating the ions implanted in the ion implantation layer 3.

[0071] Next, the effects of Implementation Method 2 will be explained.

[0072] According to the semiconductor substrate 10 manufacturing method of Embodiment 2, in the oxide film removal step S5, after the ion implantation step S2, the oxide film 5 and the captured foreign matter 20 are removed together. Therefore, by removing the oxide film 5, the foreign matter 20 can be removed. Furthermore, by capturing the foreign matter 20 before ion implantation, it is possible to prevent the foreign matter 20 from floating and re-attaching during ion implantation. If the foreign matter 20 re-attaches during ion implantation, the re-attached area may become an ion-unimplanted region. Therefore, by preventing the re-attachment of the foreign matter 20, the formation of an ion-unimplanted region can be prevented.

[0073] Implementation method 3.

[0074] Unless otherwise specified, Embodiment 3 has the same manufacturing method, structure, and effects as Embodiment 1 described above. Therefore, structures identical to those in Embodiment 1 are labeled with the same reference numerals and will not be described again.

[0075] Reference Figures 20-23 The manufacturing method of the semiconductor substrate 10 according to Embodiment 3 will be described.

[0076] like Figure 20 As shown, the method for manufacturing the semiconductor substrate 10 according to Embodiment 3 includes a mounting process S1, an ion implantation process S2, an activation process S3, and a removal process S6. The removal process S6 is performed between the ion implantation process S2 and the activation process S3.

[0077] like Figure 21As shown, in the ion implantation process S2, ion implantation is performed on the back surface RS of the substrate body 1 mounted on the platform 100, thereby forming an ion implantation layer 3 spaced apart from the back surface RS. The implantation energy in the ion implantation process S2 is 5 times to 10 times the implantation energy for ion implantation from the back surface RS to a depth corresponding to the thickness of the ion implantation layer 3. When the implantation energy for ion implantation from the back surface RS to a depth corresponding to the thickness of the ion implantation layer 3 is 990 keV, the implantation energy in the ion implantation process is 4950 keV or more and 9900 keV or less.

[0078] The implantation depth c of ion implantation is the sum of the thickness d of the ion implantation layer 3 and the thickness e of the portion 6 removed by at least any one of etching and grinding in the removal process.

[0079] like Figure 22 As shown, in the removal process S6, the substrate body 1 from the back side RS to the ion implantation layer 3 is removed by at least any one of etching and grinding.

[0080] like Figure 23 As shown, in the activation process S3, after the removal process S6, the ions implanted in the ion implantation layer 3 are activated by laser annealing of the ion implantation layer 3.

[0081] Next, the effects of implementation method 3 will be explained.

[0082] According to the semiconductor substrate 10 manufacturing method of Embodiment 3, the ion implantation energy in the ion implantation step S2 is 5 to 10 times the ion implantation energy for ion implantation from the back surface RS to a depth corresponding to the thickness of the ion implantation layer 3. Therefore, by increasing the ion implantation energy, ions can be implanted through the foreign matter 20. Therefore, the ion implantation layer 3 can be formed even under the foreign matter 20. Therefore, by suppressing the failure of the ion implantation layer 3 on the back surface RS of the substrate body 1 of the semiconductor substrate 10, the generation of leakage current can be suppressed.

[0083] Implementation method 4.

[0084] Unless otherwise specified, Embodiment 4 has the same manufacturing method, structure, and effects as Embodiment 1 described above. Therefore, structures identical to those in Embodiment 1 are labeled with the same reference numerals and will not be described again.

[0085] Reference Figures 24-28 The manufacturing method of the semiconductor substrate 10 according to Embodiment 4 will be described.

[0086] like Figure 24As shown, the method for manufacturing the semiconductor substrate 10 according to Embodiment 4 includes a mounting step S1, an ion implantation step S2, an activation step S3, a processing step S7, and a removal step S8. The processing step S7 is performed before the removal step S8. The removal step S8 is performed before the ion implantation step S2.

[0087] like Figure 25 As shown, in processing step S7, the back surface RS of the substrate body 1 mounted on the platform 100 is processed by at least any one of grinding and etching. In this embodiment, the grinding portion 7 has its thickness f removed, and the etching portion 8 has its thickness g removed.

[0088] like Figure 26 As shown, in the removal process S8, after the processing process S7, the back surface RS of the substrate body 1 is laser annealed to remove foreign matter and defects from the back surface RS. In the portion 9 that undergoes heat treatment by laser L, foreign matter is burned off by the heat of laser L. Furthermore, defects in the portion 9 that undergoes heat treatment by laser L are removed. In the removal process S8, laser L is irradiated with approximately half the energy of ion activation in the activation process S3.

[0089] like Figure 27 As shown, in the ion implantation process S2, after the removal process S8, the back side RS of the substrate body 1 is ion implanted to form the ion implantation layer 3.

[0090] like Figure 28 As shown, in the activation process S3, the ions implanted into the ion implantation layer 3 are activated by laser annealing of the ion implantation layer 3.

[0091] Next, the effects of implementation method 4 will be explained.

[0092] According to the semiconductor substrate 10 manufacturing method of Embodiment 4, in the removal step S8, after the processing step S7, the back surface RS of the substrate body 1 is laser annealed to remove foreign matter and defects from the back surface RS. Then, in the ion implantation step S2, after the removal step S8, an ion implantation layer 3 is formed by ion implantation on the back surface RS of the substrate body 1. Therefore, a uniform ion implantation layer 3 can be formed. Therefore, by suppressing the failure to form an ion implantation layer on the back surface RS of the substrate body 1 of the semiconductor substrate 10, the generation of leakage current can be suppressed.

[0093] The above implementation methods can be combined appropriately.

[0094] It should be understood that the embodiments disclosed herein are illustrative rather than restrictive in all respects. The scope of this disclosure is defined by the claims rather than the foregoing description and is intended to include all modifications with the same meaning and scope as the claims.

Claims

1. A method for manufacturing a semiconductor substrate, characterized in that, include: The mounting process involves mounting a substrate body having a surface electrode formed thereon and a back surface opposite the surface onto a platform with the back surface as the upper surface. An ion implantation process is performed to implant ions into the back side of the substrate body mounted on the platform from a first direction and a second direction symmetrical to the first direction at an angle of 45 degrees or more and 84 degrees or less, thereby forming an ion implantation layer. as well as The activation process involves laser annealing the ion implantation layer to activate the ions implanted into it.

2. The method for manufacturing a semiconductor substrate as described in claim 1, characterized in that, In the ion implantation process, the platform is rotated, thereby performing the ion implantation while the substrate body is rotating.

3. The method for manufacturing a semiconductor substrate as described in claim 1 or 2, characterized in that, Also includes: An oxide film formation process, which forms an oxide film for trapping foreign matter on the back side of the substrate body prior to the ion implantation process; as well as An oxide film removal process, which removes the oxide film and the captured foreign matter together after the ion implantation process.

4. A semiconductor substrate, characterized in that, include: A substrate body having a surface and a back surface opposite to the surface; Surface electrode, which is formed on the surface; as well as A current collector electrode is formed on the back side. The substrate body includes a component portion and a terminal portion disposed on the outside of the component portion. The component portion has an ion implantation layer disposed on the back side. The ion implantation layer is formed at an angle of 45 degrees or more and 84 degrees or less relative to the back surface.

5. A method for manufacturing a semiconductor substrate, characterized in that, include: The mounting process involves mounting a substrate body having a surface electrode formed thereon and a back surface opposite the surface onto a platform with the back surface as the upper surface. An ion implantation process, wherein an ion implantation layer is formed at a distance from the back side of the substrate body mounted on the platform by performing ion implantation on the back side of the substrate body. A removal process that removes a portion of the substrate body from the back side to the ion implantation layer by at least any of etching and grinding; as well as The activation process involves laser annealing the ion-implanted layer after the removal process, thereby activating the ions implanted into the ion-implanted layer. The ion implantation energy in the ion implantation process is more than 5 times and less than 10 times the ion implantation energy when ion implantation is performed from the back side to a depth corresponding to the thickness of the ion implantation layer.

6. A method for manufacturing a semiconductor substrate, characterized in that, include: The mounting process involves mounting a substrate body having a surface electrode formed thereon and a back surface opposite the surface onto a platform with the back surface as the upper surface. A processing step, wherein the back side of the substrate body mounted on the platform is processed by at least any one of grinding and etching; A removal process, which removes foreign matter and defects from the back side of the substrate body by laser annealing the back side after the processing process; An ion implantation process, wherein an ion implantation layer is formed by ion implantation on the back side of the substrate body after the removal process; as well as The activation process involves laser annealing the ion implantation layer to activate the ions implanted into it.

Citation Information

Patent Citations

  • Ion implanting method and ion implanter

    JP2000188082A