A method for fabricating a UTG-based TGV substrate

Abstract

This invention discloses a method for fabricating a TGV substrate based on UTG, comprising the following steps: S1, coating a transparent polymer protective film on the surface of the UTG substrate; S2, applying a femtosecond laser to the UTG substrate with the protective film; S3, immersing the laser-modified UTG substrate in an etching solution; S4, removing the remaining polymer protective film; S5, forming a patterned polymer protective layer again on the surface of the UTG substrate; S6, performing pretreatment and electroless nickel plating on the exposed circuit areas and via walls; S7, removing the patterned polymer protective layer; S8, performing cyanide-free electroless gold plating on the substrate with nickel circuitry to form an RDL layer. This method utilizes the low aspect ratio advantage of UTG, combined with femtosecond laser induction and a single-pass electroless plating process, to achieve integrated molding of via filling and RDL circuitry, simplifying the process flow and improving the uniformity and integrity of the circuitry.

Description

Technical Field

[0001] This invention relates to the field of TGV substrate fabrication technology, and in particular to a method for fabricating a TGV substrate based on UTG. Background Technology

[0002] With the development of semiconductor technology, the improvement in chip performance places higher demands on the signal transmission speed, integration density, and power consumption control of packaging substrates. Glass materials, due to their performance advantages in dielectric loss and coefficient of thermal expansion, are considered a potential new material for next-generation advanced packaging substrates, and are expected to replace traditional ABF substrates or silicon interposers to achieve higher interconnect density and signal integrity. Achieving high-density vertical electrical interconnects is crucial in the application of glass substrates.

[0003] Existing process routes based on TGV and RDL (redistribution layer) typically include the following steps: (a) preparing glass wafers; (b) forming TGV vias; (c) preparing barrier and seed layers by physical vapor deposition (PVD) and depositing copper on both sides by electroplating; (d) annealing and chemical mechanical polishing (CMP) to remove excess copper layer from the surface; (e) PVD coating and photolithography; (f) deploying RDL redistribution layers; (g) resist removal and Cu / Ti etching; (h) forming passivation layers (dielectric layers).

[0004] However, existing processes still have the following problems in practical applications: First, during the through-hole etching process, the etching solution and process parameters are difficult to control, which can easily damage the glass panel and form X-shaped holes or blind holes that are difficult to control precisely, affecting interconnect reliability; Second, the process involves two seed layer depositions, two copper plating processes, and CMP polishing, which is complex and costly; In addition, during the Cu / Ti etching step, the etching process may also have an adverse effect on the already formed surface copper layer, thereby reducing circuit quality and yield. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of existing technologies by providing a method for fabricating a TGV substrate based on UTG.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows: A method for fabricating a TGV substrate based on UTG is provided, comprising the following steps: S1, A transparent polymer protective film is coated on the surface of the UTG substrate; S2, a femtosecond laser is used to scan the UTG substrate through the polymer protective film, burn through the protective film to form a window to expose the glass, and induce the formation of modified columnar regions inside the UTG; S3, the laser-modified UTG substrate is immersed in an etching solution, and the etching solution selectively etches the modified area through the window to form a through hole; S4, remove the remaining polymer protective film to obtain a UTG substrate with through holes; S5, a patterned polymer protective layer is formed again on the surface of the UTG substrate to expose the circuit areas and hole walls that need to be metallized; S6, Perform pretreatment and electroless nickel plating on the exposed circuit area and hole wall to form a nickel layer; S7, Remove the patterned polymer protective layer formed in step S5, leaving the designed nickel circuit pattern; S8 involves performing cyanide-free chemical gold plating on a substrate with nickel lines to form an RDL layer.

[0007] Furthermore, the polymer protective film mentioned in S1 is polyimide with a thickness of 5μm~10μm; when removing the protective film in S4, it is soaked in a 5% sodium hydroxide solution at 50~60°C for 20~30 minutes.

[0008] Furthermore, the parameters of the femtosecond laser in S2 are set as follows: center wavelength 1030nm, pulse width 300fs, repetition frequency 200kHz, and power 5~10mW; the laser first burns through the polymer protective film and then focuses on the interior of the UTG to form a modified region.

[0009] Furthermore, the etching solution described in S3 is a mixture of 10% HF solution and 5% hydrochloric acid, with the temperature controlled at 25°C. During the etching process, due to the presence of the protective film, the etching solution only acts inside the hole, and the UTG surface does not experience thinning or damage.

[0010] Furthermore, the patterned polymer protective layer in S5 is formed by photosensitive polyimide or dry film photoresist through photolithography, with a thickness of 5-15 μm. The protective layer covers the non-circuit area, keeping the area around the aperture and the aperture wall exposed.

[0011] Furthermore, the pretreatment for electroless nickel plating in S6 includes: Roughening: Immerse the substrate in concentrated sulfuric acid and treat at room temperature for 1-3 minutes; Sensitization: Immerse in a sensitization solution, the formulation of which is 10 g / L stannous chloride and 40 ml / L hydrochloric acid, and soak for 5 minutes at room temperature; Activation: Immerse in an activation solution, the formulation of which is 0.5 g / L palladium chloride and 10 ml / L hydrochloric acid, and soak at room temperature for 5-10 minutes.

[0012] Furthermore, the electroless nickel plating solution formulation described in step S6 is as follows: 25 g / L nickel sulfate, 30 g / L sodium hypophosphite, 20 ml / L lactic acid, pH value adjusted to 4.5~5.0, temperature controlled at 85~90°C, and deposition time of 30~60 minutes.

[0013] Furthermore, the cyanide-free electroless gold plating described in S8 uses a cyanide-free sulfite gold plating solution. The main component of the plating solution is sodium gold sulfite at 5-10 g / L, with sodium sulfite as a stabilizer. The pH value is controlled at 8.0-9.0, the temperature is 60-70°C, and the deposition time is 15-30 minutes.

[0014] The present invention adopts the above technical solution and has the following technical effects compared with the prior art: The method of this invention utilizes the low aspect ratio of UTG, combined with femtosecond laser induction and single-pass chemical plating, to achieve integrated molding of through-hole filling and RDL circuitry, simplifying the process flow and improving the uniformity and integrity of the circuitry. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of step S1 in the process flow of the method for preparing the TGV substrate of the present invention.

[0016] Figure 2 This is a schematic diagram of step S2 in the process flow of the TGV substrate preparation method of the present invention.

[0017] Figure 3 This is a schematic diagram of step S3 in the process flow of the TGV substrate preparation method of the present invention.

[0018] Figure 4 This is a schematic diagram of step S4 in the process flow of the TGV substrate preparation method of the present invention.

[0019] Figure 5 This is a schematic diagram of step S5 in the process flow of the TGV substrate preparation method of the present invention.

[0020] Figure 6 This is a schematic diagram of step S6 in the process flow of the TGV substrate preparation method of the present invention.

[0021] Figure 5 This is a schematic diagram of step S5 in the process flow of the TGV substrate preparation method of the present invention.

[0022] Figure 6 This is a schematic diagram of step S6 in the process flow of the TGV substrate preparation method of the present invention.

[0023] Figure 7 This is a schematic diagram of step S7 in the process flow of the TGV substrate preparation method of the present invention.

[0024] Figure 8 This is a schematic diagram of step S8 in the process flow of the TGV substrate preparation method of the present invention.

[0025] The reference numerals in the attached figures are: 1-Substrate glass; 2-Protective coating A; 3-Glass induction area; 4-Glass etched via; 5-Protective coating B; 6-Nickel layer; 7-Gold circuit and gold filler. Detailed Implementation

[0026] The present invention will be further described below with reference to specific embodiments, but these are not intended to limit the invention. It should be noted that, unless otherwise specified, the embodiments and features described in the embodiments of the present invention can be combined with each other.

[0027] Example 1 This embodiment provides a method for fabricating a TGV substrate based on UTG. The specific process steps are as follows (please refer to...). Figure 1-8 ): S1, Prepare the UTG substrate and coat it with a protective film. An ultrathin glass (UTG) with a thickness of 50μm~100μm was selected as the substrate.

[0028] First, the UTG substrate was cleaned by ultrasonically cleaning it in acetone, ethanol and deionized water for 10 minutes each to remove surface oil and particles, and then dried under a nitrogen atmosphere.

[0029] A transparent polymer protective film is uniformly coated onto the cleaned UTG substrate surface using a spin coating method (spin coating speed controlled at 1000~1500 rpm, spin coating time 30 seconds). This protective film is polyimide (PI), with a thickness controlled at 5μm~10μm. After coating, the substrate is placed on a hot plate and softened at 120°C for 5 minutes to allow the solvent to evaporate and form a dense protective layer.

[0030] S2, femtosecond laser-induced modification A femtosecond laser processing system was used to process the UTG substrate covered with a protective film. The laser parameters were set as follows: center wavelength 1030nm, pulse width 300fs, repetition frequency 200kHz, and power adjusted to 5~10mW according to the UTG thickness.

[0031] The laser beam is controlled by a galvanometer system and scans according to the preset coordinates of the through-hole array. The laser first burns through the transparent polymer protective film on the surface of the UTG, forming a window to expose the glass, and then focuses on the interior of the UTG, forming columnar regions on the glass substrate that are induced to undergo modification.

[0032] S3, alkaline etching to form through holes The laser-modified UTG substrate was immersed in an etching solution for wet etching. In this embodiment, the etching solution used was a mixture of 10% HF solution and 5% hydrochloric acid (HCl) by mass, and the temperature was controlled at 25°C.

[0033] During the etching process, the etchant contacts the modified area through the window burned by the laser. Due to the high etching rate in the modified area, through-holes are formed preferentially. Unmodified areas, covered by the protective film, do not come into contact with the etchant. The etching time is adjusted according to the UTG thickness until through-holes with good verticality are formed. Because of the protective film, the etchant only acts within the holes and does not cause large-area thinning or damage to the UTG surface.

[0034] S4, Remove protective film After etching, the UTG substrate is placed in a dedicated stripping solution. It is then immersed in a 5% sodium hydroxide (NaOH) solution at 60°C for 30 minutes to completely remove the polymer protective film from the surface, exposing a clean UTG substrate surface and vias.

[0035] S5, forming a patterned polymer protective layer A layer of photosensitive polyimide or dry film photoresist with a thickness of approximately 5-15 μm is coated again on the surface of the UTG substrate. A patterned polymer protective layer is formed in the non-circuit areas through photolithography (exposure and development). That is, the areas that do not need to deposit metal in the future are covered by the protective layer, while the areas that need to form circuits (including the area around the orifice and the orifice wall) remain exposed.

[0036] S6, Pretreatment and nickel plating before electroless nickel plating Surface treatment of exposed wiring areas and hole walls before electroless nickel plating: Roughening: Immerse the substrate in concentrated sulfuric acid (98%) for 1-3 minutes at room temperature to increase the micro-roughness of the substrate surface and improve the adhesion of subsequent coatings.

[0037] Sensitization: After cleaning, immerse in the sensitization solution. The sensitization solution is formulated as 10g / L stannous chloride (SnCl2) + 40ml / L hydrochloric acid (HCl). Immerse for 5 minutes at room temperature to allow the substrate surface to adsorb reducing tin ions.

[0038] Activation: Immerse the sensitized substrate in the activation solution. The activation solution is formulated as 0.5 g / L palladium chloride (PdCl2) + 10 ml / L hydrochloric acid (HCl), and soak for 5-10 minutes at room temperature. The tin ions adsorbed on the surface reduce the palladium ions to metallic palladium particles, forming catalytic centers.

[0039] Electroless nickel plating: The activated substrate is immersed in an electroless nickel plating solution. The plating solution formula is as follows: nickel sulfate (NiSO4·6H2O) 25g / L, sodium hypophosphite (NaH2PO2·H2O) 30g / L as a reducing agent, lactic acid 20ml / L as a complexing agent, pH value adjusted to 4.5~5.0, temperature controlled at 85~90°C, and deposition time 30~60 minutes.

[0040] S7, Remove Protective Layer After electroless nickel plating, the substrate is immersed in a 5% NaOH solution at 50°C for 10-20 minutes to remove the patterned polymer protective layer formed in step S5. After removal, no metal deposition is found in the area beneath the protective layer, while the area exposed in step S6 retains the designed metal circuit pattern.

[0041] S8, cyanide-free electroless gold plating to form the RDL layer The substrate with nickel lines obtained in step S7 is subjected to chemical gold plating using a cyanide-free gold plating process.

[0042] The substrate is immersed in a cyanide-free sulfite gold plating solution. The main component of the solution is sodium gold sulfite (Na3[Au(SO3)2]) 5-10 g / L (calculated as gold), with sodium sulfite (Na2SO3) as a stabilizer. The pH value is controlled at 8.0-9.0, and the temperature is 60-70°C. The deposition time is approximately 15-30 minutes.

[0043] The above description is merely a preferred embodiment of the present invention and does not limit the implementation and protection scope of the present invention. Those skilled in the art should realize that any equivalent substitutions and obvious changes made based on the content of the present invention specification should be included within the protection scope of the present invention.

Claims

1. A method for fabricating a TGV substrate based on UTG, characterized in that, Includes the following steps: S1, A transparent polymer protective film is coated on the surface of the UTG substrate; S2, a femtosecond laser is used to scan the UTG substrate through the polymer protective film, burn through the protective film to form a window to expose the glass, and induce the formation of modified columnar regions inside the UTG; S3, the laser-modified UTG substrate is immersed in an etching solution, and the etching solution selectively etches the modified area through the window to form a through hole; S4, remove the remaining polymer protective film to obtain a UTG substrate with through holes; S5, a patterned polymer protective layer is formed again on the surface of the UTG substrate to expose the circuit areas and hole walls that need to be metallized; S6, Perform pretreatment and electroless nickel plating on the exposed circuit area and hole wall to form a nickel layer; S7, Remove the patterned polymer protective layer formed in step S5, leaving the designed nickel circuit pattern; S8 involves performing cyanide-free chemical gold plating on a substrate with nickel lines to form an RDL layer.

2. The preparation method according to claim 1, characterized in that, The polymer protective film mentioned in S1 is polyimide with a thickness of 5μm~10μm; when removing the protective film in S4, it is soaked in a 5% sodium hydroxide solution at 50~60°C for 20~30 minutes.

3. The preparation method according to claim 1, characterized in that, The parameters of the femtosecond laser in S2 are set as follows: center wavelength 1030nm, pulse width 300fs, repetition frequency 200kHz, and power 5~10mW; the laser first burns through the polymer protective film and then focuses on the interior of the UTG to form a modified region.

4. The preparation method according to claim 1, characterized in that, The etching solution described in S3 is a mixture of 10% HF solution and 5% hydrochloric acid, with the temperature controlled at 25°C. During the etching process, due to the presence of the protective film, the etching solution only acts inside the hole, and the UTG surface does not experience thinning or damage.

5. The preparation method according to claim 1, characterized in that, The patterned polymer protective layer described in S5 is formed by photosensitive polyimide or dry film photoresist through photolithography, with a thickness of 5-15 μm. The protective layer covers the non-circuit area, keeping the area around the aperture and the aperture wall exposed.

6. The preparation method according to claim 1, characterized in that, The pretreatment for electroless nickel plating in S6 includes: Roughening: Immerse the substrate in concentrated sulfuric acid and treat at room temperature for 1-3 minutes; Sensitization: Immerse in a sensitization solution, the formulation of which is 10 g / L stannous chloride and 40 ml / L hydrochloric acid, and soak for 5 minutes at room temperature; Activation: Immerse in an activation solution, the formulation of which is 0.5 g / L palladium chloride and 10 ml / L hydrochloric acid, and soak for 5-10 minutes at room temperature.

7. The preparation method according to claim 1, characterized in that, The electroless nickel plating solution formula described in step S6 is as follows: 25 g / L nickel sulfate, 30 g / L sodium hypophosphite, 20 ml / L lactic acid, pH value adjusted to 4.5~5.0, temperature controlled at 85~90°C, and deposition time of 30~60 minutes.

8. The preparation method according to claim 1, characterized in that, The cyanide-free electroless gold plating described in S8 uses a cyanide-free sulfite gold plating solution. The main component of the plating solution is sodium gold sulfite at 5-10 g / L, with sodium sulfite acting as a stabilizer. The pH value is controlled at 8.0-9.0, the temperature at 60-70°C, and the deposition time at 15-30 minutes.

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