Electroacoustic resonator with modified charge trapping region

Abstract

Aspects of an electroacoustic resonator having a modified charge trapping region are provided. In one aspect, a device includes a substrate layer; a rich well layer disposed on the substrate layer having a thickness of less than or equal to 200 nanometers (nm); a dielectric layer disposed on the rich well layer; a piezoelectric layer disposed on the dielectric layer; and an interdigital transducer formed in a metal layer disposed on the piezoelectric layer.

Description

Technical Field

[0001] This disclosure relates in general to electronic communications. For example, aspects of this disclosure relate to electroacoustic resonators, and more specifically to improving device performance using updated charge trapping layers (e.g., well-rich layers). Background Technology

[0002] Electronic devices include traditional computing devices such as desktop computers, laptops, tablets, smartphones, wearable devices such as smartwatches, and internet servers. These diverse electronic devices provide human users with information, entertainment, social interaction, security, safety, productivity, transportation, manufacturing, and other services. Many of the functions of these various electronic devices rely on wireless communication. Wireless communication systems and devices are widely deployed to provide various types of communication content, such as voice, video, packet data, messaging, and broadcasting.

[0003] Electronic devices can support communication with multiple users by sharing available communication resources (e.g., time, frequency, and power). Examples of communication protocols include Code Division Multiple Access (CDMA) systems, Time Division Multiple Access (TDMA) systems, Frequency Division Multiple Access (FDMA) systems, and Orthogonal Frequency Division Multiple Access (OFDMA) systems (e.g., Long Term Evolution (LTE) systems or New Radio (NR) systems).

[0004] The wireless communication transceivers used in these electronic devices typically include multiple radio frequency (RF) filters for filtering signals at specific frequencies or frequency ranges. Electroacoustic devices (e.g., "acoustic filters") are used in many applications to filter high-frequency (e.g., typically greater than 100 MHz) signals. Using piezoelectric materials as the vibrating medium, acoustic resonators operate by converting electrical signal waves propagating along an electrical conductor into sound waves propagating via the piezoelectric material. Sound waves propagate at speeds much smaller than the propagation speed of electromagnetic waves. Generally, the propagation speed of a wave is proportional to its wavelength. Therefore, after converting an electrical signal into an acoustic signal, the wavelength of the acoustic signal wave is significantly smaller than the wavelength of the electrical signal wave. The resulting smaller wavelength of the acoustic signal allows for the use of smaller filter devices to perform filtering. This permits the use of acoustic resonators in electronic devices with size constraints, such as those listed above (e.g., specifically portable electronic devices such as cellular phones). Summary of the Invention

[0005] Systems, apparatus, methods, and computer-readable media for electroacoustic resonators with modified thin charge-trapping regions are disclosed.

[0006] According to at least one example, a device is provided. The device includes a resonator configured for resonance associated with a resonant wavelength, the resonator comprising: a conductive substrate layer; a rich-well layer disposed on the conductive substrate layer, the rich-well layer having a thickness less than or equal to 0.125 times the resonant wavelength; a dielectric layer disposed on the rich-well layer; a piezoelectric layer formed on the dielectric layer; and an interdigital transducer formed in a metal layer disposed on the piezoelectric layer.

[0007] According to another example, a method is provided. The method includes depositing a well-rich layer on a high-resistivity silicon substrate, wherein the well-rich layer is deposited to a thickness of less than or equal to 200 nanometers (nm); forming a dielectric layer on the well-rich layer; forming a piezoelectric layer on the dielectric layer; and forming an interdigital transducer on the piezoelectric layer.

[0008] According to another example, a device is provided. The device includes a substrate layer; a rich well layer disposed on the substrate layer having a thickness of less than or equal to 200 nanometers (nm); a dielectric layer disposed on the rich well layer; a piezoelectric layer disposed on the dielectric layer; and an interdigital transducer formed in a metal layer disposed on the piezoelectric layer.

[0009] Some of these aspects are configured such that the thickness of the well-rich layer is greater than or equal to 10 nm.

[0010] Some of these aspects are configured such that the well-rich layer includes aluminum nitride.

[0011] Some of these aspects are configured such that the well-rich layer includes Si3N4.

[0012] Some of these aspects are configured such that the well-rich layer includes Al2O3.

[0013] Some of these aspects are configured as their dielectric layer, including SiO2.

[0014] Some of these aspects also include a SiON layer disposed on the dielectric layer.

[0015] Some of these aspects are configured such that the substrate layer includes polycrystalline silicon.

[0016] Some of these aspects are configured such that the substrate layer includes low-cost, high-resistivity silicon.

[0017] Some of these aspects are configured such that the thickness of the well-rich layer is selected to reduce out-of-band stray modes while limiting the thickness of the well-rich layer.

[0018] Some of these aspects are configured such that the interdigitated transducer includes: a first busbar; a second busbar; and a first plurality of electrode fingers and a second plurality of electrode fingers, the first plurality of electrode fingers extending from the first busbar toward the second busbar, the second plurality of electrode fingers extending from the second busbar toward the first busbar, the second plurality of electrode fingers being interdigitated with the first plurality of electrode fingers.

[0019] In some respects, one or more of the devices described herein are, are part of, and / or include the following devices: mobile devices (e.g., mobile phones and / or mobile cell phones and / or so-called "smartphones" or other mobile devices), extended reality (XR) devices (e.g., virtual reality (VR) devices, augmented reality (AR) devices, or mixed reality (MR) devices, head-mounted display (HMD) devices, vehicles or computing systems, devices, or components of vehicles, wearable devices (e.g., network-connected watches or other wearable devices), wireless communication devices, cameras, personal computers, laptop computers, server computers, another device, or combinations thereof.

[0020] This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to be used in isolation to define the scope of the claimed subject matter. This subject matter should be understood with reference to the appropriate portions of the entire specification, any or all drawings, and each claim.

[0021] The foregoing and other features and aspects will become more apparent from the following description, claims and accompanying drawings. Attached Figure Description

[0022] Figure 1A This is a perspective view of an example of an electroacoustic resonator.

[0023] Figure 1B yes Figure 1A A side view of an electroacoustic resonator.

[0024] Figure 2A This is a top-view illustration of an example electrode structure for an electroacoustic resonator.

[0025] Figure 2B This is a top-view illustration of an example electrode structure for an electroacoustic resonator.

[0026] Figure 3A This is a perspective view of another example of an electroacoustic resonator.

[0027] Figure 3B yes Figure 3A A side view of an electroacoustic resonator.

[0028] Figure 4 This is a diagram showing an example electrode structure of an interdigital transducer (IDT) that can be used in a device containing a SAW resonator with a modified charge trapping region, based on the aspects described herein.

[0029] Figure 5 This is a diagram illustrating the stacking of resonator materials, including the thin well-rich layer, based on the aspects described in this article.

[0030] Figure 6 This is a diagram illustrating various aspects of a resonator material stack operating according to the aspects described herein.

[0031] Figure 7A This is a performance graph illustrating the performance differences between an example thick polycrystalline silicon well-rich layer and a thin AlN well-rich layer, based on some aspects described herein.

[0032] Figure 7B This is a performance graph illustrating the performance differences between an example thick polycrystalline silicon well-rich layer and a thin AlN well-rich layer, based on some aspects described herein.

[0033] Figure 8A This is a performance graph illustrating the performance differences between well-rich layers based on some aspects described in this paper.

[0034] Figure 8B This is a performance graph illustrating the performance differences between well-rich layers based on some aspects described in this paper.

[0035] Figure 9 This is a flowchart illustrating the operation method of the disclosed electroacoustic device according to the example described herein.

[0036] Figure 10 This is a schematic diagram of an example filter that can be used with the disclosed electroacoustic device according to the examples described herein.

[0037] Figure 11 This is a functional block diagram of at least a portion of a simplified example of a wireless transceiver circuit based on the examples described herein, in which the electroacoustic devices disclosed herein may be employed.

[0038] Figure 12 This is a diagram illustrating an environment including an electronic device, such as a wireless transceiver, as described in the examples herein. Figure 11 The transceiver circuit. Detailed Implementation

[0039] The detailed description set forth below in conjunction with the accompanying drawings is intended as a description of exemplary embodiments and is not intended to represent the only specific embodiments in which the invention may be practiced. The detailed description includes specific details of aspects for describing devices (e.g., surface acoustic wave (SAW) devices) having a configuration having a material stack including a thin charge trapping layer (also known as a well-rich layer).

[0040] Electroacoustic devices (e.g., “acoustic filters”) are used in many applications to filter high-frequency (e.g., typically greater than 100 MHz) signals. Electroacoustic filters are tuned to allow certain frequencies (e.g., frequencies within their passband) to pass through and to attenuate other frequencies (e.g., frequencies outside their passband). Using piezoelectric materials as the vibrating medium in the transducer, acoustic filters operate by converting an electrical signal wave propagating along an electrical conductor into an acoustic wave (e.g., an acoustic signal wave) formed on the piezoelectric material. The acoustic wave is then converted back into an electrically filtered signal. Specifically, such electroacoustic devices are used in the cellular communications market. Within the cellular market, the market for wearable devices is growing at a very high rate. The aspects described herein offer improvements to such wearable devices, where very lightweight and small devices with very high efficiency are preferred over devices that consume more power.

[0041] Considering the space value and reduced size of wireless communication devices, components within such devices are designed to be as close as possible while maintaining acceptable performance. Due to the close proximity of electroacoustic resonators, coupling between devices can occur, thus degrading device performance. Adding additional space between devices to limit coupling is not a preferred solution, as this increases device size. Additionally, material thickness and type can affect parasitic coupling, cost, and space utilization, thereby impacting overall device performance.

[0042] The aspects described herein include resonators with thin, well-rich regions that offer improvements over existing resonator stacks with thicker well-rich regions by providing acceptable coupling performance while enabling lower-cost stacking structures and materials. While existing well-rich layer materials exhibit degraded performance with decreasing thickness, the aspects described herein offer unexpected benefits by achieving acceptable performance using materials with thin well-rich layers. Therefore, the aspects described herein enable use in carrier aggregation applications due to improved electrical and acoustic performance. Furthermore, in some aspects, a carrier substrate with lower resistivity is used due to improved electrical characteristics.

[0043] For example, in some aspects, thin aluminum nitride (AlN) layers can be used as rich well layers with thicknesses ranging from approximately 500 nanometers (nm) to 2500 nm, compared to existing rich well layers. Such thin AlN layers functioning as rich well layers allow for the fabrication of AlN rich well layers on lower-cost high-performance silicon (HRSi) silicon when compared to expensive engineered silicon substrates. Additionally, the deposition process for thin AlN rich well layers can be performed with greater thickness control and lower cost than existing rich well layer fabrication methods (e.g., using thicker AlN layers or thicker layers of other materials as rich well layers).

[0044] Additional control over well-rich layer deposition can enable more specific design trade-offs between thickness and suppression of out-of-band stray modes that the well-rich layer is designed to suppress, including in thin well-rich layers made of materials other than AlN.

[0045] Various aspects of this disclosure will be described with reference to the figures.

[0046] Figure 1A This is a perspective view of an example of an electroacoustic transducer 100. The electroacoustic transducer 100 can be configured as a SAW resonator or as part of it. In some descriptions herein, the electroacoustic transducer 100 may be referred to as a SAW resonator. The electroacoustic transducer 100 includes an electrode structure 104, which may be referred to as an interdigital transducer (IDT), located on the surface of a piezoelectric material 102. The electrode structure 104 typically includes a first comb-shaped electrode structure and a second comb-shaped electrode structure (conductive and typically metallic), wherein electrode fingers extend from two busbars toward each other and are arranged in an interlocking manner between the two busbars (e.g., in an interdigital arrangement). An electrical signal excited (e.g., by applying an AC voltage) in the electrode structure 104 is converted into an acoustic wave 106, which propagates in a specific direction via the piezoelectric material 102. The acoustic wave 106 is converted back into an electrical signal and provided as an output. In many applications, the piezoelectric material 102 has a specific crystal orientation such that when the electrode structure 104 is arranged relative to the crystal orientation of the piezoelectric material 102, the acoustic waves propagate primarily in a direction perpendicular to the fingers (e.g., parallel to the generatrix).

[0047] Figure 1B yes Figure 1A Electroacoustic transducer 100 along Figure 1AA side view of section 107 is shown. The electroacoustic transducer 100 is exemplified by a simplified layer stack comprising a piezoelectric material 102, wherein an electrode structure 104 is disposed on the piezoelectric material 102. The electrode structure 104 is conductive and is typically formed of a metallic material. The piezoelectric material may be formed of a variety of materials such as quartz, lithium tantalate (LiTaO3), lithium niobate (LiNbO3), doped variants of these materials, or other piezoelectric materials. It should be understood that more complex layer stacks (e.g., four (4) layers, six (6) layers, etc.) comprising layers of various materials are possible within this stack. For example, alternatively, a temperature compensation layer 108 (indicated by dashed lines) may be disposed above the electrode structure 104. The piezoelectric material 102 may be extended with multiple interconnected electrode structures disposed thereon to form a multi-resonator filter or to provide multiple filters. Although not illustrated, a capping layer may be disposed above the electrode structure 104 when disposed as an integrated circuit component. A capping layer is applied to form a cavity between the electrode structure 104 and the lower surface of the capping layer. Electrical vias or bumps may also be included to allow electrical connection of components to a connector on the substrate (e.g., via flip chip or other technologies).

[0048] Figure 2A This is a top view of an example of the electrode structure 204a of an electroacoustic transducer 100, which is configured with two reflectors 228 in a non-DMS configuration. Figure 2A A single-port configuration is generally illustrated. Electrode structure 204a has an IDT 205, which includes a first busbar 222 (e.g., a first conductive segment or conductive trunk) electrically connected to a first terminal 220 and a second busbar 224 (e.g., a second conductive segment or conductive trunk) spaced apart from the first busbar 222 and connected to a second terminal 230. A plurality of conductive fingers 226 are interdigitatedly connected to the first busbar 222 or the second busbar 224. The fingers 226 connected to the first busbar 222 extend toward the second busbar 224 but are not connected to the second busbar 224, such that a small gap exists between the ends of these fingers 226 and the second busbar 224. Similarly, the fingers 226 connected to the second busbar 224 extend toward the first busbar 222 but are not connected to the first busbar 222, such that a small gap exists between the ends of these fingers 226 and the first busbar 222.

[0049] Along a shared line parallel to generatrices 222 and 224, there exists an overlapping region comprising a central region (as illustrated by central region 225) where a portion of one of the fingers overlaps with a portion of an adjacent finger. This overlapping central region 225 may be referred to as an orifice, track, or active region, where an electric field is generated between the fingers 226 to allow sound waves to propagate in the piezoelectric material 102. The periodicity of the fingers 226 is referred to as the pitch of the IDT. The pitch can be indicated in various ways. For example, in some aspects, the pitch may correspond to the magnitude of the distance between the fingers in the central region 225. This distance may be defined, for example, as the distance between the center points of each of these fingers (and, when the fingers have a uniform thickness, is typically measured between the right (or left) edge of a finger and the right (or left) edge of an adjacent finger). As described herein, a "higher" pitch refers to a segment of the IDT where the electrode fingers have a larger distance between adjacent electrode fingers, while a "lower" pitch refers to a segment of the IDT where the electrode fingers have a smaller distance between adjacent electrode fingers. In some respects, the average distance between adjacent fingers can be used as the pitch. A given pitch characteristic that gives the electrode fingers in some segments of the IDT a different pitch characteristic than that in other segments of the IDT will allow selection or control of the signal (e.g., a wave) propagating through that IDT. The frequency of the piezoelectric material's vibration is the self-resonant (also called "master resonance") frequency of the electrode structure 204a. This frequency is determined at least in part by the pitch of the IDT 205 and other characteristics of the electroacoustic transducer 100.

[0050] In some examples, the pitch characteristics of the IDT segments can be constant pitch, meaning the pitch does not vary significantly across the IDT segments (e.g., the variation is within manufacturing tolerances and designed for a constant average pitch). In other examples, the pitch characteristics of the IDT segments can include “chirped” pitch, meaning the pitch varies across the IDT segments in a predefined manner. For example, a chirped pitch can include an IDT segment where the pitch is designed to vary linearly across the IDT segment such that the pitch at one end of the IDT segment is a first value, the pitch at the opposite end of the IDT segment is a second value, and the pitch (e.g., the distance between electrode fingers) varies linearly between the two ends of the IDT segment. In other examples, other non-linear variations in the pitch values ​​across the IDT segments can be used. By combining IDT segments with different pitch characteristics (e.g., a constant pitch at a first value and a constant pitch at a second value, or a constant pitch at a first value in one IDT segment and a chirped pitch across a second IDT segment), resonator characteristics can be designed for a given performance as described herein.

[0051] An IDT 205 is arranged between two reflectors 228 that reflect sound waves toward the IDT 205 to convert the sound waves into electrical signals via the IDT 205 in the illustrated configuration, and to prevent losses (e.g., limiting and preventing sound wave escape). Each reflector 228 has two buses along a shared line, each having a corresponding bus for the IDT 205 and a grating structure of conductive fingers connected to the two buses, respectively. The pitch of the reflectors may be similar to or the same as the pitch of the IDT 205 to reflect sound waves within the resonant frequency range. However, many configurations are possible.

[0052] When the signal is converted back to an electrical signal, the admittance or reactance measured between the two terminals (i.e., the first terminal 220 and the second terminal 230) is used as the signal for the electroacoustic transducer 100.

[0053] Figure 2B This is a top-view view of another example of an electrode structure 204b for an electroacoustic device. In this case, the electrode structure 204b includes a central IDT and a reflector 228 connected as illustrated herein. The electrode structure 204b is provided to illustrate various electrode structures and structural connectors that can be used according to the aspects described herein.

[0054] It should be understood that although a certain number of fingers 226 are illustrated, the actual number of fingers, as well as the length and width of the fingers 226 and the busbars, may differ in actual implementations. These parameters depend on the specific application of the filter and the desired frequency. Furthermore, the SAW filter may include multiple interconnect electrode structures, each including multiple IDTs to achieve the desired passband (e.g., multiple interconnect resonators or IDTs to form the desired filter transfer function).

[0055] Figure 3A This is a perspective view of another example of an electroacoustic device 300. The electroacoustic device 300 (e.g., which may be configured as a SAW resonator or part thereof) is similar to... Figure 1A An electroacoustic transducer 100, but with a different layer stack. Specifically, the electroacoustic device 300 includes a thin piezoelectric material 302 provided on a substrate 310 (e.g., silicon). The type of piezoelectric material 302 used (e.g., typically relative to...) determines the specific characteristics of the transducer. Figure 1A The electroacoustic transducer 100 has a higher coupling factor and a controlled thickness of the piezoelectric material 302, and the specific acoustic wave modes excited can be... Figure 1A The acoustic modes in the electroacoustic transducer 100 are slightly different. Based on the design (layer thickness and material selection, etc.), and... Figure 1A Compared to the electroacoustic transducer 100, the electroacoustic device 300 can have a higher Q factor. The piezoelectric material 302 can be, for example, lithium tantalate (LiTaO3) or some doped variant. Figure 3AAnother example of the piezoelectric material 302 may be lithium niobate (LiNbO3). Generally, the substrate 310 may be substantially thicker than the piezoelectric material 302 (for example, it may be about 50 to 100 times thicker, or more times thicker). The substrate 310 may include other layers, such as 310-1, 310-2, and 310-3 (or other layers may be included between the substrate 310 and the piezoelectric material 302).

[0056] Figure 3B yes Figure 3A A side view of an electroacoustic device 300 is shown, illustrating an example of a layer stack including a well-rich layer 310-2 (along section 307). As described herein, existing device structures include well-rich layers to suppress parasitic resonances. Such resonances can be specifically caused by the use of certain materials with parasitic surface conductivity properties, as discussed below. Figure 6 The attached details describe the following. Existing systems use higher-cost substrate materials (e.g., engineered polysilicon) to address parasitic resonance problems and use a specific thickness of this material (e.g., 500 nm or more) to reduce the amount of charge contributing to parasitic surface conduction and / or increase the number of holes or traps that can be used to prevent conductive layer charge from participating in parasitic surface conduction. The aspects described herein include material layers that provide an unexpectedly high number of traps at a thinner material level, thereby allowing the use of thinner well-rich layers in conjunction with substrate materials having a larger number of charges, thus utilizing the thinner well-rich layers to result in reduced parasitic surface conduction.

[0057] exist Figure 3B In the aspects shown, substrate 310 may include sublayers that may have higher resistance (e.g., relative to other layers—high resistivity layers), such as substrate sublayer 310-1 (e.g., made of silicon). Substrate 310 may also include well-rich layer 310-2 (e.g., a dielectric film with high acoustic velocity). Substrate 310 may also include compensation layers (e.g., silicon dioxide (SiO2) or another dielectric material) that can provide temperature compensation and other properties. These sublayers may be considered as part of substrate 310 or as separate layers on their own. A relatively thin piezoelectric material 302 is provided on substrate 310 at a specific thickness to provide a specific acoustic mode (e.g., with...). Figure 1A Compared to the electroacoustic transducer 100, the thickness of the piezoelectric material 102 is not a critical design parameter exceeding a certain thickness, and with... Figure 3A and Figure 3B The piezoelectric material 302 of the electroacoustic device 300 may be thicker than it would typically be. The electrode structure 304 is positioned above the piezoelectric material 302. In addition, in some aspects, one or more layers (not shown) (e.g., a thin passivation layer) may be present above the electrode structure 304.

[0058] Based on the type, thickness, and overall layer stacking of the piezoelectric material, the electromechanical coupling to the electrode structure 304 and the sound velocity within the piezoelectric material in different regions of the electrode structure 304 can vary between different types of electroacoustic devices, such as... Figure 1A Electroacoustic transducer 100 and Figure 3A and Figure 3B The electroacoustic devices vary among the 300 models.

[0059] Figure 4 This is a schematic diagram of an example electrode structure 400 for an interdigital transducer (IDT) that can be used in a SAW resonator according to the aspects described herein. As described above, electrode structure 400 may be referred to as an IDT, which may be fabricated on the surface of a piezoelectric material as part of a resonator. Electrode structure 400 includes a first comb electrode and a second comb electrode. The comb teeth are within a track 429 and are supported by a busbar 402 on one side and a busbar 404 on the other side, wherein barriers 428A, 428B separate the track 429 from the busbars 402, 404. An electrical signal excited across the resonator by an electrical signal at input node 401 is converted into an acoustic wave propagating within the resonator (specifically within track 429). The acoustic wave is converted back into an electrical signal at output node 411. An external reflector (e.g., reflector 228, Figure 4 (Not shown in the image) will have a similar configuration, but without barriers 428A and 428B, so that each finger of the reflector is coupled across the track region to connect to the two busbars.

[0060] Figure 5 This is a side view of the layer stack of an electroacoustic device 500. Specifically, the electroacoustic device 500 is a SAW resonator having a resonator stack including a thin well-rich layer, according to aspects described herein. The multiple layers in the resonator stack include a piezoelectric thin film layer (PL) 504, a compensation layer (CL) 503, a substrate (SU) 501, and a well-rich layer 502. The electroacoustic device 500 also includes an electrode structure layer (EL) 505 (e.g., a metallization layer) located above the piezoelectric thin film layer 504. The device may also include a passivation layer (not shown) above the piezoelectric layer 504 and the electrode structure layer 505. For the electroacoustic device 500, the piezoelectric thin film layer 504 may, in some respects, comprise lithium tantalate (LiTaO3). In other respects, other piezoelectric materials may be used. Figure 5 It also includes a table containing exemplary thicknesses of each layer of the electroacoustic device 500 relative to the wavelength (λ) of resonance of the electroacoustic device 500. The table additionally indicates that the well-rich layer is a thin layer having a thickness of less than 200 nm or less than about 0.125λ.

[0061] In various aspects, the material (e.g., crystalline material) and cut of the piezoelectric thin film layer 504 can be selected such that performance parameters of the electroacoustic device 500 (such as, the k2 mass and TCF of the primary mode) meet specific device criteria. In one or more examples, the piezoelectric thin film layer 504 includes lithium tantalate or lithium niobate, which has Euler angles specifically selected for a given device performance. In one or more examples, the piezoelectric thin film layer 504 includes a thickness x, where 0.1λ < x < 0.6λ, and where λ is the wavelength of the acoustic primary mode within the piezoelectric thin film layer 504 of the electroacoustic device 500. Similarly, the passivation layer can have a thickness of about 0.005λ, the IDT metallization layer 505 can have a thickness of about 0.075λ, the rich well layer 502 can have a thickness between about 0.01λ and 0.125λ or between about 10 nm and 200 nm, and the compensation layer can have a thickness of about 0.25λ or a thickness y, where 0.05λ < y < 0.5λ. In other aspects, the layers other than the rich well layer 502 can have other thicknesses. As described in more detail below, while polysilicon is a known material for the rich well layer that operates at thicknesses greater than 200 nanometers (nm) and typically at thicknesses of 500 nm or higher, the aspects described herein include alternative materials for the rich well layer 502, such as AlN, Si3N4, and Al2O3. Such materials show unexpected benefits in maintaining performance effectiveness at the implementation of thinner rich well layers below 200 nm or less than about 0.125λ, where polysilicon at such thicknesses suffers significant performance degradation when implemented as the rich well layer 502 at such thicknesses.

[0062] The electrode structure layer 505 of the disclosed electroacoustic device 500 can include a conductive material. For example, the electrode structure layer 505 can include a layered structure that includes aluminum (Al) as a main component of the layered structure and has a thickness b, where 0.05λ < b < 0.25λ. (For example, the thickness b is greater than or equal to 0.05 times the resonant wavelength and less than or equal to 0.25 times the resonant wavelength). In one or more examples, the electrode structure layer 505 can include a layer structure that includes aluminum and has a layer thickness of 150 nm. In other examples, the electrode structure layer 505 can be a "heavy electrode" to reduce the speed of the electroacoustic device 500. For these examples, the electrode structure layer 505 can include a copper (Cu)-based electrode system having one or more layers, or can include a single "heavy layer" containing tungsten (W), molybdenum (Mo), titanium (Ti), and / or platinum (Pt).

[0063] In one or more examples, one or more dielectric passivation layers may be applied to the top of the electrode structure layer 505. As an example, each dielectric passivation layer may have a thickness d, where 0.0025λ < d < 0.2λ. The dielectric passivation layer may include silicon nitride, silicon dioxide, silicon oxynitride (SiON), and / or aluminum oxide (Al2O3). In one or more examples, the dielectric passivation layer may include silicon nitride with a thickness of 10 nm.

[0064] Figure 6 FIG. is an illustration of aspects of a resonator material stack 600 that exemplifies the operation of a rich well layer in accordance with aspects described herein. Figure 6 The resonator material stack 600 includes a substrate layer 630, a thin rich well accumulation layer 620, and a substrate layer 610. These may be, for example, similar to the layers 310-1, 310-2, and 310-3 and the layers 501, 502, and 503 described above. Additional layers (including a piezoelectric layer and an IDT metallization layer) are not shown in Figure 6 but are part of a resonator device in accordance with aspects described herein as detailed and illustrated above.

[0065] As further illustrated, the substrate layer 610 includes fixed charges 611, and the substrate layer 630 includes mobile charges 631. When the substrate layer 630 is formed of HR silicon and the substrate layer 610 is formed of SiO2, the magnitude of the mobile charges 631 results in parasitic surface conduction related to the fixed charges 611 of the substrate layer. This parasitic surface conduction results in losses due to electrical crosstalk. The presence of the rich well accumulation layer 620 generates trapped charges 621 from the mobile charges 631 and reduces the effect of this electrical crosstalk, thereby improving the performance of the resonator device.

[0066] As indicated above, previous embodiments of the rich well accumulation layer used materials with a thickness of about 0.25λ or greater than 500 nm to reduce parasitic surface conduction. Polysilicon, specifically when used as a rich well layer, loses effectiveness in reducing parasitic surface conduction below 500 nm due to the lack of sufficient trap structures in the reduced-thickness material to handle the interaction between the fixed charges 611 of the substrate layer 610 and the mobile charges 631 of the substrate layer 630. Existing systems have been structured in any of the following ways: using a thicker layer of a rich well layer with a lower-cost material (such as HR silicon) as the substrate layer 630, using a slightly thinner material layer in a rich well layer with a higher-cost material (such as engineered silicon), or utilizing a design that tolerates a reduction in performance due to electrical crosstalk.

[0067] Studies of the performance of rich well layers of materials including polysilicon, aluminum nitride (AlN), Si3N4, and Al2O3 have confirmed that while polysilicon as used for Figure 5The described example layer stacks of well-rich layer materials below 200 nm lose their effectiveness, but AlN, Si3N4, and Al2O3 retain performance effectiveness in thinner well-rich layer implementations. This performance of AlN, Si3N4, and Al2O3 is an unexpected result when extrapolated from the performance of polysilicon in thinner well layer implementations.

[0068] Figure 7A This is a performance figure 700 illustrating the performance differences between an example thin polycrystalline silicon well-rich layer and a thin AlN well-rich layer according to some aspects described herein. As indicated above, polycrystalline silicon is the standard material for specific implementations of well-rich layers with thicknesses greater than 500 nm. Figure 7A , Figure 7B , Figure 8A and Figure 8B This is a graph of the admittance magnitude on the y-axis versus the frequency on the x-axis. Figure 7A In Figure 700, polysilicon performance 701 and AlN performance 702 are specifically implemented in a thin well-rich layer. Polysilicon performance 701 includes resonant spikes that lead to significant performance degradation, while AlN performance 702, although subject to passband ripples at out-of-band frequencies, does not include the significant performance degradation from the out-of-band spikes seen in polysilicon performance 701.

[0069] Figure 7B This includes performance chart 710, which is similar to performance chart 700. Figure 7B Performance Figure 710 illustrates the performance difference between a 200 nm polysilicon layer and a 200 nm AlN layer when used as a well-rich layer. Performance Figure 710 includes 200 nm polysilicon performance 711 and 200 nm AlN performance. As shown in Performance Figure 700, AlN performance 712 does not include the significant performance degradation from the out-of-band spikes seen in 200 nm polysilicon performance 711.

[0070] Figure 8A Performance graph 800 includes example performance data illustrating four different well-rich layer materials. This performance graph includes polycrystalline silicon performance 801, AlN performance 802, Si3N4 performance 803, and Al2O3 performance 804. Figure 8A Examples are shown in Figure 8B The area 810 is shown in more detail below.

[0071] Figure 8B Including from Figure 8A The performance graph 800 is a magnified image of region 810. As illustrated, the performance of Al2O3 804 and Si3N4 803 is almost identical, and the performance of AlN 802 does not include the resonant spikes seen in the performance of Si3N4 803, polysilicon 801 and Al2O3 804.

[0072] Figure 9This is a flowchart illustrating an example method 900 performed by a device including a resonator according to the aspects described herein. Method 900 is described in the form of a set of blocks specifying operable operations. However, the operations are not necessarily limited to... Figure 9 The order shown or described herein is not applicable, as these operations can be implemented in an alternative order or in a manner that is wholly or partially overlapping. Furthermore, more, fewer, and / or different operations can be implemented to perform method 900 or alternative processes. In some aspects, method 900 can be performed by a device including circuitry configured for the operation of method 900. In some aspects, control circuitry of the device or one or more processors can be configured to perform the operations. In some aspects, method 900 can be implemented as instructions in a non-transitory computer-readable storage medium that, when executed by one or more processors of the device, cause the device to perform the operations of method 900.

[0073] At block 902, method 900 includes depositing a well-rich layer on a high-resistivity silicon substrate, wherein the well-rich layer is deposited to a thickness of less than or equal to 200 nanometers (nm). In some aspects, the well-rich layer is deposited to a thickness of greater than or equal to 10 nm.

[0074] At block 904, method 900 includes forming a dielectric layer on the well-rich layer. At block 906, method 900 includes forming a piezoelectric layer on the dielectric layer. At block 908, method 900 includes forming an interdigital transducer on the piezoelectric layer.

[0075] As described herein, in some respects, well-rich layers comprise aluminum nitride, and AlN with a thickness between 10 nm and 200 nm (inclusive) can provide performance sufficient for many applications while offering space and fabrication benefits.

[0076] Additionally, in some aspects, the well-rich layer comprises Si3N4 or Al2O3. In other aspects, method 900 can be modified according to any device described herein, or modified using repeated, intermediate, or combined operations to manufacture multiple devices or combined devices.

[0077] Figure 10 This is a schematic diagram of an example filter 1000 based on various aspects described herein, which may employ multiple resonators on a shared piezoelectric surface, including SAW resonators with modified charge trapping regions. The filter 1000 includes a trapezoidal arrangement of acoustic SAW resonators Rs and Rp (where Rs is a series resonator and Rp is a parallel resonator).

[0078] The trapezoidal structure of filter 1000 comprises multiple basic segments. Each basic segment includes at least one series resonator Rs and at least one parallel resonator Rp. The required number of basic segments to achieve the desired selectivity are connected in series. Series resonators Rs belonging to adjacent basic segments can be combined into a common series resonator Rs, and parallel resonators Rp can also be combined if they are directly adjacent and belong to different basic segments. A basic segment provides a basic filter. More basic segments can be added to provide sufficient selectivity associated with the specific resonators used in that segment.

[0079] Figure 11 This is a functional block diagram of at least a portion of an example of a simplified wireless transceiver circuit 1100, in which resonators on a shared piezoelectric surface may be employed, including SAW resonators with modified charge-trapping regions according to aspects described herein. The transceiver circuit 1100 is configured to receive signals / information (shown as I and Q values) for transmission, which are provided to one or more baseband filters 1112. The filtered output is provided to one or more mixers 1114. The output from the one or more mixers 1114 is provided to a driver amplifier 1116, the output of which is provided to a power amplifier 1118 to generate an amplified signal for transmission. The amplified signal is output to an antenna 1122 via one or more filters 1120 (e.g., a duplexer (if used as a frequency division duplex transceiver) or other filters). The one or more filters 1120 may include the disclosed DMS resonator. The antenna 1122 can be used for both wirelessly transmitting and receiving data. Transceiver circuit 1100 includes the following receiving path: before the signal is further processed (e.g., provided to an analog-to-digital converter and then demodulated or otherwise processed in the digital domain), it is passed through one or more filters 1120 to be supplied to a low-noise amplifier (LNA) 1124 and an additional filter 1126, and then down-converted from the receiving frequency to the baseband frequency by one or more mixer circuits 1128. Separate filters for the receiving circuit may be available, implemented using resonators including SAW resonators with modified charge-trapping regions according to the aspects described herein (e.g., the receiving circuit may have a separate antenna or a separate receiving filter).

[0080] Figure 12 This is a diagram of an environment 1200 including electronic device 1202, which includes wireless transceiver 1296, such as Figure 11The transceiver circuit 1100. In some aspects, electronic device 1202 includes a display screen 1299, which can be used to display information associated with data transmitted via wireless link 1206 and processed using components of electronic device 1202 as described below. Other aspects of electronic devices using low-phase delay filters for multi-band communication according to the aspects described herein may not be configured with a display screen. In environment 1200, electronic device 1202 communicates with base station 1204 via wireless link 1206. As shown, electronic device 1202 is depicted as a smartphone. However, electronic device 1202 can be implemented as any suitable computing electronic device or other electronic device, such as a cellular base station, broadband router, access point, cellular or mobile phone, gaming device, navigation device, media device, laptop computer, desktop computer, tablet computer, server computer, network attached storage (NAS) device, smart appliance, automobile including vehicle-based communication systems, Internet of Things (IoT) devices, sensors or security devices, asset trackers, etc.

[0081] Base station 1204 communicates with electronic device 1202 via wireless link 1206, which can be implemented as any suitable type of wireless link. Although depicted as a base station tower of a cellular radio network, base station 1204 can represent or be implemented as another device, such as a satellite, terrestrial broadcast tower, access point, peer device, mesh network node, fiber optic line, or another electronic device generally as described above. Therefore, electronic device 1202 can communicate with base station 1204 or another device via wired connection, wireless connection, or a combination thereof. Wireless link 1206 can include a downlink transmitting data or control information from base station 1204 to electronic device 1202, and an uplink transmitting other data or control information from electronic device 1202 to base station 1204. Wireless link 1206 can use any suitable communication protocol or standard, such as 3GPP LTE, 3GPP NR 5G, IEEE 802.11, IEEE 802.16, Bluetooth, etc. ™ (etc.) to achieve this.

[0082] Electronic device 1202 includes processor 1280 and memory 1282. Memory 1282 may be part of or form part of a computer-readable storage medium. Processor 1280 may include any type of processor, such as an application processor or a multi-core processor, configured to execute processor-executable instructions (e.g., code) stored in memory 1282. Memory 1282 may include any suitable type of data storage medium, such as volatile memory (e.g., random access memory (RAM)), non-volatile memory (e.g., flash memory), optical media, magnetic media (e.g., magnetic disk or magnetic tape), etc. In the context of this disclosure, memory 1282 is implemented to store instructions 1284, data 1286, and other information of electronic device 1202, and therefore, when configured as a computer-readable storage medium or part thereof, memory 1282 does not include transient propagation signals or carrier waves.

[0083] Electronic device 1202 may also include input / output port 1290. I / O port 1290 enables data exchange or interaction with other devices, networks, or users, or between components of the device.

[0084] Electronic device 1202 may also include a signal processor (SP) 1292 (e.g., such as a digital signal processor (DSP)). The signal processor 1292 may function similarly to a processor and may be able to execute instructions and / or process information in conjunction with memory 1282.

[0085] For communication purposes, electronic device 1202 also includes a modem 1294, a wireless transceiver 1296, and an antenna (not shown). The wireless transceiver 1296 uses radio frequency (RF) wireless signals to provide connectivity to a given network and other electronic devices connected to those networks, and may include... Figure 11 The transceiver circuit 1100. The wireless transceiver 1296 can facilitate communication on any suitable type of wireless network, such as wireless local area network (LAN) (WLAN), peer-to-peer (P2P) network, mesh network, cellular network, wireless wide area network (WWAN), navigation network (e.g., North American Global Positioning System (GPS) or another Global Navigation Satellite System (GNSS)) and / or wireless personal area network (WPAN).

[0086] The various operations of the methods described above can be performed by any suitable component capable of performing the corresponding function. This component may include various hardware and / or software components and / or modules, including but not limited to circuits, application-specific integrated circuits (ASICs), or processors.

[0087] In this regard, the elements described herein, or any portion thereof, or any combination thereof, may be implemented as a “processing system” including one or more processors. Aspects of a processor include microprocessors, microcontrollers, graphics processing units (GPUs), central processing units (CPUs), application processors, digital signal processors (DSPs), reduced instruction set computing (RISC) processors, system-on-a-chip (SoCs), baseband processors, field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic devices, discrete hardware circuitry, and other suitable hardware configured to perform the various functionalities described throughout this disclosure. One or more processors in a processing system may execute software. Whether referred to as software, firmware, middleware, microcode, hardware description language, or other names, software should be broadly interpreted as meaning instructions, instruction sets, code, code segments, program code, programs, subroutines, software components, applications, software applications, software packages, routines, subroutines, objects, executable files, threads of execution, procedures, functions, etc.

[0088] Therefore, in one or more embodiments, the described function or circuit block can be implemented in hardware, software, or any combination thereof. If implemented in software, the function can be stored or encoded as one or more instructions or code on a computer-readable medium. Computer-readable media includes computer storage media. Storage media can be any available medium that can be accessed by a computer. In an aspect, and not a limitation, such computer-readable media can include random access memory (RAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), optical disc storage devices, magnetic disk storage devices, other magnetic storage devices, combinations of computer-readable media of the foregoing types, or any other medium that can be used to store computer-executable code in the form of computer-accessible instructions or data structures. In some aspects, the components described as circuits can be implemented in hardware, software, or any combination thereof.

[0089] The phrase “coupled to” and the term “coupled” refer to any component being physically connected directly or indirectly to another component and / or any component communicating directly or indirectly with another component (e.g., connected to another component via a wired or wireless connection and / or other suitable communication interface).

[0090] Generally speaking, when the operations illustrated in the accompanying drawings exist, those operations may have corresponding parts and functional components with similar numbers.

[0091] As used herein, the term "determine" encompasses a wide variety of actions. In some respects, "determine" can include operations, calculations, processing, derivations, investigations, searches (e.g., searching in a table, database, or other data structure), assertions, etc. Furthermore, "determine" can include receiving (e.g., receiving information), accessing (e.g., accessing data in memory), etc. Additionally, "determine" can include parsing, selecting, picking, building, etc.

[0092] The methods disclosed herein include one or more steps or actions for implementing the described methods. The steps and / or actions of the methods may be interchanged without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and / or use of a particular step and / or action may be modified without departing from the scope of the claims.

[0093] It should be understood that the claims are not limited to the precise configurations and components illustrated above. Various modifications, alterations, and variations may be made to the arrangement, operation, and details of the methods and apparatus described above without departing from the scope of the claims.

[0094] The claim language or other language that states "at least one of" and / or "one or more of" in a set indicates that one member of the set or multiple members of the set (in any combination) satisfy the claim. For example, the claim language that states "at least one of A and B" or "at least one of A or B" means A, B, or A and B. In another example, the claim language that states "at least one of A, B, and C" or "at least one of A, B, or C" means A, B, C, or A and B, or A and C, or B and C, A and B and C, or any repetition is information or data (e.g., A and A, B and B, C and C, A and A and B, etc.), or any other ordering, repetition, or combination of A, B, and C. The language "at least one of" and / or "one or more of" in a set does not limit the set to the items listed in the set. For example, the language of a claim stating "at least one of A and B" or "at least one of A or B" may refer to A, B, or A and B, and may additionally include items not listed in the set of A and B. The phrases "at least one" and "one or more" are used interchangeably herein.

[0095] Claims using phrases such as "at least one processor, at least one processor is configured to," "at least one processor is configured to," "one or more processors, one or more processors are configured to," or other languages ​​indicate that one or more processors (in any combination) are capable of performing associated operations. For example, a claim using the phrase "at least one processor, the at least one processor is configured to: X, Y, and Z" means that a single processor can be used to perform operations X, Y, and Z; or that multiple processors are each assigned a specific subset of tasks to perform operations X, Y, and Z, such that the multiple processors together perform X, Y, and Z; or that a group of multiple processors work together to perform operations X, Y, and Z. In another example, a claim using the phrase "at least one processor, the at least one processor is configured to: X, Y, and Z" could mean that any single processor can perform only a subset of operations X, Y, and Z.

[0096] When referring to one or more elements that perform functions (e.g., steps of a method), one element may perform all functions, or more than one element may jointly perform these functions. When more than one element jointly performs these functions, each function does not need to be performed by every single element (e.g., different functions may be performed by different elements), and / or each function does not need to be performed by only one element as a whole (e.g., different elements may perform different sub-functions of a function). Similarly, when referring to one or more elements configured to cause another element (e.g., a device) to perform functions, one element may be configured to cause another element to perform all functions, or more than one element may be jointly configured to cause another element to perform these functions.

[0097] When referring to an entity that performs or is configured to perform functions (e.g., steps of a method) (e.g., any entity or device described herein), the entity may be configured to cause one or more elements (individually or collectively) to perform those functions. One or more components of the entity may include at least one memory, at least one processor, at least one communication interface, another component configured to perform one or more of those functions, and / or any combination thereof. When referring to an entity that performs functions, the entity may be configured to cause one component to perform all functions, or to cause more than one component to perform those functions collectively. When the entity is configured to cause more than one component to perform those functions collectively, each function does not need to be performed by every single component (e.g., different functions may be performed by different components), and / or each function does not need to be performed by only one component as a whole (e.g., different components may perform different sub-functions of a function).

[0098] The following is a set of non-limiting aspects based on the details provided herein: Aspect 1. An apparatus comprising: a substrate layer; a rich well layer disposed on the substrate layer having a thickness of less than or equal to 200 nanometers (nm); a dielectric layer disposed on the rich well layer; a piezoelectric layer disposed on the dielectric layer; and an interdigital transducer formed in a metal layer disposed on the piezoelectric layer.

[0099] Aspect 2. The device according to aspect 1, wherein the thickness of the well-rich layer is greater than or equal to 10 nm.

[0100] Aspect 3. The apparatus according to any one of Aspects 1 to 2, wherein the well-rich layer comprises aluminum nitride.

[0101] Aspect 4. The device according to any one of Aspects 1 to 2, wherein the well-rich layer comprises Si3N4.

[0102] Aspect 5. The apparatus according to any one of Aspects 1 to 2, wherein the well-rich layer comprises Al2O3.

[0103] Aspect 6. The device according to any one of Aspects 1 to 5, wherein the dielectric layer comprises SiO2.

[0104] Aspect 7. The device according to any one of Aspects 1 to 6, the device further comprising a SiON layer disposed on the dielectric layer.

[0105] Aspect 8. The apparatus according to any one of Aspects 1 to 7, wherein the substrate layer comprises polycrystalline silicon.

[0106] Aspect 9. The apparatus according to any one of Aspects 1 to 7, wherein the substrate layer comprises low-cost, high-resistivity silicon.

[0107] Aspect 10. The apparatus according to any one of Aspects 1 to 9, wherein the thickness of the well-rich layer is selected to reduce out-of-band stray modes while limiting the thickness of the well-rich layer.

[0108] Aspect 11. The apparatus according to any one of Aspects 1 to 10, wherein the interdigitated transducer comprises: a first busbar; a second busbar; and a first plurality of electrode fingers and a second plurality of electrode fingers, the first plurality of electrode fingers extending from the first busbar toward the second busbar, the second plurality of electrode fingers extending from the second busbar toward the first busbar, the second plurality of electrode fingers being interdigitated with the first plurality of electrode fingers.

[0109] Aspect 12. An apparatus comprising: a resonator configured for resonance associated with a resonant wavelength, the resonator comprising: a conductive substrate layer; a rich-well layer disposed on the conductive substrate layer, the rich-well layer having a thickness less than or equal to 0.125 times the resonant wavelength; a dielectric layer disposed on the rich-well layer; a piezoelectric layer formed on the dielectric layer; and an interdigital transducer formed in a metal layer disposed on the piezoelectric layer.

[0110] Aspect 13. The device according to aspect 12, wherein the thickness of the well-rich layer is greater than or equal to 10 nm.

[0111] Aspect 14. The apparatus according to any one of Aspects 12 to 13, wherein the well-rich layer comprises aluminum nitride.

[0112] Aspect 15. The apparatus according to any one of Aspects 12 to 13, wherein the well-rich layer comprises Si3N4.

[0113] Aspect 16. The apparatus according to any one of Aspects 12 to 13, wherein the well-rich layer comprises Al2O3.

[0114] Aspect 17. The device according to any one of Aspects 12 to 16, wherein the dielectric layer comprises SiO2.

[0115] Aspect 18. The device according to any one of Aspects 12 to 17, the device further comprising a SiON layer disposed on the dielectric layer.

[0116] Aspect 19. The apparatus according to any one of Aspects 12 to 18, wherein the conductive substrate layer comprises polycrystalline silicon.

[0117] Aspect 20. The apparatus according to any one of Aspects 12 to 18, wherein the conductive substrate layer comprises low-cost, high-resistivity silicon.

[0118] Aspect 21. The device according to any one of Aspects 12 to 20, wherein the thickness of the well-rich layer is selected to reduce out-of-band stray modes while limiting the thickness of the well-rich layer.

[0119] Aspect 22. The apparatus according to any one of Aspects 12 to 21, wherein the interdigitated transducer comprises: a first busbar; a second busbar; and a first plurality of electrode fingers and a second plurality of electrode fingers, the first plurality of electrode fingers extending from the first busbar toward the second busbar, the second plurality of electrode fingers extending from the second busbar toward the first busbar, the second plurality of electrode fingers being interdigitated with the first plurality of electrode fingers.

[0120] Aspect 24. A method comprising: depositing a well-rich layer on a high-resistivity silicon substrate, wherein the well-rich layer is deposited to a thickness of less than 200 nanometers (nm); forming a dielectric layer on the well-rich layer; forming a piezoelectric layer on the dielectric layer; and forming an interdigital transducer on the piezoelectric layer.

[0121] Aspect 25. The method according to aspect 24, wherein the thickness of the well-rich layer is greater than or equal to 10 nm.

[0122] Aspect 26. The method according to any one of Aspects 24 to 25, wherein the well-rich layer comprises aluminum nitride.

[0123] Aspect 27. The method according to any one of Aspects 24 to 25, wherein the well-rich layer comprises Si3N4.

[0124] Aspect 28. The method according to any one of Aspects 24 to 25, wherein the well-rich layer comprises Al2O3.

[0125] Aspect 29. The method according to any one of Aspects 24 to 28, wherein the dielectric layer comprises SiO2.

[0126] Aspect 30. The method according to any one of Aspects 24 to 29, the method further comprising: forming a SiON layer disposed on the dielectric layer.

[0127] Aspect 31. The method according to any one of Aspects 24 to 30, the method further comprising forming the well-rich layer on a conductive substrate layer.

[0128] Aspect 32. The method according to any one of Aspects 24 to 31, wherein the conductive substrate layer comprises low-cost, high-resistivity silicon.

[0129] Aspect 33. The method according to any one of Aspects 24 to 32, wherein the thickness of the well-rich layer is selected to reduce out-of-band stray modes while limiting the thickness of the well-rich layer.

[0130] Aspect 34. The method according to any one of Aspects 24 to 33, wherein the interdigitated transducer comprises: a first busbar; a second busbar; and a first plurality of electrode fingers and a second plurality of electrode fingers, the first plurality of electrode fingers extending from the first busbar toward the second busbar, the second plurality of electrode fingers extending from the second busbar toward the first busbar, the second plurality of electrode fingers being interdigitated with the first plurality of electrode fingers.

[0131] Aspect 35. An electroacoustic resonator comprising: a substrate layer; a rich well layer disposed on the substrate layer having a thickness of less than or equal to 200 nanometers (nm); and a dielectric layer disposed on the rich well layer.

[0132] Aspect 36. The electroacoustic resonator according to aspect 35, wherein the thickness of the well-rich layer is greater than or equal to 10 nm.

[0133] Aspect 37. The electroacoustic resonator according to any one of Aspects 35 to 36, wherein the well-rich layer comprises aluminum nitride.

[0134] Aspect 38. The electroacoustic resonator according to any one of Aspects 35 to 36, wherein the well-rich layer comprises Si3N4.

[0135] Aspect 39. The electroacoustic resonator according to any one of Aspects 35 to 36, wherein the well-rich layer comprises Al2O3.

[0136] Aspect 40. The electroacoustic resonator according to any one of Aspects 35 to 39, wherein the dielectric layer comprises SiO2.

[0137] Aspect 41. The electroacoustic resonator according to any one of Aspects 35 to 40, wherein the electroacoustic resonator further comprises a SiON layer disposed on the dielectric layer.

[0138] Aspect 42. The electroacoustic resonator according to any one of aspects 35 to 41, wherein the thickness of the well-rich layer is selected to reduce out-of-band spurious modes while limiting the thickness of the well-rich layer.

[0139] Aspect 43. The electroacoustic resonator according to any one of Aspects 35 to 42, the electroacoustic resonator further comprising: a piezoelectric layer disposed on the dielectric layer; and a metal layer disposed on the piezoelectric layer, the metal layer comprising an interdigital transducer, the interdigital transducer comprising: a first busbar; a second busbar; and a first plurality of electrode fingers and a second plurality of electrode fingers, the first plurality of electrode fingers extending from the first busbar toward the second busbar, the second plurality of electrode fingers extending from the second busbar toward the first busbar, the second plurality of electrode fingers being interdigitated with the first plurality of electrode fingers.

Claims

1. An apparatus, the apparatus comprising: Substrate layer; A well-rich layer is disposed on the substrate layer, and the well-rich layer has a thickness of less than or equal to 200 nanometers (nm). A dielectric layer disposed on the well-rich layer; A piezoelectric layer disposed on the dielectric layer; and An interdigital transducer formed in a metal layer disposed on the piezoelectric layer.

2. The device of claim 1, wherein the thickness of the well-rich layer is greater than or equal to 10 nm.

3. The device according to claim 1, wherein the well-rich layer comprises aluminum nitride.

4. The device according to claim 1, wherein the well-rich layer comprises Si3N4.

5. The device according to claim 1, wherein the well-rich layer comprises Al2O3.

6. The device according to claim 1, wherein the dielectric layer comprises SiO2.

7. The device according to claim 1, the device further comprising a SiON layer disposed on the dielectric layer.

8. The device of claim 1, wherein the substrate layer comprises polycrystalline silicon.

9. The device of claim 1, wherein the substrate layer comprises low-cost, high-resistivity silicon.

10. The device of claim 1, wherein the thickness of the well-rich layer is selected to reduce out-of-band stray modes while limiting the thickness of the well-rich layer.

11. The device of claim 1, wherein the interdigital transducer comprises: First busbar; Second busbar; as well as A first plurality of electrode fingers and a second plurality of electrode fingers, the first plurality of electrode fingers extending from the first busbar toward the second busbar, the second plurality of electrode fingers extending from the second busbar toward the first busbar, the second plurality of electrode fingers and the first plurality of electrode fingers being configured in an interdigitated manner.

12. An apparatus, the apparatus comprising: A resonator configured for resonance associated with a resonant wavelength, the resonator comprising: Conductive substrate layer; A well-rich layer is disposed on the conductive substrate layer, and the well-rich layer has a thickness less than or equal to 0.125 times the resonant wavelength. A dielectric layer disposed on the well-rich layer; A piezoelectric layer is formed on the dielectric layer; and An interdigital transducer formed in a metal layer disposed on the piezoelectric layer.

13. The device of claim 12, wherein the thickness of the well-rich layer is greater than or equal to 10 nm.

14. The device of claim 12, wherein the well-rich layer comprises aluminum nitride.

15. The device of claim 12, wherein the well-rich layer comprises Si3N4.

16. The device of claim 12, wherein the well-rich layer comprises Al2O3.

17. A method, the method comprising: A well-rich layer is deposited on a high-resistivity silicon substrate, wherein the well-rich layer is deposited to a thickness of less than or equal to 200 nanometers (nm); A dielectric layer is formed on the well-rich layer; A piezoelectric layer is formed on the dielectric layer; as well as An interdigital transducer is formed on the piezoelectric layer.

18. The method of claim 17, wherein the thickness of the well-rich layer is greater than or equal to 10 nm.

19. The method of claim 17, wherein the well-rich layer comprises aluminum nitride, Si3N4, or Al2O3.

20. The method of claim 17, further comprising: A SiON layer is formed, wherein the SiON layer is disposed on the dielectric layer; as well as The well-rich layer is formed on a conductive substrate layer comprising low-cost, high-resistivity silicon.

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