Methods for fabricating fine feature etching masks using direct atomic layer processing

Abstract

This disclosure relates to systems and methods for forming etch masks using direct atomic layer processing. Specifically, this disclosure relates to a method for forming etch masks with fine features at the substrate level using microreactor direct atomic layer processing (µDALP).

Description

Background Technology

[0001] This disclosure relates to systems and methods for forming masks using direct atomic layer processing. Specifically, this disclosure relates to a method for forming an etch mask with fine features at a substrate level using direct atomic layer processing (DALP).

[0002] In the fields of semiconductor technology and materials science, the need for precise control over material removal at the atomic level has become crucial due to the ever-increasing demand for miniaturization.

[0003] In the context of semiconductor processing, etch masks are used to transfer predetermined patterns onto a substrate, typically a silicon wafer, in semiconductor manufacturing. The purpose of a mask is to define a desired pattern that represents a feature to be produced on the substrate, such as transistors, interconnects, or other microstructures. A mask essentially acts as a template for a patterning process, allowing specific areas of the substrate to be exposed to light or other forms of energy (e.g., plasma) or wet chemical etching, while protecting the rest.

[0004] While etched masks with fine features do exist, their resolution is largely constrained by the Rayleigh criterion, which depends on the wavelength of light, numerical aperture (NA), and process factors. (See example...) Figure 1 For example, in photolithography, there are additional processes that define the etch mask itself prior to etching. Forming etch masks with fine features in semiconductor manufacturing presents a series of complex challenges, with a fundamental issue being overcoming the limitations of optical lithography. The finer the features, the more difficult it becomes to achieve high pattern fidelity (where the mask accurately represents the intended design), as defects and distortions contribute to errors in the final pattern. Precise overlap accuracy is crucial for aligning multiple mask layers, which is challenging and susceptible to misalignment and defects. Furthermore, material compatibility, mask durability, inspection methods, uniformity, and process control all exacerbate the problem when dealing with fine features. Resolution enhancement techniques, environmental factors, and the costs associated with developing advanced (optionally multi-layered) masks further complicate the process.

[0005] The proposed methods and systems are designed to address these challenges. Summary of the Invention

[0006] In various exemplary embodiments, systems and methods for forming etch masks using direct atomic layer processing are disclosed. Specifically, this document discloses a method for forming an etch mask with fine features at a substrate level using direct atomic layer processing (DALP).

[0007] In an exemplary embodiment, this document provides a method for forming an etch mask or a portion thereof for lithography in a semiconductor fabrication process, implemented in a microreactor direct atomic layer deposition (µDALP) system, the etch mask having its minimum feature at a substrate plane, the method comprising: depositing and / or removing a first stripe using the µDALP system; and depositing and / or removing a second stripe using the µDALP system, wherein: the first and second stripes are configured to form a cross pattern having a predetermined overlapping region; and the cross pattern is adapted, sized, and configured to form two acute angles, wherein the minimum feature is defined at the acute angle formed by the first and second stripes, thereby forming at least a portion of the etch mask.

[0008] These and other features of the method of using direct atomic layer processing (DALP) to form an etch mask with fine features at the substrate level will become apparent from the following detailed description when read in conjunction with the exemplary and non-limiting accompanying drawings and examples. Attached Figure Description

[0009] To better understand the method of using direct atomic layer processing (DALP) to form an etch mask with fine features at the substrate level, refer to the accompanying examples and figures for exemplary implementations, wherein:

[0010] Figure 1 This is a flowchart of a typical process for forming an etching mask on a wafer substrate;

[0011] Figure 2A An example of a 2D elliptic polarization image of a titanium oxide stripe on a silicon oxide / silicon wafer (SiO2 / Si) is shown. Figure 2B A 3D representation of the surface profile measurement using elliptic polarization is depicted;

[0012] Figure 3 A close-up image depicting a 3D representation of a platinum strip on a silicon wafer coated with silicon oxide, measured using elliptic polarization.

[0013] Figure 4A This is a schematic diagram illustrating an exemplary specific implementation of a method for forming an etch mask. Figure 4B Another exemplary implementation is illustrated; and

[0014] Figure 5 An example is shown using an etching mask as a 3D mask for shaping the wafer surface. Detailed Implementation

[0015] This article provides exemplary implementations of apparatus, systems, and methods for forming etch masks with fine features at the substrate level using direct atomic layer processing (DALP).

[0016] In an exemplary embodiment, direct atomic layer processing (DALP) refers to a precise thin film deposition or removal (e.g., atomic layer etching) technique that achieves the growth or removal of uniform and conformal films at the atomic scale.

[0017] In the case of film deposition, DALP is used to grow films in a controlled, layer-by-layer manner, beginning with the modification of a chemically prepared substrate surface, typically followed by cleaning to remove any contaminants or oxides. Deposition begins with the introduction of an initial reactant (referred to as a precursor) into a (micro)reaction chamber (e.g., for microDALP or µDALP). The precursor is selected based on the desired film composition, properties, and the intended etching method used. The precursor can be a vapor phase or gaseous fluid that reacts with or preferably adheres to the modified substrate surface. Precise timing and control of the precursor flow ensures proper interaction with the modified substrate surface (e.g., silicon oxide wafers, see example...). Figures 2A to 3 The interaction is sustained for a limited period of time. During this exposure, a self-limiting reaction occurs at the surface (configured to terminate once a complete monolayer is formed), resulting in the formation of a monolayer or sub-monolayer of the desired material. Excess precursors, unreacted byproducts, and any adsorbed impurities in the chamber are then purged with an inert gas (such as nitrogen or argon). The cycle of precursor deposition, purging, reactant deposition, and purging is then repeated, alternating between the initial precursor exposure and the final purging step, thereby gradually building up the film layer by layer. The number of cycles is carefully controlled to achieve the desired film thickness, which can range from a few nanometers to several micrometers. Layer-by-layer growth using DALP (microreactor) ensures uniformity, even on complex 3D structures such as trenches, pores, or high aspect ratio (>>1) features. The resulting membrane strips can be constructed to exhibit uniform thickness and width, with excellent control over composition and properties. Microreactors are created by confining the entire operation within a discrete volume, in which nozzles communicating with various precursor and reactant streams are positioned and substantially sealed over the operating area where deposition and / or etching take place.

[0018] In exemplary embodiments, the precursors or reactants used in the disclosed (microreactor) DALP membrane formation method may be at least one of the following: trimethylaluminum (TMA), tetra(dimethylamino)titanium (TDMAT), bis(cyclopentadienyl)zirconium dichloride (IV) (Cp2ZrCl2), tetra(ethylmethylamino)hafnium (TEMAH) and bis(ethylcyclopentadienyl)ruthenium (II) (Ru(EtCp)2), titanium tetrachloride (TiCl4), tungsten hexafluoride (WF6), hafnium tetrachloride (HfCl4), ruthenium trichloride (RuCl3) and molybdenum hexacarbonyl (Mo(CO)6), diethylzinc (DEZ), dimethylaminomagnesium (DMAMg), bis(cyclopentadienyl)iron (II) (Cp2Fe), triisobutylaluminum (TIBA), tetra(trimethylsilyl)hafnium (TTHf), aluminum isopropoxide (Al(O-iPr)3), titanium isopropoxide (Ti(O-iPr)4), zirconium n-propoxide (Zr(O-nPr)4), hafnium ethanol (Hf(OEt)4), tantalum ethanol (Ta(OEt)5), bis(tert-butylamino)silane (BTBAS), bis(tert-butylamino)zinc (BTBAS2), bis(tert-butylamino)titanium (BTBAT), bis(tert-butylamide)zirconium (BTBZ), bis(tert-butylamino)hafnium (BTBAH), dimethylcyclopentadienylplatinum (MeCpPtMe3), bis(methylcyclopentadienyl)nickel (Ni(MeCp)2), cyclopentadienyltricarbonyltungsten (CpW(CO)3), dimethylcyclopentadienyltricarbonylmanganese (MeCpMn(CO)3), and pentacarbonyl iron (Fe(CO)5).

[0019] For example, in an exemplary embodiment, the precursor is trimethylaluminum (TMA), and the reactant is ozone, forming aluminum oxide (Al₂O₃), which releases methane (CH₄) upon purging. This allows for the formation of thin films with different band gaps, for example, for a wide range of electronic applications, from gate dielectrics in metal-oxide-semiconductor (MOS) transistors to trapping or blocking insulators in charge-trapping non-volatile memory cells. In another exemplary embodiment, the precursor is tetrakis(dimethylamino)titanium (TDMAT), and the reactant can be oxygen plasma (or again ozone (O₃), hydrogen peroxide (H₂O₂), or water vapor), thereby forming a titanium oxide (TiO₂) film. Other reactants that can be used are hydrazine (N₂H₄), ammonia (NH₄), or nitrogen fluoride (NF₄).

[0020] The substrate used in the methods described herein (see, for example, 10-) Figure 1The surface treatment can be at least one of the following: solvent (e.g., acetone, isopropanol (IPA), or ultrasonic cleaning for removing organic contaminants and particles) or acid (e.g., sulfuric acid (H2SO4) or hydrochloric acid (HCl)) cleaning; plasma (e.g., using reactive gases such as oxygen (O2), hydrogen (H2), or fluorine-containing gases (CF4, SF6) to remove native oxide layers or pattern the substrate surface, e.g., to form alignment references) and / or wet etching (e.g., removing unwanted layers or roughening the surface to improve, for example, film adhesion); and surface functionalization (e.g., silane coupling agents such as APTES (aminopropyltriethoxysilane) or HMDS (hexamethyldisilazane) to enhance film bonding or modify surface energy by introducing specific chemical groups).

[0021] In exemplary embodiments, alignment marks or references formed using the disclosed methods and systems are reference points or patterns intentionally placed on a semiconductor wafer during manufacturing, configured to achieve precise alignment of photomask layers in a photolithography process. These marks help ensure accurate alignment of successive layers of integrated circuits, thereby minimizing defects and maintaining the integrity of the device design. In some exemplary embodiments, references are generated using an etched or deposited material that contrasts with the wafer surface, allowing optical systems to detect and align them with high precision. This is advantageous in advanced semiconductor manufacturing, where feature sizes are on the nanoscale, and even minute misalignments can impair device performance.

[0022] Conversely, in another exemplary embodiment, an etching mask is formed by removing material using (micro)direct atomic layer processing (DALP). Atomic layer etching (ALEt) (which is interchangeable with material removal using DALP) refers to precise and highly controlled layer-by-layer material removal. In a typical DALP used for material removal, a substrate (e.g., a wafer, an integrated circuit) acts as the base, and the surface atomic layers are modified by a self-limiting adsorption reaction involving molecular entities or low-energy free radicals. This modified surface layer then undergoes interaction with appropriate ligands or reactants. The function of the ligands (which is interchangeable with the term "reactant") is their ability to form bonds with the altered surface atomic layers. This interaction facilitates etching of the modified surface layer by applying elevated temperatures, or additionally or alternatively by utilizing conditions where the reactant layer with ligands and / or their byproducts exhibits sufficiently low vapor pressures, thereby enabling direct extraction from exhaust channels near the surface. The removal process is configured to prevent the decomposition of these macromolecules, thus avoiding any possibility of their re-deposition onto the substrate.

[0023] Another layer removal method using the (microreactor) DALP employed in the disclosed method can involve modifying the surface layer of the substrate using a neutral substance (i.e., an element without charge), free radicals, or other reactive molecules. Initially, the surface layer can be bombarded with high-energy ions or neutral particles to break the bonds of the atomic surface layer, resulting in the release of volatile byproducts, which are then purged from the microreactor, thereby enabling the removal of anisotropic atomic layers that can form the material. In an exemplary embodiment, the modified surface layer released during the bombardment process is configured to produce stable volatile byproducts, thereby enabling efficient purge from the microreactor. For example, a combination of C4F8 plasmas is used to remove SiO2 atomic layers to produce a surface fluorocarbon (FC) layer, followed by low-energy Ar plasmas. + Ions are used to bombard the surface to remove the FC layer. Similarly, in another example, a combination of Cl2 adsorption and neutral Ne beams is used to remove atomic layers of Si, GaAs5, or Ge.

[0024] Another method for layer removal can be used in conjunction with the methods described above. Traditional dry methods can be used, including but not limited to reactive ion etching (RIE), deep reactive ion etching (DRIE), and wet etching methods.

[0025] In the ALEt disclosed herein, various surface modifiers can be employed to achieve precise and selective material removal at the atomic scale. These surface modifiers can be, for example, plasma-activated, hydrogen (H2)-activated, chlorine (Cl2)-activated, fluorine (F2)-activated, and oxygen (O2)-activated, which modify the surface chemistry system to facilitate subsequent etching steps. Organic ligands and silane chemistry systems can also be used to form customized surface termination structures to achieve selectivity. In an exemplary embodiment involving metallic materials, metal chlorides can act as surface modifiers. In another exemplary embodiment, the selection of the first surface modifier depends on the specific material and the desired etching selectivity.

[0026] Similarly, the ligands and precursors used can be at least one of the following: hydrogen fluoride (HF), tetrafluoromethane (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), and hexafluoropropylene (C3F6). These ligands can react with the surface to introduce fluorine groups, allowing the fluorine-modified surface to be selectively etched. The choice of ligand or precursor depends on the specific substrate material being treated and the desired level of selectivity. In another exemplary embodiment, chlorine is used to modify the surface, and the ligand is at least one of the following: hydrogen chloride (HCl) and dichlorosilane (SiH2Cl2).

[0027] In another exemplary embodiment, whether in deposition or removal, the inert gas used for purging can be at least one of the following: nitrogen, argon, helium, and neon. It should be noted that the choice of inert gas depends on factors such as process requirements, membrane properties, equipment capabilities, and cost considerations.

[0028] It should be noted that the exact reaction mechanism in DALP deposition and material removal may involve simultaneous deposition and etching reactions. There is a competition between the desired growth rate and the etching rate. The precise etching mechanism depends on precise conditions, including temperature, pressure, and gas flow rate, all of which are carefully controlled to drive the desired chemical reaction and etching rate.

[0029] In exemplary embodiments, the purpose of forming an etch mask using the methods disclosed herein is to define a desired pattern representing a feature to be produced on a substrate, such as a transistor, interconnect, interposer, or other microstructure (e.g., via location), thereby allowing specific areas of the substrate to be exposed to light or other forms of energy while protecting the remainder. Therefore, this process can be used to perform quality assurance (QA) and quality control (QC) procedures for the etching process. For example, visual confirmation of the effectiveness of the etching process can be achieved by forming strips with a thickness configured to be fully etched during the etching process.

[0030] In semiconductor manufacturing, feature sizes are typically measured in nanometers (nm), and “small features” are often associated with more advanced and densely packaged components, allowing for higher performance and miniaturization. Therefore, reducing the feature size on an etch mask allows for the creation of more complex and precise patterns.

[0031] In exemplary embodiments, the first surface modifier or reactant used in the disclosed (microreactor) DALP method may be at least one of the following: trimethylaluminum (TMA), tetra(dimethylamino)titanium (TDMAT), bis(cyclopentadienyl)zirconium dichloride (IV) (Cp2ZrCl2), tetra(ethylmethylamino)hafnium (TEMAH), and bis(ethylcyclopentadienyl)ruthenium (II) (Ru(EtCp)2), titanium tetrachloride (… TiCl4), tungsten hexafluoride (WF6), hafnium tetrachloride (HfCl4), ruthenium trichloride (RuCl3), molybdenum hexacarbonyl (Mo(CO)6), diethylzinc (DEZ), magnesium dimethylamino (DMAMg), bis(cyclopentadienyl)iron(II) (Cp2Fe), triisobutylaluminum (TIBA), tetra(trimethylsilyl)hafnium (TTHf), aluminum isopropoxide (Al(O-iPr)3), titanium isopropoxide (Ti(O-iPr4) Zirconium n-propoxide (Zr(O-nPr)4), Hafnium ethoxide (Hf(OEt)4), Tantalum ethoxide (Ta(OEt)5), Bis(tert-butylamino)silane (BTBAS), Bis(tert-butylamino)zinc (BTBAS2), Bis(tert-butylamino)titanium (BTBAT), Bis(tert-butylamide)zirconium (BTBZ), Bis(tert-butylamino)hafnium (BTBAH), Dimethylcyclopentadienylplatinum (MeCpPtMe3), Bis(methylcyclopentadienyl)platinum (MeCpPtMe3), Pentadienyl nickel (Ni(MeCp)2), cyclopentadienyltricarbonyltungsten (CpW(CO)3), dimethylcyclopentadienyltricarbonylmanganese (MeCpMn(CO)3), pentacarbonyl iron (Fe(CO)5), Al(CH3)3, AlCl(CH3)2, Sn(acac)2, BCl3, Hhfac, HCOOH, PMe3, dHF, Ga(CH3)3, SiCl4, TiCl4 and HCl.

[0032] In another exemplary embodiment, the inert gas can be at least one of the following: nitrogen, argon, helium, and neon. It should be noted that the choice of inert gas depends on factors such as process requirements, membrane properties, equipment capabilities, and cost considerations. Additionally, specific applications or variations within the (micro)DALP material removal technology may require the use of other inert gases or gas mixtures.

[0033] Furthermore, in another exemplary embodiment, the reactants, co-reactants, or co-reagents in the gas phase or plasma phase can be one or a mixture of the following: O3, HF, CHF3, CF4, H2, NF3, XeF2, BCl3 / Cl2, C4H3F7O, C3H3F 3、HBr, O2, O3, CF4 / O2, F2 / He, C4F8, CH3F, Al(CH3)3, C4F8 plasma, WF6, BCl3, SF4, SO2Cl2, and acetylacetone (Hacac). It should be noted that the choice of reactants depends on factors such as process requirements, membrane properties, equipment capabilities, and cost considerations. Additionally, specific applications or variations within the DALP material removal technology (microreactor) may require the use of other reagents or reagent gas mixtures.

[0034] The surface treatment of the substrate used in the methods described herein can be at least one of the following: solvent (e.g., acetone, isopropanol (IPA), or ultrasonic cleaning for removing organic contaminants and particles) or acid (e.g., sulfuric acid (H2SO4) or hydrochloric acid (HCl)) cleaning; plasma (e.g., using reactive gases such as oxygen (O2), hydrogen (H2), or fluorine-containing gases (CF4, SF6) to remove native oxide layers or pattern the substrate surface) and / or wet methods (e.g., removing unwanted layers or roughening the surface to improve film adhesion, such as for sequential penetration synthetic etching); and surface functionalization (e.g., silane coupling agents such as APTES (aminopropyltriethoxysilane) or HMDS (hexamethyldisilazane) to enhance film bonding or modify surface energy by introducing specific chemical groups).

[0035] Therefore, and in exemplary specific implementations (see, for example) Figure 4A This paper provides a method for forming an etch mask or a portion thereof for photolithography in a semiconductor manufacturing process, implemented in a microreactor direct atomic layer deposition (µDALP) system, the etch mask having a minimum feature 201 at a plane of a substrate 100, the method comprising: depositing and / or removing a first strip 110 using the µDALP system; and depositing and / or removing a second strip 120 using the µDALP system, wherein: the first strip and the second strip are configured to form a cross pattern having a predetermined overlap region 200; the cross pattern is adapted, sized, and configured to form two acute angles θ1, θ2, wherein the minimum feature 201 is defined at the acute angles θ1, θ2 formed by the first strip 110 and the second strip 120, thereby forming at least a portion of the etch mask.

[0036] like Figure 5 As illustrated, an etched mask can be used to pattern the surface of a wafer, essentially creating a mirror image of the resulting mask (see example...). Figure 2B , Figure 4A , Figure 4BThe transfer is onto the wafer. As described, in an exemplary embodiment, after surface treatment with a dilute solution of hydrofluoric acid (HF) using a µDALP system, a trimethylaluminum (TMA) precursor is deposited on a silicon wafer 100, which can then react with ozone (O3) to form an alumina (Al2O3) strip 110 of thickness z1 after repeating the process a predetermined number of cycles. A second strip can be formed using the same or a different µDALP nozzle, with tetrakis(dimethylamino)titanium (TDMAT) as the precursor and plasma O2 as the reactant to form a TiO2 strip 120 of thickness z2 (see, for example, a cross-section). Figure 5 Top). The wafer is then exposed to a wet etchant that can etch the wafer and each of the TiO2 stripes, TiO2 stripe 120, Al2O3 stripe 110, and wafer 100, at a predetermined etch ratio (dz / dt). The entire thickness z2 of the TiO2 stripe 120 and a portion z2' of the wafer will be removed. The etchant can be, for example, a mixture of hydrofluoric acid (HF) and nitric acid (HNO3), commonly referred to as a piranha solution or buffered oxide etch (BOE), where the etch rate will depend on the fractional concentration of HF, temperature, and other parameters. Then, after removing the top layer, at a fixed predetermined time, the wafer can be etched using the same µDALP with the same or another nozzle (see...). Figure 5 The middle section is exposed to another etchant to remove the thickness z1 of the strip 110, using reactive ion etching (RIE) with, for example, sulfur hexafluoride (SF6) or carbon tetrafluoride (CF4) gas. This reactive ion etching has a controlled flow rate configured to etch the silicon wafer 100 faster than the Al2O3 strip 110, and the depth z1' of the wafer etching can be controlled.

[0037] In other exemplary embodiments, etching methods, etchants, and stripping can be used to transfer complex patterns into a wafer, such as creating precise pits for ball grid arrays, traps for integrated circuit pins, etc.

[0038] Go to Figure 1 This illustrates a typical process for forming an etch mask, such as those used in photolithography. As illustrated, the process for forming an etch mask typically involves several sequential steps to create a pattern on a substrate that will be used as a protective mask (in other words, as an etch mask) for subsequent etching processes. Initially, contaminants are removed from the substrate to prepare it, thereby ensuring optimal adhesion of the mask film to the substrate.

[0039] The surface treatment of the substrate used in the methods described herein can be at least one of the following: solvent (e.g., acetone, isopropanol (IPA), or ultrasonic cleaning for removing organic contaminants and particles) or acid (e.g., sulfuric acid (H2SO4) or hydrochloric acid (HCl)) cleaning; plasma (e.g., using reactive gases such as oxygen (O2), hydrogen (H2), or fluorine-containing gases (CF4, SF6) to remove native oxide layers or pattern the substrate surface) and / or wet methods (e.g., removing unwanted layers or roughening the surface to improve film adhesion); and surface functionalization (e.g., silane coupling agents such as APTES (aminopropyltriethoxysilane) or HMDS (hexamethyldisilazane) to enhance film bonding or modify surface energy by introducing specific chemical groups).

[0040] Then, depending on the etching process used, an appropriate mask film material is selected, whether it is a photosensitive or protective material or another material. Subsequently, the selected mask film material is applied to the substrate using various deposition methods (including spin coating and dip coating), and soft baking is performed to remove excess solvent and enhance adhesion. The next stage involves designing the mask pattern layout, which clearly defines the areas to be protected and those planned for etching. Precise alignment of the mask with the substrate is performed to ensure accurate positioning of the mask pattern. Then, in the case of photolithography, the pattern is transferred onto the mask film using a photomask, and the pattern can then be exposed, 16, to a light source, typically ultraviolet (UV) light. The baking step, 17, can be a step before exposure (pre-baking) or a step performed on the exposed mask film after exposure (post-baking / hardening).

[0041] In some exemplary embodiments, the ultraviolet wavelength source used in the disclosed process varies depending on the specific type of lithography. For conventional ultraviolet lithography, a mercury lamp emitting at 365 nm (i-line) is used. When using deep ultraviolet (DUV) lithography, excimer lasers, such as krypton fluoride (KrF) lasers with a wavelength of 248 nm and argon fluoride (ArF) lasers with a wavelength of 193 nm, are employed to achieve higher resolution. Additionally, in some exemplary embodiments, extreme ultraviolet (EUV) lithography uses a significantly shorter wavelength of 13.5 nm generated by a tin plasma source produced by a laser.

[0042] Subsequently, the mask film is developed 18 with a chemical developer to remove exposed areas of positive photoresist or unexposed areas of negative photoresist, thereby revealing the pattern. An additional post-bake hardening 19 is performed on the mask pattern, simultaneously removing residual solvent. A thorough inspection and quality control (not shown) is conducted to identify any defects, ensure uniformity, and verify pattern fidelity, with repairs or rework performed as needed. Then, an etching or patterning process 20 is performed, where the developed mask film acts as a protective layer for selected areas during etching. Optionally, the mask film can be removed after etching process 21, with the removal method depending on the type of mask material used. Subsequently, the substrate is cleaned 22, and a final inspection of the etched pattern is performed to ensure compliance with specifications. Additional post-processing steps, such as deposition, implantation, or material modification, may be applied as needed. Finally, a final quality check is performed to verify the accuracy and quality of the completed etched pattern.

[0043] As illustrated, steps 12 through 20 can be performed using the disclosed (microreactor) DALP system, employing the methods disclosed herein. In an exemplary embodiment, the cross pattern is configured to form alignment marks on the substrate for etching the mask, thereby also eliminating step 15. The elimination of these steps can lead to significant cost reductions and improved process efficiency.

[0044] In an exemplary specific implementation, such as Figure 4A As further illustrated, this step is the deposition (rather than removal) of the first stripe, which includes depositing a first material (e.g., platinum, silicon, titanium, etc.) configured to form a film having a predetermined thickness (e.g., see [link to relevant documentation]). Figure 2A h 110 (approximately 20 nm), and the step of depositing the second stripe includes depositing a second material on the substrate 100, the second material being configured to form a film having a predetermined thickness (e.g., see...). Figure 2A h 120 (approximately 24nm). The second material can be, for example, and such as Figure 2A The illustration shows a 2D elliptic polarization image of titanium oxide (second material 120) on a silicon (first material 110) strip (or band, or channel, or track) on a silicon oxide wafer (substrate 100), wherein Figure 2B An elliptic polarimetric image depicting the surface profile measurements at the overlapping 200 region was created. Similarly, Figure 3 A close-up of a second stripe overlapping region 200 on a first silicon stripe on a silicon oxide 100 wafer is shown.

[0045] The deposited materials can be resistant to etching tools, or, in another example, sensitive to the etching process. For example, the first and / or second material can be silicon dioxide (SiO2), used as an insulating material, and exhibits robust resistance to various wet and dry etching techniques. Similarly, silicon nitride (Si3N4) can be used for etch resistance, such as reactive ion etching (RIE) and wet chemical etching. Additionally, materials such as tantalum pentoxide (Ta2O5), aluminum oxide (Al2O3), hafnium oxide (HfO2), titanium nitride (TiN), platinum (Pt), and perfluorinated polymers can be used. Conversely, the first and / or second material can be sensitive to specific etching processes. For example, metals such as aluminum (Al) and copper (Cu) can be deposited as etchable layers, and zinc oxide (ZnO) films are sensitive to certain etchants, particularly acids. These materials are configured for selective removal, thereby facilitating the generation of complex structures and features.

[0046] In exemplary embodiments, the photolithography process for forming the mask using the disclosed method can be, for example, optical lithography, extreme ultraviolet lithography (EUV), electron beam lithography, nanoimprint lithography, X-ray lithography, focused ion beam lithography (FIB), scanning probe lithography, directional self-assembly (DSA) lithography, or a lithography process including one or more of the foregoing. For example, EUV lithography uses light with extremely short wavelengths in the extreme ultraviolet range. EUV achieves the generation of smaller features due to its shorter wavelength, thereby improving resolution. In exemplary embodiments, using acrylate deposited using DALP as a first material and / or a second material enables the formation of the disclosed etching mask. Therefore, and depending on the photolithography process used, the etching process is selected from the group consisting of: reactive ion etching (RIE), deep reactive ion etching (DRIE), ion beam etching (IBE), chemical vapor etching (CVE), wet chemical etching, plasma etching, laser ablation, electron beam etching, and optical lithography-assisted etching.

[0047] For example, chemical vapor etching (CVE) refers to a technique that etches thin films onto a substrate through a chemical reaction of a first surface modifier in the gas phase. In CVE, the process begins with the substrate (e.g., a wafer) coming into contact with a DALP chamber (microreactor). This chamber is filled with a carrier gas to provide a controlled environment. The substrate is exposed to a pair of reactive gases or gas-phase reactive chemicals within this chamber. These chemicals react chemically with a material on the substrate surface, thereby achieving the removal or modification of that material. The process typically involves adsorbing reactants onto the substrate surface and then subjecting them to a chemical reaction, resulting in the formation of volatile byproducts. These byproducts are then removed from the system, leaving the desired etched or modified pattern. CVE can be selective, preserving other materials intact for specific materials, and it can be used for both isotropic and anisotropic etching.

[0048] In exemplary embodiments, the precise parameters and reactants used in the CVE process disclosed herein vary depending on the material and specific etching requirements. The reactions occurring at the substrate surface can involve a range of processes such as thermal decomposition, thermal pyrolysis, plasma-enhanced reactions, or combinations thereof.

[0049] Similarly, reactive ion etching (RIE) refers to a highly precise and anisotropic dry etching process used in microfabrication and semiconductor manufacturing. RIE involves removing material from a substrate (e.g., a silicon wafer) using chemically reactive ions and plasma. During RIE, the substrate is placed in a chamber under vacuum, where a low-pressure plasma is generated, typically composed of reactive gases such as fluorine or chlorine. This plasma is then ignited into a high-energy state by, for example, applying radio frequency (RF) power. The reactive ions in the plasma are accelerated toward the substrate, where they chemically react with the material to be etched. The chemoselectivity of this process allows for precise control of the etching, while the anisotropic nature ensures that material is removed primarily in the vertical direction, resulting in well-defined and high aspect ratio features.

[0050] In an exemplary embodiment, at least one material deposited and / or removed includes a chemical vapor deposition (CVD) precursor or a plasma-enhanced atomic layer deposition (PEALD, referring only to deposition processes) precursor, as described herein. Furthermore, in another exemplary embodiment, the first and / or second material in the gas or plasma phase for CVD or PEALD can be one or a mixture of the following: HF, CHF3, CF4, H2, NF3, XeF2, BCl3 / Cl2, C4H3F7O, C3H3F 3、 HBr, O2, CF4 / O2, F2 / He, C4F8, CH3F, Al(CH3)3, C4F8 plasma, WF6, BCl3, SF4, SO2Cl2, and Hacac. It should be noted that the choice of materials depends on factors such as process requirements, membrane properties, equipment capabilities, and cost considerations. Additionally, specific applications or variations within the DALP material removal technology (microreactor) may require the use of other reagents or reagent gas mixtures.

[0051] like Figure 4BAs further illustrated, the steps of depositing and / or removing the first strip and the steps of depositing and / or removing the second film strip are configured to form a predetermined pattern of intersecting film strips. Each pattern includes a plurality of first strip materials 111i, 112q, which are intersected by a plurality of second strip materials 121j, 122k to form a plurality of overlapping regions 201p, 202m, thereby defining a plurality of acute angles at the substrate 101 level. As illustrated, the number of first and second strips in each pattern does not necessarily have to be even, thereby providing a plurality of features at predetermined intervals. definition:

[0052] In an exemplary embodiment, the term "etch mask" means any film layer or any solid mask used to protect one or more portions of a layer or several layers during an etching process. Additionally, the term "etch mask film" means a film used as a partial layer of an optically functional film to partially remain in the form of a photomask, and a film used as a process aid film during etching of an underlying film adjacent to a transparent substrate so that it can be ultimately removed entirely.

[0053] In the context of this disclosure, the term "feature" refers to a single element or component of a pattern being transferred onto a substrate. These features can include various shapes, such as lines, spacing, dots, or any other geometry, and together they form an overall pattern defining a layout or design on the substrate. Features are typically characterized by their critical dimensions, which can include their width, spacing, and shape.

[0054] In the context of this disclosure, the term "substrate" refers to the base material or substrate on which semiconductor devices are fabricated. It provides mechanical support and serves as a platform for depositing various layers, such as semiconductors, insulating and conductive materials, which are essential for the formation of integrated circuits. Substrates are typically made of materials selected based on their electrical, thermal, and structural properties, such as silicon, gallium arsenide, or sapphire. The crystal structure and surface quality of the substrate are used to determine the performance and reliability of the semiconductor device.

[0055] In the context of this disclosure, the term "plasma-enhanced atomic layer deposition" or PEALD refers to a variant of atomic layer deposition (ALD) that incorporates plasma to enhance chemical reactions during the deposition process. PEALD uses a plasma source to generate highly reactive substances, such as radicals and ions, which enables film growth at lower temperatures compared to conventional thermal ALD. This makes PEALD particularly suitable for depositing films on thermosensitive substrates or realizing materials with specific properties that are difficult to produce using thermal methods.

[0056] In the context of this invention, while the term "photoresist" refers to a photosensitive resin whose solubility in a developing solution changes due to the action of light, thereby obtaining an image corresponding to the exposed pattern, the term "positive photoresist" refers to a photosensitive material used in optical lithography, wherein the exposed areas become more soluble in the developing solution after exposure to ultraviolet (UV) light. The chemical structure of the resist changes upon exposure, allowing the developing agent to selectively remove the exposed areas, leaving an identical copy of the mask pattern on the substrate. Conversely, in the context of this disclosure, the term "negative photoresist" refers to a photosensitive material in which exposure to UV light causes polymerization or crosslinking, making the exposed areas insoluble in the developing solution. The unexposed areas dissolve during development, leaving a reversed pattern of the mask on the substrate. Negative photoresists may be advantageous in applications requiring thicker films, better adhesion, and lower processing costs, although they generally offer lower resolution compared to positive photoresists.

[0057] The terms “first” and “second”, etc., as used herein, do not indicate any order, quantity, or importance, but are used to distinguish one element from another. The terms “an,” “a,” and “the” do not indicate a limitation on quantity herein and are to be interpreted as encompassing both the singular and plural forms, unless otherwise indicated herein or clearly contradicted by the context. As used herein, the suffix “(s)” is intended to include both the singular and plural forms of the term it modifies, thereby including one or more of that term (e.g., a membrane includes one or more membranes).

[0058] Throughout this specification, references to "an exemplary embodiment," "another exemplary embodiment," "exemplary embodiment," etc., indicate that a particular element (e.g., feature, structure, and / or characteristic) described in connection with an exemplary embodiment is included in at least one exemplary embodiment described herein and may or may not be present in other exemplary embodiments. Furthermore, it should be understood that the described elements may be combined in any suitable manner in the various exemplary embodiments.

[0059] Furthermore, for the purposes of this disclosure, directional or positional terms such as “top,” “apex,” “bottom,” “near side,” “far side,” “bottom,” “upper part,” “lower part,” “side,” “front,” “front,” “forward,” “rear,” “back,” “tail,” “above,” “below,” “left side,” “right side,” “radial,” “vertical,” “upward,” “downward,” “outer side,” “inner side,” “external,” “inner,” “middle” are used only to conveniently describe various exemplary embodiments of this disclosure.

[0060] As used herein, the term "comprising" and its derivatives are intended as open-ended terms that specify the presence of stated features, elements, components, groups, integers, and / or steps, but do not exclude the presence of other unstated features, elements, components, groups, integers, and / or steps. The foregoing also applies to words with similar meanings, such as the terms "comprising," "having," and their derivatives.

[0061] In the context of this disclosure, the term "operable" means that the system and / or device and / or program or specific element or step is operable, fully functional, size-defined, adapted, and calibrated, including elements for and satisfying applicable operational requirements to perform the described functions when initiated, coupled, implemented, actuated, influenced, achieved, or when the executable program is executed by at least one processor associated with the system and / or device. Regarding systems and circuits, the term "operable" means that the system and / or circuitry is fully functional and calibrated, including logic with the necessary hardware and firmware, and circuitry for and satisfying applicable operational requirements to perform the described functions when executed by at least one processor.

[0062] Therefore, this paper provides a method for forming an etch mask or a portion thereof for photolithography in a semiconductor manufacturing process, implemented in a microreactor direct atomic layer deposition (µDALP) system, the etch mask having its minimum feature at a substrate plane, the method comprising: depositing and / or removing a first strip using the µDALP system; and depositing and / or removing a second strip using the µDALP system (in other words, adding a second strip if the first strip is added; and removing a second strip if the first strip is removed), wherein: the first strip and the second strip are configured to form a cross pattern having a predetermined overlapping region; and the cross pattern is adapted, sized, and configured to form two acute angles, wherein the minimum feature is defined at the acute angle formed by the first strip and the second strip, thereby forming at least a portion of the etch mask, wherein (i) the step of depositing the first strip includes depositing a first material strip configured to form a film having a predetermined thickness; and the step of depositing the second strip includes depositing a second material configured to form a film having a predetermined thickness; and conversely, (ii) the step of removing the first strip includes removing the first material strip film having a predetermined thickness;The step of removing the second strip includes removing a second material strip having a predetermined thickness, (iii) the first and / or second materials forming the first and / or second strips are resistant to the etching process, or (iv) the first and / or second materials forming the first and / or second strips are sensitive to the etching process, wherein (v) (e.g., additional) photolithography is selected from the group consisting of: optical lithography, extreme ultraviolet lithography (EUV), electron beam lithography, nanoimprint lithography, X-ray lithography, focused ion beam lithography (FIB), scanning probe lithography, directional self-assembly (DSA) lithography, or a lithography process including one or more of the foregoing, wherein (vi) the etching process is selected from the group consisting of: reactive ion etching (RIE), deep reactive ion etching (DRIE), ion beam etching (IBE), chemical vapor etching (CVE), wet chemical etching, plasma etching, laser ablation, electron beam etching, and optical lithography-assisted etching, wherein (vii) The method further includes (viii) exposing the substrate to an ultraviolet (UV) light source at a wavelength operable to develop an etch mask after material deposition and / or removal, wherein (ix) at least one material deposited or removed in the first and second strips comprises a photosensitive material, and (x) at least one material deposited and / or removed comprises a chemical vapor deposition (CVD) precursor or a plasma-enhanced atomic layer deposition (PEALD) precursor. The method further includes (xi) depositing an antireflective coating (ARC) layer on the substrate using a µDALP system prior to material deposition and / or removal, wherein (xii) the steps of depositing and / or removing the first strip and respectively depositing and / or removing the second strip... The two-strip step is configured to form a predetermined pattern of cross-film strips, each pattern comprising a plurality of first strip materials crossed by a plurality of second strip materials. The method further includes (xiii) exposing the substrate to a photoresist before depositing and / or removing the material and using the photoresist as a patterned mask for depositing and / or removing the material corresponding to the first strip or the second strip, wherein (xiv) the cross pattern is configured to form alignment marks on the substrate for etching the mask. The method further includes (xv) using a first etchant (referring to a chemical used to dissolve a target material layer) to remove the second strip and remove a first portion of the substrate at a predetermined first rate ratio (thickness / time variation, e.g., dz / dt).And using a second etchant, the second strip and a second portion of the substrate are removed at a predetermined second rate, wherein (xvi) the etching rate of the first strip is faster than the etching rate of the substrate, (xvii) slower than the etching rate of the substrate, or (xviii) the same as the etching rate of the substrate, wherein (xix) the etching rate of the second strip is faster than the etching rate of the substrate, (xx) slower than the etching rate of the substrate, or (xxi) the same as the etching rate of the substrate, wherein (xxii) the steps of removing the second strip and removing the first portion of the substrate and removing the first strip and removing the second portion of the substrate are performed using the same etching process, or wherein (xxiii) the steps of removing the second strip and removing the first portion of the substrate and removing the first strip and removing the second portion of the substrate are performed using different etching processes.

[0063] While the foregoing specification has described apparatus, systems, and methods for forming etch masks with fine features at the substrate level using direct atomic layer processing (DALP) with respect to certain preferred exemplary embodiments, and many details have been set forth for illustrative purposes, it will be apparent to those skilled in the art that this disclosure may be implemented in other exemplary embodiments, and that considerable changes may be made to certain details described herein and more fully set forth in the following claims without departing from the basic principles of this disclosure.

Claims

1. A method for forming an etch mask or a portion thereof for photolithography in a semiconductor manufacturing process, implemented in a microreactor direct atomic layer deposition (µDALP) system, the etch mask having minimal features at a substrate plane, the method comprising: a. Using the µDALP system, deposit and / or remove the first stripe; as well as b. Using the aforementioned µDALP system, deposit and / or remove the second stripe, respectively, wherein: The first strip and the second strip are configured to form a cross pattern with a predetermined overlapping area; and the cross pattern is adapted, sized, and configured to form two acute angles, wherein the minimum feature is defined at the acute angle formed by the first strip and the second strip, thereby forming at least the portion of the etch mask.

2. The method according to claim 1, wherein: a. The step of depositing the first strip includes depositing a first material configured to form a film having a predetermined thickness; and b. The step of depositing the second strip includes depositing a second material configured to form a film having a predetermined thickness.

3. The method of claim 2, wherein the first material and / or the second material forming the first strip and / or the second strip are resistant to etching processes.

4. The method of claim 2, wherein the first material and / or the second material forming the first strip and / or the second strip are sensitive to the etching process.

5. The method according to claim 1, wherein the photolithography is selected from the group consisting of: optical photolithography, extreme ultraviolet photolithography (EUV), electron beam photolithography, nanoimprint lithography, X-ray photolithography, focused ion beam lithography (FIB), scanning probe lithography, directional self-assembly (DSA) lithography, or photolithography processes including one or more of the foregoing.

6. The method according to claim 5, wherein the etching process is selected from the group consisting of: reactive ion etching (RIE), deep reactive ion etching (DRIE), ion beam etching (IBE), chemical vapor etching (CVE), wet chemical etching, plasma etching, laser ablation, electron beam etching, and photolithography-assisted etching.

7. The method of claim 1, wherein the first strip is deposited and / or removed parallel to the substrate plane.

8. The method of claim 1, further comprising, after depositing and / or removing material, exposing the substrate to an ultraviolet (UV) light source at a wavelength operable to develop the etch mask.

9. The method of claim 1, wherein at least one material deposited or removed in the first strip and the second strip comprises a photosensitive material.

10. The method of claim 1, wherein the at least one material deposited and / or removed comprises a chemical vapor deposition (CVD) precursor or a plasma-enhanced atomic layer deposition (PEALD) precursor.

11. The method of claim 1, further comprising depositing an anti-reflective coating (ARC) layer on the substrate using the µDALP system prior to depositing and / or removing the material.

12. The method of claim 1, wherein the steps of depositing and / or removing the first strip and the steps of depositing and / or removing the second membrane strips are configured to form a predetermined pattern of intersecting membrane strips, each pattern comprising a plurality of first strip materials intersected by a plurality of second strip materials.

13. The method of claim 1, further comprising exposing the substrate to a photoresist prior to depositing and / or removing the material, and using the photoresist as a patterning mask for depositing and / or removing the material.

14. The method of claim 1, wherein the cross pattern is configured to form alignment marks for the etch mask on the substrate.

15. The method according to claim 2, further comprising: a) Using a first etchant, remove the second strip and a first portion of the substrate at a predetermined first rate ratio; as well as b) Using a second etchant, remove the second strip and remove a second portion of the substrate at a predetermined second rate ratio.

16. The method of claim 15, wherein the etching rate of the first strip is faster than the etching rate of the substrate.

17. The method of claim 15, wherein the etching rate of the first strip is slower than the etching rate of the substrate.

18. The method of claim 15, wherein the etching rate of the first strip is the same as the etching rate of the substrate.

19. The method of claim 15, wherein the etching rate of the second strip is faster than the etching rate of the substrate.

20. The method of claim 15, wherein the etching rate of the second strip is slower than the etching rate of the substrate.

21. The method of claim 15, wherein the etching rate of the second strip is the same as the etching rate of the substrate.

22. The method of claim 15, wherein the steps of removing the second strip and removing the first portion of the substrate and removing the first strip and removing the second portion of the substrate are performed using the same etching process.

23. The method of claim 15, wherein the steps of removing the second strip and removing the first portion of the substrate and removing the first strip and removing the second portion of the substrate are performed using different etching processes.

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