Semiconductor device manufacturing method

Abstract

The method for manufacturing a semiconductor device includes the following steps: forming a lower resist (4) on a substrate (1) having a plurality of electrode portions (2, 2a) on its surface; patterning a first opening on the lower resist (4) such that the first opening corresponds to the shape of an air bridge (7) connecting the plurality of electrode portions (2, 2a); forming a power supply layer (5) on the lower resist (4) including the first opening; forming an upper resist (6) on the power supply layer (5) and patterning a second opening on the upper resist (6) such that the second opening corresponds to the shape of the air bridge (7); forming the air bridge (7) by depositing a film on the power supply layer (5) within the second opening; and removing at least the upper resist (6) by spraying dry ice particles.

Description

Technical Field

[0001] This disclosure relates to a method for manufacturing a semiconductor device. Background Technology

[0002] In recent years, multi-valued technologies employing digital coherence have been developing to address the increasing communication capacity. For example, Mach-Zehnder type optical modulators, capable of separately controlling the amplitude and phase of light and generating zero-chill optical modulation signals, are used as multi-valued optical modulators. Furthermore, to increase the signal capacity per unit time, the required response speed of optical modulators is continuously increasing. Therefore, there is a need for an optical modulator that can take a low-loss input modulated electrical signal of 64 GBaud or 96 GBaud or higher and generate a high-speed modulated optical signal through electro-optical interaction.

[0003] To achieve the aforementioned high-speed response optical modulator, Mach-Zehnder type optical modulators with traveling-wave electrodes are under active development. As the traveling-wave electrode of the Mach-Zehnder type optical modulator, a high-frequency circuit structure optimized for differential signal drive is applied, thereby enabling the use of a power-efficient differential driver. In this structure, to achieve higher high-frequency characteristics, it is ideal to reduce capacitance by introducing a hollow structure (air bridge) in the circuit, such as the electrode pads connecting the traveling-wave electrode and the driver. However, in the formation of the air bridge in semiconductor devices with severe unevenness, such as Mach-Zehnder type optical modulators, low damage and improved resist removability are indispensable.

[0004] As a low-damage and highly effective resist removal method, for example, the stripping method described in Patent Document 1 discloses the following manufacturing method: dry ice (CO2) particles are blown onto the stripping pattern, i.e., the photoresist, on the Si wafer, and the photoresist is removed together with the metal film on the photoresist, thereby improving the stripping performance.

[0005] Patent Document 1: Japanese Patent Application Publication No. 2000-058546

[0006] The peeling method described in Patent Document 1 uses peeling to process a metal film into a predetermined shape, but it does not disclose or conceive of the application of the peeling method to air bridges.

[0007] The formation of air bridges generally employs the following manufacturing method: sequentially forming a lower resist layer, a power supply layer, and an upper resist layer, followed by the formation of plated wiring electrodes. However, this manufacturing method has the following problems: to prevent lateral etching of the lower resist layer, it is difficult to apply wet etching to remove the upper resist layer. On the other hand, even if dry etching such as ashing is applied to remove the upper resist layer, the resist deteriorates due to thermal damage to the lower resist layer, leading to poor resist removal. Summary of the Invention

[0008] This disclosure is made to solve the above-mentioned problems, and aims to provide a method for reproducibly manufacturing a semiconductor device including an air bridge with excellent reliability and withstand voltage characteristics by using at least dry ice cleaning as a method for removing the upper resist layer during the formation of the air bridge.

[0009] The method for manufacturing a semiconductor device disclosed herein includes a method for manufacturing a semiconductor device comprising an air bridge, wherein the following steps are included:

[0010] In the process of forming a lower resist layer on a substrate having multiple electrode portions on its surface and patterning a first opening in the lower resist layer, the first opening corresponds to the shape of the air bridge that connects the multiple electrode portions;

[0011] The process of forming a power supply layer on the lower resist including the first opening;

[0012] In the process of forming an upper resist layer on the power supply layer and patterning the second opening on the upper resist layer, the second opening corresponds to the shape of the air bridge;

[0013] The process of forming the air bridge by depositing a film on the power supply layer within the second opening; and

[0014] The process of removing at least the upper layer of resist by spraying dry ice particles.

[0015] According to the semiconductor device manufacturing method disclosed herein, dry ice cleaning is used as a method for removing the upper resist layer, thereby achieving the effect of manufacturing a semiconductor device with good reproducibility, excellent reliability and withstand voltage characteristics, and a low defect rate. Attached Figure Description

[0016] Figure 1 This is a top view showing an example of the semiconductor device of Embodiment 1, namely the structure of a Mach-Zehnder type optical modulator.

[0017] Figure 2 This is an enlarged top view of an example of the semiconductor device of Embodiment 1, namely a Mach-Zehnder type optical modulator with an air bridge formed.

[0018] Figure 3 This is a cross-sectional view of a typical air bridge in a semiconductor device.

[0019] Figure 4 This is a process flow diagram illustrating the manufacturing process of the air bridge in the semiconductor device manufacturing method of Embodiment 1.

[0020] Figure 5 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0021] Figure 6 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0022] Figure 7 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0023] Figure 8 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0024] Figure 9 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0025] Figure 10 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0026] Figure 11 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0027] Figure 12 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0028] Figure 13 This is a schematic diagram showing the direction of dry ice particles being ejected relative to the wafer in the semiconductor device manufacturing method of Embodiment 1.

[0029] Figure 14 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 1.

[0030] Figure 15 This is a process flow diagram illustrating the manufacturing process of the air bridge in the semiconductor device manufacturing method of Embodiment 2.

[0031] Figure 16 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 2.

[0032] Figure 17 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 2.

[0033] Figure 18This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 2.

[0034] Figure 19 This is a cross-sectional view showing the manufacturing method of the air bridge in the manufacturing method of the semiconductor device according to Embodiment 2. Detailed Implementation

[0035] Implementation method 1.

[0036] Figure 1 This is a top view illustrating the structure of an example of the semiconductor device of Embodiment 1, namely a Mach-Zehnder type optical modulator 101. Additionally, Figure 2 This is an enlarged top view of the portion of the semiconductor device of Embodiment 1, specifically the Mach-Zehnder type optical modulator 101 in which the air bridge is formed. Furthermore, Figure 2 Corresponding to Figure 1 The area enclosed by a dashed line.

[0037] <Construction of a Mach-Zehnder type optical modulator as an example of a semiconductor device>

[0038] The Mach-Zehnder type optical modulator 101 comprises the following components: an optical input waveguide 102 for waveguided light incident from the outside; an optical output waveguide 103 for emitting processed light to the outside; an MMI (Multi-Mode Interference) coupler 104 for splitting the input light into two beams; an MMI coupler 105 for combining the two input beams into one beam; a pair of traveling wave electrodes 108 and 109 for applying electrical signals to the optical waveguide to modulate the light propagating in the optical waveguide; arm waveguides 106 and 107 for waveguided the modulated light to the next stage; grounding lines 110 and 111 for supplying grounding potential; a terminating resistor 112; phase adjusters 113 and 114 for adjusting the phase of the modulated light; a metal electrode 115; a mesa (separation slot) 116; electrode pads 117; an air bridge 118; and an insulating protective film 120 for protecting the surface.

[0039] like Figure 2 As shown, in order to electrically connect the electrode pad 117 to the traveling wave electrode 109, a bridged air bridge 118 is formed above the optical input waveguide 102.

[0040] <Air Bridges in Semiconductor Devices>

[0041] Figure 3This is a cross-sectional view of a typical air bridge 7 used in a semiconductor device manufactured by the semiconductor device manufacturing method of Embodiment 1. The air bridge 7 comprises the following components: a processing substrate 1 (hereinafter also referred to as a substrate), on which the various parts required for the semiconductor device are formed; traveling wave electrodes 2 and electrode pads 2a (hereinafter simply referred to as electrode pads 2a), such as driver pads, formed on the surface of the processing substrate 1; an insulating protective film 3 covering the surface of the processing substrate 1, having openings at the traveling wave electrodes 2 and electrode pads 2a respectively; a power supply layer 5 electrically connected to the traveling wave electrodes 2 and electrode pads 2a at the openings of the insulating protective film 3, and spatially separated from the insulating protective film 3 between the traveling wave electrodes 2 and electrode pads 2a; and the air bridge 7 formed on the power supply layer 5. Furthermore, the air bridge 7 and the power supply layer 5, which is in close contact with the lower part of the air bridge 7, are sometimes collectively referred to as the air bridge. Additionally, the traveling wave electrodes 2 and electrode pads 2a are collectively referred to as the electrode portion.

[0042] <Processing substrate>

[0043] The processing substrate 1 is processed to correspond to the semiconductor device to be manufactured. As an example of the processing substrate 1, an epitaxial crystal growth substrate mainly composed of III-V compound semiconductors such as gallium nitride (GaN) or indium phosphide (InP) can be cited, which has undergone recrystallization growth or substrate processing in accordance with the component structure of the semiconductor device to be manufactured.

[0044] For example, in the case of GaN-based semiconductor devices, an epitaxial crystal growth of aluminum gallium nitride (AlGaN) or aluminum nitride (AlN) is performed on a GaN on SiC (silicon nitride) substrate or a GaN on Si (silicon) substrate to form a field-effect transistor (HEMT) structure with gate, source, and drain electrodes, as the processing substrate 1.

[0045] In addition, if it is an optical element, examples include distributed feedback lasers (DFB), electro-absorption modulator lasers (EML), and Mach-Zehnder optical modulators.

[0046] A quantum well (MQW) active layer composed of III-V compound semiconductors such as aluminum gallium indium arsenide (AlGaInAs) and indium gallium arsenide phosphide (InGaAsP) is formed on an InP substrate as an optical waveguide. Then, a substrate that has undergone ridge processing on a recrystallized growth substrate such as forming a barrier layer and a contact layer is used as a processing substrate 1 to serve as an optical waveguide and a traveling wave electrode.

[0047] <Manufacturing Method of Air Bridge>

[0048] In the semiconductor device manufacturing method of Embodiment 1, a Mach-Zehnder type optical modulator using an InP substrate is given as an example of a semiconductor device. The manufacturing process of the air bridge in the manufacturing process of the Mach-Zehnder type optical modulator will be described below.

[0049] Figure 4 This is a process flow diagram illustrating the manufacturing process of the air bridge in the semiconductor device manufacturing method of Embodiment 1. The air bridge manufacturing process consists of the following steps: substrate fabrication step ST101, protective film formation step ST102, lower resist pattern formation step ST103, power supply layer formation step ST104, upper resist pattern formation step ST105, air bridge formation step ST106, upper resist removal step ST107, power supply layer removal step ST108, and lower resist removal step ST109. Each step is described in detail below.

[0050] <Substrate fabrication process ST101>

[0051] First, a processing substrate 1 corresponding to the Mach-Zehnder type optical modulator to which the manufacturing object is to be manufactured is produced using a known manufacturing method. As an example of processing corresponding to the Mach-Zehnder type optical modulator, recrystallization growth can be cited. Figure 5 This is a cross-sectional view of the processed substrate 1, which has already undergone recrystallization growth and processing as a Mach-Zehnder type optical modulator. Furthermore, in Figure 5 The parts used to form the Mach-Zehnder type optical modulator in the processing substrate 1 are omitted.

[0052] As an example of the processing substrate 1 corresponding to a Mach-Zehnder type optical modulator, Figure 6 The diagram shows a cross-sectional view of a processed substrate 1 on which the traveling wave electrode 2 and electrode pad 2a are formed. Methods for forming the traveling wave electrode 2 and electrode pad 2a include, for example, vapor deposition or sputtering. Stable metal materials are preferred as the wiring electrodes for constituting the traveling wave electrode 2 and electrode pad 2a. Specifically, alloys of various metals are used, such as gold (Au), titanium (Ti), aluminum (Al), platinum (Pt), and nickel (Ni).

[0053] <Protective film formation process ST102>

[0054] An insulating protective film 3 is formed on the surface of the processing substrate 1 on which the traveling wave electrode 2 and electrode pad 2a are formed, with the aim of improving reliability and withstand voltage characteristics and suppressing process damage. The insulating protective film 3 is provided with openings corresponding to the traveling wave electrode 2 and electrode pad 2a respectively. Figure 7 This is a cross-sectional view of the insulating protective film 3 and the opening after formation. Common types of insulating protective films 3 include oxide films such as silicon oxide (SiO) and aluminum oxide (AlO), and nitride films such as silicon nitride (SiN) and AlN. As for the insulating protective film 3 disclosed herein, oxides or nitrides of elements selected from Si, Al, Ti, tantalum (Ta), tungsten (W), molybdenum (Mo), and zirconium (Zr) can also be used.

[0055] As for the method of forming the insulating protective film 3, plasma-enhanced chemical vapor deposition (PE-CVD), catalytic chemical vapor deposition (Cat-CVD), sputtering, atomic layer deposition (ALD), etc., can be used. Additionally, two-layer, three-layer, or other stacked films with different film types can also be used. Furthermore, multiple methods can be selected as the film formation method. As an example of selecting multiple methods, a method of forming an AlO film using ALD after forming a SiN film by PE-CVD can be given.

[0056] <Sub-layer resist pattern formation process ST103>

[0057] A lower resist 4 is formed by coating the entire surface of a processing substrate 1 with an insulating protective film 3. Using photolithography and etching techniques, an opening (first opening) for the electrode portion, i.e., a resist pattern for the opening for the electrode portion, is formed on the lower resist 4 at the location corresponding to the traveling wave electrode 2 and the electrode pad 2a connected by the air bridge 7. Figure 8 This is a cross-sectional view after the opening (first opening) for the electrode portion is formed in the lower layer of resist 4.

[0058] In the lower resist patterning process ST103, the film thickness of the lower resist 4 is approximately equal to the height of the air bridge 7. Therefore, negative resists that are easy to form thick films are mostly used as resists. However, for optical elements, such as Mach-Zehnder type optical modulators, in order to also serve as bridges for high steps such as ridges, resins with excellent planarity, such as polyimide or benzocyclobutene (BCB), can also be used.

[0059] <Power supply layer formation process ST104>

[0060] A power supply layer 5a is formed on the lower resist 4, on which the electrode opening is provided, and is required in the subsequent plating process. Figure 9 This is a cross-sectional view of the power supply layer 5a after it has been formed. In the power supply layer formation process ST104, when the height of the air bridge 7 is several μm or more, or when the air bridge 7 is formed at a high step such as a raised platform ridge, and considering the coverage to the resist side, it is preferable to form the power supply layer 5a by sputtering. However, when there is no high step on the processing substrate 1, a vapor deposition method or similar method can be used instead of sputtering. Furthermore, as for the type of metal material used in the power supply layer 5a, an alloy using multiple metals such as Au, Ti, Al, Pt, and Ni, such as Ti / Au, is preferred.

[0061] <Top layer resist pattern formation process ST105>

[0062] Next, an upper resist 6 is formed by coating a resist layer on the power supply layer 5a. Using photolithography and etching techniques, a resist pattern corresponding to the shape of the air bridge 7, i.e., an opening (second opening), is formed on the upper resist 6. Figure 10 This is a cross-sectional view showing the pattern formed after the upper resist 6 corresponds to the shape of the air bridge. The film thickness of the upper resist 6 needs to be determined taking into account the film thickness of the air bridge 7, but there are no particular restrictions on the type of resist. However, as a material for the upper resist 6, it is necessary for it to have resistance to the electrolyte when forming the air bridge using electrolytic plating or electroless plating as described later.

[0063] <Air bridge forming process ST106>

[0064] An air bridge 7, consisting of a coating, is formed on the exposed power supply layer 5a at the bottom in the air bridge pattern (second opening) of the upper resist 6 by electrolytic plating or electroless plating. Figure 11 This is a cross-sectional view of the processing substrate 1, including the air bridge 7, after the air bridge has been formed. Examples of plating materials include Ni, Au, chromium (Cr), zinc (Zn), and tin (Sn). Furthermore, Au is the most commonly used metal plating layer for forming air bridges in semiconductor surface processing.

[0065] <Top layer resist removal process ST107>

[0066] Next, remove the top layer of resist 6. Figure 12This is a cross-sectional view of the removal of the top resist layer 6. Resist removal is typically achieved using wet etching. However, air bridges 7 are generally high-step patterns. When wet etching is used to treat areas with high steps, there are areas where the wet etching solution can easily penetrate and areas where it cannot. Therefore, when air bridges are formed using wet etching, uneven etching and resist residue are generated within the wafer surface, becoming major factors contributing to process defects or reliability issues in subsequent processes.

[0067] As a countermeasure to this problem, methods such as dry etching, including ashing, are often used to remove the resist. However, there is a possibility that adverse conditions may occur, such as the lower resist layer 4 being degraded due to thermal damage caused by dry etching, resulting in resist residue during the removal of the lower resist layer, which could lead to malfunctions such as reduced voltage withstand capability of the semiconductor device.

[0068] To address the aforementioned problems, in the semiconductor device manufacturing method of Embodiment 1, resist removal based on blowing dry ice particles onto the surface (hereinafter referred to as dry ice cleaning) is performed. As a resist removal mechanism based on dry ice cleaning, the following mechanism is considered: by blowing dry ice particles, the dry ice particles that enter the lower part of the resist use their expansion during vaporization to peel off the resist.

[0069] Dry ice cleaning completely avoids damage caused by high temperatures and prevents damage to the air bridge 7 formed by the plating. Furthermore, it completely avoids unwanted etching effects such as side etching of the power supply layer 5a and the underlying resist 4.

[0070] If dry ice cleaning is used, in addition to the effects mentioned above, dirt and foreign matter attached to the wafer surface can also be removed simultaneously. Therefore, in the next process such as ion milling, foreign matter attached to the wafer surface that may have inadvertently acted as a mask and caused processing abnormalities can also be removed at the same time.

[0071] In other words, by using dry ice cleaning during the removal of the upper resist layer, the deterioration of the lower resist layer can be suppressed, thus improving resist removability. Additionally, as a secondary effect of dry ice cleaning, surface foreign matter can be suppressed. As a result, the reliability and withstand voltage characteristics of semiconductor devices can be improved, the defect rate reduced, and the capacitance characteristic of air bridges decreased.

[0072] Figure 13 This is an example of a method for implementing dry ice cleaning. For example... Figure 13As shown, for a 3-inch InP wafer 15 on which the processing substrate 1 is formed, dry ice particles are continuously sprayed from a certain direction while the nozzle reciprocates from the anti-directional side to the directional side. This is to limit the spraying to only one direction to suppress the re-adhesion of resist, foreign matter, etc. However, when removing the lower resist 4 described later, it is necessary to remove the lower resist 4 formed directly below the pier portion of the air bridge 7. Therefore, it is important to spray dry ice particles from a direction perpendicular to the direction in which the air bridge 7 is bridged, that is, parallel to the extension direction of the air bridge.

[0073] In addition to the aforementioned spraying conditions, other factors that can be considered as spraying conditions for dry ice particles include the spray nozzle, spraying pressure, particle size, distance between the wafer and the nozzle, prevention of condensation, and feed speed of the stage on the wafer. The detailed settings for each factor need to be appropriately varied depending on the width, size, and film thickness of the air bridge 7. For example, conditions suitable for use in the manufacturing method of a Mach-Zehnder type optical modulator, an example of a semiconductor device, include a spraying pressure of 1 MPa or less and a particle size of 30 μm or less.

[0074] <Power supply layer removal process ST108>

[0075] After the upper resist 6 was stripped by dry ice cleaning, the unwanted portions in the power supply layer 5a were removed. Figure 14 This is a cross-sectional view after the unwanted portion of the power supply layer 5a has been removed. The method for removing the power supply layer 5a depends on the type of metal material constituting the power supply layer 5a. Selective removal of the power supply layer 5a by wet etching is unsuitable because the power supply layer 5a, which is etched into the lower part of the coating from the side, becomes the main factor in coating peeling. Furthermore, even with dry etching, it is difficult to cut the metal material constituting the power supply layer 5a. Therefore, the most common and preferred method is to physically remove the unwanted portion of the power supply layer 5a by means such as ion milling.

[0076] <Sub-layer resist removal process ST109>

[0077] Finally, the lower layer of resist 4 is removed. The air bridge 7 is completed by removing the lower layer of resist 4. That is, Figure 3 This is a cross-sectional view after the air bridge is completed. Regarding the removal method of the lower resist 4, it is necessary to remove the resist that needs to reach the lower part of the air bridge 7, so in the past, wet etching was required for removal. However, if wet etching is used alone to remove the resist that has hardened or deteriorated due to ion milling, the possibility of defects such as resist residue in the hardened and deteriorated resist areas increases.

[0078] Therefore, in the semiconductor device manufacturing method of Embodiment 1, when removing the lower resist 4, a two-stage etching method is used: first, the hardened resist portion of the lower resist 4 is removed by dry ice cleaning, and then the resist at the bottom of the air bridge 7 is removed by wet etching. As a result, the generation of resist residue at the bottom of the air bridge 7 can be suppressed, thus preventing damage to the semiconductor surface. Furthermore, the generation of foreign matter on the surface can be prevented, thereby eliminating all adverse factors related to air bridge formation. After the above steps, the air bridge 7 is completed on the processing substrate 1.

[0079] <Effects of Implementation Method 1>

[0080] According to the semiconductor device manufacturing method of Embodiment 1, dry ice cleaning is used as the method for removing the upper resist layer. Therefore, the reliability and withstand voltage characteristics are excellent, and the semiconductor device with a low defect rate can be easily manufactured.

[0081] Implementation method 2.

[0082] The air bridge 7a used in the semiconductor device manufactured by the semiconductor device manufacturing method of Embodiment 2 and Figure 3 The air bridges 7 shown are identical in shape. The difference in the semiconductor device manufacturing method of Embodiment 2 is that, instead of forming the air bridge 7a by plating as in Embodiment 1, it is fabricated using vapor deposition and wet stripping. Furthermore, wet stripping is an example of a stripping method.

[0083] When forming the air bridge 7a using vapor deposition and wet stripping methods, it is possible to use only a double-layer resist without a power supply layer. However, in this case, it is important to focus on the resist structure and use a method with high peelability. In the semiconductor device manufacturing method of Embodiment 2, high peelability is achieved by using dry ice cleaning to peel off the metal film constituting the air bridge. The air bridge formation process in the semiconductor device manufacturing method of Embodiment 2 will be described below.

[0084] Figure 15This is a process flow diagram illustrating the manufacturing process of the air bridge in the semiconductor device manufacturing method of Embodiment 2. The air bridge manufacturing process consists of the following steps: substrate fabrication step ST201, protective film formation step ST202, lower resist pattern formation step ST203, upper resist pattern formation step ST204, air bridge formation step ST205, stripping step ST206, and residual resist removal step ST207. The steps up to the substrate fabrication step ST201 and the protective film formation step ST202 are the same as those in the semiconductor device manufacturing method of Embodiment 1, and therefore are omitted from the description. The lower resist pattern formation step ST203 and the subsequent steps will be described in detail below.

[0085] <Sub-layer resist pattern formation process ST203>

[0086] A photoresist is applied to the entire surface of the processing substrate 1 on which an insulating protective film 3 is formed, forming a lower photoresist 4a. Using photolithography and etching techniques, a photoresist pattern, i.e. an opening (first opening) for the electrode portion, is formed on the lower photoresist 4 at the location corresponding to the traveling wave electrode 2 and the electrode pad 2a connected by the air bridge 7a. Figure 16 This is a cross-sectional view after the opening (first opening) for forming the electrode section is formed. In the lower resist patterning process ST203, the film thickness of the lower resist 4a is approximately equal to the height of the air bridge 7, so negative resists that are easy to form thick films are mostly used as resists. However, regarding the lower resist 4a, considering the ease of stripping in subsequent processes, positive resists or the like can also be used instead of negative resists.

[0087] <Top layer resist pattern formation process ST204>

[0088] Next, a photoresist is coated onto the lower photoresist 4a to form the upper photoresist 8. Using photolithography and etching techniques, an opening (second opening) corresponding to the shape of the air bridge is formed on the upper photoresist 8. Figure 17 This is a cross-sectional view after the air bridge pattern of the upper resist 8 has been formed. Unlike the semiconductor device manufacturing method of Embodiment 1, no plating layer is used, therefore a power supply layer does not need to be formed.

[0089] The thickness of the upper resist 8 needs to be determined by taking into account the thickness of the air bridge 7a. Furthermore, to improve peelability, the upper resist 8 is preferably made of a resist material that has an inverted conical shape. Additionally, it is important to obtain a shape in which the upper resist 8 expands relative to the lower resist 4a by using a resist material that expands due to thermal history such as baking.

[0090] <Air bridge forming process ST205>

[0091] Using the air bridge pattern (second opening) of the upper resist 8 as a mask, the air bridge metal film 9 is formed by vapor deposition or the like. Figure 18 This is a cross-sectional view of the processing substrate 1 including the air bridge metal film 9 after its formation. The air bridge metal film 9 differs from the coating in Embodiment 1 and is difficult to thicken. However, the air bridge metal film 9 can be alloyed.

[0092] For example, as a specific example of the metal material for the air bridge metal film 9, the same metal material as the traveling wave electrode 2 and the electrode pad 2a can be used, that is, an alloy of Au, Ti, Al, Pt, Ni, etc. However, when using a highly isotropic sputtering method or other methods for forming the air bridge metal film 9, there is a high possibility of defects such as burrs and poor peeling due to the adhesion of the metal film to the resist sidewall. Therefore, compared with sputtering, a highly anisotropic vapor deposition method is preferred as the method for forming the air bridge metal film 9.

[0093] <Stripping Process ST206>

[0094] After the metal film 9 for air bridge is formed, the upper resist 8 and the lower resist 4a are removed simultaneously by dry ice cleaning. Figure 19 This is a cross-sectional view of the air bridge based on the vapor-deposited film after peeling is completed. The dry ice cleaning method can also be applied to the method described in Embodiment 1, i.e. Figure 13 The implementation method is shown.

[0095] In Embodiment 1, the upper resist 6 and the lower resist 4 are typically removed separately by dry ice cleaning. However, in Embodiment 2, both the upper resist 8 and the lower resist 4a can be removed simultaneously by a single dry ice cleaning. Therefore, in Embodiment 2, compared to Embodiment 1, air bridges can be formed with fewer steps, thus reducing the manufacturing cost of the semiconductor device.

[0096] <Residual Resist Removal Process ST207>

[0097] After dry ice cleaning-based stripping, the resist residue remaining on the underside of the air bridge 7a is removed by wet etching. After these processes, the air bridge 7a is completed.

[0098] <Effects of Implementation Method 2>

[0099] According to the semiconductor device manufacturing method of Embodiment 2, a stripping process based on dry ice cleaning is applied during the formation of the air bridge. Therefore, compared with Embodiment 1, the number of processes can be reduced. In addition, the power supply layer required for the film formation in Embodiment 1 is not required in Embodiment 2. Therefore, the electrode etching process based on ion milling is not required, and there is no concern about the deterioration of the resist. Therefore, it has the effect of obtaining a semiconductor device manufacturing method with excellent reliability that can easily manufacture without damage to the surface of the semiconductor layer.

[0100] In Embodiments 1 and 2, a Mach-Zehnder type optical modulator was described as an example of a semiconductor device to be manufactured using the method. However, the manufacturing methods of the semiconductor devices in Embodiments 1 and 2 can be applied to any semiconductor device with an air bridge, except for the Mach-Zehnder type optical modulator.

[0101] This disclosure describes various exemplary embodiments and examples, but the various features, methods and functions described in one or more embodiments are not limited to the application of a specific embodiment, and can be applied to the embodiments alone or in various combinations.

[0102] Therefore, many variations not illustrated are conceivable within the scope of this disclosure. These include variations on at least one constituent element, additions, omissions, and extraction of at least one constituent element combined with constituent elements of other embodiments.

[0103] Explanation of reference numerals in the attached figures

[0104] 1…Processing substrate; 2, 108, 109…Traveling wave electrodes; 2a, 117…Electrode pads; 3, 120…Insulating protective film; 4, 4a…Lower layer resist; 5, 5a…Power supply layer; 6, 8…Upper layer resist; 7, 7a, 118…Air bridge; 9…Metal film for air bridge; 15…3-inch InP wafer; 101…Mach-Zehnder type optical modulator; 102…Optical input waveguide; 103…Optical output waveguide; 104, 105…MMI coupler; 106, 107…Arm waveguide; 110, 111…Grounding line; 112…Terminal resistor; 113, 114…Phase adjuster; 115…Metal electrode; 116…Mechanism (separation slot).

Claims

1. A method for manufacturing a semiconductor device, comprising an air bridge, characterized in that, It includes the following processes: In the process of forming a lower resist layer on a substrate having multiple electrode portions on its surface and patterning a first opening in the lower resist layer, the first opening corresponds to the shape of the air bridge that connects the multiple electrode portions; The process of forming a power supply layer on the lower resist including the first opening; In the process of forming an upper resist layer on the power supply layer and patterning the second opening on the upper resist layer, the second opening corresponds to the shape of the air bridge; The process of forming the air bridge by depositing a film on the power supply layer within the second opening; as well as The process of removing at least the upper layer of resist by spraying dry ice particles.

2. The method for manufacturing a semiconductor device according to claim 1, characterized in that, In addition to removing the upper layer of resist, at least a portion of the lower layer of resist is removed by spraying the dry ice particles.

3. The method for manufacturing a semiconductor device according to claim 2, characterized in that, It also includes a step of removing the remaining underlying resist by wet etching after removing at least a portion of the underlying resist by spraying the dry ice particles.

4. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, characterized in that, The dry ice particles are sprayed from a direction perpendicular to the direction of the air bridge.

5. A method for manufacturing a semiconductor device according to any one of claims 1 to 4, characterized in that, It also includes a step of removing unwanted portions of the power supply layer after removing the upper resist layer.

6. A method for manufacturing a semiconductor device, comprising an air bridge, characterized in that, It includes the following processes: In the process of forming a lower resist layer on a substrate having multiple electrode portions on its surface and patterning a first opening in the lower resist layer, the first opening corresponds to the shape of the air bridge that connects the multiple electrode portions; In the process of forming an upper layer of resist on the lower layer of resist including the first opening, and patterning the second opening on the upper layer of resist, the second opening corresponds to the shape of the air bridge; The process of forming a metal film on the upper resist layer including the second opening; as well as The process of forming the air bridge involves using the spraying of dry ice particles to remove the upper and lower layers of resist and thus peel off the resist.

7. The method for manufacturing a semiconductor device according to claim 6, characterized in that, The metal film is formed by vapor deposition.

8. A method for manufacturing a semiconductor device according to any one of claims 1 to 7, characterized in that, The substrate has pre-processed portions that constitute a Mach-Zehnder type optical modulator.

9. A method for manufacturing a semiconductor device according to any one of claims 1 to 8, characterized in that, For a wafer on which the substrate is formed, dry ice particles are sprayed onto the wafer from a certain direction while the nozzle is reciprocated from the anti-orientation side to the orientation side.

10. The method for manufacturing a semiconductor device according to claim 9, characterized in that, The "certain direction" refers to a direction parallel to the extension direction of the air bridge.

11. A method for manufacturing a semiconductor device according to any one of claims 1 to 10, characterized in that, An insulating protective film is formed on the substrate.

12. A method for manufacturing a semiconductor device according to any one of claims 1 to 11, characterized in that, The air bridge is applicable to the electrode portion including the traveling wave electrode of a Mach-Zehnder type optical modulator.

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