A dual-motor control method, device, system and vehicle
Patent Information
- Application Number
- CN202610964140.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-30
- Publication Date
- 2026-08-18
AI Technical Summary
[0003]鉴于上述现有技术的不足,本申请的目的在于提供一种双电机控制方法、装置、系统及车辆,其旨在解决现有技术中双电机驱动系统因电机或控制器发生故障时,两个电机的运行模式不一致导致协同控制出现失调的问题
[0034] By adopting the above technical solution and configuring the dual-motor control system in the vehicle, the vehicle can coordinate the operating modes of the two motors in a timely manner when a hardware failure occurs in the dual-motor drive system. This avoids the loss of coordinated control and imbalance of the vehicle's driving torque caused by mode conflicts, and significantly improves the driving safety and stability of the vehicle when the dual-motor control system fails.
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Figure CN122585002A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of vehicle technology, and specifically to a dual-motor control method, device, system, and vehicle. Background Technology
[0002] Some vehicles are equipped with a dual-motor drive system. When the motor or controller of the dual-motor drive system fails, the operating modes of the two motors may conflict, leading to a mismatch in the coordinated control of the dual-motor drive system. Summary of the Invention
[0003] In view of the shortcomings of the prior art, the purpose of this application is to provide a dual-motor control method, device, system and vehicle, which aims to solve the problem of mismatch in cooperative control caused by the inconsistent operating modes of the two motors when the motor or controller fails in the dual-motor drive system.
[0004] In a first aspect, embodiments of this application provide a dual-motor control method, wherein the dual motors include two motors, and the dual-motor control method includes the following steps:
[0005] Obtain the operating mode of the two motors, wherein the operating mode is one of PWM mode, FW mode, and ASC mode;
[0006] When the two motors operate in different modes, the operating modes of the two motors are synchronized to the higher priority operating mode of the two motors.
[0007] The FW mode has a higher priority than the ASC mode, and the ASC mode has a higher priority than the PWM mode.
[0008] By adopting the above technical solution, the operating modes of the two motors are acquired and compared in real time. When the operating modes of the two motors are inconsistent, the operating modes of the two motors are synchronized to the operating mode with higher priority. This can effectively avoid the loss of coordinated control caused by the conflict of operating modes in the dual motor drive system, thereby ensuring the driving stability and safety of the vehicle when the dual motor drive system fails.
[0009] In some embodiments, the dual-motor control method includes the following steps: when a hardware failure occurs in the drive circuit of at least one of the two motors, the method of acquiring the operating modes of the two motors is executed.
[0010] By adopting the above technical solution, when a hardware failure occurs in the drive circuit of the dual-motor drive system, the acquisition and synchronization of the dual-motor operation mode are triggered. This allows for timely intervention and coordination after a hardware failure, avoiding mode conflicts caused by asynchronous fault responses between the two motors. This improves the timeliness and coordination of fault handling, thereby ensuring the driving stability and safety of the vehicle when a failure occurs in the dual-motor drive system.
[0011] In some embodiments, the dual-motor control method includes the following steps:
[0012] When the drive circuit of at least one of the two motors fails simultaneously in both the upper and lower bridge arms, the corresponding motor is controlled to enter FW mode.
[0013] When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, but the upper and lower bridge arms do not fail simultaneously, the corresponding motor is controlled to enter ASC mode.
[0014] When the drive circuit of at least one of the two motors experiences an upper or lower bridge arm failure, but no hardware overvoltage failure occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter ASC mode.
[0015] When the drive circuit of at least one of the two motors experiences an upper or lower bridge arm failure, but no hardware overvoltage failure occurs, and the motor speed or bus voltage does not meet the preset ASC entry conditions, the corresponding motor is controlled to enter FW mode.
[0016] The above technical solution employs a tiered approach to assess bridge arm faults, overvoltage faults, and operating conditions, enabling graded handling of different fault types: When both upper and lower bridge arms fail simultaneously, the system enters FW mode to avoid the risk of ASC (Automatic Safety Control) malfunction; in the case of an overvoltage fault, ASC is prioritized to quickly dissipate back EMF energy and protect the bus capacitors; and if operating conditions do not permit, the system reverts to FW mode as a final safety fallback. This graded handling mechanism, while ensuring hardware safety, selects the optimal safety state based on the severity of the fault and the system status, avoiding the problems of minor faults triggering drastic responses or serious faults being handled untimely.
[0017] In some embodiments, the ASC mode includes an upper arm ASC mode and a lower arm ASC mode, and the dual-motor control method includes the following steps:
[0018] When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, and an upper bridge arm fault occurs but no lower bridge arm fault occurs, the corresponding motor is controlled to enter the lower bridge arm ASC mode.
[0019] When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, a lower bridge arm fault occurs but no upper bridge arm fault occurs, the corresponding motor is controlled to enter the upper bridge arm ASC mode.
[0020] By adopting the above technical solution, when a hardware overvoltage fault occurs, the available ASC bridge arm is selected according to the fault location of the bridge arm and enters ASC mode. ASC protection can still be performed when a single bridge arm fails, which improves the fault tolerance and execution reliability of ASC mode.
[0021] In some embodiments, the ASC mode includes an upper arm ASC mode and a lower arm ASC mode, and the dual-motor control method includes the following steps:
[0022] When the drive circuit of at least one of the two motors experiences an upper bridge arm fault, but no lower bridge arm fault or hardware overvoltage fault occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter the lower bridge arm ASC mode.
[0023] When a lower bridge arm fault occurs in the drive circuit of at least one of the two motors, but no upper bridge arm fault or hardware overvoltage fault occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter the upper bridge arm ASC mode.
[0024] By adopting the above technical solution, when no overvoltage fault occurs and the operating conditions allow for entering ASC, the available ASC bridge arm is selected to enter ASC mode, so that the execution of ASC mode does not depend on the integrity of a specific bridge arm, further improving the flexibility of fault handling and the fault tolerance of the system.
[0025] In some embodiments, the two motors are a first motor and a second motor, and the dual-motor control method includes the following steps: configuring the output status code of a first I / O port group corresponding to the first motor to control the operating mode of the first motor; configuring the output status code of a second I / O port group corresponding to the second motor to control the operating mode of the second motor.
[0026] By adopting the above technical solution, the motor's operating mode is controlled by configuring multiple IO ports to output status codes. Without the need for complex communication protocols or data interaction, the software decision results can be quickly and reliably transmitted to the drive circuit in hardware, ensuring the real-time and deterministic nature of state switching under fault conditions.
[0027] In some embodiments, the two motors are used to drive two coaxially mounted wheels.
[0028] By adopting the above technical solution, the dual-motor control method can effectively avoid the loss of coordinated control caused by the conflict of operating modes in the dual-motor drive system, and ensure the coordination and consistency of the output torque of the left and right wheels under fault conditions. This significantly improves the driving stability and active safety of the vehicle when the drive system fails, and is especially suitable for distributed vehicles with coaxial dual-motor drive.
[0029] Secondly, this application provides a dual-motor control device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of any of the above-described dual-motor control methods.
[0030] By adopting the above technical solution, the dual-motor control method is implemented by the processor executing the computer program stored in the memory. This allows the dual-motor control method to be implemented and deployed in the form of a software product, which has good versatility and portability, and is easy to promote and apply on different vehicle platforms.
[0031] Thirdly, this application provides a dual-motor control system, including an ASC logic circuit, a first drive circuit, a second drive circuit, and the aforementioned dual-motor control device. The dual motors include a first motor and a second motor. The dual-motor control device is provided with a first I / O port group and a second I / O port group. The first I / O port group and the second I / O port group are respectively connected to the ASC logic circuit. The ASC logic circuit is respectively connected to the first drive circuit and the second drive circuit. The first drive circuit is connected to the first motor, and the second drive circuit is connected to the second motor. The dual-motor control device is configured to: output a first state code to the ASC logic circuit through the first I / O port group to control the first drive circuit corresponding to the first I / O port group to drive the first motor into an operating mode corresponding to the first state code; and output a second state code to the ASC logic circuit through the second I / O port group to control the second drive circuit corresponding to the second I / O port group to drive the second motor into an operating mode corresponding to the second state code.
[0032] The above technical solution employs an ASC logic circuit to receive the status codes output from the I / O port group of the dual-motor control device. After decoding, the system directly controls the drive circuit to drive the motor into the corresponding operating mode, achieving a fast signal link from software decision-making to hardware execution. This hardware architecture eliminates the need for software involvement in the decoding process, resulting in fast state switching response and high reliability, ensuring the timeliness and determinism of motor state switching after a fault occurs.
[0033] Fourthly, this application provides a vehicle including the aforementioned dual-motor control system.
[0034] By adopting the above technical solution and configuring the dual-motor control system in the vehicle, the vehicle can coordinate the operating modes of the two motors in a timely manner when a hardware failure occurs in the dual-motor drive system. This avoids the loss of coordinated control and imbalance of the vehicle's driving torque caused by mode conflicts, and significantly improves the driving safety and stability of the vehicle when the dual-motor control system fails. Attached Figure Description
[0035] To more clearly illustrate the technical solutions in the embodiments of this application or the background art, the accompanying drawings used in the embodiments of this application will be described below.
[0036] Figure 1 This is a circuit diagram of the dual-motor control system disclosed in an embodiment of this application;
[0037] Figure 2 This is a schematic diagram of the structure of the dual-motor control system disclosed in the embodiments of this application;
[0038] Figure 3 This is a schematic diagram of the structure of the dual-motor control device disclosed in the embodiments of this application;
[0039] Figure 4 This is a flowchart of the dual-motor control method disclosed in the embodiments of this application;
[0040] Figure 5 A flowchart illustrating a specific example of the dual-motor control method disclosed in this application;
[0041] Figure 6 A flowchart of a dual-motor control method disclosed in another specific example of this application;
[0042] Figure 7 This is a schematic diagram of the vehicle disclosed in the embodiments of this application.
[0043] Explanation of reference numerals in the attached figures:
[0044] 1-Vehicle; 10-Dual-motor control system; 101-Dual-motor control device; 102-ASC logic circuit; 103-First drive circuit; 104-Second drive circuit; 105-Low-voltage input module; 106-Communication module; 107-First motor position acquisition module; 108-DC bus voltage acquisition module; 109-Second motor position acquisition module; 110-First motor current sensor; 111-Second motor current sensor; 1011-Memory; 1012-Processor. Detailed Implementation
[0045] The terms “first,” “second,” etc., are used for descriptive purposes only and have no sequential or technical meaning, nor should they be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated.
[0046] The embodiments of this application are described below with reference to the accompanying drawings.
[0047] As described in the background section, some vehicles are equipped with a dual-motor drive system. When the motor or controller of the dual-motor drive system fails, the operating modes of the two motors may conflict, leading to a mismatch in the coordinated control of the dual-motor drive system.
[0048] To address the problem of misalignment in coordinated control caused by inconsistent operating modes of the two motors in existing dual-motor drive systems when motor or controller malfunctions, this application proposes a dual-motor control method.
[0049] This dual-motor control method is applied to dual-motor control systems. Please refer to [link / reference]. Figure 1 , Figure 1 This is a circuit diagram of the dual-motor control system 10 disclosed in an embodiment of this application. The dual-motor control system 10 includes an Active Shortcut Control (ASC) module. The system comprises an ASCII logic circuit 102 (active short-circuit), a first drive circuit 103, a second drive circuit 104, and a dual-motor control device 101. The dual motors include a first motor and a second motor. The dual-motor control device 101 is provided with a first I / O (Input / Output) port group and a second I / O port group. The first I / O port group and the second I / O port group are respectively connected to the ASCII logic circuit 102. The ASCII logic circuit 102 is respectively connected to the first drive circuit 103 and the second drive circuit 104. The first drive circuit 103 is connected to the first motor, and the second drive circuit 104 is connected to the second motor. The dual-motor control device 101 is configured to: output a first state code to the ASCII logic circuit 102 through the first I / O port group to control the first drive circuit 103 corresponding to the first I / O port group to drive the first motor into an operating mode corresponding to the first state code; and output a second state code to the ASCII logic circuit 102 through the second I / O port group to control the second drive circuit 104 corresponding to the second I / O port group to drive the second motor into an operating mode corresponding to the second state code.
[0050] In the aforementioned dual-motor control system 10, an ASCII logic circuit 102 receives the status codes output from the I / O port group of the dual-motor control device 101. After decoding, it directly controls the drive circuit to drive the motor into the corresponding operating mode, realizing a fast signal link from software decision-making to hardware execution. This hardware architecture has a fast state switching response speed and high reliability, ensuring the timeliness and determinism of motor state switching after a fault occurs.
[0051] In specific implementation, the first IO port group and the second IO port group each include multiple IO ports. For example, the first IO port group and the second IO port group each include three IO ports. IO11, IO12 and IO13 in the first IO port group serve as status signals of the first drive circuit 103 output after a fault interruption, and IO21, IO22 and IO23 in the second IO port group serve as status signals of the second drive circuit 104 output after a fault interruption.
[0052] In specific implementation, the signals FSENb1, FSS1_HS and FSS1_LS output by the ASC logic circuit 102 are respectively input to the driver chip of the first driver circuit 103. The states of FSENb1, FSS1_HS and FSS1_LS need to correspond with IO11, IO12 and IO13 in the first IO port group of the dual motor control device 101. The driver chip can be directly controlled to enter PWM (Pulse Width Modulation) mode, FW (Free Wheeling) mode, upper bridge ASC mode and lower bridge ASC mode according to different state combinations.
[0053] In specific implementation, the signals FSENb2, FSS2_HS and FSS2_LS output by the ASC logic circuit 102 are respectively input to the driver chip of the second driver circuit 104. The states of FSENb2, FSS2_HS and FSS2_LS need to correspond with IO21, IO22 and IO23 in the second IO port group of the dual motor control device 101. The driver chip can be directly controlled to enter PWM mode, FW mode, upper bridge ASC mode and lower bridge ASC mode according to different state combinations.
[0054] In practical implementation, the ASC logic circuit 102 is used to perform hardware decoding of the status codes output by the first and second I / O port groups, and outputs corresponding drive control signals to the first drive circuit 103 and the second drive circuit 104 respectively according to the decoding results. More specifically, the ASC logic circuit 102 is internally configured with encoding-mode mapping logic, which parses the three-bit combination encoding of IO11, IO12, and IO13 into the three control signals FSENb1, FSS1_HS, and FSS1_LS required by the first drive circuit 103; similarly, it parses the combination encoding of IO21, IO22, and IO23 into the control signals FSENb2, FSS2_HS, and FSS2_LS required by the second drive circuit 104. The ASC logic circuit 102 can be implemented using combinational logic gates, for example, using a logic chip. In specific implementation, the ASC logic circuit 102 in the prior art can also be referred to. A sub-ASC logic circuit is set for each of the first driving circuit 103 and the second driving circuit 104, and the ASC logic circuit 102 is formed by the two sub-ASC logic circuits.
[0055] In the aforementioned dual-motor control system 10, the safe state after a fault occurs is entered by the dual-motor control device 101 through IO control, which can avoid the uncontrollable state caused by the hardware and software simultaneously entering the safe state after a fault occurs.
[0056] Please see Figure 2 , Figure 2 This is a schematic diagram of the structure of the dual-motor control system 10 disclosed in an embodiment of this application. The dual-motor control system 10 includes a low-voltage input module 105, a communication module 106, a dual-motor control device 101, a first drive circuit 103, a second drive circuit 104, a DC bus voltage acquisition module 108, a first motor position acquisition module 107, a second motor position acquisition module 109, a first motor current sensor 110, a second motor current sensor 111, and the dual-motor control device 101. The dual-motor control device 101 is connected to the first drive circuit 103, the second drive circuit 104, and the DC bus voltage acquisition module 109. 8. The first motor position acquisition module 107, the second motor position acquisition module 109, the first motor current sensor 110, and the second motor current sensor 111 are connected. The dual-motor control device 101 controls the first drive circuit 103 and the second drive circuit 104 to turn on and off through PWM waves. The dual-motor control device 101 needs to acquire analog signals from the DC bus voltage acquisition module 108, the first motor position acquisition module 107, the second motor position acquisition module 109, the first motor current sensor 110, and the second motor current sensor 111.
[0057] The low-voltage input module 105 provides low-voltage power to the dual-motor control system 10. The low-voltage input module 105 mainly includes a low-voltage battery input, a low-voltage SBC (System Basis Chip) power supply module, and a driver chip power supply module.
[0058] The communication module 106 mainly includes CAN communication between the dual-motor control system 10 and the vehicle, and LIN communication between the dual-motor control system 10 and the motor oil pump. The communication module 106 realizes the signal delivery and command delivery execution between the dual-motor control system 10, the vehicle controller, and the motor oil pump.
[0059] The dual-motor control device 101, together with the first drive circuit 103 and the second drive circuit 104, forms a control drive circuit to convert the DC power from the power battery into AC power to drive the motor. When a hardware interruption fault occurs in the dual-motor control system 10, the fault handling circuit composed of the dual-motor control device 101, the first drive circuit 103, and the second drive circuit 104 controls the dual-motor control system 10 to enter the corresponding safe state.
[0060] The DC bus voltage acquisition module 108, the first motor position acquisition module 107, the second motor position acquisition module 109, the first motor current sensor 110, and the second motor current sensor 111 are all essential analog signal acquisition modules for motor control, and also serve as signal sources for analog signal diagnosis.
[0061] The aforementioned dual-motor control system 10 drives two motor drive circuits simultaneously through a dual-motor control device 101. Except for the DC bus voltage acquisition signal shared by the two drive modules, the acquisition of other analog signals is independent. Therefore, it can quickly handle the faulty side when a fault occurs on one side.
[0062] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of the dual-motor control device 101 disclosed in an embodiment of this application. The dual-motor control device 101 includes a memory 1011, a processor 1012, and a computer program stored in the memory 1011. The processor 1012 executes the computer program to implement the steps of the dual-motor control method.
[0063] In practical implementation, the dual-motor control device 101 can be directly implemented using a microcontroller unit (MCU). The MCU typically integrates a central processing unit, flash memory and static random access memory, timers, a PWM generator module, an analog-to-digital converter, and multiple general-purpose input / output ports, possessing sufficient computing power and peripheral resources to independently run pre-programmed control software.
[0064] Please refer to Figure 4 , Figure 4 This is a flowchart of a dual-motor control method disclosed in an embodiment of this application. The dual-motor system includes two motors, and the dual-motor control method includes the following steps:
[0065] S1000: Obtain the operating mode of the two motors, which can be one of PWM mode, FW mode, or ASC mode;
[0066] S2000: When the two motors operate in different modes, control the two motors to synchronize their operating modes to the mode with the higher priority among them.
[0067] Among them, FW mode has a higher priority than ASC mode, and ASC mode has a higher priority than PWM mode.
[0068] By adopting the above technical solution, the operating modes of the two motors are acquired and compared in real time. When the operating modes of the two motors are inconsistent, the operating modes of the two motors are synchronized to the operating mode with higher priority. This can effectively avoid the loss of coordinated control caused by the conflict of operating modes in the dual motor drive system, thereby ensuring the driving stability and safety of the vehicle when the dual motor drive system fails.
[0069] In practical implementation, the dual-motor control device 101 obtains the operating modes of the two motors. When the operating modes of the two motors are different, the dual-motor control device 101 controls the operating modes of the two motors to be synchronized to the operating mode with the higher priority among the two.
[0070] In some embodiments, the dual-motor control method includes the following steps: when a hardware failure occurs in the drive circuit of at least one of the two motors, the operating modes of the two motors are acquired.
[0071] By adopting the above technical solution, when a hardware failure occurs in the drive circuit of the dual-motor drive system, the acquisition and synchronization of the dual-motor operation mode are triggered. This allows for timely intervention and coordination after a hardware failure, avoiding mode conflicts caused by asynchronous fault responses between the two motors. This improves the timeliness and coordination of fault handling, thereby ensuring the driving stability and safety of the vehicle when a failure occurs in the dual-motor drive system.
[0072] In some embodiments, the dual-motor control method includes the following steps:
[0073] When the drive circuit of at least one of the two motors fails simultaneously in both the upper and lower bridge arms, the corresponding motor is controlled to enter FW mode.
[0074] When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, and the upper and lower bridge arms do not fail simultaneously, the corresponding motor is controlled to enter ASC mode.
[0075] When the drive circuit of at least one of the two motors experiences an upper or lower bridge arm failure, but no hardware overvoltage failure occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter ASC mode.
[0076] When the drive circuit of at least one of the two motors experiences an upper or lower bridge arm failure, but no hardware overvoltage failure occurs, and the motor speed or bus voltage does not meet the preset ASC entry conditions, the corresponding motor is controlled to enter FW mode.
[0077] The above technical solution employs a tiered approach to assess bridge arm faults, overvoltage faults, and operating conditions, enabling graded handling of different fault types: When both upper and lower bridge arms fail simultaneously, the system enters FW mode to avoid the risk of ASC (Automatic Safety Control) malfunction; in the case of an overvoltage fault, ASC is prioritized to quickly dissipate back EMF energy and protect the bus capacitors; and if operating conditions do not permit, the system reverts to FW mode as a final safety fallback. This graded handling mechanism, while ensuring hardware safety, selects the optimal safety state based on the severity of the fault and the system status, avoiding the problems of minor faults triggering drastic responses or serious faults being handled untimely.
[0078] In some embodiments, the ASC mode includes an upper arm ASC mode and a lower arm ASC mode, and the dual-motor control method includes the following steps:
[0079] When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, and an upper bridge arm fault occurs but no lower bridge arm fault occurs, the corresponding motor is controlled to enter the lower bridge arm ASC mode.
[0080] When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, or when a lower bridge arm fault occurs but no upper bridge arm fault occurs, the corresponding motor is controlled to enter the upper bridge arm ASC mode.
[0081] By adopting the above technical solution, when a hardware overvoltage fault occurs, the available ASC bridge arm is selected according to the fault location of the bridge arm and enters ASC mode. ASC protection can still be performed when a single bridge arm fails, which improves the fault tolerance and execution reliability of ASC mode.
[0082] In some embodiments, the ASC mode includes an upper arm ASC mode and a lower arm ASC mode, and the dual-motor control method includes the following steps:
[0083] When the drive circuit of at least one of the two motors experiences an upper bridge arm fault, but no lower bridge arm fault or hardware overvoltage fault occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter the lower bridge arm ASC mode.
[0084] When a lower bridge arm fault occurs in the drive circuit of at least one of the two motors, but no upper bridge arm fault or hardware overvoltage fault occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter the upper bridge arm ASC mode.
[0085] By adopting the above technical solution, when no overvoltage fault occurs and the operating conditions allow for entering ASC, the available ASC bridge arm is selected to enter ASC mode, so that the execution of ASC mode does not depend on the integrity of a specific bridge arm, further improving the flexibility of fault handling and the fault tolerance of the system.
[0086] In some embodiments, the two motors are a first motor and a second motor, and the dual-motor control method includes the following steps: configuring the output status code of the first I / O port group corresponding to the first motor to control the operating mode of the first motor; configuring the output status code of the second I / O port group corresponding to the second motor to control the operating mode of the second motor.
[0087] The above technical solution uses multiple I / O ports to output status codes to control the motor's operating mode. This eliminates the need for complex communication protocols or data interaction, enabling rapid and reliable transmission of software decision results to the drive circuit via hardware. This ensures the real-time and deterministic nature of state switching during fault conditions. After a fault occurs, the safe state is entered via I / O control by the dual-motor control device 101, preventing uncontrollable states caused by simultaneous entry of hardware and software into the safe state after a fault.
[0088] In some embodiments, two motors are used to drive two coaxially mounted wheels.
[0089] By adopting the above technical solution, the dual-motor control method can effectively avoid the loss of coordinated control caused by the conflict of operating modes in the dual-motor drive system, and ensure the coordination and consistency of the output torque of the left and right wheels under fault conditions. This significantly improves the driving stability and active safety of the vehicle when the drive system fails, and is especially suitable for distributed vehicles with coaxial dual-motor drive.
[0090] Please see Figure 5 , Figure 5 The flowchart illustrates a specific example of a dual-motor control method disclosed in this application. The dual-motor control method includes the following steps:
[0091] Step S201: Determine whether there is a hardware fault interruption in the dual-motor control system 10. If there is, proceed to step S202; otherwise, proceed to step S215.
[0092] Step S202: Determine whether there is a lower bridge fault in the dual-motor control system 10. If there is, proceed to step S203; otherwise, proceed to step S210.
[0093] Step S203: Determine whether there is an upper bridge fault in the dual-motor control system 10. If there is, proceed to step S204; otherwise, proceed to step S205.
[0094] Step S204: Configure the IO output state of the dual motor control device 101 to enable the corresponding motor to enter FW mode.
[0095] Step S205: Determine whether there is a hardware overvoltage fault in the dual-motor control system 10. If there is, proceed to step S206; otherwise, proceed to step S207.
[0096] Step S206: By configuring the IO output state of the dual motor control device 101, the corresponding motor enters the upper bridge ASC mode.
[0097] Step S207: Determine whether the current motor speed and bus voltage allow entry into ASC. If they are satisfied, proceed to step S208; otherwise, proceed to step S209.
[0098] Step S208: By configuring the IO output state of the dual motor control device 101, the corresponding motor enters the upper bridge ASC mode.
[0099] Step S209: Configure the IO output state of the dual motor control device 101 to enable the corresponding motor to enter FW mode.
[0100] Step S210: Determine whether there is a hardware overvoltage fault in the dual-motor control system 10. If there is, proceed to step S211; otherwise, proceed to step S212.
[0101] Step S211: By configuring the IO output state of the dual motor control device 101, the corresponding motor enters the lower bridge ASC mode.
[0102] Step S212: Determine whether the current motor speed and bus voltage allow entry into ASC. If they are satisfied, proceed to step S213; otherwise, proceed to step S214.
[0103] Step S213: By configuring the IO output state of the dual motor control device 101, the corresponding motor enters the lower bridge ASC mode.
[0104] Step S214: By configuring the IO output state of the dual motor control device 101, the corresponding motor enters the FW mode.
[0105] Step S215: Configure the IO output state of the dual motor control device 101 to enable the corresponding motor to enter PWM mode.
[0106] Please see Figure 6 , Figure 6 The flowchart illustrates a dual-motor control method disclosed in another specific example of this application. In this example, the two motors are a first motor and a second motor, and the dual-motor control method includes the following steps:
[0107] Step S301: In response to a fault in at least one motor, read the current status of the first motor and the second motor.
[0108] Step S302: Determine whether the first motor is in PWM mode. If yes, proceed to step S303; otherwise, proceed to step S309.
[0109] Step S303: Determine whether the second motor is in PWM mode. If yes, proceed to step S304; otherwise, proceed to step S305.
[0110] Step S304: Both the first motor and the second motor maintain their current state.
[0111] Step S305: Determine whether the second motor is in FW mode. If yes, proceed to step S306; otherwise, proceed to step S307.
[0112] Step S306: Switch the first motor to FW mode.
[0113] Step S307: The second motor is in ASC mode.
[0114] Step S308: Switch the first motor to ASC mode.
[0115] Step S309: Determine whether the first motor is in FW mode. If yes, proceed to step S310; otherwise, proceed to step S316.
[0116] Step S310: Determine whether the second motor is in PWM mode. If yes, proceed to step S311; otherwise, proceed to step S312.
[0117] Step S311: Switch the second motor to FW mode.
[0118] Step S312: Determine whether the second motor is in FW mode. If yes, proceed to step S213; otherwise, proceed to step S314.
[0119] Step S313: Both the first motor and the second motor maintain their current state.
[0120] Step S314: The second motor is in ASC mode.
[0121] Step S315: Switch the second motor to FW mode.
[0122] Step S316: The first motor is in ASC mode.
[0123] Step S317: Determine whether the second motor is in PWM mode. If yes, proceed to step S318; otherwise, proceed to step S319.
[0124] Step S318: Switch the second motor to ASC mode.
[0125] Step S319: Determine whether the second motor is in FW mode. If yes, proceed to step S320; otherwise, proceed to step S321.
[0126] Step S320: Switch the first motor to FW mode.
[0127] Step S321: The second motor is in ASC mode.
[0128] Step S322: Both the first motor and the second motor maintain their current state.
[0129] Please see Figure 7 , Figure 7 A vehicle 1 disclosed in this application includes the aforementioned dual-motor control system 10.
[0130] By adopting the above technical solution and configuring the dual-motor control system 10 in the vehicle 1, the vehicle 1 can coordinate the operation modes of the two motors in a timely manner when a hardware failure occurs in the dual-motor drive system, thereby avoiding the loss of coordinated control and imbalance of the vehicle's driving torque caused by mode conflict, and significantly improving the driving safety and stability of the vehicle 1 under fault conditions.
[0131] In specific implementation, vehicle 1 can be, but is not limited to, a pure electric vehicle (PEV / BEV), a hybrid electric vehicle (HEV), a range-extended electric vehicle (REEV), a plug-in hybrid electric vehicle (PHEV), or a new energy vehicle.
[0132] It should be understood that the application of this application is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims. Those skilled in the art can understand that implementing all or part of the processes of the above embodiments and making equivalent changes according to the claims of this application still fall within the scope of this application.
Claims
1. A dual-motor control method, wherein the dual motors comprise two motors, characterized in that, The dual-motor control method includes the following steps: Obtain the operating mode of the two motors, wherein the operating mode is one of PWM mode, FW mode, and ASC mode; When the two motors operate in different modes, the operating modes of the two motors are synchronized to the higher priority operating mode of the two motors. The FW mode has a higher priority than the ASC mode, and the ASC mode has a higher priority than the PWM mode.
2. The dual-motor control method as described in claim 1, characterized in that, Includes the following steps: When a hardware failure occurs in the drive circuit of at least one of the two motors, the process of obtaining the operating modes of the two motors is performed.
3. The dual-motor control method as described in claim 1, characterized in that, Includes the following steps: When the drive circuit of at least one of the two motors fails simultaneously in both the upper and lower bridge arms, the corresponding motor is controlled to enter FW mode. When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, but the upper and lower bridge arms do not fail simultaneously, the corresponding motor is controlled to enter ASC mode. When the drive circuit of at least one of the two motors experiences an upper or lower bridge arm failure, but no hardware overvoltage failure occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter ASC mode. When the drive circuit of at least one of the two motors experiences an upper or lower bridge arm failure, but no hardware overvoltage failure occurs, and the motor speed or bus voltage does not meet the preset ASC entry conditions, the corresponding motor is controlled to enter FW mode.
4. The dual-motor control method as described in claim 3, characterized in that, The ASC mode includes the upper arm ASC mode and the lower arm ASC mode, and the dual-motor control method includes the following steps: When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, and an upper bridge arm fault occurs but no lower bridge arm fault occurs, the corresponding motor is controlled to enter the lower bridge arm ASC mode. When a hardware overvoltage fault occurs in the drive circuit of at least one of the two motors, a lower bridge arm fault occurs but no upper bridge arm fault occurs, the corresponding motor is controlled to enter the upper bridge arm ASC mode.
5. The dual-motor control method as described in claim 3, characterized in that, The ASC mode includes the upper arm ASC mode and the lower arm ASC mode, and the dual-motor control method includes the following steps: When the drive circuit of at least one of the two motors experiences an upper bridge arm fault, but no lower bridge arm fault or hardware overvoltage fault occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter the lower bridge arm ASC mode. When a lower bridge arm fault occurs in the drive circuit of at least one of the two motors, but no upper bridge arm fault or hardware overvoltage fault occurs, and the motor speed and bus voltage meet the preset ASC entry conditions, the corresponding motor is controlled to enter the upper bridge arm ASC mode.
6. The dual-motor control method as described in claim 1, characterized in that, The two motors are a first motor and a second motor, and the dual-motor control method includes the following steps: configuring the output status code of the first I / O port group corresponding to the first motor to control the operating mode of the first motor; configuring the output status code of the second I / O port group corresponding to the second motor to control the operating mode of the second motor.
7. The dual-motor control method as described in claim 1, characterized in that, The two motors are used to drive the two coaxially mounted wheels.
8. A dual-motor control device, characterized in that, The device includes a memory (1011), a processor (1012), and a computer program stored in the memory (1011), wherein the processor (1012) executes the computer program to implement the steps of the dual-motor control method according to any one of claims 1-7.
9. A dual-motor control system, characterized in that, The device includes an ASCII logic circuit (102), a first drive circuit (103), a second drive circuit (104), and a dual-motor control device (101) as described in claim 8. The dual motors include a first motor and a second motor. The dual-motor control device (101) is provided with a first I / O port group and a second I / O port group. The first I / O port group and the second I / O port group are respectively connected to the ASCII logic circuit (102). The ASCII logic circuit (102) is respectively connected to the first drive circuit (103) and the second drive circuit (104). The first drive circuit (103) is connected to the first motor. The second drive circuit (104) is connected to the second motor. The dual-motor control device (101) is configured to: output a first state code to the ASC logic circuit (102) through the first IO port group to control the first drive circuit (103) corresponding to the first IO port group to drive the first motor into the operating mode corresponding to the first state code; and output a second state code to the ASC logic circuit (102) through the second IO port group to control the second drive circuit (104) corresponding to the second IO port group to drive the second motor into the operating mode corresponding to the second state code.
10. A vehicle, characterized in that, Includes the dual-motor control system (10) as described in claim 9.