Fault Identification Method and Device for Three-Phase Uncontrolled Rectifier Systems

Abstract

This application relates to a fault identification method and apparatus for a three-phase uncontrolled rectifier system. The method includes: acquiring the bus voltage of the three-phase uncontrolled rectifier system and determining the corresponding ripple frequency based on the bus voltage; reducing the equivalent capacitance value of the bus filter capacitor bank when the ratio of the ripple frequency to the input voltage frequency of the three-phase power supply exceeds a preset threshold; detecting the number of extreme points of the bus voltage within one power frequency cycle and determining the fault type based on the number of extreme points. This application solves the problem in the prior art of difficulty in distinguishing between three-phase unbalanced bus voltage ripple and phase-loss bus voltage ripple, which affects the stable operation of the system.

Description

Technical Field

[0001] This application relates to the field of fault identification, and in particular to a fault identification method and apparatus for a three-phase uncontrolled rectifier system. Background Technology

[0002] Three-phase uncontrolled rectifiers are widely used in diode inverters, motor drives, etc. For rectifiers without input voltage detection, the characteristic detection of the bus voltage is usually used to identify input power supply phase loss faults. However, under certain operating conditions, the ripple of the three-phase unbalanced bus voltage is very similar to the ripple of the bus voltage when a phase is lost, such as... Figure 1a and Figure 1b The waveforms shown indicate that existing technologies cannot accurately distinguish between these two fault types, which can easily lead to misjudgment as a phase loss when the input voltage is unbalanced in three phases, thus affecting the stable operation of the system. Summary of the Invention

[0003] This application provides a fault identification method and apparatus for a three-phase uncontrolled rectifier system to solve the problem in the prior art that it is difficult to distinguish between three-phase unbalanced bus voltage ripple and phase loss bus voltage ripple, which affects the stable operation of the system.

[0004] In a first aspect, this application provides a fault identification method for a three-phase uncontrolled rectifier system. The system includes a three-phase power supply, a three-phase rectifier, and a bus filter capacitor bank. The method includes: acquiring the bus voltage in the three-phase uncontrolled rectifier system and determining the corresponding ripple frequency based on the bus voltage; reducing the equivalent capacitance value of the bus filter capacitor bank when the ratio of the ripple frequency to the input voltage frequency of the three-phase power supply exceeds a preset threshold; detecting the number of extreme points of the bus voltage within one power frequency cycle and determining the fault type based on the number of extreme points.

[0005] Secondly, this application provides a fault identification device for a three-phase uncontrolled rectifier system. The system includes a three-phase power supply, a three-phase rectifier, and a bus filter capacitor bank. The device includes: a first processing module for acquiring the bus voltage in the three-phase uncontrolled rectifier system and determining the corresponding ripple frequency based on the bus voltage; a second processing module for reducing the equivalent capacitance value of the bus filter capacitor bank when the ratio of the ripple frequency to the input voltage frequency of the three-phase power supply exceeds a preset threshold; and a third processing module for detecting the number of extreme points of the bus voltage within one power frequency cycle and determining the fault type based on the number of extreme points.

[0006] Thirdly, this application provides an electronic device, comprising: at least one communication interface; at least one bus connected to the at least one communication interface; at least one processor connected to the at least one bus; and at least one memory connected to the at least one bus, wherein the processor is configured to execute the fault identification method for a three-phase uncontrolled rectifier system described in the first aspect of this application.

[0007] Fourthly, this application also provides a computer storage medium storing computer-executable instructions for executing the fault identification method for a three-phase uncontrolled rectifier system described in the first aspect of this application.

[0008] Compared with the prior art, the technical solution provided in this application has the following advantages: The method provided in this application amplifies the characteristic differences between phase loss and three-phase imbalance in the ripple waveform by actively reducing the equivalent capacitance value of the bus filter capacitor bank, and then clearly distinguishes them by extreme point counting, fundamentally solving the problem of misjudgment caused by the similarity of the two fault ripples in the prior art. In addition, this application is based entirely on the existing bus voltage sampling circuit, without the need to add an additional three-phase input voltage sampling sensor or detection circuit, and does not increase hardware costs. It is especially suitable for cost-sensitive applications such as variable frequency air conditioners and motor drives. Moreover, the extreme point counting as a criterion has a simple and clear judgment logic, low computational load, and is easy to implement in real time on a low-cost microcontroller. It also has strong adaptability to different operating conditions and different load conditions, and has high engineering practical value. Attached Figure Description

[0009] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0010] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0012] Figure 1a A comparative schematic diagram of voltage ripple in 80% of three-phase unbalanced bus voltage in existing technologies; Figure 1bThis is a schematic diagram of the bus voltage ripple when phase A of the power input is missing, as shown in the prior art. Figure 2 This is a schematic diagram of the input phase loss and three-phase imbalance identification circuit provided in an embodiment of this application; Figure 3 A flowchart illustrating a fault identification method for a three-phase uncontrolled rectifier system provided in this application embodiment; Figure 4 An optional flowchart of a fault identification method for a three-phase uncontrolled rectifier system provided in an embodiment of this application; Figure 5 A flowchart illustrating the method for identifying three-phase uncontrolled rectifier input voltage imbalance and phase loss faults provided in this application embodiment; Figure 6a A schematic diagram comparing the voltage ripple of an 80% three-phase unbalanced bus after reducing bus capacitance, as provided in an embodiment of this application. Figure 6b This is a schematic diagram of the bus voltage ripple when phase A is missing after reducing the bus capacitance, provided in an embodiment of this application. Figure 7 A schematic diagram of the structure of a fault identification device for a three-phase uncontrolled rectifier system provided in an embodiment of this application; Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0014] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0015] To address the problem in existing technologies where it is difficult to distinguish between three-phase unbalanced bus voltage ripple and phase-loss bus voltage ripple, which affects system stability, this application provides a fault identification method for a three-phase uncontrolled rectifier system, such as... Figure 2As shown, the three-phase uncontrolled rectifier system includes a three-phase power supply, a three-phase rectifier, and a bus filter capacitor bank. Based on this, the method of this application embodiment is as follows: Figure 3 The following are included: Step 301: Collect the bus voltage in the three-phase uncontrolled rectifier system and determine the corresponding ripple frequency based on the bus voltage; In this embodiment, the voltage signal across the DC bus capacitor in the three-phase uncontrolled rectifier system is the bus voltage. The bus voltage is the DC output voltage after the three-phase AC input voltage is rectified by the rectifier bridge; it is a DC signal containing ripple. The ripple is the AC component superimposed on the DC component, originating from the periodic pulsation of the output voltage during the commutation process of the three-phase rectifier bridge. When the three-phase input voltage is balanced and operating normally, one power frequency cycle after rectification contains six pulsation peaks; therefore, the fundamental frequency of the bus voltage ripple is six times the input voltage frequency. When the input voltage is abnormal, the ripple frequency changes.

[0016] Based on the acquired bus voltage signal, its ripple frequency is calculated. Specifically, the AC ripple component can be extracted by filtering the bus voltage signal, and then the ripple frequency can be calculated using methods such as zero-crossing detection, period measurement, or spectrum analysis. The ripple frequency reflects the operating state of the three-phase input voltage and serves as the initial basis for subsequent fault detection. In a specific example, taking a three-phase AC input power supply with a power frequency of 50Hz as an example: when the three-phase input voltage is normally balanced, the rectified bus voltage ripple contains six pulsating wavefronts, and its fundamental frequency is 6 × 50Hz = 300Hz; when the input voltage experiences a phase loss or three-phase imbalance, the ripple frequency drops to 2 × 50Hz = 100Hz.

[0017] Step 302: If the ratio of the ripple frequency to the input voltage frequency of the three-phase power supply exceeds a preset threshold, reduce the equivalent capacitance value of the bus filter capacitor bank. When the ratio of the bus voltage ripple frequency to the input voltage frequency of the three-phase power supply exceeds the first preset threshold, it indicates that there is an abnormality in the current input state and further fault type identification is required. At this time, the operation of reducing the equivalent capacitance value of the bus filter capacitor bank is performed.

[0018] It should be noted that the ratio exceeding the preset threshold is intended to cover situations where the ripple frequency abnormally increases or decreases. According to the basic principle of three-phase rectification, the ripple frequency is six times the input frequency when the input is normal (ratio of 6), and twice the input frequency when there is a phase loss or three-phase imbalance (ratio of 2). Since the ripple frequency is the same in both phase loss and three-phase imbalance states (both twice the input frequency), frequency information alone cannot distinguish between the two faults, thus further processing is required. In a preferred embodiment of this application, the preset threshold can be set to a value close to but less than 2. When the ratio of the ripple frequency to the input voltage frequency is 2, subsequent operations are triggered. In other embodiments of this application, subsequent operations can also be triggered when the ratio of the ripple frequency to the input voltage frequency is other abnormal values ​​(such as 1 or 1.5).

[0019] In addition, a specific way to reduce the equivalent capacitance of the bus filter capacitor bank can be: by controlling the on / off state of controllable switching devices (such as relays, semiconductor switches, etc.) connected in series with each capacitor branch, some capacitor branches in the bus filter capacitor bank can be disconnected from the circuit, thereby reducing the equivalent capacitance of the bus filter capacitor bank. Combined with... Figure 2 It can be seen that the bus filter capacitor bank consists of multiple capacitor branches connected in parallel, such as C1, C2, C3, and C4. Each branch is controlled by relays K1, K2, K3, and K4 respectively. Under initial normal operation, K1 is closed, and K2, K3, and K4 are open. At this time, the equivalent capacitance of the bus filter capacitor bank is C1 (if C1 represents the equivalent of multiple parallel capacitors, then the initial equivalent capacitance is C1 + C2 + C3 in parallel; the specific configuration depends on the actual circuit design). When an abnormal ripple frequency (e.g., 100Hz) is detected, the system first reduces the load operating frequency to a preset safe frequency, and then controls the switching off of the capacitor branches that need to be disconnected (e.g., ...). Figure 2 The branch containing the discharge resistor C3 is turned on (K3 is closed, R1 is connected) to release the residual charge of the capacitor. After the discharge is complete, the controllable switching device corresponding to the capacitor branch is disconnected (K1 is disconnected), and the capacitor branch is cut off from the bus filter capacitor bank. At this time, the equivalent capacitance of the bus filter capacitor bank decreases, the filtering degree of the bus voltage ripple is reduced, and the waveform details are revealed.

[0020] It is evident that when the equivalent capacitance of the bus filter capacitor bank is large, its filtering effect on the bus voltage is strong, which can mask the subtle differences in ripple waveforms under phase loss and three-phase imbalance conditions, making it difficult to distinguish the bus voltage waveforms under the two faults (e.g., Figure 1a and Figure 1b(As shown). By actively reducing the equivalent capacitance of the bus filter capacitor bank, the filtering effect is weakened, allowing the true ripple shape of the bus voltage to be exposed. The waveform details that were originally smoothed out by the large capacitor are revealed, thus amplifying the difference between the ripple waveform of phase loss and three-phase imbalance from indistinguishable to significantly distinguishable.

[0021] Step 303: Detect the number of extreme points of the bus voltage within one power frequency cycle, and determine the fault type based on the number of extreme points.

[0022] After reducing the equivalent capacitance of the bus filter capacitor bank, the number of extreme points of the bus voltage within one power frequency cycle is detected. Extreme points refer to local maxima and minima in the bus voltage ripple waveform, reflecting the number of fluctuations in the ripple waveform within a complete cycle. After obtaining the number of extreme points, the fault type is determined based on this number. The principle is as follows: Under a phase loss fault, only two phases of the three-phase rectifier bridge are conducting, and the rectified bus voltage contains only two main pulsating wavefronts within one power frequency cycle. Therefore, the ripple waveform is simple, and the number of extreme points is small (e.g., 2). Under a three-phase imbalance fault, three phases of the three-phase rectifier bridge are still conducting, but due to the different amplitudes of the three phases, the rectified bus voltage contains multiple pulsating wavefronts with varying amplitudes within one power frequency cycle, resulting in a complex ripple waveform and a larger number of extreme points (e.g., 4 or more). By comparing the detected number of extreme points with a preset judgment threshold or threshold range, phase loss faults and three-phase imbalance faults can be clearly distinguished. If the number of extreme points is within the first preset range (e.g., the number of extreme points is 1 or 2, corresponding to a fault with a small number of extreme points), it is determined to be a phase loss fault; if the number of extreme points is within the second preset range (e.g., the number of extreme points is 3 or more, corresponding to a fault with a large number of extreme points), it is determined to be a three-phase imbalance fault.

[0023] Based on steps 301 to 303 above, by actively reducing the equivalent capacitance value of the bus filter capacitor bank, the characteristic differences in the ripple waveform between phase loss and three-phase imbalance are amplified. Furthermore, by using extreme point counting, a clear distinction is achieved, fundamentally solving the misjudgment problem caused by the similarity of the two fault ripples in the prior art. In addition, this application is entirely based on existing bus voltage sampling circuits, requiring no additional three-phase input voltage sampling sensors or detection circuits, thus not increasing hardware costs. It is particularly suitable for cost-sensitive applications such as variable frequency air conditioners and motor drives. Moreover, using extreme point counting as a criterion provides a simple and clear judgment logic with low computational load, making it easy to implement in real-time on low-cost microcontrollers. It also exhibits strong adaptability to different operating conditions and load conditions, possessing high engineering practical value.

[0024] In optional embodiments of this application, such as Figure 4As shown, the method of determining the fault type based on the number of extreme points involved in step 303 above can further include: Step 11: If the number of extreme points is within the first preset range, it is determined to be a phase loss fault; When a phase loss fault occurs in the three-phase input voltage (e.g., phase A is missing), the two rectifier diodes associated with the missing phase in the three-phase rectifier bridge are in the off state throughout the entire power frequency cycle. In effect, only the remaining two phases of the rectifier bridge conduct alternately. Under these circumstances, the output voltage of the rectifier bridge contains only two effective conduction intervals within one power frequency cycle, each corresponding to a major voltage ripple front. Therefore, the bus voltage ripple waveform exhibits only two significant fluctuations within one power frequency cycle, with a relatively small total number of maxima and minima. Under typical phase loss conditions, after reducing the bus filter capacitor, the number of extreme points in the ripple waveform is usually two (i.e., one maximum and one minimum, or a combination of two maximums and two minimums, depending on the specific waveform shape). In extreme cases, the number of extreme points may be only one (e.g., the waveform exhibits only a single peak). Therefore, the first preset range can be set to a numerical range corresponding to a small number of extreme points, such as one to two extreme points.

[0025] Step 12: If the number of extreme points falls within the second preset range, it is determined to be a three-phase imbalance fault. When a three-phase input voltage imbalance fault occurs (e.g., the amplitude of phase A drops to 80% of its normal value, while the amplitudes of phases B and C are normal), although the amplitudes of the three-phase voltages are not equal, the six rectifier diodes of the three-phase rectifier bridge can still conduct normally within their respective conduction ranges. Due to the different amplitudes of the three phases, the rectified bus voltage contains six pulsating wavefronts with varying amplitudes within one power frequency cycle. Some of these wavefronts have higher amplitudes, while others have lower amplitudes, and some wavefronts may even form local dips or bulges in the waveform due to excessively low amplitudes. These amplitude differences cause the ripple waveform to exhibit multiple fluctuations within one power frequency cycle, with a significantly larger total number of maximum and minimum points than in the case of a phase loss. Under typical three-phase imbalance conditions, after reducing the bus filter capacitor, the number of extreme points in the ripple waveform is usually four or more (e.g., two maximum points and two minimum points, or three maximum points and three minimum points, depending on the degree of imbalance and the specific waveform shape). Therefore, the second preset range can be set to a numerical range corresponding to a large number of extreme points, such as 3 or more, 4 or more, or 5 or more extreme points.

[0026] The first and second preset ranges do not overlap, and the maximum value of the first preset range is less than the minimum value of the second preset range. "Does not overlap" means that the first and second preset ranges have no intersection; that is, no single extreme point value can fall into both preset ranges simultaneously. For example, if the first preset range has an extreme point count ≤ 2 and the second preset range has an extreme point count ≥ 4, then they do not overlap. While the case of an extreme point count = 3 theoretically exists, it rarely occurs in the actual operation of this invention, and can be categorized into a certain range by adjusting the threshold. If the first preset range has an extreme point count = 1 or 2 and the second preset range has an extreme point count = 4, 5, or 6, then they also do not overlap. "The maximum value of the first preset range is less than the minimum value of the second preset range" means that the first preset range is entirely to the left of the second preset range on the number axis; that is, the maximum value in the first preset range is less than the minimum value in the second preset range. For example, the first preset range is the number of extreme points ≤ 2, and its maximum value is 2; the second preset range is the number of extreme points ≥ 4, and its minimum value is 4. 2 < 4, which satisfies the above conditions.

[0027] As can be seen, in this embodiment, the number of extreme points is treated as a one-dimensional scalar. Its comparison with the preset range requires only simple numerical comparison operations, with minimal computational load. The determination can be completed within milliseconds, meeting the response time requirements of the real-time control system. Moreover, the specific boundary values ​​of the first and second preset ranges can be flexibly set according to actual circuit parameters and detection accuracy. Those skilled in the art can obtain the optimal threshold through a limited number of experiments, demonstrating good engineering adaptability.

[0028] In an optional embodiment of this application, the method of reducing the equivalent capacitance value of the bus filter capacitor bank involved in step 302 above may further include: Step 21: Reduce the current load operating frequency to a preset safe frequency and then reduce the equivalent capacitance value of the bus filter capacitor bank. In this embodiment, the load operating frequency refers to the operating frequency of the downstream load of the three-phase uncontrolled rectifier system. In typical application scenarios of this invention, the downstream load of the three-phase uncontrolled rectifier system is usually a variable frequency drive motor load, such as the compressor motor of a variable frequency air conditioner or the drive motor of an industrial frequency converter. For motor loads, the operating frequency determines the motor speed, which in turn determines the system's output power and input current. The higher the operating frequency, the faster the motor speed, the greater the system output power, and the greater the input current drawn from the three-phase power supply; conversely, the lower the operating frequency, the slower the motor speed, and the corresponding decrease in both system output power and input current.

[0029] It should be noted that the solution protected in this application is not limited to motor-type loads. Any load powered by a three-phase uncontrolled rectifier and with adjustable operating power (such as resistive loads, switching power supply loads, etc.) is applicable to the technical solution of this invention. For non-motor-type loads, the load operating frequency can be understood as the equivalent control parameter of the load's operating power or operating state.

[0030] Furthermore, the preset safe frequency refers to the pre-set safe threshold to which the load operating frequency should be reduced when switching the equivalent capacitance value of the bus filter capacitor bank. The setting of this safe frequency needs to comprehensively consider the following factors: 1) During the switching of the equivalent capacitance value of the bus filter capacitor bank, the bus voltage will experience instantaneous fluctuations. When some capacitor branches are disconnected, the equivalent capacitance value of the bus filter capacitor bank decreases, reducing its energy storage and filtering capabilities for the bus voltage. This affects both the instantaneous voltage drop and the recovery time. If the load operates at a high frequency and consumes a large amount of power at this time, the bus voltage drop may exceed the system's minimum allowable operating voltage, leading to undervoltage protection activation or a fault in the downstream inverter.

[0031] 2) Systems with different load types and power ratings have varying tolerance to bus voltage fluctuations. High-power loads, when switching capacitors, may experience large input currents due to excessively high operating frequencies. The voltage drop during capacitor switching may trigger overcurrent protection or damage power switching devices. Low-power loads, on the other hand, have relatively stronger tolerance.

[0032] 3) The specific value of the preset safety frequency can be determined by those skilled in the art through conventional experiments or simulation analysis based on the actual hardware parameters of the system (including bus capacitor value, load power level, voltage / current margin of power switching devices, etc.), without requiring creative effort. In a preferred embodiment of the present invention, the preset safety frequency is set to 30% to 50% of the system's rated operating frequency. In another embodiment, the preset safety frequency is directly set to the minimum allowable operating frequency of the system.

[0033] After reducing the load operating frequency to a preset safe frequency, the equivalent capacitance value of the bus filter capacitor bank is reduced. The core logic is that a lower load operating frequency means a lower load power. Even if the reduced equivalent capacitance value of the bus filter capacitor bank causes momentary fluctuations in the bus voltage, the bus voltage remains within a safe range because the load current consumption is small, preventing the system's undervoltage protection from being triggered or causing malfunctions in the downstream inverter. It is important to emphasize that reducing the load operating frequency to the preset safe frequency is a preparatory operation performed before reducing the equivalent capacitance value of the bus filter capacitor bank; it does not change the equivalent capacitance value itself, but rather creates conditions for the safe execution of the latter.

[0034] Step 22: After the equivalent capacitance value of the bus filter capacitor bank is reduced, restore the load operating frequency to the original frequency.

[0035] After reducing the equivalent capacitance of the bus filter capacitor bank, the load operating frequency is restored to its original frequency (i.e., the previous operating frequency is reduced). At this point, the reduced bus filter capacitor bank is in a stable operating state, and the bus voltage has transitioned to a new steady state. Restoring the load operating frequency will not cause additional electrical shocks. In the restored operating state, the system continues to operate with the reduced bus filter capacitor. At this time, the number of extreme points of the bus voltage ripple is detected to obtain accurate fault identification results.

[0036] In response, Figure 2 Taking the circuit structure shown as an example, assume the current load (compressor) operating frequency is f1 = 60Hz, and the bus filter capacitor bank consists of three capacitor branches C1, C2, and C3 connected in parallel. When the bus voltage ripple frequency is detected to be 100Hz, the fault identification subroutine is entered. The system first reduces the compressor operating frequency from 60Hz to the preset safe frequency f2 = 25Hz (approximately 42% of the rated frequency). After the frequency reduction is completed, the control relay K3 is activated (connected to the discharge resistor R1), and then the relay K1 is deactivated, disconnecting capacitor branch C1 from the bus filter capacitor bank, reducing the equivalent capacitance of the bus filter capacitor bank. After the relay switching is completed and the bus voltage enters a new steady state, the compressor operating frequency is restored from 25Hz to the original frequency of 60Hz. Subsequently, extreme point detection of the bus voltage ripple is performed at the 60Hz operating frequency to determine the fault type.

[0037] By employing the frequency control steps described above—first reducing the frequency, then cutting off the capacitors, and finally restoring the frequency—the load operating frequency is reduced to a preset safe frequency. Simultaneously, both load power and input current decrease. Even if cutting off some capacitor branches causes a momentary drop in bus voltage, the bus voltage remains above the system's safe operating threshold due to the relatively small current consumed by the load. This effectively prevents undervoltage protection malfunctions or overcurrent damage to power switching devices caused by capacitor cutting. Furthermore, by using the strategy of reducing the frequency before cutting off the capacitors, this application can dynamically adjust the equivalent capacitance value of the bus filter capacitor bank without shutting down the system. This avoids the shortcomings of existing solutions that require shutdown or standby to switch hardware configurations, allowing the fault identification process to be completed entirely during continuous system operation without affecting the user's normal experience. Additionally, restoring the load operating frequency to its original frequency after the capacitor cutting operation ensures that extreme point detection is performed under normal system operating conditions. This avoids interference from changes in the bus voltage waveform caused by frequency reduction on the extreme point detection results, ensuring the accuracy and reliability of fault identification.

[0038] In an optional embodiment of this application, the bus filter capacitor bank includes a first capacitor branch C1, a second capacitor branch C2, a third capacitor branch C3, a fourth capacitor branch C4, a first discharge branch R1 corresponding to the third capacitor branch, and a second discharge branch R2 corresponding to the fourth capacitor branch. Therefore, in this embodiment, the bus filter capacitor bank includes a first capacitor branch, a second capacitor branch, a third capacitor branch, and a fourth capacitor branch. Each capacitor branch is composed of one or more capacitors connected in series and / or parallel, used to filter the pulsating DC voltage output from the three-phase rectifier bridge to smooth the bus voltage and reduce voltage ripple. Each capacitor branch is connected in series with a controllable switching device (such as a relay, semiconductor switch, etc.). By controlling the on / off state of the controllable switching device, the corresponding capacitor branch can be connected to or disconnected from the bus filter capacitor bank, thereby changing the equivalent capacitance value of the bus filter capacitor bank.

[0039] The bus filter capacitor bank also includes a first discharge branch corresponding to the third capacitor branch and a second discharge branch corresponding to the fourth capacitor branch. A discharge branch is an auxiliary circuit that provides a path for residual charge to dissipate when the corresponding capacitor branch needs to be disconnected from the bus filter capacitor bank. Each discharge branch typically consists of a discharge resistor connected in series with a controllable switching device, which controls the on / off state of the discharge branch. When the discharge branch is on, the capacitor in the corresponding capacitor branch releases its stored charge through the discharge resistor, reducing the voltage across the capacitor branch to a safe level, thus creating conditions for the safe disconnection of the capacitor branch from the bus filter capacitor bank.

[0040] It should be noted that the "correspondence" in the first discharge branch corresponding to the third capacitor branch refers to the electrical connection between the first discharge branch and the third capacitor branch. That is, the first discharge branch can be selectively connected in parallel with the third capacitor branch to conduct or disconnect, thereby achieving discharge control of the third capacitor branch. Similarly, the second discharge branch corresponds to the fourth capacitor branch. In this embodiment, the first and second discharge branches respectively achieve independent discharge control of the third and fourth capacitor branches. However, those skilled in the art should understand that using a time-division multiplexing method with shared discharge branches to achieve discharge of multiple capacitor branches does not depart from the scope of protection of this invention.

[0041] Based on this, the method of reducing the equivalent capacitance value of the bus filter capacitor bank mentioned in 302 above can further include: Step 31: When the first capacitor branch, the second capacitor branch, and the third capacitor branch are all turned on and connected in parallel to form the bus filter capacitor, turn on the first discharge branch to discharge the third capacitor branch. While keeping the first and second capacitor branches conducting, the first discharge branch corresponding to the third capacitor branch is turned on. The first discharge branch is turned on by controlling the closed controllable switching device connected in series with it. At this time, the capacitor in the third capacitor branch forms a closed discharge circuit through the discharge resistor in the first discharge branch. The charge stored in the capacitor is dissipated as heat through the discharge resistor, and the voltage across the third capacitor branch gradually decreases.

[0042] It should be noted that the third capacitor branch was chosen as the cut-off target because, in its initial state, it, along with the first and second capacitor branches, forms the bus filter capacitor bank. Cutting it off reduces the equivalent capacitance value. Simultaneously, the third capacitor branch is equipped with a corresponding first discharge branch, enabling discharge before cut-off to ensure safety during the process. In engineering practice, the choice of which capacitor branch to cut off depends on the specific circuit design and the capacitance matching relationship of each branch. For example, if a smaller reduction is desired, the capacitor branch with the smallest capacitance can be cut off; if a larger reduction is desired, the capacitor branch with the largest capacitance can be cut off, or multiple capacitor branches can be cut off simultaneously. Any choice is an alternative implementation of this invention and does not depart from the scope of protection of this invention.

[0043] Specifically, such as Figure 2 As shown, the first discharge branch consists of a discharge resistor R1 connected in series with a relay K3. Turning on the first discharge branch controls the relay K3 to engage, at which point the third capacitor branch C3 discharges through R1, and the voltage across C3 gradually decreases. During the discharge process, due to the current-limiting effect of R1, the discharge current is kept within a safe range and will not impact other parts of the circuit.

[0044] Step 32: After the discharge is completed, the third capacitor branch is disconnected from the bus filter capacitor bank to reduce the equivalent capacitance value of the bus filter capacitor bank.

[0045] Discharge completion refers to the state where the capacitor in the capacitor branch releases its charge through the discharge branch, causing its voltage to drop below a safe threshold. The specific value of the safe threshold depends on the system voltage level and circuit safety requirements, and is usually set to a voltage level that does not exceed the human body's safe voltage or will not cause electrical shock to subsequent disconnection operations. In one embodiment of the present invention, the safe threshold is set to less than 5% of the bus rated voltage. Whether the discharge is complete can be determined by comparing the voltage across the capacitor branch with the preset safe threshold, or by a preset discharge duration (the discharge duration is calculated in advance based on the RC discharge time constant determined by the discharge resistor value and the capacitor value).

[0046] After confirming that the third capacitor branch has discharged completely, the controllable switching device connected in series with the third capacitor branch is disconnected, thus removing the third capacitor branch from the bus filter capacitor bank. At this time, the bus filter capacitor bank consists only of the first and second capacitor branches connected in parallel (if the fourth capacitor branch was not initially connected, it will not participate in the parallel connection), and the equivalent capacitance value is reduced from the original C1+C2+C3 to C1+C2, achieving a reduction in the equivalent capacitance value.

[0047] It should be noted that disconnecting the third capacitor branch from the bus filter capacitor bank means breaking the electrical connection between the third capacitor branch and the positive or negative line of the bus by disconnecting the controllable switching device connected in series with the third capacitor branch. The third capacitor branch no longer participates in the filtering of the bus voltage. After disconnection, since the third capacitor branch has already discharged to a safe voltage level through the first discharge branch, no arcing or current surge will occur at the moment the controllable switching device is disconnected, ensuring the safety of the disconnection operation. Specifically, as shown... Figure 2 As shown, after C3 discharges through R1, control relay K1 disconnects, disconnecting capacitor branch C1 (in this example, C1 is disconnected instead of C3, depending on the definition of branch numbering in the specific implementation) from the bus filter capacitor bank. After disconnection, the equivalent capacitance of the bus filter capacitor bank decreases, the filtering effect of the bus voltage ripple weakens, and waveform details become visible. This has been explained in the examples of the aforementioned embodiments. Figure 2 The initial state is that K1 is closed, K2, K3, and K4 are open, and C1 is connected; when cutting out, K1 is opened (and at the same time, the charge of C1 is discharged by connecting to R1 through K3). → This means that the object to be cut out can be different in different configurations, which does not constitute a limitation on the scope of protection of the claims.

[0048] As can be seen, by discharging the capacitor branch before disconnecting it, the voltage across the capacitor branch is reduced to a safe level. This avoids arcing, contact welding, or overvoltage surges caused by residual charge in the capacitor when disconnecting the controllable switching devices, effectively extending the lifespan of the controllable switching devices and improving the system's reliability and safety. If the capacitor branch is disconnected directly without discharging, the large amount of charge stored in the capacitor branch will be released instantaneously into the bus circuit, potentially causing voltage spikes or oscillations on the bus, damaging downstream power devices. By controlling the timing of discharging before disconnecting, these risks are completely eliminated. The discharge branch is only briefly turned on when the capacitor branch needs to be disconnected, remaining disconnected during normal system operation. This avoids power loss caused by the discharge resistor being connected to the circuit for a long time, improving the overall operating efficiency of the system.

[0049] In this embodiment of the application, the method may further include: Step 41: If the current fault type is determined to be a three-phase imbalance fault, disconnect the first discharge branch and the second discharge branch, and turn on the first capacitor branch, the second capacitor branch, the third capacitor branch and the fourth capacitor branch to increase the bus filter capacitor. During fault identification, in order to disconnect the third capacitor branch and reduce the equivalent capacitance of the bus filter capacitor bank, the first discharge branch is turned on to discharge the third capacitor branch. After the three-phase imbalance fault is confirmed, the system needs to exit the fault identification state and enter the fault operation state. At this time, the first discharge branch is disconnected (i.e., its controllable switching device is turned off), restoring the first discharge branch to a non-conducting state and preventing unnecessary power loss caused by the discharge resistor being connected to the circuit for an extended period.

[0050] Simultaneously, disconnect the second discharge branch. Although the second discharge branch was not used during fault identification (the fourth capacitor branch was initially disconnected and did not require discharge), it needs to be connected to the circuit during the three-phase imbalance handling phase. Before connecting the fourth capacitor branch, ensure the second discharge branch is disconnected to prevent the fourth capacitor branch from forming an unnecessary discharge loop through the second discharge branch, ensuring normal operation after connection.

[0051] It should be noted that the aforementioned disconnection of the first and second discharge branches is to ensure the circuit state is restored and reset after fault identification, so that each discharge branch is in a non-conductive state, providing safe circuit conditions for subsequent capacitor connection operations. In circuit design, the state management of the first and second discharge branches is a prerequisite for the safe switching of capacitor branches. The above operation ensures that the charging and discharging circuits of each capacitor branch are in a controllable state during the three-phase imbalance handling stage.

[0052] After disconnecting the first and second discharge branches, the first, second, third, and fourth capacitor branches are all turned on. Specifically, this is achieved by controlling the controllable switching devices (such as...) connected in series in each capacitor branch. Figure 2 All relays K1, K2, K3, and K4 in the circuit are closed, so that the four capacitor branches are connected between the positive and negative terminals of the bus and connected in parallel to form the bus filter capacitor bank.

[0053] At this point, the equivalent capacitance of the bus filter capacitor bank is the sum of the capacitance values ​​of the four capacitor branches (for parallel connections), which is significantly larger than during the fault identification stage (when only the first and second capacitor branches are connected in parallel, or the first, second, and fourth branches are connected in parallel, depending on the configuration of the disconnected and spare branches). The increased bus filter capacitance means enhanced filtering capability for the bus voltage, more effectively suppressing bus voltage ripple caused by imbalances in the three-phase input voltage amplitude, resulting in a more stable bus voltage and providing higher quality power supply to downstream loads.

[0054] Simultaneously, the system controls the load to operate at a reduced frequency. This reduced frequency operation refers to lowering the load's operating frequency to a lower level than the current operating frequency (e.g., 60%~80% of the rated frequency, depending on the severity of the three-phase imbalance and the system's derating strategy). The purpose of this reduced frequency operation is to decrease the load power demand, thereby reducing the input current and preventing excessive input current due to low input voltage amplitude under three-phase imbalance conditions, which could trigger overcurrent protection or device overheating.

[0055] like Figure 2 The circuit shown assumes that during the fault identification phase, the third capacitor branch C3 is disconnected, the fourth capacitor branch C4 remains open, and the bus filter capacitor bank consists of C1 and C2 connected in parallel. When a three-phase imbalance fault is detected, relays K3 and K4 are first disconnected (ensuring that the first discharge branch R1 and the second discharge branch R2 are both in a non-conducting state); then, relays K1, K2, K3, and K4 are all closed, connecting C1, C2, C3, and C4 to the bus. At this time, the equivalent capacitance of the bus filter capacitor bank is at its maximum, providing the strongest filtering effect for bus voltage ripple under three-phase imbalance. Simultaneously, the system reduces the load operating frequency from the current frequency to a preset three-phase imbalance operating frequency (e.g., 70% of the rated frequency) to achieve derating operation.

[0056] Step 42: If the current fault type is determined to be a phase loss fault, control the three-phase uncontrolled rectifier system to shut down.

[0057] The necessity of implementing protective shutdown under phase loss faults lies in the following: When a phase is lost in the three-phase input power supply, only two phases of the rectifier bridge are conducting, and the bus voltage is only replenished twice within one power frequency cycle, resulting in a severe voltage drop. If the downstream load continues to operate, on the one hand, the bus voltage may fall below the minimum operating voltage of the downstream inverter, causing abnormal inverter operation; on the other hand, phase loss will cause severe distortion of the input current waveform, which may contain a large DC component. Long-term operation will cause some diodes in the rectifier bridge to overheat and even burn out due to overcurrent. At the same time, motor loads operating under phase loss conditions may generate severe vibration and noise due to torque pulsation, which may damage the mechanical transmission system in severe cases. Therefore, immediately implementing protective shutdown after confirming a phase loss fault is the most effective measure to ensure equipment safety. Specifically, when a phase loss fault is determined, the system immediately performs the following protective operations: blocking the PWM drive signal of the compressor inverter to stop the compressor; controlling the main relay to disconnect the main circuit power supply; outputting a phase loss fault alarm code through the display panel or communication interface; and locking the fault status, requiring manual troubleshooting and reset before restarting.

[0058] As can be seen, for three-phase imbalance, a fault type that allows for continued operation, the system achieves fault-tolerant operation by increasing the bus filter capacitor and reducing the frequency, avoiding unnecessary downtime and its impact on normal user operation. For phase loss, a serious fault requiring shutdown, the system decisively executes protective shutdown to ensure equipment safety. This differentiated design of the two handling strategies maximizes the balance between equipment availability and safety. Immediately executing protective shutdown upon determining a phase loss fundamentally avoids a series of serious faults that could occur during prolonged operation under phase loss conditions, such as rectifier bridge damage, motor overheating, and mechanical resonance, thus protecting equipment assets.

[0059] In an optional embodiment of this application, the method for detecting the number of extreme points of the bus voltage within one power frequency cycle involved in step 303 above may further include: Step 51: Continuously sample the bus voltage at a preset sampling frequency to obtain the bus voltage timing signal; The preset sampling frequency refers to the frequency at which the analog-to-digital converter (ADC) samples and converts the bus voltage analog signal. Its value must satisfy the Nyquist sampling theorem, meaning the sampling frequency must be at least twice the highest frequency component of the measured signal. The fundamental frequency of the bus voltage ripple is typically twice (100Hz) or six times (300Hz) the input voltage frequency, with even higher harmonic frequencies. To accurately capture the details of the ripple waveform (especially extreme points), the sampling frequency should be much higher than the ripple fundamental frequency. In a preferred embodiment of the invention, the preset sampling frequency is set to 10kHz, meaning 10,000 bus voltage samples are collected per second, enabling the acquisition of 200 sampling points within each power frequency cycle (20ms), which is sufficient to accurately reconstruct the ripple waveform and detect extreme points.

[0060] Step 52: Set the length of the sliding window, where the sliding window includes the current sampling point and its N adjacent sampling points before and after it; where N is a preset positive integer. A sliding window refers to a data interval of a certain length defined on the bus voltage timing signal. This interval includes the current sampling point and several adjacent sampling points before and after it. In this application, the sliding window adopts a symmetrical structure, including the current sampling point and N adjacent sampling points before and after it, with a total window length of 2N+1 sampling points.

[0061] N, a preset positive integer, refers to the number of sampling points contained on one side of the window, which can be preset according to the sampling frequency and the desired detection sensitivity. The specific value of N determines the sensitivity of extreme point detection: if N is too small (e.g., N=1), the window only contains the current point and one point before and after it (a total of 3 points), which is sensitive to noise and easily misjudges random fluctuations as extreme points; if N is too large (e.g., N=100), the window coverage is too wide, which may ignore local detail extreme points in the waveform and reduce the detection sensitivity. In a preferred embodiment of the present invention, when the sampling frequency is 10kHz, N is set to 5, that is, the window contains the current sampling point and 5 adjacent sampling points before and after it, and the total length of the window is 11 sampling points, corresponding to a time span of approximately 1.1ms. This window length can effectively filter out high-frequency noise interference while retaining the effective extreme point characteristics in the ripple waveform. After the value of N is determined, the window length is a fixed value and remains unchanged during the sliding detection process.

[0062] Step 53: Slide the sliding window point by point along the time axis, and at each window position, determine whether the voltage value of the current sampling point is simultaneously greater than or simultaneously less than the voltage values ​​of all adjacent sampling points within the sliding window. The sliding window is moved point by point along the time axis, starting from the first sampling point of the timing signal and aligning the center of the window with each sampling point in turn. At each window position, the voltage value of the current sampling point is compared with the voltage values ​​of all other sampling points within the sliding window to determine whether the voltage value of the current sampling point is simultaneously greater than or simultaneously less than the voltage values ​​of all adjacent sampling points within the window.

[0063] "Simultaneously greater than" means that the voltage value of the current sampling point is greater than the voltage values ​​of all (2N in total) adjacent sampling points within the sliding window, excluding the current point. The current sampling point that satisfies the condition of "simultaneously greater than" is a local maximum value within the window range, corresponding to a peak position in the waveform, and is marked as a maximum point.

[0064] "Simultaneously less than" means that the voltage value of the current sampling point is less than the voltage values ​​of all (2N in total) adjacent sampling points within the sliding window, excluding the current point. The current sampling point that satisfies the condition of "simultaneously less than" is a local minimum within the window range, corresponding to a trough position in the waveform, and is marked as a minimum point.

[0065] If the voltage value of the current sampling point is neither greater than all adjacent points at the same time nor less than all adjacent points at the same time, then the sampling point is not an extreme point and is not marked.

[0066] Step 54: If the voltage value of the current sampling point is greater than the voltage values ​​of all adjacent sampling points in the sliding window, then mark it as a maximum point; if the voltage value of the current sampling point is less than the voltage values ​​of all adjacent sampling points in the sliding window, then mark it as a minimum point. In this specific example, suppose the voltage values ​​of a consecutive 7-point sampling sequence in the bus voltage sampling sequence are [98, 101, 105, 103, 100, 97, 95]. The current sampling point is the 4th point in the sequence, with a voltage value of 103. N=3, and the window covers this point and the 3 points before and after it. Comparing 103 with the other 6 points in the window (98, 101, 105, 100, 97, 95): 103 is simultaneously greater than 98, 101, 100, 97, and 95, but not greater than 105, therefore it does not satisfy the condition of being simultaneously greater than; 103 is simultaneously less than multiple points among 101, 105, 100, 97, and 95, but not less than 98, therefore it also does not satisfy the condition of being simultaneously less than, and this point is not an extreme point.

[0067] Let's assume another sampling sequence is [98, 100, 103, 105, 104, 102, 99]. The current sampling point is still the 4th point, with a voltage value of 105. Comparing 105 with the other points within the window (98, 100, 103, 104, 102, 99): 105 is greater than all other 6 points simultaneously, satisfying the condition of simultaneous greater than. Therefore, this sampling point is marked as a maximum point.

[0068] Let the sequence be [105, 103, 100, 97, 98, 101, 104], and the current sampling point is the 4th point with a voltage value of 97. Comparing 97 with the other points in the window (105, 103, 100, 98, 101, 104): 97 is simultaneously less than all other 6 points, satisfying the condition of simultaneous less than, therefore this sampling point is marked as a minimum point.

[0069] Step 55: Accumulate the total number of maximum and minimum points within one power frequency cycle to obtain the number of extreme points of the bus voltage within one power frequency cycle.

[0070] In this specific example, the waveform contains four significant voltage fluctuations (two peaks and two troughs) within one power frequency cycle. The sampling frequency is set to 10kHz, N=5, and the sliding window scans the entire 20ms cycle (containing 200 sampling points) along the time axis. During the scan, a maximum point is detected when the first peak is encountered; a minimum point is detected when the first trough is encountered; a second maximum point is detected when the second peak is encountered; and a second minimum point is detected when the second trough is encountered. No extreme value features are detected at the remaining sampling points. The final cumulative result is: 2 maximum points, 2 minimum points, and a total of 4 extreme points.

[0071] In an optional embodiment of this application, the method for detecting the number of extreme points of the bus voltage within one power frequency cycle involved in step 303 above may further include: Step 61: Continuously sample the bus voltage at a preset sampling frequency to obtain the bus voltage timing signal; To address this, a voltage sampling circuit can be used to continuously sample the bus voltage at a preset sampling frequency (e.g., 10kHz) to obtain a sequence of bus voltage sample values ​​arranged in chronological order, i.e., the bus voltage time-series signal. This time-series signal serves as the input data for subsequent FFT spectrum analysis.

[0072] Step 62: Perform a fast Fourier transform on the bus voltage time sequence signal to obtain the frequency domain spectrum of the bus voltage ripple. After acquiring the bus voltage time-series signal, a Fast Fourier Transform (FFT) is performed on the time-domain signal. After the FFT, the frequency domain spectrum of the bus voltage ripple is obtained. The frequency domain spectrum describes the distribution of energy (or amplitude) of a signal at different frequencies. Its horizontal axis represents frequency (in Hz), and its vertical axis represents the amplitude of the corresponding frequency component (in V or dB). The frequency domain spectrum reflects the distribution of various frequency components in the bus voltage ripple: which frequencies contain components, the magnitude of each component, and whether higher-order harmonic components exist. For periodic signals, the morphological characteristics of their time-domain waveform are entirely determined by the amplitude and phase relationships of each frequency component in the frequency domain spectrum.

[0073] Step 63: Extract the amplitude information of each harmonic component from the frequency domain spectrum; Harmonic components refer to the sinusoidal components in the bus voltage ripple signal whose frequencies are integer multiples of the fundamental frequency. Among them, the component with the same frequency as the fundamental frequency of the ripple is called the fundamental component (first harmonic), the component with a frequency twice the fundamental frequency is called the second harmonic, and so on.

[0074] Amplitude information refers to the magnitude of each harmonic component in the frequency domain spectrum. Amplitude information reflects the proportion of that frequency component in the total energy of the signal: the larger the amplitude of a harmonic, the more significant that frequency component is in the signal, and the greater its contribution to the waveform shape in the time domain.

[0075] When extracting amplitude information, we usually focus on the amplitudes of the fundamental component and the second, third, and fourth harmonic components. Because the spectrum of the FFT transform is symmetrical (for real-valued signals), we usually only need to extract the spectral information of the positive frequency portion.

[0076] Step 64: Determine the waveform complexity of the bus voltage ripple based on the amplitude information, and determine the preset range of the number of extreme points based on the waveform complexity.

[0077] After extracting the amplitude information of each harmonic component, the waveform complexity of the bus voltage ripple is determined based on the amplitude information. Waveform complexity refers to the richness of the fluctuations in the time-domain waveform of the bus voltage ripple, specifically reflected in the number of peaks and troughs, the severity of waveform changes, and the regularity of the waveform within one power frequency cycle. Higher waveform complexity means that the waveform contains more extreme points within one cycle; lower waveform complexity means that the waveform is simpler and smoother, with fewer extreme points.

[0078] There is a definite correspondence between the complexity of a waveform and the amplitude distribution of harmonic components in the frequency domain spectrum: the more complex the time-domain waveform (the more extreme points it contains), the richer and larger the amplitude of the higher-order harmonic components in its frequency domain spectrum; conversely, the simpler the time-domain waveform (the fewer extreme points it contains), the more concentrated its frequency domain spectrum is in low-frequency components (fundamental wave and a small number of low-order harmonics), and the smaller the amplitude of the higher-order harmonic components, even approaching zero. This correspondence stems from the basic mathematical properties of the Fourier transform, that is, sharp changes in the time-domain signal (such as the existence of extreme points) correspond to high-frequency components in the frequency domain. Specifically, under a phase loss fault, the ripple waveform is simple and smooth, containing only a small number of low-order harmonic components, and the spectral structure is relatively clean; under a three-phase imbalance fault, the ripple waveform is complex and fluctuates violently, containing rich high-order harmonic components, and the spectral structure is chaotic and broad.

[0079] Based on the above judgment of waveform complexity, the preset range of the number of extreme points is determined. Specifically, the waveform complexity is compared with a preset complexity threshold: if the waveform complexity is low (i.e., the amplitude of higher harmonic components in the spectrum is small or the proportion is lower than the preset threshold), then the number of extreme points is determined to be within the first preset range (few extreme points, corresponding to a phase loss fault); if the waveform complexity is high (i.e., the amplitude of higher harmonic components in the spectrum is large or the proportion is higher than the preset threshold), then the number of extreme points is determined to be within the second preset range (more extreme points, corresponding to a three-phase imbalance fault).

[0080] It should be noted that determining the preset range of the number of extreme points based on the waveform complexity does not require precisely calculating the exact number of extreme points (e.g., 2 or 4), but rather dividing the number of extreme points into one of two preset ranges. This range-based judgment rather than precise counting method fully utilizes the characteristics of FFT spectral analysis, because frequency domain analysis is naturally suitable for judging the complexity of a signal, but not for accurately reconstructing time domain details.

[0081] In a preferred embodiment of this application, determining the preset range of the number of extreme points based on waveform complexity specifically includes: calculating the ratio of the sum of the squares of the amplitudes of the third and higher harmonic components in the frequency domain spectrum to the square of the fundamental amplitude; if the ratio is less than a preset first threshold, the number of extreme points is determined to belong to a first preset range; if the ratio is greater than or equal to a preset second threshold, the number of extreme points is determined to belong to a second preset range. The first and second thresholds can be equal (i.e., a single judgment threshold) or unequal (i.e., a hysteresis comparison method is used to avoid judgment jitter caused by spectrum fluctuations).

[0082] In another embodiment of this application, determining the preset range of the number of extreme points based on waveform complexity specifically includes: counting the number of harmonic components in the frequency domain spectrum whose amplitude exceeds a preset amplitude threshold; if the count is less than a preset threshold, the number of extreme points is determined to belong to a first preset range; if the count is greater than or equal to the preset threshold, the number of extreme points is determined to belong to a second preset range. All of the above different implementations do not depart from the protection scope of this invention.

[0083] As can be seen, the FFT transforms the signal from the time domain to the frequency domain. Random noise in the time domain is dispersed across all frequency components in the frequency domain, and interference with the amplitude of specific frequency components is averaged out. Therefore, even if there is significant random noise in the time-domain waveform, the amplitude extraction of the fundamental wave and harmonics in the spectrum can still maintain high accuracy, and the determination of the extreme point range is more stable and reliable. In addition, the FFT spectrum analysis method only needs to determine the waveform complexity (i.e., the high-frequency harmonic content), without needing to precisely pinpoint the location and time of each extreme point in the time domain. This avoids the problem of missed or false detections of extreme points caused by sampling time deviations or minor waveform distortions, making it particularly suitable for practical engineering scenarios where the waveform has slight distortions or non-ideal periodicity.

[0084] The present application will be explained below with reference to specific embodiments, which provide a method for identifying and handling three-phase uncontrolled rectifier input voltage imbalance and phase loss faults, such as... Figure 5 As shown, it includes: Step 501, Bus voltage ripple frequency detection; Step 502: Is the ripple frequency approximately equal to 6 times the input voltage frequency? If yes, it is operating normally; otherwise, proceed to step 503. Step 503, record the current operating frequency f1; Step 504, reduce the running frequency to f2; Step 505, relay K3 is energized; Step 506, relay K1 is disconnected; Step 507: Restore the operating frequency to f1; Step 508: Determine the number of extreme points of the voltage ripple at the wood point within the voltage fundamental period; if approximately equal to 2, proceed to step 509; if greater than or equal to 4, proceed to step 510. Step 509: Determine if a phase is missing and initiate shutdown protection; Step 510: Determine if the three phases are unbalanced; Step 511, relay K3 is disconnected; Step 512, relays K1 and K2 are energized; Step 513: Reduce frequency for operation.

[0085] Based on the above steps, taking a three-phase voltage frequency of 50Hz as an example, C1, C2, C3, and C4 are bus capacitors, R1 and R2 are discharge resistors, and K1, K2, K3, and K4 are relay switches. In the initial operating state, K1 is closed, and K2, K3, and K4 are open. C1, C2, and C3 are connected in parallel to form the bus filter capacitor during normal operation. The voltage sampling circuit collects the bus voltage in real time and calculates the bus voltage ripple frequency.

[0086] With the bus voltage ripple amplitude normal, when the detected bus voltage ripple frequency is 6 times the input voltage frequency (300Hz), the three-phase input is normal and the system operates normally. When the detected bus voltage frequency is twice the input voltage frequency (100Hz), the system further detects phase loss and three-phase imbalance.

[0087] Specifically, the system first records the current operating frequency f1, then reduces the operating frequency to f2, which is the pre-set safe frequency for switching capacitors. At this time, relay K3 engages to connect the discharge resistor for subsequent discharge of capacitor C3. Relay K1 disengages, and the operating frequency is then restored to f1. Experiments show that the voltage ripple waveforms of phase loss and three-phase imbalance can be distinguished at this point. Figure 6a and Figure 6b As shown.

[0088] Furthermore, the extreme point count of the bus voltage ripple within the fundamental voltage period is continuously detected over a period of time. More specifically, the extreme point count detection can be performed using a sliding window detection method. If the number of maximum or minimum voltage ripple points detected is 2, it is determined that the three-phase input voltage is missing a phase, and the system is shut down for protection. If the number of maximum or minimum voltage ripple points detected is greater than or equal to 4, it is determined that the three-phase input voltage of the power supply is unbalanced, and the system is further protected as follows: Relay K3 is disconnected, and relays K1 and K2 are energized. At this time, bus capacitors C3 and C4 are connected to the circuit to enhance the bus voltage filtering effect under three-phase imbalance. At the same time, the system can operate at a reduced frequency, thereby meeting the requirements of system non-stop detection, safe operation under three-phase input voltage imbalance, and protection shutdown in case of phase loss.

[0089] Corresponding to the above Figure 3 This application also provides a fault identification device for a three-phase uncontrolled rectifier system, characterized in that the system includes a three-phase power supply, a three-phase rectifier, and a bus filter capacitor bank, such as... Figure 7 As shown, the device includes: The first processing module 702 is used to acquire the bus voltage in the three-phase uncontrolled rectifier system and determine the corresponding ripple frequency based on the bus voltage. The second processing module 704 is used to reduce the equivalent capacitance value of the bus filter capacitor bank when the ratio of the ripple frequency to the input voltage frequency of the three-phase power supply exceeds a preset threshold. The third processing module 706 is used to detect the number of extreme points of the bus voltage within one power frequency cycle and determine the fault type based on the number of extreme points.

[0090] In an optional embodiment of this application, the third processing module includes: The first processing unit is used to determine a phase loss fault when the number of extreme points is within a first preset range. The second processing unit is used to determine a three-phase imbalance fault when the number of extreme points is within a second preset range. The first preset range and the second preset range do not overlap, and the maximum value of the first preset range is less than the minimum value of the second preset range.

[0091] In an optional embodiment of this application, the second processing module includes: The third processing unit is used to reduce the equivalent capacitance value of the bus filter capacitor bank after reducing the current load operating frequency to a preset safe frequency. The fourth processing unit is used to restore the load operating frequency to the original frequency after the equivalent capacitance value of the bus filter capacitor bank has decreased.

[0092] The bus filter capacitor bank includes a first capacitor branch, a second capacitor branch, a third capacitor branch, a fourth capacitor branch, a first discharge branch corresponding to the third capacitor branch, and a second discharge branch corresponding to the fourth capacitor branch; in an optional embodiment of this application, the third processing unit in this application performs the following steps: When the first capacitor branch, the second capacitor branch, and the third capacitor branch are all turned on and connected in parallel to form the bus filter capacitor, the first discharge branch is turned on to discharge the third capacitor branch. After the discharge is complete, the third capacitor branch is disconnected from the bus filter capacitor bank to reduce the equivalent capacitance of the bus filter capacitor bank.

[0093] In optional embodiments of this application, the apparatus further includes: The fourth processing module is used to disconnect the first discharge branch and the second discharge branch when the current fault type is determined to be a three-phase imbalance fault, and to turn on the first capacitor branch, the second capacitor branch, the third capacitor branch and the fourth capacitor branch to increase the bus filter capacitor. The fifth processing module is used to control the three-phase uncontrolled rectifier system to shut down when the current fault type is determined to be a phase loss fault.

[0094] In an optional embodiment of this application, the third processing module includes: The fifth processing unit is used to continuously sample the bus voltage at a preset sampling frequency to obtain the bus voltage timing signal; The sixth processing unit is used to set the length of the sliding window, wherein the sliding window includes the current sampling point and its N adjacent sampling points before and after it; where N is a preset positive integer. The seventh processing unit is used to slide the sliding window point by point along the time axis, and at each window position, determine whether the voltage value of the current sampling point is simultaneously greater than or simultaneously less than the voltage values ​​of all adjacent sampling points within the sliding window. The eighth processing unit is used to mark a current sampling point as a maximum point if the voltage value of the current sampling point is greater than the voltage values ​​of all adjacent sampling points in the sliding window at the same time; and to mark a current sampling point as a minimum point if the voltage value of the current sampling point is less than the voltage values ​​of all adjacent sampling points in the sliding window at the same time. The ninth processing unit is used to accumulate the total number of maximum and minimum points within one power frequency cycle to obtain the number of extreme points of the bus voltage within one power frequency cycle.

[0095] In an optional embodiment of this application, the third processing module includes: The tenth processing unit is used to continuously sample the bus voltage at a preset sampling frequency to obtain the bus voltage timing signal; The eleventh processing unit is used to perform a fast Fourier transform on the bus voltage timing signal to obtain the frequency domain spectrum of the bus voltage ripple. The twelfth processing unit is used to extract the amplitude information of each harmonic component from the frequency domain spectrum; The thirteenth processing unit is used to determine the waveform complexity of the bus voltage ripple based on the amplitude information, and to determine the preset range of the number of extreme points based on the waveform complexity.

[0096] like Figure 8 As shown in the figure, this application provides an electronic device, including a processor 811, a communication interface 812, a memory 813, and a communication bus 814, wherein the processor 811, the communication interface 812, and the memory 813 communicate with each other through the communication bus 814. Memory 813 is used to store computer programs; In one embodiment of this application, when the processor 811 executes the program stored in the memory 813, it implements the fault identification method for the three-phase uncontrolled rectifier system provided in any of the aforementioned method embodiments. Its function is similar and will not be described again here.

[0097] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the fault identification method for a three-phase uncontrolled rectifier system as provided in any of the foregoing method embodiments.

[0098] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0099] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0100] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0101] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A fault identification method for a three-phase uncontrolled rectifier system, characterized in that, The system includes a three-phase power supply, a three-phase rectifier, and a bus filter capacitor bank; the method includes: The bus voltage of the three-phase uncontrolled rectifier system is collected, and the corresponding ripple frequency is determined based on the bus voltage. If the ratio of the ripple frequency to the input voltage frequency of the three-phase power supply exceeds a preset threshold, the equivalent capacitance value of the bus filter capacitor bank shall be reduced. The number of extreme points of the bus voltage within one power frequency cycle is detected, and the fault type is determined based on the number of extreme points.

2. The method according to claim 1, characterized in that, Determining the fault type based on the number of extreme points includes: If the number of extreme points falls within a first preset range, it is determined to be a phase loss fault; If the number of extreme points falls within the second preset range, it is determined to be a three-phase imbalance fault. Wherein, the first preset range and the second preset range do not overlap, and the maximum value of the first preset range is less than the minimum value of the second preset range.

3. The method according to claim 1, characterized in that, Reducing the equivalent capacitance of the bus filter capacitor bank includes: After reducing the current load operating frequency to a preset safe frequency, the equivalent capacitance value of the bus filter capacitor bank is reduced. After the equivalent capacitance value of the bus filter capacitor bank is reduced, the load operating frequency is restored to the original frequency.

4. The method according to claim 3, characterized in that, The bus filter capacitor bank includes a first capacitor branch, a second capacitor branch, a third capacitor branch, a fourth capacitor branch, a first discharge branch corresponding to the third capacitor branch, and a second discharge branch corresponding to the fourth capacitor branch; reducing the equivalent capacitance value of the bus filter capacitor bank includes: When the first capacitor branch, the second capacitor branch, and the third capacitor branch are all turned on and are connected in parallel to form a bus filter capacitor, the first discharge branch is turned on to discharge the third capacitor branch. After the discharge is complete, the third capacitor branch is disconnected from the bus filter capacitor bank to reduce the equivalent capacitance value of the bus filter capacitor bank.

5. The method according to claim 4, characterized in that, The method further includes: If the current fault type is determined to be a three-phase imbalance fault, disconnect the first discharge branch and the second discharge branch, and turn on the first capacitor branch, the second capacitor branch, the third capacitor branch and the fourth capacitor branch to increase the bus filter capacitance. If the current fault type is determined to be a phase loss fault, the three-phase uncontrolled rectifier system is shut down.

6. The method according to claim 1, characterized in that, Detecting the number of extreme points of the bus voltage within one power frequency cycle includes: The bus voltage is continuously sampled at a preset sampling frequency to obtain the bus voltage timing signal. Set the length of the sliding window, wherein the sliding window includes the current sampling point and its N adjacent sampling points before and after it; where N is a preset positive integer; The sliding window is slid along the time axis point by point, and at each window position, it is determined whether the voltage value of the current sampling point is simultaneously greater than or simultaneously less than the voltage values ​​of all adjacent sampling points within the sliding window. If the voltage value of the current sampling point is greater than the voltage values ​​of all adjacent sampling points within the sliding window, it is marked as a maximum point; if the voltage value of the current sampling point is less than the voltage values ​​of all adjacent sampling points within the sliding window, it is marked as a minimum point. The number of extreme points of the bus voltage within one power frequency cycle is obtained by accumulating the total number of the maximum and minimum points.

7. The method according to claim 1, characterized in that, Detecting the number of extreme points of the bus voltage within one power frequency cycle includes: The bus voltage is continuously sampled at a preset sampling frequency to obtain the bus voltage timing signal. Perform a fast Fourier transform on the bus voltage time-series signal to obtain the frequency domain spectrum of the bus voltage ripple; The amplitude information of each harmonic component is extracted from the frequency domain spectrum; The waveform complexity of the bus voltage ripple is determined based on the amplitude information, and the preset range of the number of extreme points is determined based on the waveform complexity.

8. A fault identification device for a three-phase uncontrolled rectifier system, characterized in that, The system includes a three-phase power supply, a three-phase rectifier, and a bus filter capacitor bank; the device includes: The first processing module is used to acquire the bus voltage in the three-phase uncontrolled rectifier system and determine the corresponding ripple frequency based on the bus voltage. The second processing module is used to reduce the equivalent capacitance value of the bus filter capacitor bank when the ratio of the ripple frequency to the input voltage frequency of the three-phase power supply exceeds a preset threshold. The third processing module is used to detect the number of extreme points of the bus voltage within one power frequency cycle and determine the fault type based on the number of extreme points.

9. An electronic device, characterized in that, include: The system comprises a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other via the communication bus; the memory is used to store computer programs; and the processor, when executing the computer programs, implements the fault identification method for the three-phase uncontrolled rectifier system according to any one of claims 1-7.

10. A storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the computer program implements the fault identification method for the three-phase uncontrolled rectifier system as described in any one of claims 1-7.

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