Semiconductor cp test data display method and device, and ATE equipment
Patent Information
- Application Number
- CN202610562559.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-04-24
- Publication Date
- 2026-08-18
AI Technical Summary
[0003]随着芯片制程的发展,单片晶圆所包含的测试单元数量持续增长,市场中已出现单片晶圆内测试单元达到七十万至一百万的情况,而现有软件在显示规模与显示效率方面存在明显瓶颈,例如最高仅能显示二十多万颗测试单元且耗时较长,难以满足大数据量场景下的高效率显示需求
[0025] A fifth aspect of this application provides a computer program product that, when run on an ATE device, causes the ATE device to perform the method described in the first aspect above.
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Figure CN122592152A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of semiconductor chip testing technology, and in particular relates to a semiconductor CP test data display method, apparatus and ATE equipment. Background Technology
[0002] Semiconductor CP testing (Chip Probing / Circuit Probing), also known as wafer testing / intermediate testing, refers to the electrical and functional testing of each die on a semiconductor wafer after wafer manufacturing and before packaging. This is performed by ATE (Automatic Test Equipment) in conjunction with a prober. During chip testing, the ATE typically needs to graphically present the test results and basic information of each test unit (e.g., each chip die) within a wafer in a manner consistent with its physical structure, allowing testers to quickly view the overall test distribution and statistical information of the wafer.
[0003] With the development of chip manufacturing processes, the number of test units contained in a single wafer continues to grow. In the market, there are cases where the number of test units in a single wafer reaches 700,000 to 1 million. However, existing software has obvious bottlenecks in terms of display scale and display efficiency. For example, it can only display a maximum of more than 200,000 test units and takes a long time, which is difficult to meet the high-efficiency display requirements of large data volume scenarios.
[0004] Therefore, there is an urgent need for a semiconductor CP test data display method for ATE equipment that can quickly and graphically present the test results of each test unit within the wafer under large-scale test data conditions, thereby reducing the interface display burden, improving the overall display efficiency, and ensuring the real-time response and smoothness of the display interface. Summary of the Invention
[0005] In view of this, embodiments of this application provide a semiconductor CP test data display method, apparatus, and ATE equipment, which can achieve high-efficiency display under large-scale test data conditions.
[0006] A first aspect of this application provides a semiconductor CP test data display method, applied to an ATE device, wherein the ATE device includes at least a display interface; the method includes: In response to a user's target area display operation on the display interface, display parameters are determined, the display parameters including at least the position parameters of the target display area; The current display range is determined based on the position parameters, and the target block identifier in the test data to be displayed is determined according to the correspondence between the physical coordinates of the test unit and the grid index, based on the current display range. Based on the target block identifier, target block data corresponding to the target block identifier is obtained, and the target block data is converted into a target block image. The target block image includes multiple pixel units, each pixel unit corresponds to a test unit within the target display area, and each pixel unit is used to display the test results of the corresponding test unit. The target block image is converted into a renderable image resource and drawn onto the display interface to display the distribution of test results for each test unit within the target display area.
[0007] In this embodiment, firstly, in response to the user's target area display operation on the display interface, display parameters, including at least the target display area position parameters, are determined, making the display requirements parameterized and calculable. This provides a clear display boundary for subsequent processing and avoids indiscriminate refreshing of the entire wafer data. Secondly, the current display range is determined based on the position parameters, and the target block identifier in the test data to be displayed is quickly located from the current display range according to the correspondence between the physical coordinates of the test unit and the grid index. This achieves a direct mapping from the "display range" to the "data block set," reducing the computational overhead caused by the coordinate conversion and traversal retrieval of each test unit, and improving the efficiency of target data positioning. Furthermore, Based on the target block identifier, the corresponding target block data is obtained and converted into a target block image. This allows the test results of a large number of test units to be aggregated and expressed in a block-level image manner. By using the correspondence between pixel units and test units within the target display area, the test results are directly encoded into pixel display content, thereby reducing the cost of item-by-item drawing and interface control management for massive test units. Finally, the target block image is converted into a renderable image resource and drawn onto the display interface. The batch drawing characteristics of the image resource are used to quickly present the distribution of test results, reducing the number of data processing and drawing operations involved in the main interface task. This improves the overall display efficiency and enhances the real-time response and smoothness of the display interface in scenarios with large amounts of data.
[0008] In one possible implementation, the method further includes: In response to the startup operation of the display interface, a connection to the database is established and a display signal is triggered; In response to the display signal, the first thread performs a loop query on the test data in the database to obtain the test data of each test unit; The acquired test data of each test unit is encapsulated into the test data to be displayed.
[0009] In this implementation, by establishing a database connection after the interface is launched and using an independent thread to cyclically query and obtain test data for each test unit, data acquisition and loading can be completed stably and continuously, providing a data foundation for subsequent display processing and improving the overall efficiency and responsiveness of the display process.
[0010] In one possible implementation, the step of encapsulating the acquired test data of each test unit into the test data to be displayed includes: The test data is divided into multiple parallel tasks for computation and processing; Extract the position information of each test unit used for image display and the corresponding test result information; Based on the location information of each test unit and the corresponding test result information, multiple image display data units are generated; The plurality of image display data units are encapsulated into the test data to be displayed.
[0011] In this embodiment, by allocating the test data to multiple parallel tasks and extracting only the information required for image display to generate image display data units, the data processing time and irrelevant data volume can be reduced, thereby improving the generation efficiency and transmission efficiency of the test data to be displayed.
[0012] In one possible implementation, the correspondence between the physical coordinates of the test unit and the grid index refers to a mapping table between grid positions and block identifiers. The grid positions are determined by the physical coordinates of the test unit according to a preset block division rule, and the block identifiers are at least one target block identifier covering the current display range. Determining the target block identifiers in the test data to be displayed based on the current display range includes: The set of grid positions covered by the current display range is determined based on the location parameters; According to the mapping table, the set of grid locations is mapped to the at least one target block identifier; Output the identifier of at least one target block.
[0013] In this embodiment, by mapping physical coordinates to grid positions according to preset block division rules and further mapping them to target block identifiers, it is possible to quickly locate the target data block from the display range, reduce traversal retrieval overhead, and improve the efficiency of target block determination.
[0014] In one possible implementation, converting the target block data into a target block image includes: According to the preset block division rules, the test unit information in the target block data is mapped to the pixel unit of the target block image, wherein one pixel unit corresponds to one test unit; The pixel unit is assigned a value based on the test result information of the corresponding test unit to obtain the target block image.
[0015] In this embodiment, by mapping the target block data into pixel units according to the block division rules and using the pixel units to carry the corresponding test results, a large number of test unit results can be expressed in a high-density block image manner, reducing the cost of drawing unit by unit and improving the efficiency of graphical generation.
[0016] In one possible implementation, the method further includes: Establish a cache for the target block data; Periodically check the access records of the target block data in the cache, and the access records shall include at least the latest access time; When the interval between the latest access time of the target block data and the current time reaches a preset unaccessed time threshold, the target block data is released to obtain an updated target block data cache.
[0017] In this implementation, by releasing target block data that has not been accessed for a long time based on access records and non-access duration thresholds, cache usage can be effectively controlled and long-term memory accumulation can be avoided, thereby improving the system's operational stability during the display of large amounts of data.
[0018] In one possible implementation, the method further includes: Determine the zoom level parameter in response to the user's zooming operation on the display interface; Based on the correspondence between the scaling level parameter and the test unit result text display status, and the scaling level parameter, determine the current text display status of each test unit within the target display area; Depending on the current text display status, the result text of the test unit may or may not be displayed on the display interface.
[0019] In this implementation, by establishing a correspondence between scaling levels and text display states and controlling text display accordingly, information readability and rendering load can be balanced at different scaling levels, avoiding performance degradation caused by excessive detail.
[0020] In one possible implementation, converting the target block image into a renderable image resource and drawing it onto the display interface includes: Initialize the graphics rendering interface and create texture resources; Write the target block image into the texture resource; Configure the position and coordinate attributes of the texture resource based on the texture array, texture buffer, and texture vertices; The configured texture resources are drawn onto the display interface to obtain a display screen showing the distribution of test results for each test unit within the target display area.
[0021] In this embodiment, by writing the target block image into the texture resource and drawing it using the texture array, texture buffer, and texture vertices, batch accelerated rendering of image resources can be achieved, thereby improving the display speed and interactive smoothness of the test result distribution screen.
[0022] A second aspect of this application provides a semiconductor CP test data display device, the device being configured in an ATE (Automatic Test Equipment) device, the ATE device including at least a display interface; the device comprising: An interaction module is used to determine display parameters in response to a user's target area display operation on the display interface, wherein the display parameters include at least the position parameters of the target display area; The target determination module is used to determine the current display range based on the position parameters, and to determine the target block identifier in the test data to be displayed according to the current display range under the correspondence between the physical coordinates of the test unit and the grid index. An image generation module is used to obtain target block data corresponding to the target block identifier based on the target block identifier, and convert the target block data into a target block image. The target block image includes multiple pixel units, each pixel unit corresponds to a test unit in the target display area, and each pixel unit is used to display the test result of the corresponding test unit. The display module is used to convert the target block image into a renderable image resource and draw it onto the display interface to display the distribution of test results of each test unit within the target display area.
[0023] A third aspect of this application provides an ATE device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method described in the first aspect.
[0024] A fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the first aspect above.
[0025] A fifth aspect of this application provides a computer program product that, when run on an ATE device, causes the ATE device to perform the method described in the first aspect above.
[0026] For the beneficial effects of the second to fifth aspects mentioned above, please refer to the first aspect mentioned above, which will not be repeated here. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 This is a schematic flowchart of a semiconductor CP test data display method provided in an embodiment of this application; Figure 2 This is a schematic diagram of the interface corresponding to the first level of scaling; Figure 3 This is a schematic diagram of the interface corresponding to the second level of scaling; Figure 4 This is a schematic diagram illustrating the process of acquiring test data to be displayed, as provided in an embodiment of this application. Figure 5 This is a structural block diagram of a semiconductor CP test data display method provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a semiconductor CP testing display device provided in an embodiment of this application; Figure 7 This is a schematic diagram of the structure of an ATE device provided in an embodiment of this application. Detailed Implementation
[0029] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0030] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.
[0031] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0032] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."
[0033] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0034] It should be understood that the sequence number of each step in this embodiment does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of this application embodiment.
[0035] Semiconductor CP testing (Chip Probing / Circuit Probing), also known as wafer testing / intermediate testing, refers to the electrical and functional testing of each die on a semiconductor wafer after wafer manufacturing and before packaging. This is performed by ATE (Automatic Test Equipment) in conjunction with a prober. During chip testing, the ATE typically needs to graphically present the test results and basic information of each test unit (e.g., each chip die) within a wafer in a manner consistent with its physical structure, allowing testers to quickly view the overall test distribution and statistical information of the wafer.
[0036] With the development of chip manufacturing processes, the number of test units contained in a single wafer continues to grow. In the market, there are cases where the number of test units in a single wafer reaches 700,000 to 1 million. However, existing software has obvious bottlenecks in terms of display scale and display efficiency. For example, it can only display a maximum of more than 200,000 test units and takes a long time, which is difficult to meet the high-efficiency display requirements of large data volume scenarios.
[0037] Therefore, there is an urgent need for a semiconductor CP test data display method for ATE equipment that can quickly and graphically present the test results of each test unit within the wafer under large-scale test data conditions, thereby reducing the interface display burden, improving the overall display efficiency, and ensuring the real-time response and smoothness of the display interface.
[0038] To address the aforementioned issues, this application proposes a semiconductor CP test data display method, apparatus, and ATE equipment. The semiconductor CP test data display method first responds to the user's target area display operation on the display interface and determines display parameters, including at least the target display area's location parameters, thereby parameterizing and calculable the display requirements. This provides a clear display boundary for subsequent processing and avoids indiscriminate refreshing of the entire wafer's data. Second, based on the location parameters, the current display range is determined, and the target block identifier in the test data to be displayed is quickly located from the current display range using the correspondence between the physical coordinates of the test unit and the grid index. This achieves a direct mapping from the "display range" to the "data block set," reducing the need for coordinate conversion and traversal retrieval per test unit. This reduces computational overhead and improves the efficiency of target data location. Furthermore, based on the target block identifier, the corresponding target block data is obtained and converted into a target block image, allowing the test results of a large number of test units to be aggregated and expressed in a block-level image manner. The test results are directly encoded into pixel display content by the correspondence between pixel units and test units within the target display area, thereby reducing the cost of item-by-item drawing and interface control management for massive test units. Finally, the target block image is converted into a renderable image resource and drawn onto the display interface. The batch drawing characteristics of the image resource are used to complete the rapid presentation of the test result distribution, reducing the number of data processing and drawing operations involved in the main interface task. This improves the overall display efficiency and enhances the real-time response and smoothness of the display interface in scenarios with large amounts of data.
[0039] The semiconductor CP test data display method, apparatus, ATE equipment, storage medium, and computer program provided in the embodiments of this application will be described in detail below with reference to the accompanying drawings.
[0040] See Figure 1 The diagram illustrates a flowchart of a semiconductor CP test data display method provided in an embodiment of this application; the method is applied to an ATE device, which includes at least a display interface.
[0041] like Figure 1 As shown, the method may include the following steps: Step 101: In response to the user's operation to display a target area on the display interface, determine the display parameters.
[0042] The display interface refers to the interface window on the ATE device used to present graphical results of test data and receive user operations. Users can initiate display-related operations in this interface to trigger subsequent display processes.
[0043] Among them, the target area display operation refers to the operation performed by the user on the display interface for the "local area that you want to view". It is used to express the user's display intention and enable the system to identify the location of the area that the user wants to display.
[0044] The display parameters refer to a set of parameters used to describe the current display requirements. The system uses this set of parameters to determine the area to be displayed and the boundary conditions required for subsequent display. These parameters include at least the positional parameters used to locate the target display area. The positional parameters are those used to characterize the positional relationship of the target display area within the display interface, uniquely determining the spatial boundary or positional description of the target display area in the interface coordinate system.
[0045] In step 101, in response to the user's target area display operation on the display interface, the ATE device first identifies the target display area corresponding to the operation and determines the display parameters required for this display. The ATE device generates at least the position parameters of the target display area to describe its location on the display interface. Further, the ATE device saves or transmits the display parameters as input conditions for this display process, so that subsequent steps can deduce the current display range based on the position parameters and complete the target data positioning and display.
[0046] For example, a user may specify a local area of interest (i.e., a target display area) on the display interface through a single target area display operation. Upon receiving this operation, the ATE device generates display parameters, and at least generates location parameters characterizing the position of the target display area (e.g., location boundary or location description parameters describing the area's position on the display interface), thereby enabling subsequent steps to determine the current display range and drive the display process based on these location parameters.
[0047] Step 102: Determine the current display range based on the position parameters, and determine the target block identifier in the test data to be displayed based on the correspondence between the physical coordinates of the test unit and the grid index.
[0048] The current display range refers to the display range that the ATE device needs to cover in this display based on the location parameters, which is used to limit the range boundary of subsequent data positioning and display.
[0049] Among them, the physical coordinates of the test unit refer to the physical position coordinates of each test unit on the wafer, which are used to characterize the spatial distribution of the test unit on the wafer.
[0050] Among them, the grid index refers to the gridded index information established based on the physical coordinates of the test unit, which is used to establish a relationship between the grid position and the data block so as to quickly locate the relevant data block according to the display range.
[0051] The correspondence between the physical coordinates of the test unit and the grid index refers to the mapping relationship between the physical coordinates of the test unit and the gridded index system, enabling the ATE device to map the spatial location involved in the display range to the grid location and further associate it with the data block identifier.
[0052] Among them, the target block identifier refers to the identification information that is used to uniquely identify the target data block corresponding to the current display range, and is used to indicate which data blocks in the test data to be displayed need to be used for this display.
[0053] In step 102, the ATE device calculates the current display range to be displayed based on the position parameters in the display parameters determined in step 101, which is used to define the range boundary for subsequent data positioning. Then, based on the correspondence between the physical coordinates of the test unit and the grid index, the ATE device maps the current display range to the grid position range covered by the grid index, and determines at least one grid position covered by the current display range. Further, the ATE device determines at least one target block identifier corresponding to the at least one grid position in the test data to be displayed, and outputs at least one target block identifier as the positioning basis for subsequently acquiring target block data and generating target block images.
[0054] For example, the ATE device obtains the position boundary of the target display area in the display interface based on the position parameters, thereby determining the current display range; then, the ATE device maps the current display range to several grid positions based on the grid index, and determines several target block identifiers covering the current display range accordingly; finally, it outputs a set of target block identifiers, so that the corresponding target block data can be located from the test data to be displayed for display according to the target block identifiers.
[0055] It should be noted that, in this embodiment, the test data to be displayed is a set of test data corresponding to each test unit within the wafer area, used to support the graphical presentation of the display interface; the test data to be displayed is not limited to the test data of the test units within the target display area. During the display process, the ATE device determines the current display range based on the position parameters and filters out the target block identifier corresponding to the current display range from the test data to be displayed, so as to realize on-demand display of the target display area.
[0056] In one possible implementation, the correspondence between the physical coordinates of the test unit and the grid index refers to a mapping table between grid positions and block identifiers. The grid positions are determined by the physical coordinates of the test unit according to a preset block division rule, and the block identifiers are at least one target block identifier covering the current display range. Determining the target block identifiers in the test data to be displayed based on the current display range includes: The set of grid positions covered by the current display range is determined based on the position parameters; Based on the mapping table, the set of grid locations is mapped to at least one target block identifier; Output at least one target block identifier.
[0057] In this embodiment, the ATE device pre-establishes a correspondence between the physical coordinates of test units and grid indices. This correspondence can be specifically represented as a mapping table between grid positions and block identifiers. The ATE device assigns the physical coordinates of each test unit to its corresponding grid position according to a preset block division rule, and establishes a mapping relationship between the grid positions and the block identifiers used to identify data blocks, thereby forming a mapping table. Based on this mapping table, when executing step 102, the ATE device first determines the current display range based on the position parameters obtained in step 101, and further determines the set of grid positions covered by the current display range. Subsequently, the ATE device maps the set of grid positions to at least one target block identifier covering the current display range according to the mapping table, and outputs at least one target block identifier so that subsequent steps can locate the corresponding target block data from the test data to be displayed (the set of test data of each test unit within the wafer area) based on the target block identifier and use it for display.
[0058] Step 103: Obtain the target block data corresponding to the target block identifier based on the target block identifier, and convert the target block data into a target block image.
[0059] Among them, target block data refers to the data content corresponding to the target block identifier, which is located by the ATE device from the test data to be displayed based on the target block identifier. It is used to characterize the location information and test result information of each test unit within the coverage area of the target block to support subsequent image generation.
[0060] The target block image includes multiple pixel units, each corresponding to a test unit within the target display area, and the pixel unit is used to display the test results of the corresponding test unit. A test unit refers to a chip die in a wafer; the ATE equipment performs tests on each chip die and obtains the corresponding test results. In this embodiment, each test unit within the target display area is a chip die whose test result distribution needs to be displayed on the display interface.
[0061] In this context, a pixel unit refers to the smallest display unit in the target block image. When generating the target block image, the ATE device makes the pixel unit correspond to the test unit in the target display area and makes the pixel unit carry the test result display content of the corresponding test unit.
[0062] In step 103, after obtaining the target block identifier output in step 102, the ATE device locates the data content corresponding to the target block identifier in the test data to be displayed based on the target block identifier, thereby obtaining the target block data corresponding to the target block identifier. Subsequently, the ATE device converts the target block data into a target block image: the ATE device determines the pixel unit position of each test unit in the target block image based on the position information of each test unit in the target block data, and writes the test results of each test unit into the corresponding pixel unit, so that the pixel units in the target block image correspond to the test units in the target display area, and the pixel units are used to display the test results of the corresponding test units, thereby obtaining the target block image for subsequent drawing and display.
[0063] In one possible implementation, converting target block data into a target block image includes: According to the preset block division rules, the test unit information in the target block data is mapped to the pixel unit of the target block image, where one pixel unit corresponds to one test unit; The pixel units are assigned values based on the test results of the corresponding test units to obtain the target block image.
[0064] In this embodiment, after obtaining the target block data based on the target block identifier, the ATE device performs a conversion from the target block data to a target block image. Specifically, the ATE device determines the spatial range covered by the target block data and its arrangement in the image according to a preset segmentation rule, and maps the test unit information in the target block data to the pixel units of the target block image, so that each pixel unit in the target block image corresponds to a test unit. Subsequently, the ATE device reads the test result information corresponding to each test unit and assigns values to the corresponding pixel units according to the test result information, thereby obtaining the target block image; the target block image is used to characterize the distribution of test results within the target display area.
[0065] For example, in a wafer testing scenario, the ATE (Automatic Test Equipment) device performs tests on multiple chip dies on a wafer, generating test result information for each die and its physical coordinates on the wafer. When the target display area covers a local area of the wafer, the ATE device determines the corresponding target block identifier based on the target display area and obtains the target block data corresponding to that identifier. Subsequently, according to a preset block division rule, the ATE device maps each die (i.e., test unit) in the target block data to pixel units in the target block image according to its physical coordinates, so that each pixel unit corresponds to one die; and assigns values to the corresponding pixel units based on the test result information of that die, thereby generating a target block image. This target block image is then drawn onto the display interface to present the distribution of test results for each die within that local wafer area.
[0066] In one possible implementation, the method further includes: Establish a cache for the target block data; Periodically check the access records of the target block data in the cache; the access records must include at least the latest access time. When the interval between the latest access time of the target block data and the current time reaches a preset inaccessible time threshold, the target block data is released to obtain the updated target block data cache.
[0067] In this implementation, during the process of displaying the test result distribution of the target display area, the ATE device can also establish cache management for the target block data to control memory usage and avoid long-term accumulation of block data. Specifically, after acquiring the target block data, the ATE device writes the target block data into the cache and maintains an access record for each target block data in the cache. The access record includes at least the latest access time, which is used to characterize the time when the target block data was last used for display or read. Subsequently, the ATE device periodically checks the access records of each target block data in the cache at a preset check cycle and performs cache eviction management based on the access records. In one implementation, an eviction rule consistent with the "Least Recently Used (LRU)" strategy can be used to process block data that has not been used for a long time. That is, by comparing the latest access time or the duration of non-access for each target block data, target block data that has not been used for a long time can be identified. When the interval between the latest access time of a target block data and the current time reaches a preset non-access duration threshold, the ATE device releases the target block data to obtain an updated target block data cache, thereby reducing memory usage and improving operational stability in large-scale data display scenarios.
[0068] For example, during wafer test data display, users frequently switch target display areas, causing different target block data to be continuously loaded and displayed. This can lead to the accumulation of multiple historically accessed target block data in the cache. The ATE device can periodically perform a cache check, determining whether each target block data has been inactive for a long time based on its latest access time. If some target block data has not been accessed again within multiple check cycles, and its inactivity time reaches a preset threshold, the ATE device releases these target block data, retaining the recently accessed target block data, thus creating an updated target block data cache.
[0069] Step 104: Convert the target block image into a renderable image resource and draw it onto the display interface to display the distribution of test results for each test unit within the target display area.
[0070] Among them, renderable image resources refer to image data carriers that can be directly loaded by the graphics rendering environment and used for drawing, and are used to submit target block images to the display interface for display in a drawable form.
[0071] In step 104, after obtaining the target block image generated in step 103, the ATE device converts the target block image into a renderable image resource and draws the renderable image resource onto the display interface to complete the display of the distribution of test results for each test unit within the target display area. Specifically, the ATE device initializes the graphics rendering interface and creates texture resources, writing the target block image into the texture resources; subsequently, the ATE device configures the position and coordinate attributes of the texture resources based on the texture array, texture buffer, and texture vertices, enabling the texture resources to correspond to the position range of the target display area in the display interface; finally, the ATE device draws the configured texture resources onto the display interface, forming a graphical display of the distribution of test results for each test unit within the target display area.
[0072] For example, in a wafer testing display scenario, after the ATE device generates several target block images for the target display area, it can create corresponding texture resources for each target block image and configure the coordinates of each texture resource according to its corresponding target display area position. After the configuration is completed, the ATE device draws the texture resources onto the display interface, thereby presenting the distribution of test results of each chip die within the target display area on the display interface.
[0073] That is, in one possible implementation, converting the target block image into a renderable image resource and drawing it onto the display interface includes: Initialize the graphics rendering interface and create texture resources; Write the target block image to the texture resource; Configure the position and coordinate attributes of texture resources based on texture arrays, texture buffers, and texture vertices; The configured texture resources are drawn onto the display interface to obtain a display screen showing the distribution of test results for each test unit within the target display area.
[0074] In this embodiment, when using the target block image for interface display, the ATE device can employ a texture resource-based rendering method to improve rendering efficiency. Specifically, the ATE device first initializes the graphics rendering interface and creates texture resources to carry image data. Subsequently, the ATE device writes the target block image obtained in step 103 into the texture resources, allowing the target block image to enter the graphics rendering process in texture form. Further, the ATE device configures display-related geometric information for the texture resources: managing the organization and invocation of multiple texture resources through a texture array, storing the coordinate attributes of texture resources through a texture buffer, and defining the position attributes of texture resources in the display interface through texture vertices, thereby enabling the target block image to be mapped to the target display area with the corresponding spatial position. Finally, the ATE device submits the texture resources with the position and coordinate attributes configured to the rendering process and renders them onto the display interface, obtaining a display screen showing the distribution of test results for each test unit within the target display area.
[0075] For example, in a local area display scenario of wafer testing, the ATE device can write texture resources for multiple target block images involved in the current target display area, and manage these texture resources in a unified manner through a texture array; at the same time, the display position and texture coordinates corresponding to each texture resource are written into the texture buffer, and the geometric position of the texture in the display interface is described by the texture vertex, so that each target block image can be drawn and stitched together according to its corresponding area position, thereby forming a display screen of the test results distribution within the target display area.
[0076] In one possible implementation, the method further includes: Determine the zoom level parameters in response to the user's zooming actions on the display interface; Based on the correspondence between the scaling level parameter and the test unit result text display status, and the scaling level parameter, determine the current text display status of each test unit within the target display area; Depending on the current text display status, the result text of the test unit may or may not be displayed on the display interface.
[0077] The scaling level parameter refers to the parameter used to characterize the current scaling degree of the display interface. The ATE device can determine whether the current display is in a coarse-grained browsing or fine-grained viewing state based on this parameter. This application does not limit the number of scaling levels.
[0078] Among them, the test unit result text refers to the text information used to present the test results of the test unit in text form, which is used to provide readable result details in addition to the graphical distribution diagram; in the wafer testing scenario, the result text may include at least one of the following: test unit number, test conclusion information, test result numerical information or failure information identifier.
[0079] Among them, the text display status refers to the status information used to indicate whether the test unit result text is displayed in the display interface.
[0080] In this embodiment, during the process of drawing the distribution of test results within the target display area, the ATE device can also adaptively control the display of test unit result text based on the user's zooming operation, so as to balance display efficiency and information readability. Specifically, the ATE device responds to the user's zooming operation on the display interface and determines the current zoom level parameter; then, based on the pre-established "correspondence between zoom level parameter and test unit result text display status" and in combination with the current zoom level parameter, the ATE device determines the current text display status of each test unit within the target display area; finally, based on the current text display status, the ATE device selects to display or not display the result text of the test unit on the display interface, thereby controlling the amount of text superimposed and the display load under different zoom levels.
[0081] For example, during the display of the target area in wafer testing, when the user is browsing the entire area at a low zoom level, the target display area often contains a large number of test units (chip dies). If the result text is overlaid on each test unit simultaneously, it can easily cause interface congestion and increase rendering overhead. In this case, the ATE device can determine the zoom level parameter as "low zoom" and, based on the corresponding relationship, determine the text display state as "not displayed," only displaying the graphical distribution of each test unit (e.g., the distribution of test results presented by pixel units), without overlaying the result text. Subsequently, when the user zooms in on the target display area to a higher zoom level using the scroll wheel or zoom controls, causing a single test unit to occupy a larger display area and the number of test units in the visible range to decrease significantly, the ATE device will determine the zoom level parameter as "high zoom" and, based on the corresponding relationship, switch the text display state to "display." In this state, the ATE device can overlay and display the test unit result text near the location of the corresponding test unit. For example, it can display the die number (such as "D12345" or equivalent identifier), test conclusion (such as "PASS / FAIL" or equivalent Chinese conclusion), key test result values (such as the value of a voltage / current measurement), or failure information identifiers (such as failure mode codes / abnormal item identifiers). This allows users to directly obtain the result details of the corresponding test unit through text when zooming in. When the user zooms out to a lower level, the ATE device will then restore the text not to be displayed according to the corresponding relationship to maintain the clarity and smoothness of the display interface.
[0082] It should be noted that the correspondence between the content type and scaling level parameters of the test unit result text and the text display status is for illustrative purposes only and does not constitute a limitation. In specific implementations, the ATE device can provide a configuration entry set by the user, allowing the user to set the range of content to be displayed for the result text according to display requirements (e.g., selecting to display one or more of the test unit identifier, test conclusion, test result value, or failure information identifier), and to set text display strategies under different scaling levels (e.g., displaying or not displaying corresponding to each scaling level, and display density, etc.). The ATE device determines the current text display status based on the configuration parameters set by the user and executes the corresponding text display control.
[0083] The following provides an illustrative example of two scaling levels (first-level scaling and second-level scaling).
[0084] See Figure 2 The diagram illustrates the interface at the first level of scaling. At this scaling level, the display shows the target area at a smaller zoom level, simultaneously displaying a graphical distribution of numerous test units (chip dies). Each test unit occupies a small area, and the overall distribution of test results is represented by color / fill blocks. A status / prompt area at the top displays the coordinates of the current indicated position and relevant identifiers (e.g., X, Y positions and Bin information). The right side of the interface includes a statistics and control area with control buttons for view movement / positioning, and a statistics bar displaying yield, total number, pass count, and failure count. It also displays a list of different category identifiers (e.g., Hbin) and their quantities, allowing users to quickly grasp the overall distribution and statistical overview of test results within the target area. Overall, this interface diagram corresponds to a coarser-grained browsing scenario, focusing on quickly presenting the spatial distribution of large amounts of test results using graphical distribution maps, and using statistical information to assist users in making overall judgments.
[0085] See Figure 3The diagram illustrates the interface at the second level of zoom. At this zoom level, the target display area is magnified, allowing individual test units (chip dies) to occupy a larger display area. The number of test units within the target display area is relatively reduced, enabling users to view the distribution of local test results in a more granular manner. A status / prompt area is located at the top of the interface, displaying the coordinates of the currently indicated position and identification information related to the test results (e.g., X, Y position and Bin-related information), reflecting the status of the currently selected or indicated test unit. In this diagram, some test units are presented as more prominent cells, displaying numerical values or label text related to the test results within the cells. Specific test units can be highlighted to assist users in locating and viewing the detailed results of that unit. The right side of the interface also features a statistics and control area, including view movement / positioning control buttons, and statistical information bars such as yield, total number, pass count, and failure count, along with lists of different category labels and their quantities. Overall, this interface diagram corresponds to a more granular viewing scenario. While ensuring a graphically distributed display, it further supports viewing the details of the results for individual or a small number of test units, thereby improving the readability and interactive experience of local analysis.
[0086] In the above method embodiments, the method can quickly and graphically present the test results of each test unit in the wafer under large-scale test data conditions, thereby reducing the interface display burden, improving the overall display efficiency, and ensuring the real-time response and smoothness of the display interface.
[0087] See Figure 4 The diagram illustrates the process of acquiring test data to be displayed according to an embodiment of this application; wherein, the test data to be displayed includes test data of each test unit in the wafer.
[0088] like Figure 4 As shown, the acquisition process may include the following steps: Step 401: In response to the startup operation of the display interface, establish a connection with the database and trigger a display signal.
[0089] In this embodiment, in response to the startup operation of the display interface, the ATE device first establishes a connection with the database to enable subsequent reading of test data from each test unit in the wafer. After completing the database connection, the ATE device triggers a display signal to indicate the start of the subsequent data acquisition process, thereby providing the startup conditions for acquiring the test data to be displayed.
[0090] For example, when a user starts the display interface of the ATE device, the ATE device initiates a database connection action; after confirming that the database connection is successful, the ATE device outputs a display signal to trigger the subsequent reading process of wafer test data in the database, so that subsequent steps can obtain the test data of each test unit in the wafer and form the test data to be displayed under the trigger of the display signal.
[0091] Step 402: In response to the display signal, the first thread performs a loop query on the test data in the database to obtain the test data for each test unit.
[0092] The first thread refers to an independent execution thread created or called by the ATE device, which is used to undertake the task of cyclically querying the database test data in the display process, so as to decouple it from the display interface drawing process.
[0093] In step 402, after receiving the display signal triggered in step 401, the ATE device starts the first thread to perform a cyclic query of the test data in the database. Specifically, in the first thread, the ATE device continuously sends query requests to the database and receives the returned results according to a preset query order or query conditions, thereby gradually obtaining the test data corresponding to each test unit in the wafer; when the query results show that the test data of all test units in the wafer has been obtained, the ATE device ends the cyclic query and obtains the test data set of each test unit for subsequent packaging.
[0094] For example, in a wafer test data display scenario, the database stores the test results and corresponding identification information of each chip die within the same wafer. After the display signal is triggered, the ATE device uses a first thread to iteratively query the records corresponding to that wafer: the first thread can read the test data in batches according to the test unit identifier or the physical coordinate order, and summarize the results after each query; until the test data of all test units within the wafer is obtained, thus forming "test data of each test unit", which is then packaged into test data to be displayed in subsequent steps.
[0095] Step 403: Encapsulate the obtained test data of each test unit into test data to be displayed.
[0096] In this embodiment of the application, after the ATE device obtains the test data of each test unit (chip die) in the wafer in step 402, it encapsulates the test data to form test data to be displayed: Specifically, the ATE device summarizes and structures the test data of each test unit according to a preset data organization method, so that it can be called as the input data set of the subsequent display process, thereby obtaining test data to be displayed that contains the test data of each test unit in the wafer.
[0097] In one possible implementation, the acquired test data of each test unit is encapsulated into test data to be displayed, including: The test data is distributed into multiple parallel tasks for computation and processing; Extract the position information of each test unit used for image display and the corresponding test result information; Based on the location information of each test unit and the corresponding test result information, multiple image display data units are generated; Multiple image display data units are encapsulated into test data to be displayed.
[0098] In this embodiment, when the ATE device encapsulates the test data of each test unit (chip die) obtained in step 402 into test data to be displayed, it can use parallel processing to improve encapsulation efficiency. Specifically, the ATE device first divides and allocates the test data into multiple parallel tasks for calculation and processing, enabling multiple tasks to be executed in parallel to accelerate data processing. Subsequently, the ATE device extracts the position information of each test unit for image display and the test result information corresponding to each test unit from the processing results of each parallel task, so that the encapsulated data focuses on the information content required for graphical presentation. Based on this, the ATE device generates multiple image display data units based on the extracted position information and test result information, so that each image display data unit can be used to represent the position of the corresponding test unit in the display and its test result. Finally, the ATE device encapsulates the multiple image display data units to form test data to be displayed, so that the target block identifier can be determined based on the display range and the target block image can be generated and displayed by block.
[0099] The above acquisition process is used to obtain the test data to be displayed. After the display interface is started, a connection with the database is established and a display signal is triggered. Then, an independent execution sequence is used to cyclically query the test data in the database to obtain the test data of each test unit. In the encapsulation stage, the test data is allocated to multiple parallel tasks for calculation and processing. The test unit position information and corresponding test result information used only for image display are extracted to generate image display data units and encapsulate them as test data to be displayed. This can achieve continuous and efficient acquisition and parallel preprocessing of test data in large data volume scenarios, reduce the transmission and processing burden caused by irrelevant data, shorten the generation and loading time of test data to be displayed, and thus improve the overall efficiency and interface response performance of subsequent graphical display.
[0100] See Figure 5 The diagram illustrates a structural block diagram of a semiconductor CP test data display method provided in an embodiment of this application. In this embodiment, the ATE device can achieve efficient display of large test data according to the "data loading - block data management - OpenGL rendering" chain.
[0101] Specifically, the ATE device first executes a data loading process: the ATE device configures a thread pool on the data loading side and creates multiple parallel tasks in the thread pool; these may include tasks for loading wafer test data from a data storage / database, and tasks for performing parallel computation and receiving processing on the loaded data. Through these parallel tasks, the ATE device reads and processes the test data of each test unit (chip die) in the wafer step by step, and extracts the test unit information used only for graphical display, forming data input that can be used for subsequent display.
[0102] Subsequently, the ATE equipment executes a block data management process: the ATE equipment organizes the test unit information into blocks according to preset block rules, such as dividing the wafer test units into multiple blocks based on physical coordinates, and aggregating the corresponding test unit information within each block to form block data (in the example, this could be the block data organization form corresponding to "256×256 dies"). Simultaneously, the ATE equipment establishes a grid index cache based on the physical coordinates of the test units, enabling rapid location of the required block data based on the display range. To control memory usage, the ATE equipment can also perform memory optimization management, such as using an LRU strategy algorithm to periodically check long-unused block data in the block data management, and releasing block data that meets the release conditions to maintain a stable cache size and improve operational reliability.
[0103] Finally, the ATE device executes the OpenGL rendering process: the ATE device converts the block data to be displayed into block images, and maps and transforms the block images into OpenGL textures; on this basis, the ATE device calls the GPU to draw the OpenGL textures through rendering acceleration, thereby rendering the corresponding block images onto the display interface in the form of textures, and finally forming a graphical display of the distribution of test unit test results in the target area.
[0104] See Figure 6 The diagram shows a schematic of a semiconductor CP test data display device provided in an embodiment of this application; the device is configured in an ATE device, which includes at least a display interface.
[0105] For ease of explanation, only the parts relevant to the embodiments of this application are shown.
[0106] The semiconductor CP test data display device 600 may specifically include: Interaction module 601 is used to respond to the user's target area display operation on the display interface and determine the display parameters, which include at least the position parameters of the target display area; The target determination module 602 is used to determine the current display range based on the position parameters, and to determine the target block identifier in the test data to be displayed based on the correspondence between the physical coordinates of the test unit and the grid index. The image generation module 603 is used to obtain target block data corresponding to the target block identifier based on the target block identifier, and convert the target block data into a target block image. The target block image includes multiple pixel units, each pixel unit corresponds to a test unit in the target display area, and the pixel unit is used to display the test result of the corresponding test unit. Display module 604 is used to convert the target block image into a renderable image resource and draw it onto the display interface to display the distribution of test results of each test unit within the target display area.
[0107] In this embodiment, the semiconductor CP test data display device 600 may further include: The first response module is used to respond to the startup operation of the display interface, establish a connection with the database, and trigger a display signal; The second response module is used to respond to the display signal by using the first thread to cyclically query the test data in the database to obtain the test data of each test unit. The encapsulation module is used to encapsulate the test data of each test unit into test data to be displayed.
[0108] In this embodiment of the application, the encapsulation module may specifically include: The allocation unit is used to distribute test data into multiple parallel tasks for computation and processing. The information extraction unit is used to extract the position information of each test unit and the corresponding test result information for image display; The generation unit is used to generate multiple image display data units based on the location information of each test unit and the corresponding test result information; The image data encapsulation unit is used to encapsulate multiple image display data units into test data to be displayed.
[0109] In this embodiment, the correspondence between the physical coordinates of the test unit and the grid index refers to a mapping table between the grid position and the block identifier. The grid position is determined by the physical coordinates of the test unit according to a preset block division rule, and the block identifier is at least one target block identifier covering the current display area. The target determination module 602 may specifically include: The coverage grid determination unit is used to determine the set of grid positions covered by the current display range based on position parameters; A mapping unit is used to map a set of grid locations to at least one target block identifier according to a mapping table; The identifier output unit is used to output at least one target block identifier.
[0110] In this embodiment of the application, the image generation module 603 may specifically include: The rule mapping unit is used to map the test unit information in the target block data to the pixel units of the target block image according to the preset block division rules, wherein one pixel unit corresponds to one test unit; The assignment unit is used to assign values to pixel units based on the test result information of the corresponding test unit to obtain the target block image.
[0111] In this embodiment, the semiconductor CP test data display device 600 may further include: The cache creation unit is used to create a cache for the target block data; The access record checking unit is used to periodically check the access records of target block data in the cache. The access records must include at least the latest access time. The cache update unit is used to release the target block data when the interval between the latest access time of the target block data and the current time reaches a preset non-access duration threshold, so as to obtain the updated target block data cache.
[0112] In this embodiment, the semiconductor CP test data display device 600 may further include: The third response module is used to determine the zoom level parameters in response to the user's zoom operation on the display interface; The display status determination module is used to determine the current text display status of each test unit within the target display area based on the correspondence between the scaling level parameter and the test unit result text display status, as well as the scaling level parameter. The results display module is used to display or not display the test unit's result text on the display interface based on the current text display status.
[0113] In this embodiment, the display module 604 may specifically include: The texture resource creation unit is used to initialize the graphics rendering interface and create texture resources; The texture resource writing unit is used to write the target block image into the texture resource; The configuration unit is used to configure the position and coordinate attributes of texture resources based on the texture array, texture buffer, and texture vertices. The drawing unit is used to draw the configured texture resources onto the display interface to obtain a display screen showing the distribution of test results of each test unit within the target display area.
[0114] The semiconductor CP test data display device 600 provided in this application embodiment can be applied to the semiconductor CP test data display method provided in the foregoing embodiment. For details, please refer to the description of the semiconductor CP test data display method provided in the above embodiment, which will not be repeated here.
[0115] See Figure 7 This illustration shows a schematic diagram of the structure of an ATE device provided in an embodiment of this application; the ATE device 700 of this embodiment includes: at least one processor 710 ( Figure 7 Only one is shown in the diagram), memory 720, and computer program 721 stored in memory 720 and executable on processor 710. When processor executes computer program 721, it implements the above-described semiconductor CP test data display method.
[0116] The ATE device 700 may be a server, a physical server, or a computing device, etc. This ATE device may include, but is not limited to, a processor 710 and a memory 720. Those skilled in the art will understand that... Figure 7 This is merely an example of ATE device 700 and does not constitute a limitation on ATE device 700. It may include more or fewer components than shown, or combine certain components, or use different components.
[0117] The processor 710 can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.
[0118] In some embodiments, the memory 720 may be an internal storage unit of the ATE device 700, such as a hard disk or memory of the ATE device 700. In other embodiments, the memory 720 may be an external storage device of the ATE device 700, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the ATE device 700. Furthermore, the memory 720 may include both internal and external storage units of the ATE device 700. The memory 720 is used to store the operating system, applications, boot loader, data, and other programs, such as the program code of the computer program. The memory 720 can also be used to temporarily store data that has been output or will be output.
[0119] In specific implementations, the processor 710, memory 720, and computer program 721 described in the embodiments of this application can execute the embodiments of the semiconductor CP test data display method of this application, which will not be repeated here.
[0120] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0121] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0122] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0123] In the embodiments provided in this application, it should be understood that the disclosed apparatus / ATE devices and methods can be implemented in other ways. For example, the apparatus / ATE device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings or direct couplings or communication connections may be through some interfaces; indirect couplings or communication connections between apparatuses or units may be electrical, mechanical, or other forms.
[0124] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0125] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0126] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.
[0127] The implementation of all or part of the processes in the methods of the above embodiments can also be accomplished by a computer program product. When the computer program product is run on the ATE device, the ATE device can implement the steps in the various method embodiments described above.
[0128] The embodiments described above are only used to illustrate the technical solutions of this application, and are not intended to limit it. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A method for displaying semiconductor CP test data, characterized in that, Applied to an ATE device, wherein the ATE device includes at least a display interface; the method includes: In response to a user's target area display operation on the display interface, display parameters are determined, the display parameters including at least the position parameters of the target display area; The current display range is determined based on the position parameters, and the target block identifier in the test data to be displayed is determined according to the correspondence between the physical coordinates of the test unit and the grid index, based on the current display range. Based on the target block identifier, target block data corresponding to the target block identifier is obtained, and the target block data is converted into a target block image. The target block image includes multiple pixel units, each pixel unit corresponds to a test unit within the target display area, and each pixel unit is used to display the test results of the corresponding test unit. The target block image is converted into a renderable image resource and drawn onto the display interface to display the distribution of test results for each test unit within the target display area.
2. The method as described in claim 1, characterized in that, The method further includes: In response to the startup operation of the display interface, a connection to the database is established and a display signal is triggered; In response to the display signal, the first thread performs a loop query on the test data in the database to obtain the test data of each test unit; The acquired test data of each test unit is encapsulated into the test data to be displayed.
3. The method as described in claim 2, characterized in that, The step of encapsulating the acquired test data of each test unit into the test data to be displayed includes: The test data is divided into multiple parallel tasks for computation and processing; Extract the position information of each test unit used for image display and the corresponding test result information; Based on the location information of each test unit and the corresponding test result information, multiple image display data units are generated; The plurality of image display data units are encapsulated into the test data to be displayed.
4. The method as described in claim 1, characterized in that, The correspondence between the physical coordinates of the test unit and the grid index refers to the mapping table between the grid position and the block identifier. The grid position is determined by the physical coordinates of the test unit according to the preset block division rules, and the block identifier is at least one target block identifier that covers the current display range. Determining the target block identifier in the test data to be displayed based on the current display range includes: The set of grid positions covered by the current display range is determined based on the location parameters; According to the mapping table, the set of grid locations is mapped to the at least one target block identifier; Output the identifier of at least one target block.
5. The method as described in claim 1, characterized in that, The step of converting the target block data into a target block image includes: According to the preset block division rules, the test unit information in the target block data is mapped to the pixel unit of the target block image, wherein one pixel unit corresponds to one test unit; The pixel unit is assigned a value based on the test result information of the corresponding test unit to obtain the target block image.
6. The method as described in claim 1, characterized in that, The method further includes: Establish a cache for the target block data; Periodically check the access records of the target block data in the cache, and the access records shall include at least the latest access time; When the interval between the latest access time of the target block data and the current time reaches a preset unaccessed time threshold, the target block data is released to obtain an updated target block data cache.
7. The method as described in claim 1, characterized in that, The method further includes: Determine the zoom level parameter in response to the user's zooming operation on the display interface; Based on the correspondence between the scaling level parameter and the test unit result text display status, and the scaling level parameter, determine the current text display status of each test unit within the target display area; Depending on the current text display status, the result text of the test unit may or may not be displayed on the display interface.
8. The method as described in claim 1, characterized in that, The step of converting the target block image into a renderable image resource and drawing it onto the display interface includes: Initialize the graphics rendering interface and create texture resources; Write the target block image into the texture resource; Configure the position and coordinate attributes of the texture resource based on the texture array, texture buffer, and texture vertices; The configured texture resources are drawn onto the display interface to obtain a display screen showing the distribution of test results for each test unit within the target display area.
9. A semiconductor CP test data display device, characterized in that, Configured in an ATE device, the ATE device including at least a display interface; the device includes: An interaction module is used to determine display parameters in response to a user's target area display operation on the display interface, wherein the display parameters include at least the position parameters of the target display area; The target determination module is used to determine the current display range based on the position parameters, and to determine the target block identifier in the test data to be displayed according to the current display range under the correspondence between the physical coordinates of the test unit and the grid index. An image generation module is used to obtain target block data corresponding to the target block identifier based on the target block identifier, and convert the target block data into a target block image. The target block image includes multiple pixel units, each pixel unit corresponds to a test unit in the target display area, and each pixel unit is used to display the test result of the corresponding test unit. The display module is used to convert the target block image into a renderable image resource and draw it onto the display interface to display the distribution of test results of each test unit within the target display area.
10. An ATE device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 8.