A method and system for testing a radio frequency power amplifier chip

Abstract

The application discloses a kind of test method and system of radio frequency power amplifier chip, test method includes: sample chip is placed in first test link test, obtains eigenvalue performance benchmark value under thermal equilibrium;Sample chip is placed in second test link test, obtains initial performance parameter and performance parameter changing with time;Eigenvalue performance benchmark value, performance parameter changing with time and sample instantaneous power consumption are combined, and thermal memory effect model is built;After the chip to be tested is tested, eigenvalue performance benchmark value, initial performance parameter and thermal memory effect model are used to correct test result.The eigenvalue benchmark value of low thermal resistance barrier welding type test is used as real reference in the application, accurately eliminates the test distortion caused by heat accumulation, avoids false failure, eliminates yield loss and miscreening, and improves yield determination accuracy.

Description

Technical Field

[0001] This invention belongs to the field of radio frequency power amplifier chip testing technology, specifically relating to a testing method and system for radio frequency power amplifier chips. Background Technology

[0002] In the final test (FT) process of finished packaged chips, RF power amplifier chips typically need to be connected to a test load board via probes of a test socket. Because the thermal conductivity and contact area of ​​the socket material are much lower than the heat dissipation path when directly soldered onto the PCB, the heat generated by the chip during operation cannot be quickly dissipated through the socket, causing the junction temperature to rise rapidly. This temperature increase not only alters key RF parameters of the power amplifier such as gain, linearity, and efficiency, but also triggers "false failures" in the test results—that is, the chip itself performs normally, but the measured values ​​deviate from specifications due to heat accumulation during the test, resulting in yield loss or incorrect screening. Therefore, new methods are needed to address this issue.

[0003] Currently, the main existing technologies for handling thermal accumulation during FT testing of RF power amplifier chips are as follows: First, active heat dissipation is achieved by integrating air-cooled or liquid-cooled channels into the test fixture. For example, external heat sinks and external cooling water pipes are installed around the chip connector, while internal cooling water pipes are installed in the internal heat conduction components to circulate water for cooling. Second, thermal pads or metal heat sinks are added between the chip and the test load board and on the top of the chip to enhance heat conduction through physical contact. Third, pulse testing technology is used to complete the acquisition of key parameters in a very short time before the chip has become severely heated, thereby reducing heat accumulation. However, all of the above solutions have obvious drawbacks: Although air-cooled and liquid-cooled heat dissipation systems are effective, the heat dissipation path still needs to pass through probes or fixtures with low thermal conductivity, so the heat conduction efficiency is still limited. In addition, water-cooled systems are bulky and complex in structure, making them difficult to adapt to high-density multi-channel parallel testing scenarios, and the overall cost of the solution is high. Thermal pads or metal heat sinks increase contact thermal resistance and may cause parasitic effects on RF signals, affecting test accuracy. For high-gain RF amplifiers, they may even cause self-oscillation or even damage. Although pulse testing can temporarily avoid heat accumulation, it cannot reflect the true performance of the chip under continuous wave operation. Moreover, for devices such as heterojunction bipolar transistors, which generate a lot of heat through collector dissipation during operation, it is difficult to meet the heat dissipation requirements of high-power output testing. Summary of the Invention

[0004] To overcome the above-mentioned technical defects, the present invention provides a testing method and system for radio frequency power amplifier chips, which solves the problem of performance test distortion caused by heat accumulation in the prior art.

[0005] A test method for an RF power amplifier chip, comprising: The sample RF power amplifier chip was placed on the first test link for testing to obtain the intrinsic performance benchmark value of the sample RF power amplifier chip under thermal equilibrium conditions. The sample RF power amplifier chip was placed on the second test link for testing to obtain the initial performance parameters and the performance parameters that change over time of the sample RF power amplifier chip. A thermal memory effect model was built based on intrinsic performance benchmark values, time-varying performance parameters, and instantaneous power consumption of sample RF power amplifier chips. The RF power amplifier chip under test is tested, and the test results are corrected based on intrinsic performance benchmarks, initial performance parameters, and thermal memory effect models.

[0006] As a further improvement of the present invention, the step of placing the sample RF power amplifier chip on the first test link for testing to obtain the intrinsic performance benchmark value of the sample RF power amplifier chip in thermal equilibrium state includes: The sample RF power amplifier chip was soldered onto a standard performance test board; The performance parameters of the sample RF power amplifier chip were obtained by using a vector signal generator and a spectrum analyzer in pulse test mode, which served as the intrinsic performance benchmark value of the sample RF power amplifier chip under thermal equilibrium conditions.

[0007] As a further improvement of the present invention, the step of placing the sample RF power amplifier chip on the second test link for testing to obtain the initial performance parameters and time-varying performance parameters of the sample RF power amplifier chip includes: Place the sample RF power amplifier chip on the test fixture; The initial performance parameters of the sample RF power amplifier chip are obtained by using a pulse signal at the moment when the sample RF power amplifier chip is not powered on. The temperature was obtained when the sample RF power amplifier chip reached thermal equilibrium at the moment of power-on. By mapping temperature to performance parameters, the performance parameters that change over time can be obtained.

[0008] As a further improvement of the present invention, the present invention also includes the following steps: The steps for obtaining the temperature of the sample RF power amplifier chip from power-on to thermal equilibrium include: The temperature was obtained by directly measuring the highest temperature point on the surface of the sample RF power amplifier chip. Alternatively, for sample RF power amplifier chips with built-in temperature sensors, the junction temperature of the temperature sensor can be read to obtain the temperature. Alternatively, for sample RF power amplifier chips without built-in temperature sensors, the temperature can be inferred by monitoring the change in the static operating point current of the sample RF power amplifier chip.

[0009] As a further improvement of the present invention, the thermal memory effect model is as follows:

[0010] in, These are performance parameters that change over time. These are the initial performance parameters. The temperature rise of the sample RF power amplifier chip over time. This represents the instantaneous power consumption of historical sample RF power amplifier chips. The thermal time constant of the sample RF power amplifier chip. This is the static temperature rise influence coefficient. The coefficient representing the influence of thermal memory effect. , All of these are coefficients to be fitted.

[0011] As a further improvement of the present invention, the temperature rise curve of the sample RF power amplifier chip from power-on instant to thermal equilibrium state is subjected to exponential fitting to determine the thermal time constant of the sample RF power amplifier chip. Based on the thermal offset and temperature rise relationship of the sample RF power amplifier chip, the thermal time constant is fixed, and the least squares method is used to perform nonlinear regression to fit and obtain the static temperature rise influence coefficient and the thermal memory effect influence coefficient. The relationship between thermal displacement and temperature rise is calculated based on initial performance parameters and performance parameters that change over time.

[0012] As a further improvement of the present invention, the step of testing the RF power amplifier chip under test and correcting the test results based on intrinsic performance benchmark values, initial performance parameters, and thermal memory effect models includes: During high-power testing of the RF power amplifier chip under test, the temperature rise of the RF power amplifier chip under test is obtained. The raw test values ​​are obtained by testing the RF power amplifier chip under test; Substituting the temperature rise into the thermal memory effect model, the thermally induced error was calculated. The fixed loss value is calculated based on the intrinsic performance reference value and initial performance parameters; After subtracting the fixed loss value from the original test value, the thermal error is added to obtain the corrected test result.

[0013] As a further improvement of the present invention, the step of obtaining the temperature rise of the RF power amplifier chip under test includes: For the RF power amplifier chip under test with a built-in temperature sensor, the temperature rise is obtained by reading the junction temperature of the temperature sensor. For RF power amplifier chips without built-in temperature sensors, the instantaneous power consumption is calculated using the test current and test voltage of the sample RF power amplifier chip. The steady-state temperature rise is obtained based on the instantaneous power consumption and the power consumption-temperature rise lookup table. The temperature rise is estimated based on the steady-state temperature rise and the thermal resistance model. Alternatively, for RF power amplifier chips without built-in temperature sensors, the temperature rise can be inferred from the pre-stored current-time relationship curve.

[0014] As a further improvement of the present invention, when the set time is reached, the thermal memory effect model is verified, and if a deviation occurs, a thermal memory effect model update warning is triggered.

[0015] The present invention also provides a test system for an RF power amplifier chip, characterized in that, for implementing the above-described test method, it includes: The first test link is equipped with a standard performance test board, a first vector signal generator, and a first spectrum analyzer. The standard performance test board is used to place the sample RF power amplifier chip, and the first vector signal generator and the first spectrum analyzer are used to test the sample RF power amplifier chip. The second test link is equipped with a test fixture, a second vector signal generator, and a second spectrum analyzer. The test fixture is used to place the sample RF power amplifier chip, and the second vector signal generator and the second spectrum analyzer are used to test the sample RF power amplifier chip. An electronic device is connected to the first test link and the second test link.

[0016] Compared with existing technologies, the beneficial effects of this invention are as follows: By acquiring intrinsic performance benchmark values ​​under thermal equilibrium conditions, initial performance parameters, and time-varying performance parameters through dual test links, and combining them with a thermal memory effect model built from the instantaneous power consumption of the RF power amplifier chip, the intrinsic benchmark values ​​obtained from low thermal barrier soldering tests are used as a true performance reference. This allows for precise quantification and correction of RF parameter offsets caused by heat accumulation during final mass production testing, eliminating thermally induced test distortion at its source. The model corrects the performance of the test results for the RF power amplifier chip under test, effectively avoiding false failures where the RF power amplifier chip itself is qualified but the measured values ​​deviate from specifications due to test heat accumulation. This eliminates yield loss and mis-screening issues during mass production, ensuring the objectivity and reliability of final mass production test results and improving the overall yield judgment accuracy of RF power amplifier chip mass production testing. Furthermore, no physical modifications are required to the hardware such as fixtures and load boards used in final mass production testing. It can be directly integrated into existing RF power amplifier mass production testing systems, offering simple operation and strong versatility. While ensuring test accuracy, it does not affect the efficiency of mass production testing, adapting to the testing needs of large-scale chip mass production. Attached Figure Description

[0017] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings, wherein: Figure 1 This is a flowchart of the testing method described in this invention; Figure 2 This is a schematic diagram of the test system described in this invention. Detailed Implementation

[0018] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0019] This invention provides a testing method for an RF power amplifier chip, such as... Figure 1 As shown, it includes: S1. Place the sample RF power amplifier chip on the first test link for testing to obtain the performance parameters of the sample RF power amplifier chip under thermal equilibrium. The performance parameters include: small signal gain S21, 1dB compression point output power P-1dB, power-added efficiency PAE, adjacent channel power ratio ACPR (@5MHz offset), and third-order intermodulation distortion IMD3. The above performance parameters are used as intrinsic performance benchmark values.

[0020] In this process, firstly, the sample RF power amplifier chip is soldered onto a standard performance test board. Then, using a vector signal generator and a spectrum analyzer in pulse test mode, the performance parameters of the sample RF power amplifier chip are acquired, serving as the intrinsic performance benchmark values ​​of the chip under thermal equilibrium conditions. The standard performance test board is a circuit board simulating the chip's final actual application scenario (Customer Usage), possessing excellent thermal conductivity and RF performance. The data collected at this point is considered the true performance benchmark values ​​of the RF power amplifier chip.

[0021] To eliminate random errors, each sample RF power amplifier chip was tested three times, and the average of the three intrinsic performance benchmark values ​​was taken as the final intrinsic performance benchmark value.

[0022] As one implementation method, the ambient temperature for testing the first test link is set to 25°C, at which point the intrinsic performance reference value is the parameter at the normal temperature reference point.

[0023] To improve the adaptability of the present invention across the entire temperature range, the standard performance test board can be placed in a high-temperature chamber or a low-temperature chamber, and repeated tests can be performed according to step S1. The temperature inside the chamber can be set to -40℃, -10℃, 25℃, 50℃, and 85℃, which can cover the typical industrial-grade temperature range. The intrinsic performance benchmark values ​​at different temperatures are recorded to prepare the present invention for application in different ambient temperatures.

[0024] S2. Place the sample RF power amplifier chip on the second test link for testing to obtain the initial performance parameters and the performance parameters that change over time of the sample RF power amplifier chip.

[0025] Specifically, the sample RF power amplifier chip is placed on a test fixture; at the instant the sample RF power amplifier chip is powered on, i.e., in a cold state, a small pulse signal is used to obtain the initial performance parameters of the sample RF power amplifier chip; a continuous wave (CW) signal or a standard modulation signal (such as a QPSK 16KHz bandwidth signal) is applied to the sample RF power amplifier chip to simulate the actual power-on process of mass production testing, and the temperature is obtained at the instant the sample RF power amplifier chip reaches thermal equilibrium; the temperature is correlated with the performance parameters to obtain the performance parameters that change over time.

[0026] The initial performance parameters reflect fixed deviations caused by fixture contact resistance, parasitic capacitance, etc., but do not include the heat accumulation effect.

[0027] The test fixture is a final test fixture (Socket) used during mass production. The test fixture has probes (Pogo Pins) inside for contacting the DUT pins to simulate the mass production test environment.

[0028] As one implementation method, the temperature can be obtained when the sample RF power amplifier chip reaches thermal equilibrium at the moment of power-on, as follows: 1. Using infrared imaging technology, the highest temperature point on the surface of the sample RF power amplifier chip is directly measured to obtain the temperature with an accuracy of ±1℃.

[0029] 2. For sample RF power amplifier chips with built-in temperature sensors, the junction temperature is deduced by reading the forward voltage drop change through the PMU module of the DC power supply using the integrated temperature sensor. The calculation formula is: , where K is the temperature coefficient (typical value -1.5mV / ℃).

[0030] in, Junction temperature refers to the actual temperature of the PN junction inside the RF power amplifier chip, expressed in °C. This is a reference temperature, typically 25°C room temperature; The forward voltage drop of the temperature sensor at the reference temperature is expressed in mV or V. The forward voltage drop of the temperature sensor at the current measurement moment is expressed in mV or V; K is the temperature coefficient, typically -1.5mV / ℃, which represents the sensitivity of the voltage drop to temperature changes.

[0031] 3. For sample RF power amplifier chips without built-in temperature sensors, the temperature is inferred by monitoring the change in the static operating point current of the sample RF power amplifier chip.

[0032] S3. Based on intrinsic performance benchmarks, time-varying performance parameters, and instantaneous power consumption of the sample RF power amplifier chip, a thermal memory effect model is constructed:

[0033] in, These are performance parameters that change over time. These are the initial performance parameters. The temperature rise of the sample RF power amplifier chip over time. Historical moments of the sample RF power amplifier chip Instantaneous power consumption, The thermal time constant of the sample RF power amplifier chip. This is the static temperature rise influence coefficient. The coefficient representing the influence of thermal memory effect. , All of these are coefficients to be fitted.

[0034] Thermal time constant The valuation is obtained by measuring the temperature rise curve of the sample RF power amplifier chip from power-on instant to thermal equilibrium. The thermally induced offset based on the sample RF power amplifier chip was obtained by exponential fitting. With respect to temperature rise, and keeping the thermal time constant constant, a nonlinear regression using the least squares method is employed to obtain the static temperature rise influence coefficient. Influence coefficient of thermal memory effect The relationship between thermally induced displacement and temperature rise is calculated based on initial performance parameters and performance parameters changing over time. Specifically, thermally induced displacement... The dependent variable used for fitting the thermal memory effect model, thermally induced shift The target output for fitting the thermal memory effect model is the actual change in thermally induced offset over time.

[0035] After obtaining the thermal memory effect model, five additional sample RF power amplifier chips not involved in the modeling were selected and tested on a standard performance test board and a test fixture, respectively. The original test data from the fixture were substituted into the thermal memory effect model for correction, and the corrected results were compared with the measured values ​​on the standard performance test board. If the average error was less than 0.2 dB (gain) or 1 dBc (ACPR), the thermal memory effect model was considered effective; otherwise, the order of the thermal memory effect model was adjusted or the sample size was increased for refitting.

[0036] S4. Test the RF power amplifier chip under test, and correct the test results based on the intrinsic performance benchmark, initial performance parameters, and thermal memory effect model.

[0037] Specifically, when performing high-power testing on the RF power amplifier chip under test, the temperature rise of the RF power amplifier chip under test is obtained; the RF power amplifier chip under test is tested to obtain the original test value; the temperature rise is substituted into the thermal memory effect model to calculate the thermally induced error; the fixed loss value is calculated based on the intrinsic performance reference value and the initial performance parameters; the thermally induced error is then added to the original test value after deducting the fixed loss value, to obtain the corrected test result.

[0038] As one implementation method, the temperature rise of the RF power amplifier chip under test can be obtained in the following way: 1. For the RF power amplifier chip under test with a built-in temperature sensor, the temperature rise is obtained by reading the junction temperature of the temperature sensor.

[0039] 2. For RF power amplifier chips without built-in temperature sensors, the instantaneous power consumption is calculated using the test current and test voltage of the sample RF power amplifier chip. The steady-state temperature rise is obtained based on the instantaneous power consumption and the power consumption-temperature rise lookup table. The temperature rise is estimated based on the steady-state temperature rise and the thermal resistance model. The thermal resistance model is a thermal resistance parameter determined by the package of the RF power amplifier chip, which can be used to calculate the heat generation effect of the RF power amplifier chip under a specific power consumption.

[0040] Specifically, in step S2, when using infrared imaging technology to measure the highest temperature point on the surface of the sample RF power amplifier chip, the steady-state temperature rise of the sample RF power amplifier chip under different power consumption levels can be measured simultaneously to establish a power consumption-temperature rise lookup table. During mass production testing, the current after power-on stabilization was measured. and voltage Calculate power consumption , The video power output of the sample RF power amplifier chip at time t. This is the drain / collector voltage. This represents the drain / collector current, which can be obtained through forward power measurement. The corresponding steady-state temperature rise can be obtained by looking up a table. Considering the thermal transient process, an exponential correction is made by introducing a thermal time constant τ: , where t is the current power-on duration.

[0041] The power consumption-temperature rise lookup table is a general reference table established by averaging the steady-state temperature rise measurements of at least 50 sample RF power amplifier chips at different power consumption levels. For mass-produced RF power amplifier chips, the temperature rise estimation error introduced by this lookup table does not exceed ±3℃. 3. For RF power amplifier chips under test without built-in temperature sensors, the temperature rise is inferred from pre-stored current-time relationship curves. During the modeling stage, the static operating point current of the RF power amplifier chip at different temperatures is measured. The current-time relationship curve was obtained by fitting the data.

[0042] Specifically, in the second test link test phase, the quiescent operating point current of the RF power amplifier chip under test is measured at different temperatures. The current-time relationship curve was obtained by fitting. In mass production testing, rapid measurements were performed during the interval when the RF signal was turned off. ,according to Change Using the pre-stored current-time relationship curve Inversely, we can estimate the temperature rise.

[0043] S5. When the set time is reached, the thermal memory effect model is verified. If a deviation occurs, an early warning for updating the thermal memory effect model is triggered.

[0044] The invention will now be described in detail with reference to specific implementation processes, as follows: 1. Acquisition of intrinsic performance reference values 1.1 Selection of Standard Samples Fifty sample RF power amplifier chips were randomly selected from the mass production batch as standard samples. These 50 sample RF power amplifier chips were then randomly divided into two groups: Group A (20 chips) (for testing in the first test link) and Group B (30 chips) (for testing in the second test link). To ensure statistical significance, the sampled chips should cover different locations on the wafer (edge, center) and different batches.

[0045] 1.2 Preparation for welding standard performance test plates The 20 sample RF power amplifier chips from Group A were soldered onto a standard performance test board (EVB) using surface mount technology (SMT). The soldering process must meet the following requirements: Lead-free reflow soldering process is used, with a peak temperature of 245±5℃; The PCB material used is the Ro4350B high-frequency board, which is consistent with the customer's application. The grounding pad is fully connected to the underlying copper layer through an array of vias to ensure unobstructed heat dissipation path; After welding is completed, X-ray inspection is performed to confirm that there are no defects such as incomplete welding or bridging.

[0046] 1.3 Acquisition of pulse test reference data The soldered standard performance test board was placed in a temperature-controlled testing environment, with the ambient temperature set to 25℃ (room temperature reference point). A test system was built using a vector signal generator and a spectrum analyzer, and the intrinsic performance reference values ​​of the sample RF power amplifier chip were obtained using pulse test mode. The pulse test conditions were set as follows: Pulse width: 1μs (much smaller than the thermal time constant of the sample RF power amplifier chip, to avoid self-heating); Duty cycle: 0.1% (to ensure sufficient heat dissipation during pulse intervals); Test frequency: 1.6GHz center frequency, simultaneously scanning the entire 1.6-2GHz frequency band; Power scan range: from -10dBm small signal to saturation power point.

[0047] The main performance parameters collected include: small-signal gain S21, 1dB compression point output power P-1dB, power-added efficiency (PAE), adjacent channel power ratio (ACPR) (@5MHz offset), and third-order intermodulation distortion (IMD3). Each sample RF power amplifier chip was tested three times, and the average value was taken to eliminate random errors. The above data are denoted as... This represents the intrinsic performance benchmark value of the chip under ideal heat dissipation conditions.

[0048] 1.4 Extended Full Temperature Range Characteristics To improve the model's applicability across the entire temperature range, the standard performance test board was placed in a high and low temperature chamber, and the test in step 1.3 was repeated according to the following temperature steps: Temperature settings: -40℃, -10℃, 25℃, 50℃, 85℃ (covering typical industrial-grade temperature range); Each temperature point is kept at the temperature for 30 minutes to ensure that the sample RF power amplifier chip reaches thermal equilibrium. Record the performance parameters at each temperature point. Establish a temperature-performance baseline curve.

[0049] 2. Construction of the thermal memory effect model 2.1 Fixture Testing Environment Setup The 30 sample RF power amplifier chips from group B were placed in a test fixture (Socket). The specific specifications of the test fixture are as follows: Probe type: Pogo Pin (model: GGB 50A series), gold-plated beryllium copper; Contact force: 15-20 grams of force per needle; Test board: Standard FT test board consistent with mass production testing, without additional heat dissipation measures.

[0050] 2.2 Initial Parameter Measurement in Cold State At the instant the sample RF power amplifier chip is powered on, the same pulse signal as in step 1.3 (1μs pulse width, 0.1% duty cycle) is applied, and the initial performance parameters of the group B sample RF power amplifier chip are measured. This data reflects fixed deviations caused by fixture contact resistance, parasitic capacitance, etc., but does not include heat accumulation effects.

[0051] 2.3 Continuous Electrical Thermal Degradation Test Apply a continuous wave (CW) signal or a standard modulated signal (such as a QPSK 16kHz bandwidth signal) to the RF power amplifier chips in Group B to simulate the actual power-on process during mass production testing. The specific procedure is as follows: The power-on start time is recorded as ; An infrared thermal imager (such as FLIR A6750sc) was used to monitor the surface temperature of the sample RF power amplifier chip in real time, with a sampling frequency of 100 frames / second. Simultaneously, parameters such as output power, gain, and ACPR are continuously collected at a sampling interval of 1ms. Record all data from the moment of power-on to thermal equilibrium (typically, the temperature change is less than 1°C / minute after 30 seconds) to obtain the performance parameters as a function of time. .

[0052] 2.4 Temperature Measurement and Calculation Real-time temperature data is obtained through one of the following three methods, preferably using the first two methods simultaneously for cross-verification: Method 1 (Infrared Thermal Imaging): Directly measure the highest temperature point on the surface of the sample's RF power amplifier chip, with an accuracy of ±1℃; Method 2 (Built-in Temperature Sensor): Utilizing the temperature-sensitive diode integrated within the sample's RF power amplifier chip, the junction temperature is deduced by reading the forward voltage drop change through the PMU module of the testing equipment. The calculation formula is: , where K is the temperature coefficient (typical value -1.5mV / ℃); Method 3 (Indirect Estimation): Temperature is inferred by monitoring changes in the quiescent operating point current (IQ), which is applicable to sample RF power amplifier chips without integrated temperature sensors.

[0053] 2.5 Contact Resistance Loss Calibration Compare with step 2.2 With step 1.3 Calculate the contact resistance of the Pogo pin and the fixed losses caused by the PCB traces. Take the gain parameter as an example:

[0054] This fixed loss value is subsequently deducted directly as a system error.

[0055] 2.6 Extraction of Thermally Induced Misalignment Compare with step 2.3 With step 2.2 Extract the thermally induced offset caused by poor heat dissipation of the fixture. :

[0056] thermal offset Temperature rise data measured simultaneously By performing the corresponding calculations, the relationship between thermally induced displacement and temperature rise can be obtained.

[0057] thermal offset As the target output for fitting the thermal memory effect model.

[0058] 2.7 Construction of the Thermal Memory Effect Model Considering the thermal behavior of RF power amplifier chips exhibiting a memory effect—meaning that current performance depends not only on the current temperature but also on historical power consumption accumulation—this invention introduces a nonlinear model based on the thermal memory effect for fitting.

[0059] First, calculate the instantaneous power consumption of the RF power amplifier chip under test:

[0060] Then, a thermal memory effect model including integral terms is used to fit the data:

[0061] For all test data of 30 sample RF power amplifier chips in Group B, namely small-signal gain S21, 1dB compression point output power P-1dB, power-added efficiency (PAE), adjacent channel power ratio (ACPR) (@5MHz offset), and third-order intermodulation distortion (IMD3), a least-squares method was used for nonlinear regression fitting to obtain the characteristic parameters α, β, and τ for each sample RF power amplifier chip. Independent model coefficients can be established for different RF parameters (gain, ACPR, PAE).

[0062] 2.8 Model Validation Five additional RF power amplifier chips not used in the modeling were selected and tested on a standard performance test board and a test fixture, respectively. The original test data from the test fixture was substituted into the model for correction, and the corrected results were compared with the measured values ​​on the standard performance test board. If the average error was less than 0.2 dB (gain) or 1 dBc (ACPR), the thermal memory effect model was considered effective; otherwise, the order of the thermal memory effect model was adjusted or the sample size was increased for refitting.

[0063] Three: Mass Production Testing Implementation Phase 3.1 Model Deployment The static temperature rise influence coefficient obtained from step 2.7 is fitted. Influence coefficient of thermal memory effect The thermal time constant τ is stored in the database of the automated test equipment (ATE) in the form of a lookup table (LUT). For test systems that do not support complex real-time calculations, a temperature rise value-compensation value correspondence table can be generated in advance, and rapid compensation can be achieved by using a lookup table + linear interpolation method.

[0064] The temperature rise-compensation value mapping table is based on model coefficients obtained through nonlinear regression fitting using all test data from 30 B-group sample RF power amplifier chips. In this process, model parameters can be pre-stored, and during actual testing, the current temperature rise and integral term are substituted into the thermal memory effect model. If computational resources are limited, the compensation values ​​corresponding to different temperature rises can be pre-calculated to form a direct mapping table of "temperature rise-compensation value," in which case the thermal memory effect model is implicitly reflected in the mapping relationship.

[0065] 3.2 Power-on test of the RF power amplifier chip under test On the mass production final testing line, a robotic arm places the RF power amplifier chip under test onto the test fixture, and the Pogo Pins are pressed into contact. The test program is initiated, executing standard final testing procedures, including: DC test (static current, leakage current). Small signal S-parameter test; High-power linearity test (ACPR, P-1dB).

[0066] 3.3 Obtaining Temperature Rise Characteristic Values While performing high-power tests, the temperature rise of the RF power amplifier chip under test is measured using one of the following methods. : Preferred solution: Utilize the built-in temperature sensor of the RF power amplifier chip under test, insert temperature readout commands into the test sequence, and read the junction temperature in real time. ; Alternative approach: If the chip has no built-in sensor, calculate the instantaneous power consumption by testing the current and voltage, and then combine this with a thermal resistance model. (Calculated from τ) Estimate the temperature rise: ; Simplified solution: By monitoring the change in quiescent operating point current. Using pre-stored current-time relationship curves Inversely, we can estimate the temperature rise.

[0067] 3.4 Calculation of Thermally Induced Error The temperature rise obtained Substituting into the thermal memory effect model, calculate the thermally induced error:

[0068] in, It is an integral term based on the current power-on time and historical power consumption. (The calculation can be simplified by using the average power consumption at a fixed time point after power-on).

[0069] 3.5 Reverse Elimination Correction The original measured data is algebraically superimposed with the thermally induced error to output the corrected performance data:

[0070] In actual mass production testing, the fixed loss value can be directly subtracted from the original measured data, and then the thermal error value can be added; alternatively, the fixed loss value can be merged into the Error, meaning the Error includes both the fixed loss value and the thermal error value.

[0071] Taking the gain parameter as an example:

[0072] 3.6. Quality Assessment and Grading Based on the revised performance parameters Execution decision logic: like , , If all requirements are met, the product is deemed good (Pass). Further, the performance is graded (Binning) based on the level of the correction, for example: High performance setting: Gain ≥38dB, P-1dB ≥39dBm; Standard settings: 37dB ≤ gain < 38dB, 38.5dBm ≤ P-1dB < 39dBm; Low performance setting: Gain < 37dB, P-1dB < 38.5dBm; 3.7 Data backtracking The data before and after correction, temperature rise, test time, and other information for each sample RF power amplifier chip are stored in the database for subsequent statistical process control (SPC) and continuous model optimization.

[0073] 4. Model Maintenance and Update Phase 4.1 Periodic sampling verification Each month, five sample RF power amplifier chips are randomly selected from the mass production batch and verified on a standard performance test board according to the above procedure. The data from the corrected final test procedure are compared with the actual test data from the standard performance test board.

[0074] 4.2 Offset Monitoring and Early Warning If systematic deviations occur in three consecutive batches of sampling verification, such as the average error between the corrected data and the measured value of the standard performance test board exceeding 0.3dB, a thermal memory effect model update warning will be triggered.

[0075] 4.3 Dynamic Adjustment of Model Coefficients When an alert is triggered, the coefficients of the thermal memory effect model are refitted using the most recently accumulated data, and the power consumption-temperature rise lookup table in the database is updated. The update strategy can employ a sliding window method, retaining the most recent N batches of data for fitting.

[0076] Step 4.4 Handling Process Node Changes When chip design is revised, process node changes, or packaging form is changed, the first test link test and the second test link test must be re-executed, a complete modeling process must be carried out, a new thermal memory effect model must be established, and then it can be imported into mass production.

[0077] For test systems with limited computing resources, this invention also provides a test method for RF power amplifier chips, referencing the approach of piecewise linear digital predistortion: 1. Construction of piecewise linear model Divide the temperature rise range [-40℃, 125℃] into M intervals (e.g., M=5: [-40,0], [0,25], [25,50], [50,85], [85,125]).

[0078] Within each interval, it is assumed that the thermally induced offset is linearly related to the temperature rise: .

[0079] Using the data collected in the second period, linear fitting was performed on each interval to obtain the coefficients. Here, a piecewise relationship between temperature rise and error can be directly established to replace the thermal memory effect model and obtain the coefficients. .

[0080] Store the coefficients of group M as a lookup table.

[0081] 2. Piecewise linear lookup table compensation Get the current temperature rise value .

[0082] judge The interval m to which it belongs.

[0083] Get from table Calculate the error amount: .

[0084] Perform reverse elimination correction.

[0085] The advantages of piecewise linear models are that they are computationally simple, easy to implement quickly on existing ATE systems, and have sufficient compensation accuracy for chips with near-linear thermal behavior.

[0086] For chips with stringent EVM requirements, such as 5G chips, a separate thermal memory effect model for the error vector amplitude (EVM) can be established based on the same dual-link test procedure. In the second test link, the change of EVM over time is recorded synchronously, and the thermal time constant and static offset coefficient of the EVM are fitted. During mass production testing, the thermally induced offset of the EVM is predicted based on the current power-on time and historical power consumption, and subtracted from the original EVM measurement value to restore the true EVM performance. This method is a direct application of the thermal memory effect model of this invention to EVM parameters. For 5G communication chips with stringent EVM requirements, the test method for the RF power amplifier chip of this invention provides a dynamic EVM compensation scheme considering the thermal memory effect, referencing the design concept of a dynamic EVM controller. 1. Focus on the changes in EVM parameters with temperature and establish a thermal transient response model of the EVM.

[0087] 2. Identify the exponential characteristics of EVM thermal transients: ,in, The instantaneous error vector amplitude (EVM) is the measured value of the RF power amplifier chip at time t after power-on. The steady-state error vector magnitude (EVM) is the value of the RF power amplifier chip after it reaches thermal equilibrium (junction temperature stabilizes). It is typically higher than the initial value in the cold state. The initial error vector magnitude is the EVM value of the RF power amplifier chip in a frozen state (at the moment of power-on, before self-heating). is the thermal time constant of EVM, which describes how quickly EVM transitions from its initial value to its steady-state value. It is closely related to the thermal capacitance and thermal resistance of the RF power amplifier chip and the heat dissipation path of the package. T is time, the continuous operating time from power-on.

[0088] 3. The steady-state offset is stored as a model parameter.

[0089] Dynamic EVM compensation 1. In the test sequence, record the duration of each power-on. And historical electrical cycle information (especially important for time-division duplex (TDD) systems).

[0090] 2. Based on the current situation Based on the cumulative historical power consumption, predict the current thermal offset of the EVM.

[0091] 3. Subtract the predicted offset from the EVM test results to restore the chip's true EVM performance after thermal equilibrium.

[0092] In summary, the testing method of the present invention has the following beneficial effects: In the first test chain, the sample RF power amplifier chip underwent full parameter measurements without time interval limitations using a standard performance test board. Specifically, a vector signal generator provided a standard excitation signal, a vector spectrum analyzer acquired the output signal of the sample RF power amplifier chip, and a DC power supply monitored the operating current, thereby accurately obtaining key parameters such as gain, output power, and efficiency. Due to the sufficient heat dissipation from the soldering method, the sample RF power amplifier chip was in a thermal equilibrium state, and the data acquired at this time was regarded as the true intrinsic performance benchmark value of the sample RF power amplifier chip.

[0093] Obtain the performance degradation curve of the test fixture: In the second test link, power-on tests are performed on sample RF power amplifier chips of the same model or batch using the test fixture. Record the relationship between the performance parameters of the sample RF power amplifier chips and time, measured by a vector spectrum analyzer and a DC power supply, from the moment of power-on to thermal equilibrium.

[0094] Data fusion and reverse elimination: The relationship between the obtained performance parameters and time is used as a correction function and applied to the real-time test data of the FT production line. That is, during the final mass production test process, a reverse compensation is applied to the distorted test results obtained through the fixture to eliminate the performance degradation caused by poor heat dissipation at probe contact, and finally restore the true performance characteristics that are close to those measured by the standard performance test board in the first test link.

[0095] Based on the same inventive concept, the present invention also provides a testing system for radio frequency power amplifier chips, such as... Figure 2 As shown, the system includes: a first test link, a second test link, and electronic equipment. The first test link is equipped with a standard performance test board, a first vector signal generator, and a first spectrum analyzer. The standard performance test board is used to place the sample RF power amplifier chip, and the first vector signal generator and the first spectrum analyzer are used to test the sample RF power amplifier chip. The second test link is equipped with a test fixture, a second vector signal generator, and a second spectrum analyzer. The test fixture is used to place the sample RF power amplifier chip, and the second vector signal generator and the second spectrum analyzer are used to test the sample RF power amplifier chip. The electronic equipment is connected to the first test link and the second test link.

[0096] Please refer to the previous text for the specific implementation process of the testing system; it will not be repeated here.

[0097] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0098] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0099] The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A test method for an RF power amplifier chip, characterized in that, include: The sample RF power amplifier chip was placed on the first test link for testing to obtain the intrinsic performance benchmark value of the sample RF power amplifier chip under thermal equilibrium conditions. The sample RF power amplifier chip was placed on the second test link for testing to obtain the initial performance parameters and the performance parameters that change over time of the sample RF power amplifier chip. A thermal memory effect model was built based on intrinsic performance benchmark values, time-varying performance parameters, and instantaneous power consumption of sample RF power amplifier chips. The RF power amplifier chip under test is tested, and the test results are corrected based on intrinsic performance benchmarks, initial performance parameters, and thermal memory effect models.

2. The test method according to claim 1, characterized in that, The step of placing the sample RF power amplifier chip on the first test link for testing to obtain the intrinsic performance benchmark value of the sample RF power amplifier chip under thermal equilibrium conditions includes: The sample RF power amplifier chip was soldered onto a standard performance test board; The performance parameters of the sample RF power amplifier chip were obtained by using a vector signal generator and a spectrum analyzer in pulse test mode, which served as the intrinsic performance benchmark value of the sample RF power amplifier chip under thermal equilibrium conditions.

3. The test method according to claim 2, characterized in that, The step of placing the sample RF power amplifier chip on the second test link for testing to obtain the initial performance parameters and time-varying performance parameters of the sample RF power amplifier chip includes: Place the sample RF power amplifier chip on the test fixture; At the moment the sample RF power amplifier chip is powered on, a pulse signal is used to obtain the initial performance parameters of the sample RF power amplifier chip; The temperature was obtained when the sample RF power amplifier chip reached thermal equilibrium at the moment of power-on. By mapping temperature to performance parameters, the performance parameters that change over time can be obtained.

4. The test method according to claim 3, characterized in that, It also includes the following steps: The steps for obtaining the temperature of the sample RF power amplifier chip from power-on to thermal equilibrium include: The temperature was obtained by directly measuring the highest temperature point on the surface of the sample RF power amplifier chip. Alternatively, for sample RF power amplifier chips with built-in temperature sensors, the junction temperature of the temperature sensor can be read to obtain the temperature. Alternatively, for sample RF power amplifier chips without built-in temperature sensors, the temperature can be inferred by monitoring the change in the static operating point current of the sample RF power amplifier chip.

5. The test method according to claim 3, characterized in that, The thermal memory effect model is as follows: in, These are performance parameters that change over time. These are the initial performance parameters. The temperature rise of the sample RF power amplifier chip over time. This represents the instantaneous power consumption of historical sample RF power amplifier chips. The thermal time constant of the sample RF power amplifier chip. This is the static temperature rise influence coefficient. The coefficient representing the influence of thermal memory effect. , All of these are coefficients to be fitted.

6. The test method according to claim 5, characterized in that, The temperature rise curve of the sample RF power amplifier chip from power-on to thermal equilibrium was subjected to exponential fitting to determine the thermal time constant of the sample RF power amplifier chip. Based on the thermal offset and temperature rise relationship of the sample RF power amplifier chip, the thermal time constant was fixed, and the least squares method was used to perform nonlinear regression to obtain the static temperature rise influence coefficient and the thermal memory effect influence coefficient. The relationship between thermal displacement and temperature rise is calculated based on initial performance parameters and performance parameters that change over time.

7. The test method according to claim 4, characterized in that, The step of testing the RF power amplifier chip under test and correcting the test results based on intrinsic performance benchmarks, initial performance parameters, and thermal memory effect models includes: During high-power testing of the RF power amplifier chip under test, the temperature rise of the RF power amplifier chip under test is obtained. The raw test values ​​are obtained by testing the RF power amplifier chip under test; Substituting the temperature rise into the thermal memory effect model, the thermally induced error was calculated. The fixed loss value is calculated based on the intrinsic performance reference value and initial performance parameters; After subtracting the fixed loss value from the original test value, the thermal error is added to obtain the corrected test result.

8. The test method according to claim 7, characterized in that, The step of obtaining the temperature rise of the RF power amplifier chip under test includes: For the RF power amplifier chip under test with a built-in temperature sensor, the temperature rise is obtained by reading the junction temperature of the temperature sensor. For RF power amplifier chips without built-in temperature sensors, the instantaneous power consumption is calculated using the test current and test voltage of the sample RF power amplifier chip. The steady-state temperature rise is obtained based on the instantaneous power consumption and the power consumption-temperature rise lookup table. The temperature rise is estimated based on the steady-state temperature rise and the thermal resistance model. Alternatively, for RF power amplifier chips without built-in temperature sensors, the temperature rise can be inferred from the pre-stored current-time relationship curve.

9. The test method according to claim 1, characterized in that, When the set time is reached, the thermal memory effect model is verified. If a deviation occurs, an early warning for updating the thermal memory effect model is triggered.

10. A test system for an RF power amplifier chip, characterized in that, To implement the test method as described in any one of claims 1 to 9, comprising: The first test link is equipped with a standard performance test board, a first vector signal generator, and a first spectrum analyzer. The standard performance test board is used to place the sample RF power amplifier chip, and the first vector signal generator and the first spectrum analyzer are used to test the sample RF power amplifier chip. The second test link is equipped with a test fixture, a second vector signal generator, and a second spectrum analyzer. The test fixture is used to place the sample RF power amplifier chip, and the second vector signal generator and the second spectrum analyzer are used to test the sample RF power amplifier chip. An electronic device is connected to the first test link and the second test link.

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