Dynamic compensation method and system for measurement error of electrical parameters of tester

Abstract

The application discloses a dynamic compensation method and system for measurement error of electrical parameters of a tester, and relates to the field of error testing. The method comprises the following steps: acquiring voltage signals and current signals flowing through internal sampling elements of the tester in real time; performing phase alignment processing on the voltage signals and the current signals to obtain voltage sequences and current sequences after phase alignment; calculating transient power consumption of the sampling elements according to the voltage sequences and the current sequences after phase alignment; inputting the transient power consumption into a preset multi-order thermal resistance and capacitance equivalent network model to obtain transient equivalent temperature of the sampling elements by solving; calculating equivalent resistance drift rate of the sampling elements according to the transient equivalent temperature; and performing dynamic compensation on original measurement values according to the equivalent resistance drift rate to obtain compensated electrical parameter measurement results. The application can effectively reduce measurement error.

Description

Technical Field

[0001] This application relates to the field of error testing, and in particular to a dynamic compensation method and system for measuring electrical parameters of a test instrument. Background Technology

[0002] In the field of modern electrical parameter testing, especially in applications such as power semiconductor device testing, power battery charge / discharge testing, and high-power power module testing, testing instruments need to perform continuous and high-precision electrical parameter measurements on the tested object. These tests often involve high-current and high-power operating conditions, placing extremely high demands on measurement accuracy. The core sampling components inside the testing instrument (such as precision shunts and sampling resistors) are key components for current measurement, and their performance directly determines the accuracy and reliability of the entire testing system.

[0003] In actual testing, when a large current flows through the sampling element, a Joule heating effect is generated inside the element, causing its temperature to rise rapidly. Since the resistance of components such as the sampling resistor has a temperature coefficient, temperature changes cause resistance drift, leading to measurement errors. More complexly, this thermal effect is not an instantaneous response but exhibits significant dynamic characteristics. The generation, conduction, diffusion, and dissipation of heat within the sampling element all require time, demonstrating significant thermal inertia. This thermal inertia causes the temperature change of the sampling element to lag behind the power change, forming the so-called thermal memory effect.

[0004] In existing technologies, static temperature compensation methods are typically used to address measurement errors caused by temperature drift of the sampling element. These methods establish a temperature-resistance mapping relationship by pre-calibrating the resistance characteristics of the sampling element at different steady-state temperatures, and then compensate based on temperature sensor readings during measurement. However, this static compensation method assumes that the sampling element has reached thermal equilibrium, neglecting the dynamic thermal response during transient testing. Furthermore, it does not consider thermal hysteresis, meaning that at the same temperature point, the resistance drift characteristics of the sampling element differ during heating and cooling. In addition, traditional methods rely on external temperature sensors, which have slow response times and spatial deviations between the measurement location and the heating core, making it difficult to accurately reflect the true transient temperature of the sampling element.

[0005] Therefore, the main technical shortcomings at present are: existing compensation methods cannot effectively cope with transient nonlinear measurement errors caused by thermal memory effect and thermal hysteresis effect of sampling elements during dynamic testing. Especially under continuous high power and rapidly changing test conditions, the error compensation capability of static compensation methods is seriously insufficient and cannot meet the requirements of high-precision measurement. Summary of the Invention

[0006] This application provides a dynamic compensation method and system for measuring electrical parameters of a test instrument, which effectively reduces measurement errors under continuous high-power, rapidly changing test conditions.

[0007] To achieve the above objectives, the embodiments of this application adopt the following technical solutions: Firstly, a dynamic compensation method for measuring electrical parameters of a test instrument is provided, applied to a dynamic compensation system, the dynamic compensation system including the test instrument, and the method comprising: Real-time acquisition of voltage and current signals flowing through the sampling components inside the tester; The voltage and current signals are phase aligned to obtain phase-aligned voltage and current sequences. Calculate the transient power consumption of the sampling element based on the phase-aligned voltage and current sequences; The transient power consumption is input into a preset multi-order thermal resistance-capacitance equivalent network model, and the transient equivalent temperature of the sampling element is obtained by solving the model. Calculate the equivalent resistance drift rate of the sampling element based on the transient equivalent temperature; Based on the equivalent resistance drift rate, the original measured values ​​are dynamically compensated to obtain the compensated electrical parameter measurement results.

[0008] In one possible implementation of the first aspect, phase alignment processing is performed on the voltage signal and the current signal to obtain a phase-aligned voltage sequence and a current sequence, including: Voltage and current signals are sampled synchronously to obtain digital voltage and digital current sequences; Fractional time delay compensation is performed on the voltage and current digital sequences using an all-pass filter to eliminate the phase difference between the voltage and current signals, resulting in phase-aligned voltage and current sequences.

[0009] In another possible implementation of the first aspect, the transient power consumption of the sampling element is calculated based on the phase-aligned voltage and current sequences, including: The transient power consumption of the sampling element at the current moment is obtained by multiplying the voltage value at the current moment in the phase-aligned voltage sequence with the current value at the current moment in the phase-aligned current sequence.

[0010] In another possible implementation of the first aspect, the transient power consumption is input into a preset multi-order thermal-resistivity-capacitance equivalent network model, and the transient equivalent temperature of the sampling element is obtained by solving the model, including: The transient power consumption is used as the excitation input and substituted into the state space equation of the preset multi-order thermal resistance-capacitance equivalent network model. By solving the state-space equations, the temperature values ​​of each thermal node of the sampling element are obtained; The core sensitive area of ​​the sampling element is determined, and the temperature value of the corresponding thermal node in the core sensitive area of ​​the sampling element is determined as the transient equivalent temperature of the sampling element.

[0011] In another possible implementation of the first aspect, the equivalent resistance drift rate of the sampling element is calculated based on the transient equivalent temperature, including: Perform fractional-order differential operations on the transient equivalent temperature sequence to obtain the fractional-order temperature derivative; The fractional temperature derivative is input into a preset fractional temperature-resistance mapping model to obtain the first resistance drift component. The transient equivalent temperature is input into a preset hysteresis operator to obtain the second resistance drift component. The hysteresis operator is used to characterize the resistance hysteresis characteristics of the sampling element during the heating and cooling processes. The first resistance drift component is superimposed with the second resistance drift component to obtain the equivalent resistance drift rate of the sampling element.

[0012] In another possible implementation of the first aspect, fractional-order differentiation is performed on the transient equivalent temperature sequence to obtain the fractional-order temperature derivative, including: Obtain the sampling time interval and differential order parameter of the transient equivalent temperature sequence; Calculate the truncated historical memory length based on the differential order parameter; Extract historical transient equivalent temperature data within the truncated historical memory length; A weighted coefficient sequence corresponding to historical transient equivalent temperature data is generated by discretizing the gamma function. The historical transient equivalent temperature data is multiplied item by item with the corresponding weight coefficient sequence, and the results of the item by item multiplication are summed globally to obtain the summation result. Divide the summation result by the fractional power of the sampling time interval to obtain the fractional temperature derivative.

[0013] In another possible implementation of the first aspect, the original measured value is dynamically compensated based on the equivalent resistance drift rate to obtain the compensated electrical parameter measurement results, including: Obtain the nominal reference resistance value of the sampling element; The absolute resistance drift is obtained by multiplying the equivalent resistance drift rate by the nominal reference resistance. The real-time physical resistance is obtained by adding the nominal reference resistance value to the absolute resistance drift. Synchronously acquire the raw digital voltage measurement value output by the analog-to-digital converter at the front end of the tester; The parasitic voltage drop across the sampling element is calculated based on the real-time physical resistance and the current value at the current moment. The true electrical parameters are obtained by subtracting the parasitic voltage drop from the original digital voltage measurement. The actual electrical parameters are packetized and output as compensated electrical parameter measurement results according to the preset communication protocol.

[0014] In another possible implementation of the first aspect, the parasitic voltage drop across the sampling element is calculated based on the real-time physical resistance and the current value at the current moment, including: The fundamental frequency of the AC component is obtained by performing a fast Fourier transform on the current sequence. Calculate the skin depth generated by the alternating current inside the sampling element based on the fundamental frequency; The shrinkage ratio of the effective conductive cross-sectional area of ​​the sampling element is calculated based on the skin depth. The real-time physical resistance value is corrected by high-frequency AC impedance amplification based on the shrinkage ratio. Multiplying the amplified and corrected real-time physical resistance value with the current value at the current moment yields the parasitic voltage drop, which includes the combined effects of skin effect and thermal drift.

[0015] Secondly, this application provides an electronic device, comprising: The memory is configured to store instructions; and The processor is configured to retrieve the instructions from the memory and, when executing the instructions, to implement the aforementioned dynamic compensation method for measuring electrical parameters of the test instrument.

[0016] Thirdly, this application provides a dynamic compensation system, comprising: Tester; Electronic equipment connected to the tester.

[0017] By integrating a multi-order thermal-resistivity-capacitance equivalent network model and a fractional-order temperature-resistance mapping model into the dynamic compensation system, the transient thermal behavior and resistance drift characteristics of the sampling element are accurately described, effectively overcoming the limitations of traditional static compensation methods in handling dynamic thermal responses. High-speed synchronous acquisition and phase alignment processing ensure the time consistency of voltage and current signals, laying the foundation for accurate calculation of transient power consumption and avoiding power calculation deviations caused by phase errors. Using a multi-order thermal-resistivity-capacitance network model to solve for the transient equivalent temperature enables real-time tracking of the heat conduction process within the sampling element. Compared to external temperature sensors, this method offers faster response speeds and more accurate measurement positions, effectively solving the problems of temperature measurement lag and spatial deviation in traditional methods. Through composite modeling using fractional-order differential operations and hysteresis operators, the dynamic drift characteristics of the sampling element's resistance are comprehensively characterized, including thermal memory effects and temperature rise / fall hysteresis effects, significantly improving the compensation capability for transient nonlinear errors. Furthermore, impedance correction considering the skin effect of alternating current further enhances the compensation accuracy in high-frequency testing scenarios. Compared with traditional static compensation methods, this scheme can adapt to continuous high-power, rapidly changing test conditions, effectively reducing measurement errors and meeting the needs of high-precision applications such as power semiconductor device testing and power battery charge / discharge testing. In summary, this technical solution not only improves the measurement accuracy and reliability of the tester but also enhances the system's adaptability to complex operating conditions, effectively promoting the development of electrical parameter testing technology and improving testing efficiency and quality.

[0018] Other features and advantages of the embodiments of this application will be described in detail in the following detailed description section. Attached Figure Description

[0019] Figure 1 A flowchart illustrating a dynamic compensation method for measuring electrical parameters of a test instrument, provided in an embodiment of this application; Figure 2 A flowchart illustrating the process of determining the core sensitive region of a sampling element, as provided in this application embodiment; Figure 3 This is a schematic diagram of the structure of a dynamic compensation system provided in an embodiment of this application. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for illustration and explanation of the embodiments of this application and are not intended to limit the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0021] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0022] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0023] Figure 1 The illustration schematically shows a flow chart of a dynamic compensation method for measuring electrical parameters of a test instrument according to an embodiment of this application. Figure 1 As shown in the figure, this application provides a dynamic compensation method for measuring electrical parameters of a tester, which is applied to a dynamic compensation system. The dynamic compensation system includes a tester, and the method may include the following steps.

[0024] S110: Real-time acquisition of voltage and current signals flowing through the sampling components inside the tester; S120. Perform phase alignment processing on the voltage signal and the current signal to obtain the phase-aligned voltage sequence and current sequence; S130. Calculate the transient power consumption of the sampling element based on the phase-aligned voltage and current sequences. S140. Input the transient power consumption into the preset multi-order thermal resistance-capacitance equivalent network model and solve for the transient equivalent temperature of the sampling element. S150. Calculate the equivalent resistance drift rate of the sampling element based on the transient equivalent temperature. S160. Based on the equivalent resistance drift rate, the original measured value is dynamically compensated to obtain the compensated electrical parameter measurement results.

[0025] The dynamic compensation system in this embodiment includes a test instrument and electronic equipment, with a compensation calculation engine deployed within the electronic equipment. The test instrument integrates precision sampling elements (such as a manganese-copper shunt or alloy sampling resistor) to convert the measured current into a measurable voltage signal. The compensation calculation engine incorporates a multi-order thermal-resistance-capacitance network model and a fractional-order temperature-resistance mapping model to complete transient temperature calculation and resistance drift rate calculation, ultimately outputting the compensated measurement result.

[0026] During actual testing, when the device under test is working, current flows through the sampling element inside the tester, generating a voltage drop across the sampling element. This voltage drop is acquired as a voltage signal by a high-precision differential amplifier circuit, while the current signal flowing through the sampling element is acquired by a Hall sensor or current transformer.

[0027] The signal acquisition employs a synchronous triggering mechanism to ensure strict consistency in the sampling times of the voltage and current channels. The acquired analog signals are processed by an anti-aliasing filter and then converted into digital signals by a 16-bit or higher precision analog-to-digital converter.

[0028] To ensure signal quality, a differential input method is used to suppress common-mode interference, and a programmable gain amplifier is set in the analog front end to automatically adjust the gain according to the measurement range, ensuring that the analog-to-digital converter operates within its optimal dynamic range. The data acquisition module is also equipped with a deep buffer, capable of continuously storing at least 1000 sampling points, providing sufficient data support for subsequent phase alignment and power consumption calculations.

[0029] Due to the group delay characteristics of analog filters, amplifier circuits, and analog-to-digital converters, voltage and current signals in the acquisition link will produce a small but not negligible phase difference. This phase difference is typically on the order of nanoseconds to microseconds, and without correction, it will lead to systematic deviations in power consumption calculations. Phase alignment processing first performs cross-correlation analysis on the acquired digital voltage and current sequences. By finding the peak position of the cross-correlation function, the integer sampling point delay between the two signals is roughly estimated. Then, an all-pass filter is used to achieve fractional time delay compensation. The transfer function of the all-pass filter is designed to maintain a unit amplitude response across the entire frequency band, adjusting only the phase response.

[0030] In practical implementation, an all-pass filter structure is used, with its order determined based on the required compensation accuracy, typically chosen to be between 3rd and 5th order. The filter coefficients are calculated using the least squares method to minimize phase error. For example, when a current signal is detected to lag the voltage signal by 0.3 sampling periods, an all-pass filter with a delay of -0.3 sampling periods is applied to the current sequence, precisely aligning the two signals on the time axis. The aligned voltage and current sequences at each sampling moment strictly correspond to the measured values ​​at the same physical moment. This process eliminates the phase error introduced by the acquisition link, ensuring the accuracy of subsequent power consumption calculations. This is particularly important in AC or pulse current testing scenarios, where the accuracy of phase alignment directly affects the active power calculation results.

[0031] The transient power consumption of the sampling element is the direct heat source causing its temperature change, and accurate calculation of transient power consumption is a prerequisite for achieving dynamic temperature prediction. After obtaining the phase-aligned voltage and current sequences, a dot product operation is performed at each sampling time.

[0032] Specifically, the current moment voltage value With current value Multiply to obtain the instantaneous power at that moment. This power value represents the transient power consumption of the sampling element at that moment. Due to the high sampling frequency and extremely short time intervals between adjacent sampling points, the power consumption can be considered constant within each sampling period. For AC or pulsating currents, the transient power consumption exhibits periodic variations, and the peak power consumption may be much higher than the average power consumption. For example, when testing pulsed currents, the peak current can reach 100A, and the sampling resistor has a resistance of 1mΩ; in this case, the instantaneous power consumption can reach [value missing]. During current interruptions, power consumption approaches zero. This drastic power consumption fluctuation leads to rapid temperature changes in the sampling element, resulting in a significant thermal memory effect. By calculating transient power consumption point-by-point, the thermal load history of the sampling element can be fully recorded, providing accurate excitation input for multi-order thermal resistor-capacitor network models. Compared to traditional methods that only calculate average or RMS power consumption, transient power consumption calculation can capture the dynamic details of power changes, significantly improving the accuracy of temperature prediction.

[0033] The thermal behavior of a sampling element can be described using a multi-order thermal-resistive-capacitive equivalent network model, which analogizes the heat conduction process of the sampling element to a resistor-capacitor network in a circuit. The model typically contains 3 to 5 thermal nodes, each representing a thermally capacitive layer inside the sampling element or between it and the external environment. Adjacent nodes are connected by thermal resistance, representing the resistance to heat conduction.

[0034] The state-space equation of the model is expressed as: ,in For each thermal node temperature vector, Transient power consumption, and This is the coefficient matrix constructed based on the thermal resistance-capacitance parameters. These parameters were obtained through thermal simulation or experimental calibration. During the solution process, a fourth-order Runge-Kutta method was used for numerical integration, with the time step consistent with the sampling period. At each sampling moment, the current transient power consumption was used as the excitation input to update the state equations and calculate the temperature values ​​of each thermal node.

[0035] The core sensitive region of the sampling element is typically located at the center of the conductive path with the highest current density, and the temperature in this region has the most significant impact on the resistance. Therefore, the temperature of the thermal node corresponding to this region is selected as the transient equivalent temperature. For example, in a third-order model, where the first node represents the core of the sampling element, the second node represents the encapsulation layer, and the third node represents the heat sink, the temperature of the first node is selected as the transient equivalent temperature. This temperature reflects the true thermal state of the sampling element at the current moment, including the cumulative effect of historical power consumption changes. Compared to external temperature sensor measurements, transient equivalent temperature has a faster response speed, can track rapidly changing thermal loads in real time, and is unaffected by sensor installation location and thermal contact resistance, significantly improving the accuracy and real-time performance of temperature estimation.

[0036] The resistance drift of the sampling element is not only related to the current temperature but also affected by the rate of temperature change and historical temperature paths, exhibiting fractional-order dynamic characteristics and hysteresis. First, fractional-order differentiation is performed on the transient equivalent temperature sequence. Fractional-order differentiation can describe dynamic processes with memory and hereditary characteristics; its order... Typically, the value is between 0.3 and 0.7. During calculation, historical temperature data within the truncated historical memory length is extracted and processed using the gamma function. Generate weight coefficient sequence The historical temperatures are multiplied by their respective weighting coefficients, summed, and then divided by the sampling time interval. The power is used to obtain the fractional temperature derivative. Input this derivative into the fractional-order temperature resistance mapping model. The first resistance drift component is obtained, where This is the temperature resistance coupling coefficient.

[0037] Secondly, a hysteresis operator is used to describe the resistance hysteresis characteristics during the heating and cooling processes. The hysteresis operator constructs a hysteresis loop by storing historical temperature extreme points, calculates the hysteresis state corresponding to the current temperature, and outputs the second resistance drift component. Finally, the two components are superimposed to obtain the total equivalent resistance drift rate. For example, when the temperature rises rapidly from 25℃ to 80℃, the fractional derivative is large, and the first component is significant; while during the slow decrease after the temperature stabilizes, the hysteresis effect dominates the second component. This composite modeling approach can comprehensively characterize the dynamic drift characteristics of the sampling element's resistance. Compared to methods that only consider the static temperature coefficient, the compensation accuracy is significantly improved, especially under rapidly changing test conditions, effectively suppressing transient errors caused by thermal memory and hysteresis.

[0038] After obtaining the equivalent resistance drift rate, the original measured value needs to be compensated in real time. First, the nominal reference resistance of the sampling element at standard temperature is obtained. This value is determined by factory calibration. The equivalent resistance drift rate is... and Multiply by this to obtain the absolute resistance drift, then multiply by... Add them together to get the real-time physical resistance value at the current moment. .

[0039] To further improve accuracy, the skin effect of alternating current needs to be considered. A fast Fourier transform is performed on the current sequence to extract the fundamental frequency. According to the formula Calculate skin depth, where Resistivity, The permeability is given. Based on the skin depth, the shrinkage ratio of the effective conductive cross-sectional area is calculated, and the real-time physical resistance is corrected by high-frequency AC impedance amplification to obtain the corrected resistance value. .Will Current value at the current moment Multiplying these yields the parasitic voltage drop across the sampling element. The raw digital voltage measurement value output from the analog-to-digital converter at the front end of the test instrument is acquired synchronously. Subtract the parasitic voltage drop from the voltage to obtain the true voltage of the measured object. .

[0040] Finally, the compensated voltage, current, and other parameters are encapsulated according to a preset communication protocol and output as standard-format measurement results for use by the host computer or data acquisition system. The entire compensation process is completed in real time in the digital signal processor, with a delay time of less than one sampling period, ensuring real-time compensation. Through this dynamic compensation mechanism, measurement errors caused by temperature drift, thermal memory effect, hysteresis effect, and skin effect of sampling elements can be effectively eliminated under continuous high-power and rapidly changing test conditions, significantly improving the measurement accuracy and reliability of the tester.

[0041] This embodiment integrates a multi-order thermal-resistivity-capacitance equivalent network model and a fractional-order temperature-resistance mapping model into the dynamic compensation system, achieving an accurate description of the transient thermal behavior and resistance drift characteristics of the sampling element, effectively overcoming the limitations of traditional static compensation methods in handling dynamic thermal responses. High-speed synchronous acquisition and phase alignment processing ensure the time consistency of voltage and current signals, laying the foundation for accurate calculation of transient power consumption and avoiding power calculation deviations caused by phase errors. Using a multi-order thermal-resistivity-capacitance network model to solve for the transient equivalent temperature enables real-time tracking of the heat conduction process within the sampling element. Compared to external temperature sensors, this method offers faster response speeds and more accurate measurement locations, effectively solving the problems of temperature measurement lag and spatial deviation in traditional methods. Through composite modeling using fractional-order differential operations and hysteresis operators, the dynamic drift characteristics of the sampling element's resistance are comprehensively characterized, including thermal memory effects and temperature rise / fall hysteresis effects, significantly improving the compensation capability for transient nonlinear errors. Furthermore, impedance correction considering the skin effect of alternating current further enhances the compensation accuracy in high-frequency testing scenarios. Compared with traditional static compensation methods, this scheme can adapt to continuous high-power, rapidly changing test conditions, effectively reducing measurement errors and meeting the needs of high-precision applications such as power semiconductor device testing and power battery charge / discharge testing. In summary, this technical solution not only improves the measurement accuracy and reliability of the tester but also enhances the system's adaptability to complex operating conditions, effectively promoting the development of electrical parameter testing technology and improving testing efficiency and quality.

[0042] In one embodiment of this invention, phase alignment processing is performed on the voltage signal and the current signal to obtain a phase-aligned voltage sequence and a current sequence, including the following steps: S210. Simultaneously sample the voltage and current signals to obtain the voltage digital sequence and the current digital sequence; S220. The voltage digital sequence and current digital sequence are subjected to fractional time delay compensation through an all-pass filter to eliminate the phase difference between the voltage signal and the current signal, so as to obtain the phase-aligned voltage sequence and current sequence.

[0043] In this embodiment, S220 may include the following steps: injecting a broadband test signal with a known phase into the sampling element during the test instrument startup phase; recording the initial response sequences of the voltage acquisition channel and the current acquisition channel to the broadband test signal; calculating the cross-correlation function between the initial response sequences and extracting the group delay time difference value corresponding to the peak value of the cross-correlation function; configuring the pole parameters of the all-pass filter according to the group delay time difference value to generate a linear phase compensation response; and performing fractional delay compensation by passing the voltage digital sequence and the current digital sequence through the configured all-pass filter.

[0044] During the acquisition of voltage and current signals, a dual-channel synchronous sampling architecture is employed to ensure strict consistency of the time bases for both signals. Specifically, a single high-precision clock source drives two independent analog-to-digital converters (ADCs). The clock signal is distributed to each channel via a low-jitter buffer, ensuring a synchronization error of less than 1 nanosecond at the sampling trigger moment. The voltage channel is connected to the differential measurement points across the sampling element, and signal conditioning is performed using a high-input-impedance instrumentation amplifier, with the gain adaptively adjusted according to the measurement range. The current channel is connected to the output of a Hall sensor or current transformer, and after being converted to a voltage signal by a transimpedance amplifier, it enters the ADC. The sampling rate of both ADCs is set to the same value, typically 500kHz, with a 16-bit resolution.

[0045] During the sampling process, analog-to-digital conversion is performed on both signals simultaneously in each clock cycle. The converted digital code values ​​are stored in the corresponding first-in-first-out buffers to form a voltage digital sequence. and current digital sequence ,in This is the sampling sequence number. The buffer depth is set to 2048 points, capable of storing approximately 4 milliseconds of continuous data. This scheme effectively eliminates the time uncertainty introduced by asynchronous sampling, providing a reliable data foundation for subsequent phase alignment. In summary, if there is a random deviation in the sampling time, it will lead to unpredictable fluctuations in transient power consumption calculations. This embodiment effectively eliminates the randomness error in the sampling time through hardware synchronous sampling, ensuring the initial correspondence between voltage and current data on the time axis.

[0046] Although synchronous sampling is used, the analog signal conditioning circuits (including anti-aliasing filters, amplifiers, etc.) of the voltage and current channels have different group delay characteristics, resulting in a fixed phase difference between the two digital sequences. This phase difference is usually a non-integer sampling period and needs to be eliminated using fractional delay compensation techniques.

[0047] During the start-up or calibration phase of the test instrument, a broadband test signal with a known phase is injected into the sampling element via the built-in signal generator. This signal is in the form of a linear frequency modulated (LFM) or pseudo-random sequence. Simultaneously, the response sequences of the voltage and current acquisition channels to this test signal are recorded. and Calculate the cross-correlation function of the two sequences. By accurately locating the peak position of the cross-correlation function using parabolic interpolation, the group delay difference can be obtained. This value contains both an integer part and a decimal part.

[0048] according to Design an all-pass filter, employing an all-pass filter structure, with the transfer function being: order Take 4, coefficient This is calculated by minimizing the phase error.

[0049] After the filter is configured, the current digital sequence is processed. After filtering, the phase-compensated sequence is obtained. To make it consistent with the voltage sequence Precise phase alignment is achieved. The amplitude-frequency response of the all-pass filter maintains unity gain across the entire frequency band, adjusting only the phase response, thus avoiding amplitude distortion. This embodiment effectively eliminates fixed phase errors introduced by differences in analog link group delays, ensuring that the voltage and current sequences strictly correspond to the measured values ​​at the same physical moment at each sampling point. This directly affects the accuracy of transient power consumption calculations, especially in AC or pulse current tests, where even small phase deviations can lead to significant errors in active power calculations, thereby affecting the temperature prediction accuracy of subsequent thermal models and the final compensation effect.

[0050] This embodiment achieves precise alignment of voltage and current signals on the time axis through synchronous sampling and fractional delay compensation using an all-pass filter, effectively solving the phase error problem caused by inconsistent sampling times and differences in analog link delays in traditional methods. Hardware synchronous sampling effectively eliminates random time deviations, ensuring the consistency of the time base for data acquisition and providing a reliable starting point for phase alignment. Fractional delay compensation using an all-pass filter accurately identifies and compensates for fixed phase differences in non-integer sampling periods through broadband test signal calibration and high-precision interpolation algorithms. This embodiment significantly improves the accuracy of transient power consumption calculation. Especially in high-frequency AC or fast pulse current testing scenarios, the improved phase alignment accuracy directly improves the measurement accuracy of active power, thereby enhancing the temperature prediction accuracy of the multi-order thermal resistor-capacitor network model and the final dynamic compensation effect. It effectively reduces systematic measurement deviations caused by phase errors and enhances the measurement reliability and adaptability of the tester under complex operating conditions.

[0051] In one embodiment of this invention, the transient power consumption of the sampling element is calculated based on the phase-aligned voltage and current sequences, including the following steps: S310. Perform a dot product operation between the voltage value at the current moment in the phase-aligned voltage sequence and the current value at the current moment in the phase-aligned current sequence to obtain the transient power consumption of the sampling element at the current moment.

[0052] Voltage sequence after phase alignment and current sequence Then, point-by-point power calculation is performed for each sampling time. In specific implementation, the digital signal processing unit extracts the power of the current time sequentially according to the sampling sequence number. Corresponding voltage value and current value Perform dot product operation This yields the transient power consumption of the sampling element at that moment. The calculation process employs a fixed-point or floating-point multiplier, maintaining an operational precision of at least 32 bits to ensure numerical accuracy for minute power changes.

[0053] Because of the high sampling frequency and the extremely short time interval between adjacent sampling points, the power consumption can be considered to remain constant within each sampling period, and the transient power consumption sequence... It accurately reflects the time evolution of the thermal load on the sampling element. For DC or quasi-static test scenarios, the voltage and current remain relatively stable, and the transient power consumption exhibits a smooth characteristic. However, in AC, pulse, or rapidly changing current tests, the transient power consumption shows significant dynamic characteristics.

[0054] For example, when testing a square wave pulse current, the current rapidly switches between high and low levels, and the corresponding transient power consumption jumps between its peak value and near-zero value. If the peak current is 50A and the sampling resistor value is 2mΩ, then the peak power consumption reaches... During periods of low current, power consumption drops to the milliwatt level. This drastic power fluctuation generates rapid temperature changes within the sampling element, leading to significant thermal memory effects and transient resistance drift.

[0055] Point-by-point multiplication accurately captures the true value of instantaneous power, rather than the average or RMS value. Traditional methods typically estimate average power consumption by multiplying the square of the RMS current by the resistance. This method ignores the details of transient power changes and fails to reflect the impact of rapid thermal load fluctuations on the temperature of the sampling element. In contrast, point-by-point calculation of the transient power consumption sequence fully preserves the time-domain characteristics of power, including key information such as peak value, waveform, and rate of change.

[0056] In summary, relying solely on average power consumption or steady-state assumptions is insufficient to handle rapidly changing heat loads, leading to lags and inaccuracies in temperature predictions, thus affecting compensation accuracy. This embodiment, through precise calculation of transient power consumption, provides high-fidelity thermal excitation input for multi-order thermal resistive-capacitive network models, enabling the models to accurately predict transient temperature changes of sampling components under dynamic operating conditions. Point-by-point power calculation fully captures the dynamic characteristics of power, allowing the thermal model to respond to power fluctuations in real time and accurately simulate the generation, conduction, and diffusion of heat.

[0057] This embodiment achieves accurate calculation of the transient power consumption of the sampling element by performing point-by-point multiplication on the phase-aligned voltage and current sequences, effectively solving the problem that traditional methods, which rely solely on average or RMS power consumption, cannot reflect dynamic thermal loads. This embodiment fully preserves the time-domain variation characteristics of power, including peak fluctuations and rapid change details, providing high-fidelity thermal excitation input for multi-order thermal resistor-capacitor network models. This enables the model to accurately simulate the transient temperature response of the sampling element under rapidly changing operating conditions. This embodiment significantly improves the real-time performance and accuracy of temperature prediction, especially in dynamic scenarios such as pulsed current and AC testing. It accurately captures rapid temperature changes caused by power fluctuations, providing a reliable basis for subsequent resistance drift rate calculation and dynamic compensation, and effectively reducing transient measurement errors caused by thermal memory effects.

[0058] In one embodiment of this invention, the transient power consumption is input into a preset multi-order thermal resistance-capacitance equivalent network model, and the transient equivalent temperature of the sampling element is obtained by solving the model, including the following steps: S410. Take the transient power consumption as the excitation input and substitute it into the state space equation of the preset multi-order thermal resistance-capacitance equivalent network model. S420. By solving the state-space equations, the temperature values ​​of each thermal node of the sampling element are obtained; S430. Determine the core sensitive area of ​​the sampling element, and determine the temperature value of the thermal node corresponding to the core sensitive area of ​​the sampling element as the transient equivalent temperature of the sampling element.

[0059] In this embodiment, refer to Figure 2 Determining the core sensitive region of a sampling element may include the following steps: acquiring scatter data of the surface temperature distribution of the sampling element under calibration; constructing a spatial temperature distribution surface based on the scatter data; extracting temperature gradient vectors along the normal direction of the spatial temperature distribution surface; filtering connected feature point sets whose magnitude of the temperature gradient vector is greater than the local average gradient; calculating the geometric center coordinates of the connected feature point set; constructing an envelope circle with the geometric center coordinates as the center and a preset sensitive radius as the boundary; and determining the physical region covered by the envelope circle as the core sensitive region of the sampling element.

[0060] The preset multi-order thermal resistance-capacitance equivalent network model is a third-order thermal resistance-capacitance equivalent network model. The state space equation includes the temperature evolution equation of three thermal nodes, where the third thermal node corresponds to the core sensitive area of ​​the sampling element.

[0061] The transient power consumption is used as an excitation input and substituted into the state space equation of a preset multi-order thermal resistance-capacitance equivalent network model. Specifically, this may include: acquiring the real-time ambient temperature of the physical environment where the test instrument is located; calculating the convective heat transfer coefficient correction term of the heat dissipation medium based on the real-time ambient temperature; dynamically updating the ground thermal resistance parameter and surface heat capacity parameter in the multi-order thermal resistance-capacitance equivalent network model using the convective heat transfer coefficient correction term; and using the transient power consumption as an input excitation, combining the updated ground thermal resistance parameter and surface heat capacity parameter to solve the state space equation to reduce the thermal node calculation drift caused by ambient temperature fluctuations.

[0062] The multi-order thermal resistance-capacitance equivalent network model analogizes the heat conduction process of the sampling element to a resistor-capacitor network in a circuit, describing the temperature evolution of each hot node over time through state-space equations. This embodiment employs a third-order thermal resistance-capacitance equivalent network model, containing three hot nodes: the first node represents the contact interface between the sampling element and the heat sink, the second node represents the encapsulation layer of the sampling element, and the third node represents the core sensitive area of ​​the sampling element. The nodes are connected by thermal resistance... Connections characterize the resistance to heat conduction; each node has a heat capacity. It characterizes the heat storage capacity.

[0063] The state-space equation of the model is expressed as: ,in The temperature vectors of the three hot nodes. Transient power consumption, For the system matrix, The input matrix. System matrix. The construction is based on thermal resistance-capacitance parameters, whose elements reflect the thermal coupling relationship between adjacent nodes. For example, ,in The thermal resistance between node 1 and node 2, The ground thermal resistance between node 1 and the environment. This represents the heat capacity of node 1. Non-diagonal elements are as follows: This indicates the effect of node 2 on the heat conduction of node 1.

[0064] Input matrix This indicates that the transient power consumption directly affects the third node, i.e., the core sensitive area, because this area has the highest current density and the most concentrated heat generation. Before the actual solution, it is necessary to consider the real-time ambient temperature of the physical environment in which the test instrument is located. Dynamically adjust model parameters. Changes in ambient temperature affect the physical properties of the heat dissipation medium, thereby altering the convective heat transfer coefficient. According to empirical formulas Calculate the correction term for the convective heat transfer coefficient, where Reference temperature The convective heat transfer coefficient at the following values, This is the temperature correction factor.

[0065] Changes in the convective heat transfer coefficient directly affect the thermal resistance to the ground. ,in This represents the heat dissipation surface area. Simultaneously, ambient temperature also affects the surface heat capacity parameters because the specific heat capacity of the material changes slightly with temperature. By updating these parameters in real time, the model can adapt to ambient temperature fluctuations, avoiding thermal node calculation drift caused by environmental changes. The transient power consumption at the current moment is also considered. Substituting into the state-space equations and combining them with the updated system matrix and input matrix This forms a complete system of differential equations.

[0066] In summary, without dynamic modeling of the heat conduction process, the propagation and diffusion of heat within the sampling element cannot be reflected, leading to lag and bias in temperature estimation. This embodiment, by establishing an accurate thermodynamic model and considering the real-time influence of ambient temperature, provides a theoretical basis for accurate prediction of the transient temperature of the sampling element. Through a multi-order thermal resistance-capacitance network model and adaptive environmental parameter adjustment, the accuracy and robustness of temperature prediction are significantly improved.

[0067] State-space equations This is a system of first-order linear ordinary differential equations, which requires numerical integration to solve. This embodiment uses the fourth-order Runge-Kutta method for discretization, a method with high numerical accuracy and stability. Integration time step. Set the sampling period to match the time interval of the transient power consumption sequence to ensure time synchronization between model input and output.

[0068] The solution process begins with the initial state and the initial temperature vector. Set to ambient temperature This indicates that the sampling element was in thermal equilibrium before the tester started. For each time step... First, calculate the four intermediate slopes: ; ; ; ; Then, the temperature vector for the next time step is calculated using a weighted average: ; This iterative process proceeds step by step, updating the temperature values ​​of the three hot nodes at each time step. Due to the system matrix... The elements contain negative values, the equations exhibit decay characteristics, and the numerical solution is stable. During the calculation, the rate of temperature change also needs to be monitored. If the rate of temperature change at a node exceeds the physically reasonable range, an anomaly detection mechanism is triggered to prevent numerical divergence.

[0069] The temperature vector obtained by solving A complete description of the thermal state distribution of the sampling element at the current moment. First node temperature. This reflects the temperature at the radiator contact interface, which is greatly affected by ambient temperature and heat dissipation conditions, resulting in a slow response. Second node temperature. This represents the temperature of the encapsulation layer, which is in an intermediate transition state. Third node temperature. Corresponding to the core sensitive area, this area directly bears the thermal shock of transient power consumption, and has the fastest temperature response and the largest temperature change.

[0070] Measuring the temperature at a single point on the surface using only an external temperature sensor presents limitations, including response lag and inability to reflect the temperature of the internal core region. This embodiment achieves dynamic simulation of the internal temperature field of the sampling element by numerically solving the thermodynamic equations, accurately capturing the complete process of heat generation, conduction, and dissipation. The model calculates the real-time temperature of each thermal node, particularly the temperature of the core sensitive region, which directly determines the resistance drift of the sampling element.

[0071] The temperature distribution inside the sampling element is not uniform; the region with the highest current density has the highest temperature and the most significant impact on the resistance. This region is the core sensitive area. Accurately identifying the core sensitive area is crucial for selecting the correct thermal node temperature as the transient equivalent temperature. The identification process begins by acquiring scatter data of the temperature distribution on the surface of the sampling element using an infrared thermal imager or thermocouple array under calibration conditions. Calibration conditions are typically the operating condition after a constant large current has passed through the sampling element to reach thermal steady state, at which point the temperature distribution best reflects the spatial characteristics of the current density.

[0072] Based on the collected scattered data, a three-dimensional interpolation algorithm is used to construct a spatial temperature distribution surface. ,in These are the two-dimensional coordinates of the sampling element surface. This surface is smooth and continuous, capable of reflecting the spatial trend of temperature variation. The temperature gradient vector is calculated along the normal vector direction of the surface. The magnitude of the gradient This indicates the degree of drastic temperature change. In the core sensitive region, due to the concentrated generation of heat, the temperature gradient is significantly higher than in other regions.

[0073] By setting a threshold, feature points with gradient magnitudes greater than the local average gradient are selected. These points are typically concentrated near the central conductive path of the sampling element. Connectivity analysis is performed on the selected feature points to extract the set of maximally connected feature points, which represents the region with the highest and most drastic temperature changes. The geometric center coordinates of the connected feature point set are then calculated. This coordinate serves as the center location of the core sensitive area. A circle is drawn with the geometric center as the center and a preset sensitive radius. Construct an envelope circle as the boundary, and the physical area covered by the envelope circle is the core sensitive area.

[0074] In the third-order thermal resistive-capacitive network model, the third thermal node is pre-designed to correspond to the core sensitive region, so the temperature value of the third node is directly extracted. Transient equivalent temperature as a sampling element This temperature accurately reflects the thermal state of the region that has the greatest impact on resistance. Compared to using average temperature or surface temperature, transient equivalent temperature has a stronger correlation with resistance drift.

[0075] In summary, if an external sensor is used to measure the temperature at a certain point on the surface or the average temperature, these temperatures will have spatial deviations and time lags compared to the temperature of the core area that truly affects the resistance value, thus limiting the accuracy of compensation. This embodiment, by scientifically identifying the core sensitive area and selecting the corresponding thermal node temperature as the transient equivalent temperature, can ensure a strong correlation between temperature parameters and resistance drift. The real-time temperature of the core sensitive area is obtained through model calculation, directly reflecting the physical root cause of resistance drift.

[0076] This embodiment achieves dynamic simulation of the internal temperature field of the sampling element and accurate prediction of the transient equivalent temperature of the core sensitive area by inputting transient power consumption into a third-order thermal resistance-capacitance equivalent network model and solving the state-space equation. This effectively solves the problems of measurement lag, spatial deviation, and environmental interference caused by the reliance on external temperature sensors in traditional methods. The multi-order thermal resistance-capacitance network model can accurately describe the complete process of heat generation, conduction, and dissipation by establishing the dynamic equation of heat conduction, capturing the thermal inertia and thermal memory effect of the sampling element, enabling real-time temperature prediction in response to power fluctuations. Adaptive parameter adjustment based on ambient temperature can effectively suppress computational drift caused by ambient temperature fluctuations by dynamically updating the ground thermal resistance and surface thermal capacity, improving the model's robustness. The identification of the core sensitive area and the selection of the corresponding hot node temperature ensure a strong correlation between the transient equivalent temperature and resistance drift. This embodiment significantly improves the representativeness and accuracy of temperature parameters, providing high-precision, real-time temperature prediction capabilities for dynamic compensation, and effectively enhancing the measurement accuracy and reliability of the tester under complex dynamic conditions.

[0077] In one embodiment of this invention, the equivalent resistance drift rate of the sampling element is calculated based on the transient equivalent temperature, including the following steps: S510. Perform fractional-order differential operations on the transient equivalent temperature sequence to obtain the fractional-order temperature derivative; S520. Input the fractional-order temperature derivative into the preset fractional-order temperature-resistance mapping model to obtain the first resistance drift component. S530. Input the transient equivalent temperature into the preset hysteresis operator to obtain the second resistance drift component, wherein the hysteresis operator is used to characterize the resistance hysteresis characteristics of the sampling element during the heating and cooling processes. S540. The first resistance drift component and the second resistance drift component are superimposed to obtain the equivalent resistance drift rate of the sampling element.

[0078] S530 may include the following steps: acquiring the transient equivalent temperature difference between two adjacent sampling periods; identifying the heating thermal state or cooling thermal state of the sampling element based on the positive or negative sign of the transient equivalent temperature difference; recording the transient equivalent temperature at the time of thermal state reversal as the inflection point temperature; calling the heating hysteresis trajectory curve according to the heating thermal state, or calling the cooling hysteresis trajectory curve according to the cooling thermal state; calculating the difference between the current transient equivalent temperature and the most recent inflection point temperature, and mapping it to the corresponding hysteresis trajectory curve for interpolation to extract the second resistance drift component.

[0079] The resistance drift of the sampling element is not only related to the current temperature but also influenced by historical temperature changes, exhibiting significant memory and hereditary characteristics. Traditional integer-order derivatives cannot accurately describe this dynamic process with long-range correlations, while fractional-order derivatives can effectively characterize the system's memory effect through non-integer-order derivative operations.

[0080] For transient equivalent temperature series To perform fractional differentiation, the order of the derivative must first be determined. This parameter is usually obtained through experimental calibration. The discretized form of the fractional derivative is: ; in The sampling time interval, In order to shorten the length of historical memory, These are the weighting coefficients. The weighting coefficients are obtained through the gamma function. calculate: ; Cutting off the length of historical memory The choice of needs to balance computational accuracy and computational cost. In practical calculations, the first step is to consider the order of the differential. Pre-compute and store the weight coefficient sequence For the current moment Extract from historical temperature buffer Historical temperature data The weighted temperature sequence is obtained by performing item-by-item multiplication with the corresponding weight coefficients. The weighted temperature sequence is then globally summed to obtain the numerator. Finally, it is divided by the sampling time interval. Power of 1 The fractional-order temperature derivative at the current moment is obtained. .

[0081] The physical significance of the fractional temperature derivative lies in the fact that it not only reflects the current rate of temperature change but also takes into account the cumulative effect of historical temperature changes. For example, in a continuous heating process, even if the current rate of temperature change is constant, the fractional derivative will gradually increase due to the cumulative effect of historical temperature increases, reflecting the continuous accumulation of heat within the material. Conversely, in scenarios with rapid temperature fluctuations, the fractional derivative can smooth out instantaneous fluctuations and extract the main trend of temperature change.

[0082] In summary, considering only the static mapping relationship between the current temperature and resistance value ignores the influence of the temperature change rate and historical temperature path, resulting in insufficient compensation accuracy under rapidly changing operating conditions. This embodiment introduces fractional derivative operations to accurately describe the dynamic characteristics and historical dependence of the resistance drift of the sampling element. By capturing the dynamic characteristics and memory effect of temperature changes through fractional derivatives, it provides more accurate input parameters for subsequent temperature-resistance mapping.

[0083] fractional temperature derivative This reflects the dynamic evolution of the temperature field of the sampling element, which needs to be converted into a resistance drift component using a fractional-order temperature-resistivity mapping model. This model is based on materials physics and considers the microscopic mechanism of resistivity change with temperature in metallic conductors. During temperature changes, intensified lattice vibrations lead to enhanced carrier scattering and an increase in resistivity. This process is not only related to the absolute value of temperature but also closely related to the rate of temperature change.

[0084] The mathematical expression for the fractional-order temperature resistance mapping model is: ; in This is the first resistance drift component. The linear temperature resistance coupling coefficient is... This is the nonlinear temperature-resistance coupling coefficient. The linear term describes the main resistance change trend, while the nonlinear term corrects for nonlinear effects at high temperature change rates. The coupling coefficient is obtained through experimental calibration. During calibration, different rates of temperature change are applied to the sampling element, and its resistance response is measured simultaneously. The coefficient is then obtained by least squares fitting. and .

[0085] In practical calculations, the fractional-order temperature derivative at the current moment is substituted into the above formula to directly calculate the first resistance drift component. The dimension of this component is the relative rate of change of resistance, i.e., a dimensionless value. The fractional-order temperature-resistance mapping model can accurately reflect the transient resistance response during rapid temperature changes. In pulse current testing, the temperature of the sampling element rises rapidly within hundreds of milliseconds. Traditional static temperature coefficient models assume that the resistance instantaneously follows the temperature change, but in reality, due to the thermal relaxation effect of the material, the resistance response has a certain delay. The fractional-order model implicitly considers this dynamic response characteristic by introducing a temperature derivative term. Furthermore, the introduction of nonlinear terms can correct for errors under extreme operating conditions.

[0086] This embodiment establishes a fractional-order temperature-resistance mapping model, which can convert the dynamic change characteristics of temperature into a quantitative prediction of resistance drift, accurately describe the transient resistance response of the sampling element under rapid thermal load changes, and effectively capture dynamic effects through the fractional-order mapping model.

[0087] The resistance of the sampling element is not only affected by the rate of temperature change, but also exhibits a significant hysteresis characteristic, meaning that at the same temperature, the resistance differs between the heating and cooling processes. This hysteresis effect originates from microstructural changes within the material, such as grain boundary dislocations and phase transition hysteresis. This hysteresis characteristic results in a non-single-valued resistance-temperature relationship, forming a hysteresis loop.

[0088] The implementation of the hysteresis operator first requires identifying whether the sampling element is currently heating up or cooling down. This is done by calculating the transient equivalent temperature difference between two adjacent sampling periods. The thermal state is determined based on the sign of the difference. If... If, then it is in a state of rising temperature; if If the temperature is high, the temperature is in a cooling state. When the thermal state reverses, i.e., from heating to cooling or from cooling to heating, the transient equivalent temperature at this point is recorded as the inflection point temperature. The inflection point temperature marks the turning point of the hysteresis trajectory and serves as a reference benchmark for subsequent hysteresis calculations.

[0089] The heating and cooling hysteresis trajectory curves of the sampling element are obtained beforehand through experimental calibration. During the calibration process, the sampling element undergoes multiple complete heating-cooling cycles, and the resistance at different temperature points is measured simultaneously to plot the resistance drift rate versus temperature curve. The heating and cooling trajectories typically do not overlap, forming a hysteresis loop; the width of the loop reflects the intensity of the hysteresis effect. These trajectory curves are stored in the system in the form of a lookup table or polynomial fitting.

[0090] During actual operation, the corresponding hysteresis trajectory curve is invoked based on the current thermal state. If the temperature is rising, the heating hysteresis trajectory curve is invoked. If the system is in a cooling state, call the cooling hysteresis trajectory curve. Calculate the current transient equivalent temperature. Compared with the most recent inflection point temperature The difference between This difference represents the temperature change since the last thermal reversal. Mapped to the corresponding hysteresis trajectory curve, the second resistance drift component is extracted using linear interpolation or spline interpolation. .

[0091] For example, suppose the sampling element is heated from 25℃ to 80℃ and then begins to cool down, recording the inflection point temperature at 80℃. When the temperature drops to 60℃, \( \Delta T_r = 60 - 80 = -20℃ \), the cooling hysteresis trajectory curve is queried, and the corresponding resistance drift component is extracted at the temperature change of -20℃. The introduction of the hysteresis operator significantly improves the accuracy of resistance prediction, especially in test scenarios with frequent temperature fluctuations.

[0092] This embodiment introduces a hysteresis operator to accurately describe the asymmetric resistance characteristics of the sampling element during the heating and cooling processes, accurately capture the path dependence of the resistance-temperature relationship, and effectively eliminate the compensation deviation caused by hysteresis.

[0093] First resistance drift component The second resistance drift component reflects the effect of the rate of temperature change on the resistance value. This reflects the hysteresis effect of the temperature change path, and both factors together determine the total resistance drift of the sampling element. Linearly superimposing the two components yields the equivalent resistance drift rate at the current moment: ; The superposition operation is based on the principle of linear superposition, assuming that the two physical mechanisms are independent and their effects are additive. In practical applications, this assumption holds true under most operating conditions because the fractional-order dynamic effect is mainly caused by the rate of temperature change, while the hysteresis effect is mainly caused by the path dependence of the material's microstructure. The two have different physical origins and have little mutual influence.

[0094] Equivalent resistance drift rate This is a dimensionless relative rate of change, representing the degree of deviation of the current resistance value of the sampling element from its nominal reference resistance value. For example, if... This indicates that the current resistance is 0.05% higher than the nominal value. A resistance drift rate sequence is formed by calculating the equivalent resistance drift rate at each time step. This sequence fully records the dynamic evolution of the resistance value of the sampling element over time.

[0095] This embodiment achieves comprehensive and accurate prediction of the resistance drift of the sampling element by comprehensively modeling and superimposing fractional dynamic effects and hysteresis effects, and fully characterizes the various physical mechanisms of resistance drift through composite modeling.

[0096] This embodiment achieves accurate calculation of the equivalent resistance drift rate of the sampling element by performing fractional-order differential operations on the transient equivalent temperature sequence and combining it with hysteresis operator modeling. This effectively solves the technical problem that traditional static compensation methods cannot cope with dynamic thermal response and hysteresis effects. Fractional-order differential operations, by introducing weighted accumulation of historical temperatures, accurately describe the memory and dynamic characteristics of resistance drift, and can more realistically reflect the transient response of materials under rapid temperature changes. The fractional-order temperature-resistance mapping model establishes a quantitative relationship between dynamic temperature changes and resistance drift; in particular, the introduction of nonlinear terms effectively corrects prediction errors under extreme conditions. The hysteresis operator, by identifying heating and cooling states and calling the corresponding hysteresis trajectory curves, accurately captures the path dependence and asymmetric characteristics of the resistance-temperature relationship, eliminating accumulated errors during temperature cycling. The superposition of the two resistance drift components comprehensively considers both dynamic and hysteresis effects, fully characterizing the complex physical process of resistance drift. This embodiment significantly improves the accuracy and adaptability of resistance drift rate prediction, provides reliable parameter basis for subsequent dynamic compensation, and effectively enhances the measurement accuracy and stability of the tester under complex operating conditions such as continuous high power, rapid changes and temperature cycling.

[0097] In one embodiment of this invention, fractional-order differentiation is performed on the transient equivalent temperature sequence to obtain the fractional-order temperature derivative, including the following steps: S610. Obtain the sampling time interval and differential order parameter of the transient equivalent temperature sequence; S620. Calculate the truncated historical memory length based on the differential order parameter; S630, Extract historical transient equivalent temperature data within the truncated historical memory length; S640. Generate a weighted coefficient sequence corresponding to historical transient equivalent temperature data by discretizing using the gamma function. S650. Perform item-by-item multiplication of the historical transient equivalent temperature data with the corresponding weight coefficient sequence, and then sum the results of the item-by-item multiplication globally to obtain the summation result. S660. Divide the summation result by the fractional power of the sampling time interval to obtain the fractional temperature derivative.

[0098] In this embodiment, S620 may include: calculating the fluctuation variance of the transient equivalent temperature sequence within a preset time period before the current moment, and establishing a negative correlation mapping relationship between the fluctuation variance and the memory length; reducing the truncated historical memory length to improve the transient response speed of the fractional derivative when the fluctuation variance increases; and expanding the truncated historical memory length to enhance the smoothing accuracy of the fractional derivative when the fluctuation variance decreases.

[0099] The accuracy and properties of fractional differential operations depend on two key parameters: the sampling time interval. and differential order The sampling time interval is determined by the sampling frequency of the data acquisition system, and is usually determined and kept constant during the initialization of the digital signal processing unit. For example, if the sampling frequency is set to 500kHz, then the sampling time interval... This parameter directly affects the time resolution and numerical stability of fractional derivatives. Smaller time intervals can provide higher time resolution, but also increase computational cost and sensitivity to numerical errors.

[0100] Differential order parameter It is the core parameter of the fractional derivative, determining the strength of the memory effect and its dynamic response characteristics. The order takes the value of a real number between 0 and 1. As the temperature approaches zero, the system exhibits strong memory, and the influence of historical temperatures on the current derivative decays slowly; when... As the order approaches 1, the system approximates the traditional first-order derivative, the memory effect weakens, and it primarily reflects the rate of change at the current moment. The derivative order is typically determined through experimental calibration and system identification methods. During calibration, a known temperature excitation signal is applied to the sampling element, while the resistance response is measured. The optimal derivative order is then identified using an optimization algorithm that minimizes the prediction error.

[0101] During system operation, the pre-calibrated derivative order parameters are read from the configuration file or non-volatile memory to ensure that fractional derivative operations use the correct parameter settings. Accurate acquisition of the sampling time interval and derivative order parameters is fundamental to fractional derivative operations; these two parameters together determine the subsequent calculation of weighting coefficients and the processing of historical data.

[0102] This embodiment provides a parameter basis for accurately describing the dynamic characteristics of the resistance drift of the sampling element by clarifying the key parameters of the fractional derivative. The adjustable order parameter can accurately match the dynamic response characteristics under different materials and working conditions.

[0103] Fractional differentials theoretically require all historical data from the initial moment to the current moment. However, in practical calculations, due to limitations in storage and computational resources, it is necessary to truncate the historical data. This truncation involves adjusting the length of the historical memory. The choice of directly affects the accuracy and efficiency of fractional differential calculations. If If the size is too small, important historical information will be lost, leading to inaccurate representation of the memory effect; if... If the value is too large, it will increase the unnecessary computational burden, and the weight coefficient of the long-term historical data is close to zero, so it contributes very little to the result.

[0104] Traditional methods typically employ a fixed truncation length, such as the length corresponding to the decay of weight coefficients to a certain threshold. However, this fixed strategy cannot adapt to the dynamic changes in the temperature sequence. This embodiment proposes an adaptive truncation strategy that dynamically adjusts the truncation length based on the fluctuation characteristics of the temperature sequence. Specifically, it first calculates the fluctuation variance of the transient equivalent temperature sequence within a preset time period before the current moment. The variance of fluctuation is calculated using the standard deviation formula: ; in The number of sampling points within a preset time period. This represents the average temperature over that time period. The variance reflects the degree of dynamic change in the temperature series; a large variance indicates rapid temperature fluctuations, while a small variance indicates relatively stable temperatures.

[0105] Establish a negative correlation between volatility variance and the length of truncated historical memory. The mapping function can take an exponentially decaying form: ; in For the maximum cut-off length, Minimum cut-off length, This is the adjustment coefficient. When the variance of the fluctuation... As the exponent increases, the exponent term decreases, and the truncation length increases. Tend to This narrows the historical memory window, reduces the influence of distant historical data, and improves the transient response speed of the fractional derivative to current temperature changes, enabling resistance drift rate prediction to quickly track temperature fluctuations. Conversely, when the variance of the fluctuation... When reduced, the cut-off length Tend to This expands the historical memory window, fully utilizes the smoothing effect of historical data, enhances the smoothing accuracy of fractional derivatives, and suppresses the effects of measurement noise and random fluctuations.

[0106] For example, in pulsed current testing, the variance of temperature fluctuation is large during the rapid temperature rise phase. The adaptive strategy shortens the cutoff length, enabling the fractional derivative to respond quickly to temperature jumps. Conversely, during the steady-state holding phase, the temperature changes slowly with smaller variance, allowing the cutoff length to be extended and historical data to be fully utilized to improve computational accuracy.

[0107] In summary, using a fixed truncation length cannot adapt to the dynamic changes in temperature sequences, resulting in lag in response under rapidly changing conditions and susceptibility to noise interference under stable conditions. This embodiment achieves a dynamic balance between transient response speed and smoothing accuracy for fractional derivatives by adaptively adjusting the truncation history memory length. Through an adaptive strategy driven by fluctuation variance, the fractional derivative can automatically optimize calculation parameters according to actual operating conditions.

[0108] Determining the length of truncated historical memory Next, the corresponding historical data needs to be retrieved from the temperature data buffer. The data buffer is implemented using a circular queue structure, which can efficiently store and access historical temperature sequences. The depth of the buffer is set to... ,in To provide an additional safety margin, ensure that sufficient historical data is always available when the truncation length changes dynamically.

[0109] For the current moment Extract from arrive common Each temperature data point forms a historical temperature vector. The data extraction process is implemented through pointer operations or index mapping. To ensure data continuity and integrity, the number of data points in the temperature buffer may be insufficient at the initial stage of system startup. In this case, a zero-filling or initial temperature-filling strategy is adopted to set the missing historical data as the ambient temperature or the system initial temperature, so as to avoid array out-of-bounds and numerical abnormalities.

[0110] The quality of historical temperature data directly affects the accuracy of fractional derivative calculations. In practical applications, temperature series may contain measurement noise, quantization errors, and outliers. To improve data quality, preprocessing can be performed after extracting historical data. Preprocessing includes outlier detection and filtering / smoothing. Outlier detection uses the 3σ criterion: if a temperature data point deviates from the local mean by more than three times the standard deviation, it is considered an outlier and replaced by the average of its neighboring data points. Filtering / smoothing can use moving averages or median filtering to suppress high-frequency noise while preserving the main trend of temperature changes.

[0111] In summary, directly using raw temperature data without considering the effects of measurement noise and outliers will lead to glitches and fluctuations in the fractional derivative results, affecting the stability of the resistance drift rate prediction. This embodiment, through an efficient historical data extraction and preprocessing mechanism, can provide high-quality input data for fractional derivative operations, and effectively suppress noise interference through data preprocessing.

[0112] The weighted coefficient sequence of the fractional derivative is obtained through the gamma function. Calculated. The gamma function is a generalization of the factorial function to the real number field, defined as follows: For positive integers ,have The formula for calculating the weighting coefficient is: ; in For indexing historical data, Let be the order of the differential. This formula shows that the weighting coefficients increase with... The rapid decay of the value as it increases reflects the memory effect characteristic of historical data having a gradually weakening influence on the current derivative over time.

[0113] In practical calculations, directly calculating the gamma function involves complex integration operations, resulting in low computational efficiency. To improve efficiency, a recursive relation is used to simplify the calculation. This is achieved by utilizing the properties of the gamma function. We can establish a recursive formula for the weighting coefficients: ; ; Using the recursive formula, the weight coefficients can be calculated item by item with only simple multiplication and division operations, avoiding repeated calculations of the gamma function. During the system initialization phase, based on the differential order... and maximum cut-off length Pre-compute and store the weight coefficient sequence To the lookup table. At runtime, based on the current truncation length. Extract the previous value directly from the lookup table. Each weight coefficient forms a weight coefficient vector. .

[0114] The characteristics of the weighting coefficient sequence determine the memory effect of fractional derivatives. The weighting coefficients exhibit power-law decay, meaning that recent historical data has a larger weight, while the weight of distant historical data rapidly approaches zero. This decay characteristic ensures that fractional derivatives retain the memory effect without being excessively influenced by overly distant historical data.

[0115] This embodiment provides accurate weighting parameters for fractional differential operations through an efficient weighting coefficient calculation and storage mechanism. The weighting coefficient sequence generated by the gamma function can precisely control the strength and decay rate of the memory effect.

[0116] Extracted historical transient equivalent temperature data vector With the corresponding weight coefficient vector Perform a dot product operation to obtain the weighted temperature vector. The mathematical expression for dot product is: ; This operation multiplies each historical temperature data point by its corresponding weighting coefficient, thus weighting the historical data. The alternating signs of the weighting coefficients cause the weighted temperature sequence to exhibit oscillating characteristics, which is an inherent feature of fractional derivatives and reflects higher-order derivative information of temperature changes.

[0117] After the dot product operation is completed, the weighted temperature vector is... Perform a global summation to obtain the summation result. : ; The summation process employs a compensated summation algorithm to reduce accumulated errors from floating-point operations. When processing large amounts of data, ordinary summation may result in precision loss due to rounding errors, while the compensated summation algorithm significantly improves summation accuracy by maintaining an error compensation term. Summation result. It is a scalar value that represents the combined effect of historical temperature data after being weighted by fractional weights.

[0118] This embodiment achieves fractional weighted processing of historical temperature data through precise dot multiplication and accumulation operations, accurately extracts the memory effect and dynamic characteristics of temperature sequences, and comprehensively utilizes historical temperature information through fractional weighted accumulation.

[0119] Sum result Divide by the sampling time interval fractional power The fractional-order temperature derivative at the current moment is obtained. : ; Fractional power of the sampling time interval It is a normalization factor that ensures that the fractional derivative has the correct dimensions.

[0120] Fractional powers are calculated using the logarithmic-exponential transformation: This method can efficiently and accurately calculate arbitrary real powers. It pre-calculates during system initialization. It stores the data to avoid recalculation in each iteration, thus improving computational efficiency.

[0121] The fractional temperature derivative obtained It is a real value reflecting the fractional rate of change of temperature at the current moment. This derivative comprehensively considers the cumulative effect of the current temperature change trend and historical temperature changes, and can accurately describe the dynamic evolution characteristics of the temperature field of the sampling element. The numerical range of the fractional derivative depends on the drasticness of the temperature change and the order of the differential. During the rapid heating phase, the fractional derivative is positive and has a large value; during the cooling phase, the fractional derivative is negative; and during the temperature stabilization phase, the fractional derivative is close to zero.

[0122] This embodiment obtains a fractional-order temperature derivative with clear physical meaning through proper dimensional normalization. This derivative is a key input parameter for the subsequent temperature-resistance mapping model. By integrating historical information and current trends, it provides reliable dynamic characteristic parameters for accurate prediction of resistance drift rate.

[0123] This embodiment achieves accurate extraction of the dynamic temperature change characteristics of the sampling element by performing fractional-order differential operations on the transient equivalent temperature sequence, effectively solving the technical problem that traditional integer-order differentials cannot accurately describe dynamic processes with memory effects. The adaptive historical memory length truncation strategy can dynamically adjust the calculation parameters according to the fluctuation characteristics of the temperature sequence. Under rapidly changing conditions, it shortens the memory window to improve transient response speed, and under stable conditions, it expands the memory window to enhance smoothing accuracy, significantly improving the adaptability and robustness of fractional-order differentials. The gamma function recursive algorithm can efficiently generate a weighted coefficient sequence, and the precise weighting of historical temperature data is achieved through term-by-term multiplication and compensation summation algorithms, accurately extracting the long-range correlation and memory effect of temperature changes. Fractional-order power normalization ensures the dimensional correctness and clear physical meaning of the derivative. This embodiment can comprehensively utilize historical temperature information and current trends to more realistically reflect the transient response characteristics of the sampling element under dynamic heat load. It provides high-quality dynamic characteristic parameters for subsequent temperature-resistance mapping and resistance drift rate prediction, significantly improving the accuracy and real-time performance of dynamic compensation. It effectively reduces transient measurement errors caused by thermal memory effects and enhances the measurement accuracy and stability of the tester under complex operating conditions such as continuous high power and rapid changes.

[0124] In one embodiment of this invention, the original measured value is dynamically compensated based on the equivalent resistance drift rate to obtain the compensated electrical parameter measurement result, including the following steps: S710, Obtain the nominal reference resistance of the sampling element at a reference room temperature; S720. Multiply the equivalent resistance drift rate by the nominal reference resistance to obtain the absolute resistance drift. S730: The nominal reference resistance value is added to the absolute resistance drift to obtain the real-time physical resistance value; S740: Synchronously acquire the raw digital voltage measurement value output by the analog-to-digital converter at the front end of the tester; S750: Calculate the parasitic voltage drop across the sampling element based on the real-time physical resistance and the current value at the current moment; S760: Subtract the parasitic voltage drop from the original digital voltage measurement value to obtain the true electrical parameters; S770 outputs the actual electrical parameters as compensated electrical parameter measurement results in packets according to a preset communication protocol.

[0125] The nominal reference resistance of the sampling element This resistance value is measured under standard reference conditions, typically room temperature (25°C), no current load, and thermal equilibrium. This resistance value is a fundamental electrical characteristic parameter of the sampling element, calibrated by the manufacturer at the factory using a precise four-wire measurement method. The nominal reference resistance value is stored in the tester's non-volatile memory, ensuring data integrity even after power failure. For high-precision testers, each sampling element comes with an independent calibration certificate, recording its nominal reference resistance value and detailed parameters such as temperature coefficient.

[0126] During system initialization, the nominal reference resistance value is read from memory. The reading process includes address addressing, data verification, and format conversion. The stored resistance data is typically saved in IEEE 754 double-precision floating-point format to ensure numerical accuracy. After reading, a CRC check is performed to verify data integrity and prevent errors caused by memory damage or data tampering. If the check fails, the system triggers an alarm and refuses to start, avoiding measurement failure due to incorrect parameters.

[0127] The typical range of nominal reference resistance values ​​depends on the range design of the test instrument. For high-current testing applications, the nominal resistance of the sampling resistor is typically between 0.1mΩ and 10mΩ. For example, a sampling resistor used for a 1000A range might have a nominal resistance of 0.5mΩ, producing a 0.5V voltage drop at full-scale current, ensuring measurement sensitivity while avoiding excessive power loss. For low-current precision measurements, the nominal resistance might reach 100mΩ to 1Ω to increase the voltage signal amplitude and reduce noise interference.

[0128] The nominal reference resistance value serves as the benchmark for dynamic compensation calculations; all resistance drift is a deviation from this benchmark value. Therefore, using design or nominal values ​​without considering individual differences and manufacturing errors will lead to inaccurate compensation benchmarks. This embodiment obtains a precisely calibrated nominal reference resistance value, providing an accurate reference for subsequent resistance drift calculations, and eliminating the influence of manufacturing errors by using actual calibrated values.

[0129] Equivalent resistance drift rate It is a dimensionless relative rate of change, representing the proportion of resistance deviation from the nominal reference resistance. To obtain a resistance change with practical physical meaning, the drift rate needs to be converted into an absolute resistance drift. The conversion formula is: This calculation multiplies the relative drift rate by the nominal reference resistance to obtain the absolute resistance change in ohms. For example, if the nominal reference resistance value Equivalent resistance drift rate Then the absolute resistance drift This means that the resistance of the sampling element increased by 0.5 microohms due to temperature drift.

[0130] The numerical range of absolute resistance drift depends on operating conditions and material properties. In high-power testing, temperature rises can reach tens of degrees Celsius, and resistance drift can reach thousands of ppm. Although the numerical value seems small, even a micro-ohm change in resistance under high-current conditions can introduce significant measurement errors. For example, at a current of 100A, a resistance drift of 0.5μΩ will produce an additional voltage drop of 50μV. If the resolution of the measurement system is 10μV, this error will result in a deviation of 5 minimum resolution units, severely affecting measurement accuracy.

[0131] The calculation process employs high-precision floating-point arithmetic to ensure numerical accuracy. In embedded systems, if the processor does not support hardware floating-point arithmetic, fixed-point arithmetic combined with an appropriate scaling factor can be used to improve computational efficiency while maintaining accuracy. After the calculation is completed, the result is checked for reasonableness. If the absolute resistance drift exceeds the physically reasonable range, it is considered abnormal, triggering an alarm mechanism to prevent erroneous data from entering subsequent processing flows.

[0132] This embodiment converts the relative drift rate into the absolute drift amount, which enables the mapping from dimensionless parameters to physical quantities, providing directly usable values ​​for subsequent real-time physical resistance calculations. The accurate numerical conversion ensures the accuracy and traceability of the compensation calculation.

[0133] Real-time physical resistance This is the actual resistance value of the sampling element at the current moment, taking into account both the nominal reference resistance value and the resistance change caused by temperature drift. The calculation formula is: This formula adds the nominal reference resistance to the absolute resistance drift to obtain the real-time physical resistance value at the current moment. For example, if , ,but The real-time physical resistance value is dynamically updated as temperature and current change, forming a resistance value sequence. It fully records the time evolution of the resistance value of the sampling element.

[0134] The accuracy of real-time physical resistance calculation directly affects the subsequent compensation effect. To ensure accuracy, sufficient significant digits are maintained during the calculation process; typically, double-precision floating-point numbers are used, providing approximately 15 decimal significant digits. For nominal resistance values ​​in the milliohm range and drift amounts in the microohm range, double-precision floating-point numbers can accurately represent their numerical differences, avoiding precision loss.

[0135] The changes in real-time physical resistance reflect the thermal dynamics of the sampling element. At the beginning of the test, as current is applied, power loss causes a rapid rise in temperature, and the real-time physical resistance increases accordingly. In pulsed current testing, the resistance exhibits periodic fluctuations, with peak values ​​corresponding to the high-power phase of the current pulse and troughs corresponding to the cooling phase during current interruptions. In continuous high-current testing, the resistance initially rises rapidly and then gradually stabilizes, reflecting the transition from transient thermal response to steady-state thermal equilibrium.

[0136] In summary, this embodiment can achieve dynamic tracking of the actual electrical characteristics of the sampling element by calculating the real-time physical resistance value, and accurately reflect the combined effects of temperature drift, thermal memory effect and hysteresis effect on the resistance value.

[0137] The analog-to-digital converter at the front end of the tester acquires the voltage signal across the tested object in real time and converts it into a digital output. (Original digital voltage measurement value) It is the analog-to-digital converter at the current sampling time. The output digital code value, after gain calibration and offset correction, is expressed as a voltage value in volts. This measurement includes the true voltage of the measured object and the parasitic voltage drop across the sampling element.

[0138] Synchronous acquisition means that the sampling time of the original voltage measurement value strictly corresponds to the current measurement value and the calculated temperature value, ensuring that all parameters are consistent on the time axis. The synchronization mechanism is implemented through hardware triggering or software timestamps. In the hardware triggering method, a single master clock drives all analog-to-digital converters to ensure synchronous sampling of each channel. In the software timestamp method, a high-precision timestamp is attached to each sampled data, and data alignment is performed according to the timestamp during subsequent processing.

[0139] The accuracy of raw digital voltage measurements depends on the resolution and noise level of the analog-to-digital converter (ADC). High-precision testers typically employ high-bit-count ADCs capable of resolving voltage variations in the microvolt range. To suppress noise, low-pass filters and shielding are incorporated at the front end of the ADC to reduce the impact of electromagnetic interference. Furthermore, oversampling and digital filtering techniques are used to improve the signal-to-noise ratio through multiple sampling and averaging.

[0140] After acquiring the raw voltage measurement values, a preliminary data validity check is performed. This check includes numerical range verification, saturation detection, and jump detection. If the measured value exceeds the range of the analog-to-digital converter, it is determined to be saturated, possibly due to excessively high measured voltage or improper gain settings. If the voltage change between adjacent sampling points exceeds a physically reasonable rate, it is determined to be a jump, possibly due to interference or poor contact. When an anomaly is detected, the system records an alarm message and can choose to discard the abnormal data or perform interpolation repair. This embodiment ensures the consistency of time among the parameters required for compensation calculations by synchronously acquiring the raw voltage measurement values, eliminating the impact of time inconsistencies through a strict synchronization mechanism.

[0141] The sampling element acts as a sensor for current measurement. When current flows through it, a voltage drop is generated across its terminals. This voltage drop is the product of the current and the real-time physical resistance, and is called the parasitic voltage drop because it is not part of the voltage of the measured object, but rather an additional voltage introduced by the measurement system. The formula for calculating the parasitic voltage drop is: in The parasitic pressure drop at the current moment, This is the real-time physical resistance value. This represents the current value at the current moment. For example, if... , ,but This parasitic voltage drop will be superimposed on the actual voltage of the object being measured, resulting in an inflated measurement value.

[0142] In practical applications, the calculation of parasitic voltage drop also needs to consider the skin effect of alternating current. When the current frequency is high, the current distribution inside the conductor is uneven, concentrating near the conductor surface, leading to a decrease in the effective conductive cross-sectional area and an increase in the equivalent impedance. The degree of the skin effect is related to the frequency, conductor material, and geometry. To accurately calculate the parasitic voltage drop, high-frequency correction to the real-time physical resistance is required.

[0143] The correction process first performs a Fast Fourier Transform on the current sequence to extract the main frequency components. For periodic currents, the fundamental frequency is extracted. For non-periodic currents, extract the frequency with the highest power spectral density. Calculate the skin depth based on the fundamental frequency. : in For conductor resistivity, Let be the permeability. Calculate the shrinkage ratio of the effective conductive cross-sectional area based on the skin depth. This ratio is related to the skin depth and conductor geometry. The real-time physical resistance is corrected based on the shrinkage ratio. Corrected resistance value This reflects the increased impedance at high frequencies. Multiplying the corrected resistance by the current yields the parasitic voltage drop, which includes the skin effect: This embodiment achieves accurate quantification of the additional voltage introduced by the measurement system by precisely calculating the parasitic voltage drop across the sampling element and considering the skin effect. The accuracy of the parasitic voltage drop calculation is significantly improved through dynamic resistance and high-frequency correction.

[0144] Raw digital voltage measurement value This includes the true voltage of the measured object and the parasitic voltage drop of the sampling element. To obtain the true voltage of the measured object, the parasitic voltage drop needs to be subtracted from the original measurement value: in This represents the true electrical parameter, i.e., the actual voltage across the measured object. This subtraction operation eliminates systematic errors introduced by the measurement system, restoring the true electrical state of the measured object. For example, if the original measured value... Parasitic pressure drop Then the actual voltage .

[0145] The accuracy of extracting true electrical parameters depends on the accuracy of parasitic voltage drop calculation. Because this embodiment employs a dynamic compensation method based on a multi-order thermal resistance-capacitance model, fractional derivatives, and hysteresis operators, the calculation of parasitic voltage drop fully considers various physical factors such as temperature drift, thermal memory effect, hysteresis effect, and skin effect, thus achieving high-precision error compensation.

[0146] After extracting the actual electrical parameters, post-processing and quality assessment are performed. Post-processing includes digital filtering, outlier removal, and data smoothing. Digital filtering uses a low-pass filter to suppress high-frequency noise and quantization errors. The filter cutoff frequency is set according to the bandwidth of the measured signal, preserving the main characteristics of the signal while suppressing noise. Outlier removal uses statistical methods to identify and remove data points that deviate from the normal range. Data smoothing uses moving averages or exponential smoothing to improve data continuity and readability.

[0147] Quality assessment quantifies the effectiveness of compensation by calculating the percentage improvement in error before and after compensation. The compensation gain is defined as: in To compensate for the measurement error before, This represents the residual error after compensation. A larger compensation gain indicates a more significant compensation effect.

[0148] In summary, inaccurate calculation of parasitic voltage drop will result in significant residual errors even after compensation. This embodiment achieves accurate extraction of the true electrical parameters of the measured object by precisely subtracting the parasitic voltage drop from the original measured value, and significantly reduces residual errors through dynamic compensation that comprehensively considers various physical effects.

[0149] Actual electrical parameters After compensation processing, the data needs to be encapsulated according to a preset communication protocol and output as a standard format measurement result for use by a host computer, data acquisition system, or other external devices. The communication protocol defines the data format, transmission method, and verification mechanism. Commonly used protocols include industry standard protocols such as Modbus, CAN, and Ethernet / IP, or custom proprietary protocols.

[0150] The packetization process first converts the actual electrical parameters into a data format specified by the protocol. For floating-point data, it may need to be converted to fixed-point numbers or encoded according to the IEEE 754 standard. For multi-channel measurement systems, the measurement results of each channel need to be organized into data frames, including fields such as channel identifier, timestamp, numerical value, and status flags. The structure design of the data frame needs to consider transmission efficiency and ease of parsing, and usually adopts a fixed-length frame or a variable-length frame with a length field.

[0151] The packetized data is sent to external devices via a physical interface. This physical interface can be a serial interface, parallel interface, Ethernet interface, or wireless interface. During transmission, CRC checksum or parity check is used to ensure data integrity and prevent transmission errors. For applications with high real-time requirements, hardware DMA transfer or interrupt-driven methods are used to reduce CPU load and improve transmission efficiency.

[0152] The output measurement results also include metadata information, such as measurement time, device status, calibration status, and alarm flags. This metadata helps the receiving end correctly parse and use the measurement data, and performs data traceability and quality assessment. For example, timestamps are used for data synchronization and event correlation, calibration status indicates the reliability of the measurement results, and alarm flags indicate abnormal situations requiring manual intervention. This embodiment, through standardized packetization and output mechanisms, enables reliable transmission and convenient use of compensated measurement results, and improves system interoperability and scalability by adhering to industry standard protocols.

[0153] This embodiment achieves high-precision dynamic compensation of the true electrical parameters of the measured object by acquiring the nominal reference resistance, calculating the absolute resistance drift, real-time physical resistance, and parasitic voltage drop, and accurately subtracting the parasitic voltage drop from the original measured value. This effectively solves the technical challenge of traditional static compensation methods being unable to cope with dynamic thermal response and the coupling of multiple physical effects. Precise calibration of the nominal reference resistance eliminates the influence of manufacturing errors; accurate calculation of the absolute resistance drift enables precise conversion from relative parameters to physical quantities; dynamic tracking of the real-time physical resistance accurately reflects the combined effects of temperature drift, thermal memory effect, and hysteresis effect; skin effect correction effectively compensates for the increase in high-frequency AC impedance; and accurate calculation and subtraction compensation of the parasitic voltage drop significantly reduces the systematic errors introduced by the measurement system. This embodiment significantly improves the measurement accuracy and reliability of the tester under complex operating conditions such as continuous high-power, rapid changes, and high-frequency testing, effectively meeting the needs of high-precision applications such as power semiconductor device testing and power battery charge / discharge testing, and improving testing efficiency and quality.

[0154] In one embodiment of this invention, the parasitic voltage drop across the sampling element is calculated based on the real-time physical resistance and the current value at the current moment, including the following steps: S810. Perform a fast Fourier transform on the current sequence to extract the fundamental frequency of the AC component. S820. Calculate the skin depth generated by the alternating current inside the sampling element based on the fundamental frequency. S830, Calculate the shrinkage ratio of the effective conductive cross-sectional area of ​​the sampling element based on skin depth; S840: The real-time physical resistance value is corrected by high-frequency AC impedance amplification based on the shrinkage ratio. S850 multiplies the amplified and corrected real-time physical resistance value with the current value at the current moment to obtain the parasitic voltage drop that includes the combined effects of skin effect and thermal drift.

[0155] In AC or pulsed current testing scenarios, the current signal contains multiple frequency components, among which the fundamental frequency corresponds to the main energy distribution of the signal and is a key parameter affecting the skin effect. For current sequences... Performing a Fast Fourier Transform converts the time-domain signal into a frequency-domain representation, yielding the spectrum. The computational complexity of the FFT algorithm is... ,in The number of sampling points is usually chosen as a power of 2 to optimize computational efficiency.

[0156] Spectrum It is a complex sequence containing amplitude and phase information. Calculate the power spectral density of each frequency component. Power spectral density reflects the energy distribution of each frequency component. By finding the maximum value of the power spectral density, the index of the dominant frequency component can be determined. The corresponding frequency is the fundamental frequency. : in This refers to the sampling frequency. For example, if the sampling frequency is 100kHz and the FFT length is 1024 points, the power spectrum peak appears at index [index missing]. Then the fundamental frequency .

[0157] For periodic signals such as sine waves or square waves, the fundamental frequency corresponds to the fundamental period frequency of the signal. For non-periodic signals such as pulse trains, the fundamental frequency corresponds to the repetition frequency or the main frequency component. In practical applications, to improve frequency resolution, zero-padding techniques can be used to pad the end of the time-domain signal with zeros to a longer FFT length, or windowing techniques can be used to reduce spectral leakage and improve frequency estimation accuracy.

[0158] After extracting the fundamental frequency, its validity is verified. If the fundamental frequency is below 1Hz or above the Nyquist frequency, it is considered abnormal, possibly due to poor signal quality or improper FFT parameter settings. For DC signals, the fundamental frequency is close to zero, at which point the skin effect is negligible, and high-frequency correction is unnecessary. Frequency verification ensures the validity of the input parameters for subsequent skin depth calculation. This embodiment accurately extracts the fundamental frequency of the current signal using FFT, providing key parameters for the quantitative calculation of the skin effect. Real-time frequency extraction allows for adaptation to test conditions at different frequencies.

[0159] The skin effect refers to the phenomenon where alternating current is unevenly distributed within a conductor, and the current density decreases exponentially with increasing depth. Its characteristic parameter is the skin depth. Defined as the current density decaying to the surface value. The corresponding depth. The formula for calculating skin depth is: in The resistivity of the conductor material, Permeability, This is the fundamental frequency. For non-magnetic metals such as copper or aluminum, the relative permeability is close to 1, and the permeability is... The resistivity of copper Substituting into the formula, we get: For example, in frequency At that time, skin depth ; at frequency At that time, skin depth ; at frequency At that time, skin depth The skin depth is inversely proportional to the square root of the frequency; the higher the frequency, the more pronounced the skin effect, and the more concentrated the current is on the conductor surface.

[0160] For the sampling element, the resistivity of manganin or constantan alloys is slightly higher than that of pure copper. The skin depth is recalculated by substituting these values ​​into the formula. Material parameters are read from a pre-stored material database to ensure the correct physical constants are used in the calculation. The accuracy of the skin depth calculation affects the subsequent shrinkage ratio and impedance correction; therefore, sufficient numerical accuracy must be maintained, employing double-precision floating-point arithmetic.

[0161] The calculated skin depth is compared with the geometry of the sampling element. If the skin depth is much larger than the conductor thickness, the skin effect is negligible, and the current is uniformly distributed across the entire cross-section. If the skin depth is comparable to or smaller than the conductor thickness, the skin effect is significant, requiring impedance correction. This judgment avoids unnecessary complex correction calculations, improving computational efficiency. This embodiment, through skin depth calculation based on physical principles, can quantitatively describe the distribution characteristics of alternating current within the conductor, providing a theoretical basis for subsequent effective conductive area and impedance correction. Accurate physical model calculations significantly improve the accuracy of high-frequency impedance prediction.

[0162] The skin effect causes current to concentrate near the conductor surface, reducing the effective conductive cross-sectional area and increasing the equivalent impedance. (Shrinkage ratio) Defined as the ratio of the effective conductive area to the total cross-sectional area, it reflects the strength of the skin effect. For rectangular conductors, the calculation of the shrinkage ratio needs to take into account the conductor width. and thickness .

[0163] When skin depth When the area is much smaller than the conductor's thickness and width, the current is mainly distributed within the skin depth of the four surfaces, and the effective conductive area is approximately the surface perimeter multiplied by the skin depth. The perimeter of the rectangular cross-section is... effective area Total area Shrinkage ratio: When the skin depth is comparable to the conductor size, a more accurate model is required. For the thickness direction, the current density decreases exponentially. The effective thickness is obtained by integration. Similarly, calculate the effective width in the width direction. effective area Shrinkage ratio .

[0164] For example, for width ,thickness A rectangular conductor, at a frequency of 1 kHz, has a skin depth that approaches... Calculated using an accurate model , effective area Total area Shrinkage ratio This indicates that the effective conductive area is only 22.4% of the total area.

[0165] The calculation of the shrinkage ratio also needs to consider the influence of the conductor shape. For a circular conductor, solving for the current distribution using Bessel functions is more complex. For complex shapes, the shrinkage ratio at different frequencies can be pre-calculated using finite element simulation, a lookup table can be established, and the value can be obtained through interpolation during runtime. The shrinkage ratio decreases with increasing frequency, reflecting the enhancement of the skin effect. This embodiment, by accurately calculating the shrinkage ratio of the effective conductive cross-sectional area, can quantitatively assess the degree of influence of the skin effect on the conductor impedance. By using a physical model that considers the conductor's geometry and current distribution, the accuracy of the shrinkage ratio calculation is significantly improved.

[0166] A decrease in effective conductive area leads to an increase in the conductor's equivalent impedance; the correction factor is the reciprocal of the shrinkage ratio. Real-time physical resistance value. The resistance value is calibrated under DC or low-frequency conditions and does not consider the skin effect. Under high-frequency AC conditions, the resistance value needs to be amplified and corrected. in This is the corrected high-frequency AC impedance. For example, if the real-time physical resistance value... Shrinkage ratio Then the corrected impedance The impedance increases by approximately 4.47 times. This significant increase reflects the strong influence of the skin effect under high-frequency conditions.

[0167] The correction process also needs to consider frequency dependence. If the current signal contains multiple frequency components, different frequencies correspond to different skin depths and shrinkage ratios. Strict processing requires calculating the impedance of each frequency component separately and then summing them to obtain the total impedance. In simplified processing, the shrinkage ratio corresponding to the fundamental frequency is used for uniform correction, suitable for scenarios where the fundamental frequency dominates. For broadband signals, the equivalent frequency or weighted average shrinkage ratio can be calculated.

[0168] The corrected impedance is used to calculate the parasitic voltage drop, ensuring that the compensation takes into account the skin effect. Under low-frequency or DC conditions, the shrinkage ratio is close to 1, and the corrected impedance equals the real-time physical resistance. The correction process automatically degenerates to no correction, ensuring the algorithm's versatility. Through frequency-adaptive impedance correction, this embodiment can adapt to a wide range of test conditions from DC to high frequencies. This embodiment, through impedance amplification correction based on the shrinkage ratio, can accurately reflect the impact of the skin effect on the sampling element impedance, and significantly improves the compensation accuracy in high-frequency test scenarios through dynamic impedance correction.

[0169] The corrected high-frequency AC impedance Current value at the current moment Multiplying these together yields the parasitic pressure drop, which includes the combined effects of the skin effect and thermal drift: This parasitic voltage drop takes into account two main physical effects: thermal drift effect through real-time physical resistance. The parasitic voltage drop is reflected in the effect of temperature changes, thermal memory, and hysteresis on the resistance value; the skin effect, reflected through the shrinkage ratio correction, reflects the effect of the reduction in effective conductive area on impedance under high-frequency AC conditions. The superposition of these two effects makes the calculation of parasitic voltage drop more comprehensive and accurate.

[0170] For example, in a pulsed current test, with a peak current of 100A and a frequency of 10kHz, the real-time physical resistance due to temperature rise is 1.0005mΩ, the shrinkage ratio is 0.5, and the corrected impedance is 2.001mΩ, with a parasitic voltage drop. If only thermal drift is considered, the parasitic voltage drop is 0.10005V; if only the skin effect is considered, the parasitic voltage drop is 0.2V. Taking both effects into account, the parasitic voltage drop is 0.2001V, which is more accurate than considering either effect alone.

[0171] The accuracy of parasitic voltage drop calculation directly determines the compensation effect. Through comprehensive modeling, this embodiment can provide accurate parasitic voltage drop estimates under various complex operating conditions, including high DC current, AC sine wave, pulse square wave, frequency conversion scanning, and other test scenarios. The calculation results are subtracted from the original measured values ​​to recover the true voltage of the measured object, achieving high-precision dynamic compensation. This embodiment achieves comprehensive and accurate calculation of parasitic voltage drop of sampling elements by comprehensively modeling thermal drift and skin effects. Multi-effect comprehensive modeling significantly improves the accuracy and applicability of parasitic voltage drop calculation.

[0172] This embodiment extracts the fundamental frequency from the current sequence using FFT, calculates the skin depth and effective conductive area shrinkage ratio, and corrects the real-time physical resistance using high-frequency AC impedance amplification. This achieves accurate compensation for the skin effect in the parasitic voltage drop of the sampling element, effectively solving the problem of insufficient compensation caused by neglecting high-frequency effects in traditional methods. FFT frequency extraction can adapt to different frequency test conditions. The skin depth calculation is based on a rigorous physical model, the shrinkage ratio calculation considers the conductor geometry and current distribution characteristics, and the impedance correction comprehensively reflects the combined effects of thermal drift and the skin effect. This embodiment significantly improves the accuracy of parasitic voltage drop calculation in high-frequency AC and pulsed current test scenarios, effectively reduces systematic measurement errors caused by the skin effect, expands the applicable frequency range of the dynamic compensation method, and improves the measurement accuracy and reliability of the tester under complex conditions such as wide-bandwidth and high-current testing.

[0173] This application also provides an electronic device, including: The memory is configured to store instructions; and The processor is configured to retrieve the instructions from the memory and, when executing the instructions, to implement the aforementioned dynamic compensation method for measuring electrical parameters of the test instrument.

[0174] Reference Figure 3 This application also provides a dynamic compensation system, including: Tester 10; Electronic device 20 is connected to tester 10.

[0175] In this embodiment, the electronic device can be a tablet computer, desktop computer, laptop computer, handheld computer, wearable device, laptop computer, ultra-mobile personal computer (UMPC), netbook, or other device with a processor. Of course, the electronic device can also be a server. This application embodiment does not impose any special limitations on the specific form of the electronic device.

[0176] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0177] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, as well as combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0178] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0179] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0180] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0181] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0182] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0183] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0184] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A dynamic compensation method for measurement errors of electrical parameters in a testing instrument, characterized in that, Applied to a dynamic compensation system, which includes a testing instrument, the method includes: Real-time acquisition of voltage and current signals flowing through the sampling components inside the tester; The voltage and current signals are phase aligned to obtain phase-aligned voltage and current sequences. Calculate the transient power consumption of the sampling element based on the phase-aligned voltage and current sequences; The transient power consumption is input into a preset multi-order thermal resistance-capacitance equivalent network model, and the transient equivalent temperature of the sampling element is obtained by solving the model. Calculate the equivalent resistance drift rate of the sampling element based on the transient equivalent temperature; Based on the equivalent resistance drift rate, the original measured values ​​are dynamically compensated to obtain the compensated electrical parameter measurement results.

2. The method according to claim 1, characterized in that, Phase alignment processing is performed on the voltage and current signals to obtain phase-aligned voltage and current sequences, including: Voltage and current signals are sampled synchronously to obtain digital voltage and digital current sequences; Fractional time delay compensation is performed on the voltage and current digital sequences using an all-pass filter to eliminate the phase difference between the voltage and current signals, resulting in phase-aligned voltage and current sequences.

3. The method according to claim 1, characterized in that, Based on the phase-aligned voltage and current sequences, the transient power consumption of the sampling element is calculated, including: The transient power consumption of the sampling element at the current moment is obtained by multiplying the voltage value at the current moment in the phase-aligned voltage sequence with the current value at the current moment in the phase-aligned current sequence.

4. The method according to claim 1, characterized in that, The transient power consumption is input into a preset multi-order thermal-resistivity-capacitance equivalent network model, and the transient equivalent temperature of the sampling element is obtained by solving the model, including: The transient power consumption is used as the excitation input and substituted into the state space equation of the preset multi-order thermal resistance-capacitance equivalent network model. By solving the state-space equations, the temperature values ​​of each thermal node of the sampling element are obtained; The core sensitive area of ​​the sampling element is determined, and the temperature value of the corresponding thermal node in the core sensitive area of ​​the sampling element is determined as the transient equivalent temperature of the sampling element.

5. The method according to claim 1, characterized in that, Based on the transient equivalent temperature, the equivalent resistance drift rate of the sampling element is calculated, including: Perform fractional-order differential operations on the transient equivalent temperature sequence to obtain the fractional-order temperature derivative; The fractional temperature derivative is input into a preset fractional temperature-resistance mapping model to obtain the first resistance drift component. The transient equivalent temperature is input into a preset hysteresis operator to obtain the second resistance drift component. The hysteresis operator is used to characterize the resistance hysteresis characteristics of the sampling element during the heating and cooling processes. The first resistance drift component is superimposed with the second resistance drift component to obtain the equivalent resistance drift rate of the sampling element.

6. The method according to claim 5, characterized in that, Performing fractional differentiation on the transient equivalent temperature sequence yields the fractional temperature derivative, including: Obtain the sampling time interval and differential order parameter of the transient equivalent temperature sequence; Calculate the truncated historical memory length based on the differential order parameter; Extract historical transient equivalent temperature data within the truncated historical memory length; A weighted coefficient sequence corresponding to historical transient equivalent temperature data is generated by discretizing the gamma function. The historical transient equivalent temperature data is multiplied item by item with the corresponding weight coefficient sequence, and the results of the item by item multiplication are summed globally to obtain the summation result. Divide the summation result by the fractional power of the sampling time interval to obtain the fractional temperature derivative.

7. The method according to claim 1, characterized in that, Based on the equivalent resistance drift rate, the original measured values ​​are dynamically compensated to obtain the compensated electrical parameter measurement results, including: Obtain the nominal reference resistance value of the sampling element; The absolute resistance drift is obtained by multiplying the equivalent resistance drift rate by the nominal reference resistance. The real-time physical resistance is obtained by adding the nominal reference resistance value to the absolute resistance drift. Synchronously acquire the raw digital voltage measurement value output by the analog-to-digital converter at the front end of the tester; The parasitic voltage drop across the sampling element is calculated based on the real-time physical resistance and the current value at the current moment. The true electrical parameters are obtained by subtracting the parasitic voltage drop from the original digital voltage measurement. The actual electrical parameters are packetized and output as compensated electrical parameter measurement results according to the preset communication protocol.

8. The method according to claim 7, characterized in that, The parasitic voltage drop across the sampling element is calculated based on the real-time physical resistance and the current value at the current moment, including: The fundamental frequency of the AC component is obtained by performing a fast Fourier transform on the current sequence. Calculate the skin depth generated by the alternating current inside the sampling element based on the fundamental frequency; The shrinkage ratio of the effective conductive cross-sectional area of ​​the sampling element is calculated based on the skin depth. The real-time physical resistance value is corrected by high-frequency AC impedance amplification based on the shrinkage ratio. Multiplying the amplified and corrected real-time physical resistance value with the current value at the current moment yields the parasitic voltage drop, which includes the combined effects of skin effect and thermal drift.

9. An electronic device, characterized in that, include: The memory is configured to store instructions; as well as The processor is configured to retrieve the instructions from the memory and, when executing the instructions, to implement the dynamic compensation method for measuring electrical parameters of the test instrument according to any one of claims 1 to 8.

10. A dynamic compensation system, characterized in that, include: Tester; The electronic device according to claim 9 is connected to the tester.

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