Multi-plc brand-oriented structure layout method, system, device and storage medium

Abstract

A structure layout method, system, device and storage medium for multiple PLC brands belong to the field of industrial automation control. The application obtains structure description information irrelevant to PLC brands, the description information contains member names and data types, and does not contain any specific PLC brand physical address information; obtains a target PLC brand; calculates the offset of each member in the memory space of the target PLC brand according to the memory alignment rule of the target PLC brand; and outputs the offset of each member under the target PLC brand. Through the mapping of brand-independent structure description and memory alignment rules of each brand, the same set of structure description can be automatically laid out to any target PLC brand without manual calculation of physical addresses. The application supports multiple brand parallel layout, cross-brand consistency verification and structure-aware data transfer, significantly improving the efficiency and reliability of structured data layout in a multiple brand PLC environment.

Description

Technical Field

[0001] This invention relates to the field of industrial automation control technology, specifically to data interaction technology between programmable logic controllers and monitoring, data acquisition systems, and human-machine interfaces, and particularly to a structured memory layout method, system, device, and storage medium for multiple PLC brands. Background Technology

[0002] Programmable Logic Controllers (PLCs) are the core equipment of industrial automation control systems. Supervisory Control and Data Acquisition (SCADA) systems or Human-Machine Interfaces (HMIs) interact with PLCs to monitor and control equipment in the industrial field. To achieve this data interaction, SCADA or HMIs must know the specific storage location of each variable in the PLC's memory, i.e., the variable's physical address, as well as the variable's data type.

[0003] In practical engineering, multiple variables belonging to the same equipment or functional module (such as the operating status, speed, temperature, alarm codes, etc. of a motor) are usually organized into a structure. Using structures helps improve the readability and maintainability of the program, and also facilitates overall reading and writing through data blocks.

[0004] However, different brands of PLCs have different hardware architectures and compiler implementations, resulting in significant differences in their memory addressing units and alignment rules for structures. For example, Siemens S7 series PLCs use byte addressing, where Boolean variables can be tightly packed bit-by-bit within the same byte, and integer and multi-byte data are aligned to 2-byte boundaries; Keyence KV series PLCs use word addressing, where the starting address of all variables is aligned to word boundaries, and Boolean variables also occupy a complete word; Modbus protocol devices are based on register addressing, where Boolean values ​​use a complete register, floating-point numbers occupy two consecutive registers, and there are differences in byte order configuration. These differences mean that after the same structure definition is compiled in different brands of PLCs, the actual physical addresses of each member and the total length of the entire structure may be completely different.

[0005] In traditional engineering practice, when the same SCADA or HMI system needs to communicate with PLCs from multiple brands, engineers must manually configure the physical address of each member in the structure for each PLC brand. First, the structure is defined in the PLC programming software, and the offsets of each member allocated by the compiler are recorded. Then, the corresponding addresses are entered one by one into the variable table of the SCADA or HMI. If the structure changes, the above process must be repeated for each associated PLC brand. This manual configuration method is not only inefficient but also highly error-prone, especially when it involves bit offsets, array step sizes, and alignment of nested structure boundaries. If the manually calculated offsets are incorrect, it will cause the SCADA system to read incorrect data or communication failures.

[0006] Existing technical solutions attempt to address the above problems. Chinese patent document CN101276216A discloses a method for memory address conversion between human-machine interfaces (HMIs) and PLCs of different specifications. This method pre-establishes memory address data for multiple PLC specifications in the HMI. When it is necessary to convert from a first-specification PLC to a second-specification PLC, it searches for a corresponding storage area for the two PLC specifications. The conditions for this storage area are that the memory capacity of the second-specification PLC is greater than or equal to that of the first-specification PLC, and both PLCs use the same integer or bit mode. If a corresponding storage area exists, a correspondence between the memory addresses of the two PLC specifications is established, so that the original settings for the first-specification PLC are automatically converted and written to the second-specification PLC.

[0007] However, this scheme only establishes a linear translation mapping between physical address blocks, and its mapping conditions only involve memory capacity comparison and identical integer / bit mode types. This scheme does not distinguish between different data types and members within a structure. When a structure contains mixed data types, due to differences in storage length and alignment requirements for each data type across different brands, even if the memory capacity and basic types are the same for both brands, the offsets of each member within the structure may differ. Overall translation using storage areas as the unit of operation cannot guarantee that the offset of each member in the new brand is consistent with its compiler layout. Therefore, the translated structure data is at risk of being misinterpreted when read by the new brand PLC. Furthermore, this scheme does not address the differences in memory alignment rules between different brands, nor can it handle the problem of uncertain internal layouts when nested structures are migrated across brands.

[0008] In summary, the technical problem of whether the internal components of structured data can be correctly identified and interpreted by the target brand when migrating structured data between PLCs of different brands remains unsolved in the existing technology. Summary of the Invention

[0009] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a structured memory layout method, system, device and storage medium for multiple PLC brands that supports multi-brand parallel layout, cross-brand consistency verification, structure awareness, eliminates errors in manual address configuration, and significantly improves the efficiency and reliability of structured data layout in multi-brand PLC environments.

[0010] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0011] A structure layout method for multiple PLC brands includes the following steps: Obtain structure description information unrelated to PLC brand; the structure description information contains at least one member, each member includes at least a member name and data type, and does not contain any physical address information of any specific PLC brand; Acquire the target PLC brand; Based on the memory alignment rules corresponding to the target PLC brand, calculate the offset of each member in the structure description information within the memory space of the target PLC brand; the memory alignment rules include at least the basic addressing unit and data type size rules of the target PLC brand. Output the offset of each member under the target PLC brand.

[0012] As a further improvement to the above technical solution: The data types include at least one of Boolean, integer, floating-point, and string types; the memory alignment rules also include the alignment granularity of each data type under the target PLC brand.

[0013] When the data type of the member is Boolean, the offset includes the bit offset within the basic addressing unit where the member is located; the memory alignment rule also includes the bit packing strategy for Boolean members, which defines the allocation method when multiple Boolean members are arranged consecutively within the same basic addressing unit.

[0014] When the member is an array type, the offset also includes the step size between adjacent array elements; the memory alignment rule also includes the arrangement rule of array elements.

[0015] When the data type of the member is string, the memory alignment rule also includes a string word length conversion rule, which is used to calculate the number of bytes or words occupied by the string in the memory space of the target PLC brand based on the declared length of the string.

[0016] When the member references another structure, the complete layout of the referenced structure is calculated recursively according to the memory alignment rules of the target PLC brand. After obtaining the total size and alignment requirements of the referenced structure, the referenced structure is treated as a whole and used in the layout calculation of the current structure.

[0017] It also includes: calculating the instance span of the structure defined by the structure description information under the target PLC brand according to the memory alignment rules of the target PLC brand.

[0018] The memory alignment rules also include alignment padding rules for the span of structure instances, which are used to round up the total length of the structure to an integer multiple of the alignment unit of the target PLC brand.

[0019] The target PLC brand is at least two brands; for each of the at least two brands, the offset of each member in the same structure description information in the respective memory space of each brand is calculated according to the memory alignment rules of each brand, and the layout result under each brand is output.

[0020] It also includes: comparing the layout results calculated under the at least two brands, determining whether there are cross-brand inconsistencies, and outputting consistency verification information.

[0021] The comparison includes: comparing the layout results of the same structure description information under different brands at the member level, and determining whether at least one of the following situations exists: inconsistent member correspondence, incompatible member types, non-corresponding offsets of the same member under different brands, inconsistent sizes of nested structures under different brands, and truncated capacity of strings or arrays under different brands.

[0022] The consistency verification information includes difference identification information that can be located to a specific member path.

[0023] When transferring data from the first-brand PLC to the second-brand PLC, the following is also included: According to the memory alignment rules and byte order of the first brand, the intermediate value corresponding to the structure description information is parsed from the original bytes of the first brand PLC. According to the memory alignment rules and byte order of the second brand, the intermediate value is serialized into the raw bytes of the second brand PLC and written to the second brand PLC.

[0024] The memory alignment rules also include the processing rules for internal logical instances in the target PLC brand: internal instances that occupy memory space but are not used as data exchange objects are included in the offset advance according to their fixed size and are not exported as readable members; internal instances that do not occupy memory space are processed as zero length.

[0025] The memory alignment rules are registered in the rule base as pluggable rule objects; when a new PLC brand is added, the memory alignment rules corresponding to the new PLC brand are registered in the rule base.

[0026] A structured layout system for multiple PLC brands, comprising: The structure description module is used to obtain structure description information that is unrelated to the PLC brand; the structure description information contains at least one member, each member includes at least a member name and a data type, and does not contain any physical address information of any specific PLC brand; The rule base module is used to store memory alignment rules corresponding to at least two PLC brands; the memory alignment rules include at least the size rules of the basic addressing unit and data type of each brand. The layout engine module is used to calculate the offset of each member in the structure description information in the memory space of the target PLC brand according to the memory alignment rules corresponding to the target PLC brand.

[0027] As a further improvement to the above technical solution: The layout engine module allocates the offset of each member after rounding up the current offset according to the alignment granularity in the memory alignment rules.

[0028] When a member references another structure, the layout engine module recursively calls itself to calculate the complete layout of the referenced structure. After obtaining the total size and alignment requirements of the referenced structure, the referenced structure is treated as a whole and participates in the layout calculation of the current structure.

[0029] The layout engine module allocates bit offsets for multiple consecutively arranged Boolean members within the same basic addressing unit according to the Boolean member bit packing strategy in the memory alignment rules.

[0030] The layout engine module calculates the number of bytes or words occupied by a string member in the memory space of the target PLC brand based on the string word length conversion rule in the memory alignment rule and the declared length of the string member.

[0031] The layout engine module calculates the instance span of the structure defined by the structure description information under the target PLC brand according to the memory alignment rules of the target PLC brand.

[0032] The target PLC brand is at least two brands; the layout engine module calculates the offset of each member in the same structure description information in the respective memory space of each brand according to the memory alignment rules of each brand.

[0033] It also includes a verification module, which is used to perform member-level comparison of the layout results calculated under the at least two brands, determine whether there are cross-brand inconsistencies, and output consistency verification information.

[0034] It also includes a structure-aware transport module, which, when transporting data from a first-brand PLC to a second-brand PLC, parses the intermediate value corresponding to the structure description information from the original bytes of the first-brand PLC according to the memory alignment rules and byte order of the first brand, and serializes the intermediate value into the original bytes of the second-brand PLC according to the memory alignment rules and byte order of the second brand before writing it into the second-brand PLC.

[0035] The memory alignment rules in the rule base module are registered in the form of pluggable rule objects. When a new PLC brand is added, the memory alignment rules corresponding to the new PLC brand are registered with the rule base module. The layout engine module performs layout calculations based on the rules of the new brand.

[0036] A structural layout device for multiple PLC brands, comprising: One or more processors; Storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described above.

[0037] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described above.

[0038] Compared with the prior art, the advantages of the present invention are as follows: This invention provides a structure layout method for multiple PLC brands. Since the structure description information does not contain physical address information for any specific PLC brand, users only need to define the data structure at the business logic level, without needing to understand the memory addressing details of each brand. By switching the target brand and calling the corresponding memory alignment rules, the same structure description can be reused for any target brand, eliminating the need to maintain a separate address definition for each brand. Furthermore, the system automatically calculates the offset of each member according to the target brand's memory alignment rules, completely replacing the traditional manual calculation process and avoiding address misalignment caused by engineers' unfamiliarity with or negligence of the alignment rules for each brand. The offset is deterministically calculated by the algorithm according to the rules, and the output can be directly used for SCADA variable configuration or imported into PLC programming software, enabling the entire layout process to be completed automatically without increasing the user's burden.

[0039] This invention presents a structure layout system for multiple PLC brands. The structure description module decouples the structure definition from the PLC brand, requiring users to maintain only one logical definition. The rule base module encapsulates the addressing units and alignment rules of different brands into independently storable and callable rule objects, eliminating brand differences scattered throughout the program logic. A single layout engine can handle layout calculations for any registered brand. The layout engine module automatically calls the corresponding alignment rules to calculate the offset of each member based on the selected brand, requiring no manual intervention throughout the process. When outputting layout results for multiple brands, the engine sequentially calls the rules of each brand to perform layout calculations on the same description. This allows a single structure description to simultaneously generate physical layouts for all target brands, with each brand's result deterministically generated by the same engine according to its respective rules, avoiding the inconsistency risks associated with manually maintaining multiple sets of definitions.

[0040] The technical effect of the structure layout device and computer-readable storage medium for multiple PLC brands of the present invention is determined by the method performed, so its effect is consistent with the structure layout method for multiple PLC brands of the present invention, and will not be repeated here. Attached Figure Description

[0041] Figure 1 This is an overall flowchart of the structural layout method for multiple PLC brands according to the present invention.

[0042] Figure 2 This is a flowchart of the layout engine calculating the offset of a single-layer structure in this invention.

[0043] Figure 3 This is a flowchart of the layout engine recursively calculating the offset of nested structures in this invention.

[0044] Figure 4 This is a flowchart of cross-brand consistency verification in this invention.

[0045] Figure 5 This is a flowchart of the structure-aware cross-brand transfer process in this invention.

[0046] Figure 6 This is a module architecture diagram of the structural layout system for multiple PLC brands according to the present invention.

[0047] The labels in the diagram represent: 601. Structure Description Module; 602. Brand Selection Module; 603. Rule Base Module; 604. Layout Engine Module; 605. Validation Module; 606. Structure-Aware Transfer Module; 607. Output Module. Detailed Implementation

[0048] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0049] This invention proposes a structural layout method for multiple PLC brands. Figure 1 The overall flow of this method is shown. See also Figure 1 The method includes the following steps: Step S101: Obtain structure description information unrelated to the PLC brand. The structure description information contains at least one member, each member including at least a member name and data type, and does not contain any physical address information specific to the PLC brand (such as byte offset, bit offset, register address, etc.). The data types include, but are not limited to, Bool, Byte, Int, Unsigned Short Int, DInt, Real, LReal, String, and StructRef. When defining a structure, the user only needs to describe the logical name of the member, the data type, and the hierarchical relationship between members (nested through structure references), without needing to fill in any physical addresses.

[0050] Step S102: Obtain the target PLC brand specified by the user. The user can select one or more target brands from a number of registered PLC brands. The PLC brands include at least Siemens S7 series (using byte addressing), Keyence KV series (using word addressing), and Modbus protocol devices (using register addressing).

[0051] Step S103: Calculate the offset of each member in the structure description information within the memory space of the target PLC brand according to the memory alignment rules corresponding to the target PLC brand. The memory alignment rules include at least the basic addressing unit and data type size rules of the target PLC brand. The basic addressing unit includes a byte (8 bits), a word (16 bits), or a register (16 bits).

[0052] Step S104: Output the offset of each member under the target PLC brand. The offset includes the byte offset (byte_offset), and for Boolean members, it also includes the bit offset (bit_offset) within the basic addressing unit where the member is located. The output layout result can be directly used for SCADA variable configuration or imported into PLC programming software.

[0053] Figure 2 This illustrates the detailed process of the layout engine calculating offsets for a single-layer structure. See also... Figure 2 The process includes the following steps: Step S201: Initialize the current cursor cursor = 0, bit cursor bitCursor = null (indicating that there is currently no byte / word / register containing a boolean member being packed).

[0054] Step S202: Traverse the member list of the structure in the order of declaration.

[0055] Step S203: Determine whether the data type of the current member is Boolean and scalar (not an array). If yes, execute steps S204 to S207; otherwise, execute steps S208 to S211.

[0056] Step S204: Determine if bitCursor is empty. If it is empty, it means there are no open boolean packing units, then proceed to step S205; otherwise, proceed directly to step S206.

[0057] Step S205: Create a new packing unit, set bitCursor = cursor, bit = 0, and advance cursor forward by 1 basic addressing unit.

[0058] Step S206: Assign the current member's byte offset byte_offset to bitCursor, and the bit offset bit_offset to the current bit value.

[0059] Step S207: Increment the bit by 1 and determine if the bit has reached the brand's boolean pack width (boolPackWidth). If so, set bitCursor to null (close the current packing unit); otherwise, keep bitCursor unchanged. Through this bit packing strategy, multiple boolean members can be arranged consecutively within the same basic addressing unit, effectively saving storage space in brands that support bit packing (such as Siemens S7); while in brands that do not support bit packing (such as Keyence KV), each boolean member occupies an independent basic addressing unit, ensuring correct addressing.

[0060] Step S208: If it is not a Boolean member, first close any unclosed Boolean packing units (set bitCursor = null).

[0061] Step S209: Based on the target brand's memory alignment rules, obtain the size and alignment granularity of the current member. For string members, calculate their occupied space by calling the brand's string word length conversion rules (e.g., 2 bytes header plus n bytes content in Siemens S7, and [(n+1) / 2] words in Keyence KV); for array members, calculate the size of a single element multiplied by the array length; for structure reference members, recursively call the layout engine to calculate the complete layout of the referenced structure and obtain its total size.

[0062] Step S210: Round the current cursor up to an integer multiple of align (i.e., cursor = [cursor / align] × align).

[0063] Step S211: Assign the current member's byte offset byte_offset to cursor and the bit offset bit_offset to 0, then advance cursor forward by size basic addressing units.

[0064] Step S212: Determine whether all members have been processed. If not, return to step S202 to continue processing the next member; if yes, proceed to step S213.

[0065] Step S213: Based on the instance span alignment and padding rules in the target brand's memory alignment rules, round up the totalSize of the structure to an integer multiple of the alignment unit, and use this value as the instance span stride of the structure under the target brand. By calculating the instance span, when multiple instances of the same structure need to be stored in contiguous memory space (such as a structure array in a PLC), the starting address of each instance can be accurately located.

[0066] Figure 3 This illustrates the process by which the layout engine recursively calculates offsets for nested structures. See also... Figure 3 When a member in a structure description references another structure (i.e., the data type is a structure reference), the layout engine processes the nested structure recursively. Step S301: When laying out the outer structure, a member of type structure reference is encountered.

[0067] Step S302: Obtain the complete definition of the substructure referenced by the member.

[0068] Step S303: Using the substructure as input, call the layout engine to calculate the complete layout of the substructure according to the memory alignment rules of the same target PLC brand. This recursive call returns the substructure's total size subTotalSize and alignment requirement subAlign under the target brand.

[0069] Step S304: Treat the substructure as a regular member of the outer structure, using subTotalSize as the member's size and subAlign as the member's alignment granularity, and follow... Figure 2 The process shown calculates the byte offset of the member in the outer structure.

[0070] Step S305: Record the actual offset of each member within the substructure in the outer structure as: the byte_offset of the substructure member plus the relative byte_offset of each member within the substructure. Through this recursive method, regardless of the nesting depth, each member at each level can obtain an accurate offset under the target brand, avoiding offset misalignment caused by incorrect handling of alignment rules within nested structures.

[0071] The method of the present invention is illustrated below with a specific example. Assume the user has defined the following brand-independent structure description: Structure name: MotorStatus Member list: Member 1: Name: Running, Data Type: Boolean Member 2: Name: Fault, Data Type: Boolean Member 3: Name: Speed, Data Type: Short Integer Member 4: Name: Temperature, Data Type: Single-precision floating-point When the user specifies the target PLC brand as Siemens S7 (byte addressing, boolean bit-packed, short integer alignment granularity of 2 bytes), the layout engine follows... Figure 2 The process shown calculates: Running's byte_offset=0, bit_offset=0; Fault's byte_offset=0, bit_offset=1; Speed's byte_offset=2, bit_offset=0; Temperature's byte_offset=4, bit_offset=0; the total structure length is 8 bytes, and the instance stride=8.

[0072] When the user specifies the target PLC brand as Keyence KV (word addressing, booleans are packed within words, and short integers are aligned to word boundaries), the layout engine recalculates: Running's byte_offset=0, bit_offset=0; Fault's byte_offset=0, bit_offset=1; Speed's byte_offset=2 (i.e., word 1), bit_offset=0; Temperature's byte_offset=4 (i.e., word 2), bit_offset=0; the total structure length is 8 bytes (4 words), and the instance stride=8. A comparison of the two examples shows that the same brand-independent structure description achieves its correct physical layout under different brands. Engineers do not need to understand the alignment rules details of each brand, nor do they need to manually calculate any offsets.

[0073] Figure 4 The process of cross-brand consistency verification is illustrated. When the user specifies at least two target PLC brands (e.g., Siemens S7 and Keyence KV are selected simultaneously), the layout engine calculates the offset of each member in the same structure description information in the respective brand's memory space according to the memory alignment rules of each brand, and then performs the following verification steps: Step S401: Obtain the first layout result under the first brand and the second layout result under the second brand, which are described by the same structure.

[0074] Step S402: Perform a member-level comparison between the first layout result and the second layout result. The comparison includes, but is not limited to: whether the member correspondence is consistent (i.e., whether the member names and declaration order under the two brands correspond one-to-one), whether the member types are compatible, whether the offsets of the same member under different brands are consistent, whether the size of nested structures is consistent under different brands, and whether the capacity of strings or arrays is truncated under each brand.

[0075] Step S403: If any of the above inconsistencies are found, generate consistency verification information. This verification information includes difference identification information that can locate the specific member path (e.g., identifying the specific member with the difference in the format "structure name.member name.submember name"). For example, if a string member can store 20 characters under Siemens S7 but can only store 19 characters under Keyence KV due to different word length conversion rules, the verification information will locate that member and indicate the capacity difference. Through the above member-level comparison, engineers can discover potential compatibility issues in cross-brand layouts during the design phase, avoiding data exchange errors only being discovered at runtime. The information that can locate specific members also significantly reduces troubleshooting costs.

[0076] Step S404: Output consistency verification information.

[0077] Figure 5 This illustrates the process of structure-aware cross-brand data transfer. When data needs to be transferred from a first-brand PLC to a second-brand PLC (e.g., from a Siemens S7 to a Keyence KV), this invention employs the following steps: Step S501: Obtain the first layout result under the first brand and the second layout result under the second brand.

[0078] Step S502: According to the memory alignment rules and byte order of the first brand, parse the intermediate value corresponding to the structure description information from the original bytes of the first brand PLC. The intermediate value is a brand-independent pure semantic value—Boolean types are parsed as true / false, integers and floating-point types are restored to numerical values, and string types are decoded into Unicode strings according to the first brand's encoding method (such as ASCII / UTF-8 for S7 or GBK for KV). By parsing into brand-independent intermediate values, the data is decoupled from the physical representation of the source brand.

[0079] Step S503: Serialize the intermediate value into the original bytes of the second brand PLC according to the memory alignment rules and byte order of the second brand. For example, if a floating-point variable in the source brand S7 is stored in big-endian byte order and the target brand KV is stored in little-endian byte order, then byte order conversion will be performed automatically during serialization; if a string in the source brand is stored as a 2-byte header plus n bytes of content, and the target brand is stored as [(n+1) / 2] words, then format conversion will be performed automatically during serialization.

[0080] Step S504: Write the serialized raw bytes into the second-brand PLC. Through the above-described "parsing to intermediate values ​​→ reserialization" method, even if the bit order, word order, and string encoding of the first and second brands are completely different, the transferred data remains consistent in both numerical value and textual semantics. This differs from the existing technology that directly performs raw byte shifting between physical address blocks—the latter inevitably leads to data errors when encountering differences in bit order, word order, or encoding. This invention fundamentally solves this problem through structured parsing and serialization.

[0081] In this embodiment, the memory alignment rules for different PLC brands also include the processing of internal logic instances within the PLC. Taking Siemens S7 as an example, timer instances (such as TON_TIME, TOF_TIME) occupy 16 bytes of storage space but are not used as SCADA data exchange objects, while edge detection instances (such as R_TRIG, F_TRIG) do not occupy instance space. During layout calculation, internal instances that occupy memory space but are not used as data exchange objects are included in the offset advance according to their fixed size, but are not exported as readable members; internal instances that do not occupy memory space are treated as zero-length. Through the above processing, it is ensured that the offset of subsequent readable data members is not affected by internal logic instances, and the member offset output by the engine corresponds completely to the actual readable and writable monitoring data.

[0082] In this embodiment, the memory alignment rules are registered in the rule base as pluggable rule objects. When a new PLC brand needs to be added, only the memory alignment rules corresponding to the new PLC brand (including basic addressing units, dimensions and alignment granularity of various data types, Boolean bit packing width, string word length conversion rules, instance span padding rules, etc.) need to be registered in the rule base. The layout engine itself does not need to be modified to support the layout calculation of the new PLC brand.

[0083] Figure 6 This diagram illustrates the modular architecture of the multi-PLC brand structure layout system of the present invention. See also... Figure 6 The system includes: The structure description module 601 is used to obtain structure description information unrelated to the PLC brand. The structure description information contains at least one member, each member including at least a member name and data type, and does not contain any physical address information of a specific PLC brand.

[0084] The brand selection module 602 is used to obtain the target PLC brand specified by the user.

[0085] The rule base module 603 stores memory alignment rules for at least two PLC brands. These memory alignment rules include, at a minimum, the size rules for the basic addressing units and data types of each brand. The alignment rules for each brand are registered in the rule base module as pluggable rule objects. When a new PLC brand needs to be added, only the memory alignment rules corresponding to the new PLC brand need to be registered with the rule base module; the layout engine module can support the addition of the new brand without modification.

[0086] The layout engine module 604 calculates the offset of each member in the structure description information within the memory space of the target PLC brand, based on the memory alignment rules corresponding to that brand. When a member references another structure, the layout engine module recursively calls itself to calculate the complete layout of the referenced structure. The layout engine module also calculates the instance span of the structure according to the target brand's memory alignment rules. When there are at least two target brands, the layout engine module calculates the offset of the same structure description information under each brand according to their respective alignment rules.

[0087] The verification module 605 is used to perform member-level comparison of the layout results calculated under at least two brands, determine whether there are cross-brand inconsistencies, and output consistency verification information.

[0088] The structure-aware transport module 606 is used to, when transporting data from a first-brand PLC to a second-brand PLC, parse the intermediate value corresponding to the structure description information from the original bytes of the first-brand PLC according to the memory alignment rules and byte order of the first brand, and then serialize the intermediate value into the original bytes of the second-brand PLC according to the memory alignment rules and byte order of the second brand before writing it into the second-brand PLC.

[0089] Output module 607 is used to output the offset of each member under the target PLC brand, as well as output consistency verification information.

[0090] The modules described above can be integrated into a single device or distributed across different devices connected via a communication network. The functionality of each module can be implemented through hardware, software, firmware, or any combination thereof.

[0091] This invention also provides a structure layout device for multiple PLC brands, including one or more processors and a storage device. The storage device is used to store one or more programs. When the one or more programs are executed by the one or more processors, the one or more processors implement the structure layout method described in any of the above method embodiments. By deploying this device in a standard industrial computer or embedded system, the above layout method can be run directly on conventional computing hardware.

[0092] This invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, it implements the structure layout method described in any of the above method embodiments. The computer-readable storage medium can be any tangible medium capable of storing program code, including but not limited to: USB flash drive, portable hard drive, read-only memory (ROM), random access memory (RAM), magnetic disk, optical disk, etc. Through this storage medium, the above layout method can be distributed and deployed as an independent software package, and complete layout functionality can be obtained after installation on any compatible device.

[0093] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0094] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A structural layout method for multiple PLC brands, characterized in that, Includes the following steps: Obtain structure description information unrelated to PLC brand; the structure description information contains at least one member, each member includes at least a member name and data type, and does not contain any physical address information of any specific PLC brand; Acquire the target PLC brand; Based on the memory alignment rules corresponding to the target PLC brand, calculate the offset of each member in the structure description information within the memory space of the target PLC brand; the memory alignment rules include at least the basic addressing unit and data type size rules of the target PLC brand. Output the offset of each member under the target PLC brand; The data type includes at least one of Boolean, integer, floating-point, and string types; the memory alignment rule also includes the alignment granularity of each data type under the target PLC brand; according to the memory alignment rule of the target PLC brand, the instance span of the structure defined by the structure description information under the target PLC brand is calculated; the memory alignment rule also includes the alignment padding rule for the structure instance span, which is used to round up the total length of the structure to an integer multiple of the alignment unit of the target PLC brand; The target PLC brand is at least two brands; For each of the at least two brands, calculate the offset of each member in the same structure description information in the respective memory space of each brand according to the memory alignment rules of each brand, and output the layout result for each brand.

2. The structural layout method for multiple PLC brands according to claim 1, characterized in that, When the data type of the member is Boolean, the offset includes the bit offset within the basic addressing unit where the member is located; the memory alignment rule also includes the bit packing strategy for Boolean members, which defines the allocation method when multiple Boolean members are arranged consecutively within the same basic addressing unit.

3. The structural layout method for multiple PLC brands according to claim 1, characterized in that, When the member is an array type, the offset also includes the step size between adjacent array elements; the memory alignment rule also includes the arrangement rule of array elements.

4. The structural layout method for multiple PLC brands according to claim 1, characterized in that, When the data type of the member is string, the memory alignment rule also includes a string word length conversion rule, which is used to calculate the number of bytes or words occupied by the string in the memory space of the target PLC brand based on the declared length of the string.

5. The structural layout method for multiple PLC brands according to claim 1, characterized in that, When the member references another structure, the complete layout of the referenced structure is calculated recursively according to the memory alignment rules of the target PLC brand. After obtaining the total size and alignment requirements of the referenced structure, the referenced structure is treated as a whole and used in the layout calculation of the current structure.

6. The structural layout method for multiple PLC brands according to claim 1, characterized in that, Also includes: The layout results calculated under the at least two brands are compared to determine whether there are cross-brand inconsistencies, and consistency verification information is output.

7. The structural layout method for multiple PLC brands according to claim 6, characterized in that, The comparison includes: comparing the layout results of the same structure description information under different brands at the member level, and determining whether at least one of the following situations exists: inconsistent member correspondence, incompatible member types, non-corresponding offsets of the same member under different brands, inconsistent sizes of nested structures under different brands, and truncated capacity of strings or arrays under different brands.

8. The structural layout method for multiple PLC brands according to claim 7, characterized in that, The consistency verification information includes difference identifiers that can be located to specific member paths.

9. The structural layout method for multiple PLC brands according to any one of claims 1 to 8, characterized in that, When transferring data from the first-brand PLC to the second-brand PLC, the following is also included: According to the memory alignment rules and byte order of the first brand, the intermediate value corresponding to the structure description information is parsed from the original bytes of the first brand PLC. According to the memory alignment rules and byte order of the second brand, the intermediate value is serialized into the raw bytes of the second brand PLC and written to the second brand PLC.

10. The structural layout method for multiple PLC brands according to claim 1, characterized in that, The memory alignment rules also include the processing rules for internal logical instances in the target PLC brand: internal instances that occupy memory space but are not used as data exchange objects are included in the offset advance according to their fixed size and are not exported as readable members; internal instances that do not occupy memory space are processed as zero length.

11. The structural layout method for multiple PLC brands according to claim 1, characterized in that, The memory alignment rules are registered in the rule base as pluggable rule objects; when a new PLC brand is added, the memory alignment rules corresponding to the new PLC brand are registered in the rule base.

12. A structural layout system for multiple PLC brands, characterized in that, include: The structure description module is used to obtain structure description information that is unrelated to the PLC brand; the structure description information contains at least one member, each member includes at least a member name and a data type, and does not contain any physical address information of any specific PLC brand; The rule base module is used to store memory alignment rules corresponding to at least two PLC brands; the memory alignment rules include at least the size rules of the basic addressing unit and data type of each brand. The layout engine module is used to calculate the offset of each member in the structure description information in the memory space of the target PLC brand according to the memory alignment rules corresponding to the target PLC brand. The layout engine module allocates the offset of each member after rounding up the current offset according to the alignment granularity in the memory alignment rules. The layout engine module calculates the instance span of the structure defined by the structure description information under the target PLC brand according to the memory alignment rules of the target PLC brand. The target PLC brand is at least two brands; the layout engine module calculates the offset of each member in the same structure description information in the respective memory space of each brand according to the memory alignment rules of each brand.

13. The structural layout system for multiple PLC brands according to claim 12, characterized in that, When a member references another structure, the layout engine module recursively calls itself to calculate the complete layout of the referenced structure. After obtaining the total size and alignment requirements of the referenced structure, the referenced structure is treated as a whole and participates in the layout calculation of the current structure.

14. The structural layout system for multiple PLC brands according to claim 12, characterized in that, The layout engine module allocates bit offsets for multiple consecutively arranged boolean members within the same basic addressing unit according to the boolean member bit packing strategy in the memory alignment rules.

15. The structural layout system for multiple PLC brands according to claim 12, characterized in that, The layout engine module calculates the number of bytes or words occupied by a string member in the memory space of the target PLC brand based on the string word length conversion rule in the memory alignment rule and the declared length of the string member.

16. The structural layout system for multiple PLC brands according to claim 12, characterized in that, It also includes a verification module, which is used to perform member-level comparison of the layout results calculated under the at least two brands, determine whether there are cross-brand inconsistencies, and output consistency verification information.

17. The structural layout system for multiple PLC brands according to claim 12, characterized in that, It also includes a structure-aware transport module, which, when transporting data from a first-brand PLC to a second-brand PLC, parses the intermediate value corresponding to the structure description information from the original bytes of the first-brand PLC according to the memory alignment rules and byte order of the first brand, and serializes the intermediate value into the original bytes of the second-brand PLC according to the memory alignment rules and byte order of the second brand before writing it into the second-brand PLC.

18. The structural layout system for multiple PLC brands according to claim 12, characterized in that, The memory alignment rules in the rule base module are registered in the form of pluggable rule objects. When a new PLC brand is added, the memory alignment rules corresponding to the new PLC brand are registered with the rule base module. The layout engine module performs layout calculations based on the rules of the new brand.

19. A structural layout device for multiple PLC brands, characterized in that, include: One or more processors; Storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described in any one of claims 1 to 11.

20. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 11.

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